From 42f73781d0854d751c8151cda987a955a11e97e8 Mon Sep 17 00:00:00 2001 From: Markus Wegmann Date: Sat, 7 Jan 2017 10:49:56 +0100 Subject: [PATCH] Add handling for NO_JUMP_ADDER in prefetcher --- include/riscv_config.sv | 10 ++++++++++ prefetch_buffer_only_aligned.sv | 2 -- prefetch_buffer_small.sv | 12 ++++++++++++ 3 files changed, 22 insertions(+), 2 deletions(-) diff --git a/include/riscv_config.sv b/include/riscv_config.sv index b74c7bce..a60cf22d 100644 --- a/include/riscv_config.sv +++ b/include/riscv_config.sv @@ -113,6 +113,16 @@ // will split ALU Adder in half and use two cycles to add operands `define SPLITTED_ADDER + +`ifdef SMALL_IF +`ifndef JUMP_IN_ID +// CONFIG: NO_JUMP_ADDER +// will use ALU adder to calculate target and return address from prefetcher +`define NO_JUMP_ADDER + +`endif +`endif + `endif `endif `endif diff --git a/prefetch_buffer_only_aligned.sv b/prefetch_buffer_only_aligned.sv index 5e331772..5cd359d0 100644 --- a/prefetch_buffer_only_aligned.sv +++ b/prefetch_buffer_only_aligned.sv @@ -74,9 +74,7 @@ module riscv_prefetch_buffer_only_aligned assign busy_o = (CS != IDLE) || instr_req_o; assign addr_is_misaligned = (fetch_addr_Q[1] == 1'b1); // Check if address is misaligned - assign instr_is_in_regs = (fetch_valid_Q && addr_is_misaligned); - assign instr_mux = fetch_valid_Q ? fetch_rdata_Q : instr_rdata_i; assign fetch_rdata_n = instr_mux; diff --git a/prefetch_buffer_small.sv b/prefetch_buffer_small.sv index 8fc0dad2..2ddc7709 100644 --- a/prefetch_buffer_small.sv +++ b/prefetch_buffer_small.sv @@ -213,6 +213,12 @@ module riscv_prefetch_buffer_small WAIT_GNT: begin instr_req_o = 1'b1; instr_addr_o = {fetch_addr_Q[31:2], 2'b00}; + + // CONFIG_REGION: NO_JUMP_ADDER + `ifdef NO_JUMP_ADDER + if (is_second_fetch_n) + addr_o = last_fetch_addr_Q; + `endif if (~branch_i) begin if (instr_gnt_i) @@ -242,6 +248,12 @@ module riscv_prefetch_buffer_small WAIT_RVALID: begin + // CONFIG_REGION: NO_JUMP_ADDER + `ifdef NO_JUMP_ADDER + if (is_second_fetch_n) + addr_o = last_fetch_addr_Q; + `endif + if (~branch_i) begin NS = WAIT_RVALID;