diff --git a/rtl/ibex_cs_registers.sv b/rtl/ibex_cs_registers.sv
index abf4088f..9091e928 100644
--- a/rtl/ibex_cs_registers.sv
+++ b/rtl/ibex_cs_registers.sv
@@ -319,6 +319,12 @@ module ibex_cs_registers #(
         csr_rdata_int[CSR_MFIX_BIT_HIGH:CSR_MFIX_BIT_LOW] = mie_q.irq_fast;
       end
 
+      // mcounteren: machine counter enable
+      CSR_MCOUNTEREN: begin
+        csr_rdata_int = '0;
+        illegal_csr   = ~DbgTriggerEn;
+      end
+
       CSR_MSCRATCH: csr_rdata_int = mscratch_q;
 
       // mtvec: trap-vector base address
diff --git a/rtl/ibex_pkg.sv b/rtl/ibex_pkg.sv
index d42b9d2a..b982c50c 100644
--- a/rtl/ibex_pkg.sv
+++ b/rtl/ibex_pkg.sv
@@ -358,6 +358,7 @@ typedef enum logic[11:0] {
   CSR_MISA      = 12'h301,
   CSR_MIE       = 12'h304,
   CSR_MTVEC     = 12'h305,
+  CSR_MCOUNTEREN= 12'h306,
 
   // Machine trap handling
   CSR_MSCRATCH  = 12'h340,