diff --git a/include/riscv_config.sv b/include/riscv_config.sv index 13a662d5..9d3e310f 100644 --- a/include/riscv_config.sv +++ b/include/riscv_config.sv @@ -121,10 +121,12 @@ `define MERGE_ID_EX `ifdef SMALL_IF +`ifdef MERGE_ID_EX // CONFIG: NO_JUMP_ADDER // will use ALU adder to calculate target and get return address from prefetcher `define NO_JUMP_ADDER `endif +`endif `endif `endif diff --git a/scripts/example_configs/00_all_features_enabled.sv b/scripts/example_configs/00_all_features_enabled.sv index 8c7b3236..05f307a7 100644 --- a/scripts/example_configs/00_all_features_enabled.sv +++ b/scripts/example_configs/00_all_features_enabled.sv @@ -113,22 +113,20 @@ // will split ALU Adder in half and use two cycles to add operands //`define SPLITTED_ADDER -`ifdef SMALL_IF -`ifndef JUMP_IN_ID -// CONFIG: NO_JUMP_ADDER -// (NOT IMPLEMENTED!!!) will use ALU adder to calculate target and return address from prefetcher -//`define NO_JUMP_ADDER -`endif -`endif - - `ifndef SPLITTED_ADDER -`ifndef NO_JUMP_ADDER `ifdef JUMP_IN_ID // CONFIG: MERGE_ID_EX // will merge/fuse the ID and EX stage //`define MERGE_ID_EX + +`ifdef SMALL_IF +`ifdef MERGE_ID_EX +// CONFIG: NO_JUMP_ADDER +// will use ALU adder to calculate target and get return address from prefetcher +//`define NO_JUMP_ADDER `endif +`endif + `endif `endif diff --git a/scripts/example_configs/01_no_mul.sv b/scripts/example_configs/01_no_mul.sv index 9a4777ef..0149a346 100644 --- a/scripts/example_configs/01_no_mul.sv +++ b/scripts/example_configs/01_no_mul.sv @@ -113,22 +113,20 @@ // will split ALU Adder in half and use two cycles to add operands //`define SPLITTED_ADDER -`ifdef SMALL_IF -`ifndef JUMP_IN_ID -// CONFIG: NO_JUMP_ADDER -// (NOT IMPLEMENTED!!!) will use ALU adder to calculate target and return address from prefetcher -//`define NO_JUMP_ADDER -`endif -`endif - - `ifndef SPLITTED_ADDER -`ifndef NO_JUMP_ADDER `ifdef JUMP_IN_ID // CONFIG: MERGE_ID_EX // will merge/fuse the ID and EX stage //`define MERGE_ID_EX + +`ifdef SMALL_IF +`ifdef MERGE_ID_EX +// CONFIG: NO_JUMP_ADDER +// will use ALU adder to calculate target and get return address from prefetcher +//`define NO_JUMP_ADDER `endif +`endif + `endif `endif diff --git a/scripts/example_configs/02_no_mul_no_vec.sv b/scripts/example_configs/02_no_mul_no_vec.sv index bfd3a875..6b72e105 100644 --- a/scripts/example_configs/02_no_mul_no_vec.sv +++ b/scripts/example_configs/02_no_mul_no_vec.sv @@ -117,22 +117,20 @@ // will split ALU Adder in half and use two cycles to add operands //`define SPLITTED_ADDER -`ifdef SMALL_IF -`ifndef JUMP_IN_ID -// CONFIG: NO_JUMP_ADDER -// (NOT IMPLEMENTED!!!) will use ALU adder to calculate target and return address from prefetcher -//`define NO_JUMP_ADDER -`endif -`endif - - `ifndef SPLITTED_ADDER -`ifndef NO_JUMP_ADDER `ifdef JUMP_IN_ID // CONFIG: MERGE_ID_EX // will merge/fuse the ID and EX stage //`define MERGE_ID_EX + +`ifdef SMALL_IF +`ifdef MERGE_ID_EX +// CONFIG: NO_JUMP_ADDER +// will use ALU adder to calculate target and get return address from prefetcher +//`define NO_JUMP_ADDER `endif +`endif + `endif `endif diff --git a/scripts/example_configs/03_no_mul_no_vec_no_hwlp.sv b/scripts/example_configs/03_no_mul_no_vec_no_hwlp.sv index a6625e04..8e38fb8f 100644 --- a/scripts/example_configs/03_no_mul_no_vec_no_hwlp.sv +++ b/scripts/example_configs/03_no_mul_no_vec_no_hwlp.sv @@ -113,21 +113,20 @@ // will split ALU Adder in half and use two cycles to add operands //`define SPLITTED_ADDER -`ifdef SMALL_IF -`ifndef JUMP_IN_ID -// CONFIG: NO_JUMP_ADDER -// (NOT IMPLEMENTED!!!) will use ALU adder to calculate target and return address from prefetcher -//`define NO_JUMP_ADDER -`endif -`endif - - `ifndef SPLITTED_ADDER -`ifndef NO_JUMP_ADDER `ifdef JUMP_IN_ID // CONFIG: MERGE_ID_EX // will merge/fuse the ID and EX stage //`define MERGE_ID_EX + +`ifdef SMALL_IF +`ifdef MERGE_ID_EX +// CONFIG: NO_JUMP_ADDER +// will use ALU adder to calculate target and get return address from prefetcher +//`define NO_JUMP_ADDER +`endif +`endif + `endif `endif `endif diff --git a/scripts/example_configs/04_no_mul_no_vec_no_hwlp_no_bit.sv b/scripts/example_configs/04_no_mul_no_vec_no_hwlp_no_bit.sv index 5481eee0..cc0c9df0 100644 --- a/scripts/example_configs/04_no_mul_no_vec_no_hwlp_no_bit.sv +++ b/scripts/example_configs/04_no_mul_no_vec_no_hwlp_no_bit.sv @@ -113,22 +113,20 @@ // will split ALU Adder in half and use two cycles to add operands //`define SPLITTED_ADDER -`ifdef SMALL_IF -`ifndef JUMP_IN_ID -// CONFIG: NO_JUMP_ADDER -// (NOT IMPLEMENTED!!!) will use ALU adder to calculate target and return address from prefetcher -//`define NO_JUMP_ADDER -`endif -`endif - - `ifndef SPLITTED_ADDER -`ifndef NO_JUMP_ADDER `ifdef JUMP_IN_ID // CONFIG: MERGE_ID_EX // will merge/fuse the ID and EX stage //`define MERGE_ID_EX + +`ifdef SMALL_IF +`ifdef MERGE_ID_EX +// CONFIG: NO_JUMP_ADDER +// will use ALU adder to calculate target and get return address from prefetcher +//`define NO_JUMP_ADDER `endif +`endif + `endif `endif diff --git a/scripts/example_configs/05_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost.sv b/scripts/example_configs/05_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost.sv index 2f3dcd66..e2c2a6c6 100644 --- a/scripts/example_configs/05_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost.sv +++ b/scripts/example_configs/05_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost.sv @@ -113,22 +113,20 @@ // will split ALU Adder in half and use two cycles to add operands //`define SPLITTED_ADDER -`ifdef SMALL_IF -`ifndef JUMP_IN_ID -// CONFIG: NO_JUMP_ADDER -// (NOT IMPLEMENTED!!!) will use ALU adder to calculate target and return address from prefetcher -//`define NO_JUMP_ADDER -`endif -`endif - - `ifndef SPLITTED_ADDER -`ifndef NO_JUMP_ADDER `ifdef JUMP_IN_ID // CONFIG: MERGE_ID_EX // will merge/fuse the ID and EX stage //`define MERGE_ID_EX + +`ifdef SMALL_IF +`ifdef MERGE_ID_EX +// CONFIG: NO_JUMP_ADDER +// will use ALU adder to calculate target and get return address from prefetcher +//`define NO_JUMP_ADDER `endif +`endif + `endif `endif diff --git a/scripts/example_configs/06_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special.sv b/scripts/example_configs/06_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special.sv index 5b4237b3..43a5b863 100644 --- a/scripts/example_configs/06_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special.sv +++ b/scripts/example_configs/06_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special.sv @@ -113,22 +113,20 @@ // will split ALU Adder in half and use two cycles to add operands //`define SPLITTED_ADDER -`ifdef SMALL_IF -`ifndef JUMP_IN_ID -// CONFIG: NO_JUMP_ADDER -// (NOT IMPLEMENTED!!!) will use ALU adder to calculate target and return address from prefetcher -//`define NO_JUMP_ADDER -`endif -`endif - - `ifndef SPLITTED_ADDER -`ifndef NO_JUMP_ADDER `ifdef JUMP_IN_ID // CONFIG: MERGE_ID_EX // will merge/fuse the ID and EX stage //`define MERGE_ID_EX + +`ifdef SMALL_IF +`ifdef MERGE_ID_EX +// CONFIG: NO_JUMP_ADDER +// will use ALU adder to calculate target and get return address from prefetcher +//`define NO_JUMP_ADDER `endif +`endif + `endif `endif diff --git a/scripts/example_configs/07_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs.sv b/scripts/example_configs/07_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs.sv index 080769b3..55f6e571 100644 --- a/scripts/example_configs/07_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs.sv +++ b/scripts/example_configs/07_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs.sv @@ -113,22 +113,20 @@ // will split ALU Adder in half and use two cycles to add operands //`define SPLITTED_ADDER -`ifdef SMALL_IF -`ifndef JUMP_IN_ID -// CONFIG: NO_JUMP_ADDER -// (NOT IMPLEMENTED!!!) will use ALU adder to calculate target and return address from prefetcher -//`define NO_JUMP_ADDER -`endif -`endif - - `ifndef SPLITTED_ADDER -`ifndef NO_JUMP_ADDER `ifdef JUMP_IN_ID // CONFIG: MERGE_ID_EX // will merge/fuse the ID and EX stage //`define MERGE_ID_EX + +`ifdef SMALL_IF +`ifdef MERGE_ID_EX +// CONFIG: NO_JUMP_ADDER +// will use ALU adder to calculate target and get return address from prefetcher +//`define NO_JUMP_ADDER `endif +`endif + `endif `endif diff --git a/scripts/example_configs/08_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs_with_simplealu.sv b/scripts/example_configs/08_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs_with_simplealu.sv index 47d77965..1bfd52c8 100644 --- a/scripts/example_configs/08_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs_with_simplealu.sv +++ b/scripts/example_configs/08_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs_with_simplealu.sv @@ -113,22 +113,20 @@ // will split ALU Adder in half and use two cycles to add operands //`define SPLITTED_ADDER -`ifdef SMALL_IF -`ifndef JUMP_IN_ID -// CONFIG: NO_JUMP_ADDER -// (NOT IMPLEMENTED!!!) will use ALU adder to calculate target and return address from prefetcher -//`define NO_JUMP_ADDER -`endif -`endif - - `ifndef SPLITTED_ADDER -`ifndef NO_JUMP_ADDER `ifdef JUMP_IN_ID // CONFIG: MERGE_ID_EX // will merge/fuse the ID and EX stage //`define MERGE_ID_EX + +`ifdef SMALL_IF +`ifdef MERGE_ID_EX +// CONFIG: NO_JUMP_ADDER +// will use ALU adder to calculate target and get return address from prefetcher +//`define NO_JUMP_ADDER `endif +`endif + `endif `endif diff --git a/scripts/example_configs/09_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs_with_simplealu_with_smallif.sv b/scripts/example_configs/09_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs_with_simplealu_with_smallif.sv index 58bb0ec0..2d897668 100644 --- a/scripts/example_configs/09_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs_with_simplealu_with_smallif.sv +++ b/scripts/example_configs/09_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs_with_simplealu_with_smallif.sv @@ -114,22 +114,20 @@ // will split ALU Adder in half and use two cycles to add operands //`define SPLITTED_ADDER -`ifdef SMALL_IF -`ifndef JUMP_IN_ID -// CONFIG: NO_JUMP_ADDER -// (NOT IMPLEMENTED!!!) will use ALU adder to calculate target and return address from prefetcher -//`define NO_JUMP_ADDER -`endif -`endif - - `ifndef SPLITTED_ADDER -`ifndef NO_JUMP_ADDER `ifdef JUMP_IN_ID // CONFIG: MERGE_ID_EX // will merge/fuse the ID and EX stage //`define MERGE_ID_EX + +`ifdef SMALL_IF +`ifdef MERGE_ID_EX +// CONFIG: NO_JUMP_ADDER +// will use ALU adder to calculate target and get return address from prefetcher +//`define NO_JUMP_ADDER `endif +`endif + `endif `endif diff --git a/scripts/example_configs/10_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs_with_simplealu_with_smallif_no_jumpinid.sv b/scripts/example_configs/10_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs_with_simplealu_with_smallif_no_jumpinid.sv index a3111d24..78b67218 100644 --- a/scripts/example_configs/10_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs_with_simplealu_with_smallif_no_jumpinid.sv +++ b/scripts/example_configs/10_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs_with_simplealu_with_smallif_no_jumpinid.sv @@ -113,22 +113,20 @@ // will split ALU Adder in half and use two cycles to add operands //`define SPLITTED_ADDER -`ifdef SMALL_IF -`ifndef JUMP_IN_ID -// CONFIG: NO_JUMP_ADDER -// (NOT IMPLEMENTED!!!) will use ALU adder to calculate target and return address from prefetcher -//`define NO_JUMP_ADDER -`endif -`endif - - `ifndef SPLITTED_ADDER -`ifndef NO_JUMP_ADDER `ifdef JUMP_IN_ID // CONFIG: MERGE_ID_EX // will merge/fuse the ID and EX stage //`define MERGE_ID_EX + +`ifdef SMALL_IF +`ifdef MERGE_ID_EX +// CONFIG: NO_JUMP_ADDER +// will use ALU adder to calculate target and get return address from prefetcher +//`define NO_JUMP_ADDER `endif +`endif + `endif `endif diff --git a/scripts/example_configs/11_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs_with_simplealu_with_smallif_rv32e.sv b/scripts/example_configs/11_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs_with_simplealu_with_smallif_rv32e.sv index 9f3ec855..b8963c26 100644 --- a/scripts/example_configs/11_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs_with_simplealu_with_smallif_rv32e.sv +++ b/scripts/example_configs/11_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs_with_simplealu_with_smallif_rv32e.sv @@ -114,22 +114,20 @@ // will split ALU Adder in half and use two cycles to add operands //`define SPLITTED_ADDER -`ifdef SMALL_IF -`ifndef JUMP_IN_ID -// CONFIG: NO_JUMP_ADDER -// (NOT IMPLEMENTED!!!) will use ALU adder to calculate target and return address from prefetcher -//`define NO_JUMP_ADDER -`endif -`endif - - `ifndef SPLITTED_ADDER -`ifndef NO_JUMP_ADDER `ifdef JUMP_IN_ID // CONFIG: MERGE_ID_EX // will merge/fuse the ID and EX stage //`define MERGE_ID_EX + +`ifdef SMALL_IF +`ifdef MERGE_ID_EX +// CONFIG: NO_JUMP_ADDER +// will use ALU adder to calculate target and get return address from prefetcher +//`define NO_JUMP_ADDER `endif +`endif + `endif `endif diff --git a/scripts/example_configs/12_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs_with_simplealu_with_smallif_rv32e_with_splittedadder.sv b/scripts/example_configs/12_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs_with_simplealu_with_smallif_rv32e_with_splittedadder.sv index 8c84f622..9708b1e6 100644 --- a/scripts/example_configs/12_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs_with_simplealu_with_smallif_rv32e_with_splittedadder.sv +++ b/scripts/example_configs/12_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs_with_simplealu_with_smallif_rv32e_with_splittedadder.sv @@ -114,22 +114,20 @@ // will split ALU Adder in half and use two cycles to add operands `define SPLITTED_ADDER -`ifdef SMALL_IF -`ifndef JUMP_IN_ID -// CONFIG: NO_JUMP_ADDER -// (NOT IMPLEMENTED!!!) will use ALU adder to calculate target and return address from prefetcher -//`define NO_JUMP_ADDER -`endif -`endif - - `ifndef SPLITTED_ADDER -`ifndef NO_JUMP_ADDER `ifdef JUMP_IN_ID // CONFIG: MERGE_ID_EX // will merge/fuse the ID and EX stage //`define MERGE_ID_EX + +`ifdef SMALL_IF +`ifdef MERGE_ID_EX +// CONFIG: NO_JUMP_ADDER +// will use ALU adder to calculate target and get return address from prefetcher +//`define NO_JUMP_ADDER `endif +`endif + `endif `endif diff --git a/scripts/example_configs/13_rv32e_merged_pipeline.sv b/scripts/example_configs/13_rv32e_merged_pipeline.sv index 9cb2edc5..c352032d 100644 --- a/scripts/example_configs/13_rv32e_merged_pipeline.sv +++ b/scripts/example_configs/13_rv32e_merged_pipeline.sv @@ -113,22 +113,20 @@ // will split ALU Adder in half and use two cycles to add operands //`define SPLITTED_ADDER -`ifdef SMALL_IF -`ifndef JUMP_IN_ID -// CONFIG: NO_JUMP_ADDER -// (NOT IMPLEMENTED!!!) will use ALU adder to calculate target and return address from prefetcher -//`define NO_JUMP_ADDER -`endif -`endif - - `ifndef SPLITTED_ADDER -`ifndef NO_JUMP_ADDER `ifdef JUMP_IN_ID // CONFIG: MERGE_ID_EX // will merge/fuse the ID and EX stage `define MERGE_ID_EX + +`ifdef SMALL_IF +`ifdef MERGE_ID_EX +// CONFIG: NO_JUMP_ADDER +// will use ALU adder to calculate target and get return address from prefetcher +//`define NO_JUMP_ADDER `endif +`endif + `endif `endif diff --git a/scripts/example_configs/14_rv32e_merged_pipeline_only_aligned.sv b/scripts/example_configs/14_rv32e_merged_pipeline_only_aligned.sv index dabc532c..67b7d3d7 100644 --- a/scripts/example_configs/14_rv32e_merged_pipeline_only_aligned.sv +++ b/scripts/example_configs/14_rv32e_merged_pipeline_only_aligned.sv @@ -112,22 +112,20 @@ // will split ALU Adder in half and use two cycles to add operands //`define SPLITTED_ADDER +`ifndef SPLITTED_ADDER +`ifdef JUMP_IN_ID +// CONFIG: MERGE_ID_EX +// will merge/fuse the ID and EX stage +//`define MERGE_ID_EX + `ifdef SMALL_IF -`ifndef JUMP_IN_ID +`ifdef MERGE_ID_EX // CONFIG: NO_JUMP_ADDER -// (NOT IMPLEMENTED!!!) will use ALU adder to calculate target and return address from prefetcher +// will use ALU adder to calculate target and get return address from prefetcher //`define NO_JUMP_ADDER `endif `endif - -`ifndef SPLITTED_ADDER -`ifndef NO_JUMP_ADDER -`ifdef JUMP_IN_ID -// CONFIG: MERGE_ID_EX -// will merge/fuse the ID and EX stage -`define MERGE_ID_EX -`endif `endif `endif diff --git a/scripts/example_configs/15_rv32e_merged_pipeline_only_aligned_no_jumpadder.sv b/scripts/example_configs/15_rv32e_merged_pipeline_only_aligned_no_jumpadder.sv new file mode 100644 index 00000000..21f7c682 --- /dev/null +++ b/scripts/example_configs/15_rv32e_merged_pipeline_only_aligned_no_jumpadder.sv @@ -0,0 +1,137 @@ +// Copyright 2015 ETH Zurich and University of Bologna. +// Copyright and related rights are licensed under the Solderpad Hardware +// License, Version 0.51 (the “License”); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://solderpad.org/licenses/SHL-0.51. Unless required by applicable law +// or agreed to in writing, software, hardware and materials distributed under +// this License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR +// CONDITIONS OF ANY KIND, either express or implied. See the License for the +// specific language governing permissions and limitations under the License. + +//////////////////////////////////////////////////////////////////////////////// +// Engineer: Michael Gautschi - gautschi@iis.ee.ethz.ch // +// // +// Additional contributions by: // +// // +// Markus Wegmann - markus.wegmann@technokrat.ch // +// // +// Design Name: RISC-V config file // +// Project Name: RI5CY // +// Language: SystemVerilog // +// // +// Description: Configure optional simulation modules // +// // +//////////////////////////////////////////////////////////////////////////////// + +// no traces for synthesis, they are not synthesizable +`ifndef SYNTHESIS +`ifndef PULP_FPGA_EMUL +`define TRACE_EXECUTION +`endif +//`define SIMCHECKER +`endif + + +// littleRISCV configuration. + +// Decomment to enable. + +// The format should be strictly followed so the ri5cly-manage tool can parse the configuration +// A CONFIG section declares a config definition, a CONFIG_REGION enables the tool to remove disabled code +// for export. See the ri5cly-manage.py tool help and source code in the /scripts folder for more information. + + +// CONFIG: MUL_SUPPORT +// will enable RISCV32M support for multiplication, division, MAC operations. Uses a lot of multiplications +//`define MUL_SUPPORT + +// CONFIG: VEC_SUPPORT +// will enable RISCV32V support for vector operations. +//`define VEC_SUPPORT + +// CONFIG: HWLP_SUPPORT +// will enable hardware loop support. +//`define HWLP_SUPPORT + +// CONFIG: BIT_SUPPORT +// will enable bit manipulation and counting support. +//`define BIT_SUPPORT + +// CONFIG: LSU_ADDER_SUPPORT +// will enable an additional adder in the LSU for better timings. +//`define LSU_ADDER_SUPPORT + +`ifdef LSU_ADDER_SUPPORT + +// CONFIG: PREPOST_SUPPORT +// will enable pre/post increment load/store support support. +//`define PREPOST_SUPPORT + +`endif // LSU_ADDER_SUPPORT + +// CONFIG: MATH_SPECIAL_SUPPORT +// will enable clip, min and max operations support. +//`define MATH_SPECIAL_SUPPORT + +// CONFIG: JUMP_IN_ID +// will enable direct jump in ID. Might increase critical path of jump target. +`define JUMP_IN_ID + + +// Dependent definitions + +// CONFIG: THREE_PORT_REG_FILE +// enables 3r2w reg file (rather than 2r1w) +//`define THREE_PORT_REG_FILE + + +`ifndef MUL_SUPPORT +`ifndef VEC_SUPPORT +`ifndef BIT_SUPPORT +`ifndef LSU_ADDER_SUPPORT +`ifndef PREPOST_SUPPORT +`ifndef MATH_SPECIAL_SUPPORT + +// CONFIG: SIMPLE_ALU +// will enable simplified ALU for less gates. It does not support vectors, shuffling, nor bit operations. +`define SIMPLE_ALU + +// CONFIG: SMALL_IF +// will disable large FIFO in IF stage and use a more simple one. +`define SMALL_IF + +// CONFIG: RV32E +// will reduce the register file to 16 words +`define RV32E + +// CONFIG: ONLY_ALIGNED +// will only allow aligned memory accesses and therefore overlapping mustn't occur +`define ONLY_ALIGNED + +// CONFIG: SPLITTED_ADDER +// will split ALU Adder in half and use two cycles to add operands +//`define SPLITTED_ADDER + +`ifndef SPLITTED_ADDER +`ifdef JUMP_IN_ID +// CONFIG: MERGE_ID_EX +// will merge/fuse the ID and EX stage +//`define MERGE_ID_EX + +`ifdef SMALL_IF +`ifdef MERGE_ID_EX +// CONFIG: NO_JUMP_ADDER +// will use ALU adder to calculate target and get return address from prefetcher +`define NO_JUMP_ADDER +`endif +`endif + +`endif +`endif + +`endif +`endif +`endif +`endif +`endif +`endif