From 7710947fe6e624d3f6fe9c30a9cca8ab3fa86eaa Mon Sep 17 00:00:00 2001
From: Udi <udij@google.com>
Date: Mon, 4 May 2020 17:16:09 -0700
Subject: [PATCH] [dv] enable writeback stage and branch ALU

Signed-off-by: Udi <udij@google.com>
---
 dv/uvm/core_ibex/tb/core_ibex_tb_top.sv | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv b/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv
index 96bfc696..a0f1c365 100644
--- a/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv
+++ b/dv/uvm/core_ibex/tb/core_ibex_tb_top.sv
@@ -30,6 +30,8 @@ module core_ibex_tb_top;
     .DmHaltAddr(`BOOT_ADDR + 'h0),
     .DmExceptionAddr(`BOOT_ADDR + 'h4),
     .PMPEnable(1'b1),
+    .BranchTargetALU(1'b1),
+    .WritebackStage(1'b1),
     .RV32B(1'b1)
   ) dut (
     .clk_i(clk),