diff --git a/riscv_core.sv b/riscv_core.sv
index e3d99562..1e67434a 100644
--- a/riscv_core.sv
+++ b/riscv_core.sv
@@ -863,7 +863,7 @@ module riscv_core
     // CONFIG_REGION: MERGE_ID_EX
     `ifdef MERGE_ID_EX
     .misaligned_addr_o     ( misaligned_addr    ),
-    .first_cycle_misaligned( first_cycle_misaligned),
+    .first_cycle_misaligned_o( first_cycle_misaligned),
     `endif
     `endif // ONLY_ALIGNED