From a696658a968ab4cb6c72733ee9145ac814c031a9 Mon Sep 17 00:00:00 2001
From: Markus Wegmann <atokulus@gmail.com>
Date: Wed, 4 Jan 2017 14:09:44 +0100
Subject: [PATCH] Set default littleRISCV setting to RV32E with misaligned
 access

---
 include/riscv_config.sv | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/include/riscv_config.sv b/include/riscv_config.sv
index 1ca84c08..45e877d7 100644
--- a/include/riscv_config.sv
+++ b/include/riscv_config.sv
@@ -101,6 +101,10 @@
 // will reduce the register file to 16 words
 `define RV32E
 
+// CONFIG: ONLY_ALIGNED
+// will only allow aligned memory accesses and therefore overlapping mustn't occur
+//`define ONLY_ALIGNED
+
 `endif
 `endif
 `endif