From b060d37d8d7c62d5364b5ef15872b00b3641e291 Mon Sep 17 00:00:00 2001 From: Rupert Swarbrick Date: Mon, 15 Jun 2020 17:56:41 +0100 Subject: [PATCH] Add ECC agents to ICache DV plan document --- dv/uvm/icache/doc/ibex_icache_dv_plan.md | 16 +- dv/uvm/icache/doc/tb.svg | 1477 ++++++++++++---------- 2 files changed, 850 insertions(+), 643 deletions(-) diff --git a/dv/uvm/icache/doc/ibex_icache_dv_plan.md b/dv/uvm/icache/doc/ibex_icache_dv_plan.md index e6c4877f..c699b27e 100644 --- a/dv/uvm/icache/doc/ibex_icache_dv_plan.md +++ b/dv/uvm/icache/doc/ibex_icache_dv_plan.md @@ -26,18 +26,22 @@ The testbench intentionally avoids knowing detailed information about the cache' This means that the testbench cannot compare the DUT with a reference model, nor can it model the exact requests that the DUT will make of instruction memory: the whole point of a cache is that it might avoid an instruction fetch. The cache has two main interfaces, which face the core and instruction bus respectively. -We model this with two agents: the *core agent* and the *memory agent*. +We model this with two main agents: the *core agent* and the *memory agent*. The core agent will emulate a core making instruction fetch requests from the cache and the memory agent will emulate the instruction bus. -In fact, there's one more logical interface: the `busy_o` signal from the cache. +In fact, there's one more logical interface at the top-level: the `busy_o` signal from the cache. This signal is passed up to top-level in the design and warns the chip not to clock-gate or reset the core (because there are bus transactions in flight, or a memory invalidation in progress). Rather than have an extra agent just for this single-bit passive signal, we pass the signal to the monitor in the core agent, which reports changes to the scoreboard. +Finally, we bind an interface in for each RAM in the cache. +These interfaces are controlled by instances of the *ECC agent*, which is in charge of injecting occasional one- and two-bit errors which should be spotted by the cache's ECC checks. + ![Testbench block diagram](tb.svg) -Both agents report events to the scoreboard. +Both main agents report events to the scoreboard. The core agent reports whether the cache is busy, every branch sent to the cache, invalidation requests, enabling/disabling the cache and every instruction fetched (address and contents). The memory agent reports every change of seed (see the [Memory Agent](#memory-agent) section below). +The ECC agents don't currently report to the scoreboard, since they aren't supposed to have any architectural effect. ### Agents @@ -73,6 +77,11 @@ The precise functions can be found in [`dv/uvm/icache/dv/ibex_icache_mem_agent/i The memory agent is an active slave, responding to instruction fetches from the cache with either a PMP error (on the same cycle as the request) or instruction data (with an in-order request pipeline). +#### ECC Agent + +Each ECC agent emulates possible data corruption in the cache's underlying memories. +The sole sequence causes occasional 1- or 2-bit errors, injected by XORing valid data from the underlying memory with a mask. + ### Top level testbench The top level testbench is located at [`dv/uvm/icache/dv/tb/tb.sv`](https://github.com/lowRISC/ibex/blob/master/dv/uvm/icache/dv/tb/tb.sv). It instantiates the `ibex_icache` DUT module whose source is at [`rtl/ibex_icache.sv`](https://github.com/lowRISC/ibex/blob/master/rtl/ibex_icache.sv). @@ -80,6 +89,7 @@ In addition, it instantiates the following interfaces, connects them to the DUT * Clock and reset interface ([`vendor/lowrisc_ip/common_ifs`](https://github.com/lowRISC/ibex/tree/master/vendor/lowrisc_ip/common_ifs)) * Core interface ([`dv/uvm/icache/dv/ibex_icache_core_agent/ibex_icache_core_if.sv`](https://github.com/lowRISC/ibex/blob/master/dv/uvm/icache/dv/ibex_icache_core_agent/ibex_icache_core_if.sv)) * Memory interface ([`dv/uvm/icache/dv/ibex_icache_mem_agent/ibex_icache_mem_if.sv`](https://github.com/lowRISC/ibex/blob/master/dv/uvm/icache/dv/ibex_icache_mem_agent/ibex_icache_mem_if.sv)) +* ECC interfaces ([`dv/uvm/icache/dv/ibex_icache_ecc_agent/ibex_icache_ecc_if.sv`](https://github.com/lowRISC/ibex/blob/master/dv/uvm/icache/dv/ibex_icache_ecc_agent/ibex_icache_ecc_if.sv)) ### Common DV utility components diff --git a/dv/uvm/icache/doc/tb.svg b/dv/uvm/icache/doc/tb.svg index ceb6282d..37a962e7 100644 --- a/dv/uvm/icache/doc/tb.svg +++ b/dv/uvm/icache/doc/tb.svg @@ -7,15 +7,15 @@ xmlns="http://www.w3.org/2000/svg" xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd" xmlns:inkscape="http://www.inkscape.org/namespaces/inkscape" - version="1.1" - viewBox="0 0 1051 671" - stroke-miterlimit="10" - id="svg1659" - sodipodi:docname="tb.svg" - inkscape:version="0.92.4 (5da689c313, 2019-01-14)" + style="fill:none;stroke:none;stroke-linecap:square;stroke-miterlimit:10" + height="721" width="1051" - height="671" - style="fill:none;stroke:none;stroke-linecap:square;stroke-miterlimit:10"> + inkscape:version="1.0 (4035a4fb49, 2020-05-01)" + sodipodi:docname="tb.svg" + id="svg1659" + stroke-miterlimit="10" + viewBox="0 0 1051 721" + version="1.1"> @@ -31,497 +31,338 @@ + id="Arrow1Lend" + refX="0" + refY="0" + orient="auto" + inkscape:stockid="Arrow1Lend"> + style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1pt;stroke-opacity:1" + d="M 0,0 5,-5 -12.5,0 5,5 Z" + id="path7702" /> + fit-margin-left="0" + fit-margin-top="0" + inkscape:current-layer="svg1659" + inkscape:window-maximized="1" + inkscape:window-y="0" + inkscape:window-x="0" + inkscape:cy="334.71118" + inkscape:cx="375.46262" + inkscape:zoom="0.73826445" + showgrid="true" + id="namedview1661" + inkscape:window-height="1043" + inkscape:window-width="1920" + inkscape:pageshadow="2" + inkscape:pageopacity="0" + guidetolerance="10" + gridtolerance="10" + objecttolerance="10" + borderopacity="1" + bordercolor="#666666" + pagecolor="#ffffff"> + type="xygrid" /> + id="path1438" + d="M 0,0 H 1086 V 817 H 0 Z" /> - + - + - + - + - + - + - + + inkscape:connector-curvature="0" + style="fill:#000000;fill-opacity:0;fill-rule:evenodd" /> - ibex_icache_base_test - Square boxes: SV modules / interfaces (static)Rounded boxes: SV classes (UVM; dynamically created)Square box with cut corner: Code block (a UVM phase)Nesting shows fields in classes, so there is an object of type ibex_icache_env inside the object of type ibex_icache_base_test.The color of the box for a class shows the base class. For example, interfaces are pink; agents are green.Many classes have handles (always called cfg) to the test's ibex_icache_env_cfg object. To denote this, those classes are connected by a dotted line to the ibex_icache_env_cfg class.The virtual sequence object created in the run phase has a p_sequencer handle to the ibex_icache_virtual_sequencer inside the environment (not shown). - - - ibex_icache_env - - - ibex_icache_env_cov - - - - ibex_icache_scoreboard - - - - ibex_icache_virtual_sequencer - - - - ibex_icache_core_agent - - - - ibex_icache_mem_agent - - - + ry="40.000004" /> ibex_icache_base_test + Square boxes: SV modules / interfaces (static)Rounded boxes: SV classes (UVM; dynamically created)Square box with cut corner: Code block (a UVM phase)Nesting shows fields in classes, so there is an object of type ibex_icache_env inside the object of type ibex_icache_base_test.The color of the box for a class shows the base class. For example, interfaces are pink; agents are green.Many classes have handles (always called cfg) to the test's ibex_icache_env_cfg object. To denote this, those classes are connected by a dotted line to the ibex_icache_env_cfg class.The virtual sequence object created in the run phase has a p_sequencer handle to the ibex_icache_virtual_sequencer inside the environment (not shown). + + ibex_icache_env_cfg + x="410.48175" + id="tspan2076" + sodipodi:role="line">ibex_icache_env_cfg - - ibex_icache_core_if - - + id="g2086" + transform="translate(215.5,-76.500001)"> + id="rect2080" + style="color:#000000;clip-rule:nonzero;display:inline;overflow:visible;visibility:visible;opacity:1;isolation:auto;mix-blend-mode:normal;color-interpolation:sRGB;color-interpolation-filters:linearRGB;solid-color:#000000;solid-opacity:1;vector-effect:none;fill:#f4cccc;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1;stroke-linecap:butt;stroke-linejoin:miter;stroke-miterlimit:10;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;color-rendering:auto;image-rendering:auto;shape-rendering:auto;text-rendering:auto;enable-background:accumulate" /> ibex_icache_core_agent_cfg + y="228.39612" + x="194.49219" + id="tspan2082" + sodipodi:role="line">ibex_icache_core_if + transform="translate(220.5,-15.177032)" + id="g2116"> ibex_icache_mem_agent_cfg + y="378.39615">ibex_icache_core_agent_cfg + id="g1140"> + ibex_icache_mem_agent_cfg + + + + width="229.99998" + height="36.322979" + x="80" + y="205.67702" + ry="10" + rx="9.999999" /> ibex_icache_mem_if + x="194.49219" + y="228.39612">ibex_icache_mem_if + transform="translate(215.5,13.499999)" + id="g2204"> + width="229.99998" + height="36.322979" + x="80" + y="205.67702" + ry="10" + rx="9.999999" /> clk_reset_if + x="194.49219" + y="228.39612">clk_reset_if + sodipodi:role="line" /> + x="80" + height="120" + width="440" + id="rect2336" /> + + id="path1559" + d="m 70,447 h 470 l 40,50 V 617 H 70 Z" + sodipodi:nodetypes="cccccc" /> run_phase: - run_phase: + In the UVM run phase, the dv_base_test class (from which the In the UVM run phase, the dv_base_test class (from which the ibex_icache_base_test class derives) creates and runs the sequence ibex_icache_base_test class derives) creates and runs the sequence named by the +UVM_TEST_SEQ plusarg. + x="90">named by the +UVM_TEST_SEQ plusarg. + y="557" + x="90" + height="39.940208" + width="470" + id="rect2348" + style="color:#000000;clip-rule:nonzero;display:inline;overflow:visible;visibility:visible;opacity:1;isolation:auto;mix-blend-mode:normal;color-interpolation:sRGB;color-interpolation-filters:linearRGB;solid-color:#000000;solid-opacity:1;vector-effect:none;fill:#fff3cd;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1;stroke-linecap:butt;stroke-linejoin:miter;stroke-miterlimit:10;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;color-rendering:auto;image-rendering:auto;shape-rendering:auto;text-rendering:auto;enable-background:accumulate" /> ibex_icache_base_vseq + id="tspan2350" + sodipodi:role="line">ibex_icache_base_vseq Legend: + x="575.61847" + id="tspan2354" + sodipodi:role="line">Legend: - + - - ICache + y="10.499995" + x="570.5" + height="219.99998" + width="470" + id="rect2619" + style="color:#000000;clip-rule:nonzero;display:inline;overflow:visible;visibility:visible;opacity:1;isolation:auto;mix-blend-mode:normal;color-interpolation:sRGB;color-interpolation-filters:linearRGB;solid-color:#000000;solid-opacity:1;vector-effect:none;fill:#dad2ea;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1;stroke-linecap:butt;stroke-linejoin:miter;stroke-miterlimit:10;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;color-rendering:auto;image-rendering:auto;shape-rendering:auto;text-rendering:auto;enable-background:accumulate" /> - - core_if - - + transform="translate(-49.500001,-149)" + id="g7675"> mem_if + y="244.05762">core_if + transform="translate(-49.500001,-104)" + id="g7683"> mem_if + + + + clk_rst_if + x="724.40332" + y="244.05762">clk_rst_if + - + d="m 765.5,183 h 70" + style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;marker-end:url(#Arrow1Lend)" /> tb.sv + id="tspan7966" + sodipodi:role="line">tb.sv + + + ICache + + + + + + ecc_if + + + + + + + + ibex_icache_ecc_if + + + + + + + ibex_icache_ecc_agent_cfg + + + + ibex_icache_env + + + ibex_icache_env_cov + + + + ibex_icache_scoreboard + + + + ibex_icache_virtual_sequencer + + + + ibex_icache_core_agent + + + + ibex_icache_mem_agent + + + + + + + ibex_icache_ecc_agent + +