diff --git a/dv/uvm/core_ibex/Makefile b/dv/uvm/core_ibex/Makefile
index 6b514b4d..8a3c75b0 100644
--- a/dv/uvm/core_ibex/Makefile
+++ b/dv/uvm/core_ibex/Makefile
@@ -111,7 +111,7 @@ all: sim
 
 instr: iss_sim
 
-sim: post_compare $(if $(filter 1,$(COV)),gen_cov,)
+sim: post_compare $(if $(filter 1,$(COV)),merge_cov,)
 
 .PHONY: clean
 clean:
@@ -522,8 +522,7 @@ post_compare: $(OUT-SEED)/regr.log
 ###############################################################################
 # Generate RISCV-DV functional coverage
 # TODO(udi) - add B extension
-.PHONY: riscv_dv_cov
-riscv_dv_fcov: $(rtl-sim-logs)
+$(metadata)/.cov.gen_fcov.stamp: $(rtl-sim-logs)
 	$(verb)python3 ${GEN_DIR}/cov.py \
 	       --core ibex \
 	       --dir ${OUT-SEED}/rtl_sim \
@@ -532,14 +531,25 @@ riscv_dv_fcov: $(rtl-sim-logs)
 	       --opts "--gen_timeout 1000" \
 	       --isa rv32imcb \
 	       --custom_target riscv_dv_extension
+	@ # Bookkeeping
+	@touch $@
 
+.PHONY: riscv_dv_fcov
+riscv_dv_fcov: $(metadata)/.cov.gen_fcov.stamp
+
+###############################################################################
 # Merge all output coverage directories into the <out>/rtl_sim directory
 #
 # Any coverage databases generated from the riscv_dv_fcov target will be merged as well.
-.PHONY: gen_cov
-gen_cov: riscv_dv_fcov
+$(metadata)/.cov.merge.stamp: \
+	$(metadata)/.cov.gen_fcov.stamp
 	$(verb)rm -rf $(OUT-DIR)rtl_sim/test.vdb
 	$(verb)./sim.py --steps=cov --simulator="${SIMULATOR}" $(lsf-arg) --o="$(OUT-DIR)"
 	@if [ -d "test.vdb" ]; then \
 	     mv -f test.vdb $(OUT-DIR)rtl_sim/; \
 	fi
+	@ # Bookkeeping
+	@touch $@
+
+.PHONY: merge_cov
+merge_cov: $(metadata)/.cov.merge.stamp