diff --git a/rtl/ibex_if_stage.sv b/rtl/ibex_if_stage.sv
index 3ded665f..7ebea6c7 100644
--- a/rtl/ibex_if_stage.sv
+++ b/rtl/ibex_if_stage.sv
@@ -20,10 +20,6 @@
 //                                                                            //
 ////////////////////////////////////////////////////////////////////////////////
 
-`ifdef RISCV_FORMAL
-  `define RVFI
-`endif
-
 /**
  * Instruction Fetch Stage
  *