diff --git a/rtl/ibex_cs_registers.sv b/rtl/ibex_cs_registers.sv
index b2038ca0..aa819544 100644
--- a/rtl/ibex_cs_registers.sv
+++ b/rtl/ibex_cs_registers.sv
@@ -522,7 +522,9 @@ module ibex_cs_registers #(
           dcsr_d.prv   = priv_lvl_q;
           dcsr_d.cause = debug_cause_i;
           depc_d       = exception_pc;
-        end else begin
+        end else if (!debug_mode_i) begin
+          // In debug mode, "exceptions do not update any registers. That
+          // includes cause, epc, tval, dpc and mstatus." [Debug Spec v0.13.2, p.39]
           mtval_d        = csr_mtval_i;
           mstatus_d.mie  = 1'b0; // disable interrupts
           // save current status