diff --git a/sw/ocd-firmware/park_loop.S b/sw/ocd-firmware/park_loop.S
index 97227ff7..c8ef406c 100644
--- a/sw/ocd-firmware/park_loop.S
+++ b/sw/ocd-firmware/park_loop.S
@@ -63,26 +63,26 @@ entry_exception:
 
 // BASE + 8: normale entry - ebreak in debug-mode, halt request or return from single-stepped instruction
 entry_normal:
-  csrw    dscratch0, s0                           // backup s0 to dscratch0 so we have a GPR available
+  csrw    dscratch0, x8                           // backup x8 to dscratch0 so we have a GPR available
 
 // polling loop - waiting for requests
 park_loop:
   sb      zero, (DM_SREG_BASE+SREG_HLT_ACK)(zero) // ACK that CPU is halted
-  lbu     s0, (DM_SREG_BASE+SREG_EXE_REQ)(zero)   // request to execute program buffer?
-  bnez    s0, execute
-  lbu     s0, (DM_SREG_BASE+SREG_RES_REQ)(zero)   // request to resume?
-  beqz    s0, park_loop
+  lbu     x8, (DM_SREG_BASE+SREG_EXE_REQ)(zero)   // request to execute program buffer?
+  bnez    x8, execute
+  lbu     x8, (DM_SREG_BASE+SREG_RES_REQ)(zero)   // request to resume?
+  beqz    x8, park_loop
 
 // resume normal operation
 resume:
-  sb      s0, (DM_SREG_BASE+SREG_RES_ACK)(zero)   // ACK that CPU is about to resume
-  csrr    s0, dscratch0                           // restore s0 from dscratch0
+  sb      x8, (DM_SREG_BASE+SREG_RES_ACK)(zero)   // ACK that CPU is about to resume
+  csrr    x8, dscratch0                           // restore x8 from dscratch0
   dret                                            // exit debug mode
 
 // execute program buffer
 execute:
   sb      zero, (DM_SREG_BASE+SREG_EXE_ACK)(zero) // ACK that execution is about to start
-  csrr    s0, dscratch0                           // restore s0 from dscratch0
+  csrr    x8, dscratch0                           // restore x8 from dscratch0
   fence.i                                         // synchronize ifetch / i-cache & prefetch with memory (PBUF)
   jalr    zero, zero, %lo(DM_PBUF_BASE)           // jump to beginning of program buffer (PBUF)