diff --git a/rtl/serv_csr.v b/rtl/serv_csr.v index 998acd6..d3ed462 100644 --- a/rtl/serv_csr.v +++ b/rtl/serv_csr.v @@ -10,7 +10,7 @@ module serv_csr output wire o_csr_in, //Stuff input wire i_mtip, - output wire o_timer_irq_en, + output reg o_new_irq, input wire i_mstatus_en, input wire i_mie_en, input wire i_mcause_en, @@ -45,7 +45,7 @@ module serv_csr assign o_q = csr_out; - assign o_timer_irq_en = mstatus_mie & mie_mtie; + wire timer_irq = i_mtip & mstatus_mie & mie_mtie; assign mcause = (i_cnt[4:2] == 3'd0) ? mcause3_0[0] : //[3:0] ((i_cnt[4:2] == 3'd7) & i_cnt_r[3]) ? mcause31 //[31] @@ -53,6 +53,8 @@ module serv_csr assign o_csr_in = csr_in; + reg mtip_r; + always @(posedge i_clk) begin if (i_mstatus_en & (i_cnt[4:2] == 3'd0) & i_cnt_r[3]) mstatus_mie <= csr_in; @@ -62,9 +64,12 @@ module serv_csr mstatus <= (i_cnt[4:2] == 0) & i_cnt_r[2] & mstatus_mie; + mtip_r <= i_mtip; + o_new_irq <= !mtip_r & timer_irq; + if (i_trap) begin - mcause31 <= i_mtip & o_timer_irq_en; - mcause3_0 <= (i_mtip & o_timer_irq_en) ? 4'd7 : i_mcause[3:0]; + mcause31 <= timer_irq; + mcause3_0 <= timer_irq ? 4'd7 : i_mcause[3:0]; end if (i_mcause_en) begin diff --git a/rtl/serv_decode.v b/rtl/serv_decode.v index 1883c74..eaf9397 100644 --- a/rtl/serv_decode.v +++ b/rtl/serv_decode.v @@ -3,8 +3,7 @@ module serv_decode ( input wire clk, input wire i_rst, - input wire i_mtip, - input wire i_timer_irq_en, + input wire i_new_irq, input wire [31:0] i_wb_rdt, input wire i_wb_en, input wire i_rf_ready, @@ -291,7 +290,6 @@ module serv_decode shift_op; reg stage_one_done; - reg mtip_r; reg pending_irq; assign o_rf_rs_en = two_stage_op ? (state == INIT) : o_ctrl_pc_en; @@ -302,9 +300,7 @@ module serv_decode if (state == IDLE) o_ctrl_jump <= 1'b0; - mtip_r <= i_mtip; - - if (i_mtip & !mtip_r & i_timer_irq_en) + if (i_new_irq) pending_irq <= 1'b1; cnt_done <= (o_cnt[4:2] == 3'b111) & o_cnt_r[2]; diff --git a/rtl/serv_top.v b/rtl/serv_top.v index 927fd24..05df976 100644 --- a/rtl/serv_top.v +++ b/rtl/serv_top.v @@ -123,14 +123,13 @@ module serv_top wire lui; - wire timer_irq_en; + wire new_irq; serv_decode decode ( .clk (clk), .i_rst (i_rst), - .i_mtip (i_timer_irq), - .i_timer_irq_en (timer_irq_en), + .i_new_irq (new_irq), .i_wb_rdt (i_ibus_rdt), .i_wb_en (o_ibus_cyc & i_ibus_ack), .i_rf_ready (rf_ready | i_dbus_ack), @@ -339,7 +338,7 @@ module serv_top .i_rf_csr_out (rf_csr_out), .o_csr_in (csr_in), .i_mtip (i_timer_irq), - .o_timer_irq_en ( timer_irq_en), + .o_new_irq (new_irq), .i_mstatus_en (csr_mstatus_en), .i_mie_en (csr_mie_en ), .i_mcause_en (csr_mcause_en ),