diff --git a/doc/index.rst b/doc/index.rst index 31b75de..cf9fefc 100644 --- a/doc/index.rst +++ b/doc/index.rst @@ -140,7 +140,11 @@ When SERV is built with `WITH_CSR`, there is also logic to detect misaligned acc serv_rf_if ^^^^^^^^^^ -serv_rf_if is the gateway between the core and an RF implementation. It transforms all control signals that affect register reads or writes and exposes two read and write ports to the RF. This allows implementors to plug in an RF implementation that is best suited for the technology to be used. +.. image:: serv_rf_if.png + +serv_rf_if is the gateway between the core and an RF implementation. It transforms all control signals that affect register reads or writes and exposes two read and write ports to the RF. This allows implementors to plug in an RF implementation that is best suited for the technology to be used. The general purpose registers are allocated to address 0-31. In addition, four CSR are defined at addresses 32-35. + +.. image:: serv_rf_if_int.png serv_rf_ram ^^^^^^^^^^^ diff --git a/doc/serv_rf_if.png b/doc/serv_rf_if.png new file mode 100644 index 0000000..ae54de5 Binary files /dev/null and b/doc/serv_rf_if.png differ diff --git a/doc/serv_rf_if_int.png b/doc/serv_rf_if_int.png new file mode 100644 index 0000000..dcfbed2 Binary files /dev/null and b/doc/serv_rf_if_int.png differ