## GMM-7550 pins

# This file is a part of the GMM-7550 VHDL Examples
# <https://github.com/ak-fau/gmm7550-examples.git>
#
# SPDX-License-Identifier: MIT
#
# Copyright (c) 2023 Anton Kuzmin <anton.kuzmin@cs.fau.de>

# Master clock input (100 MHz)
Pin_in  "ser_clk"       Loc = "SER_CLK";

### SPI

Pin_inout "CFG_SPI_nCS" Loc = "IO_WA_A8";
Pin_inout "CFG_SPI_CLK" Loc = "IO_WA_B8";
Pin_inout "CFG_SPI_IO0" Loc = "IO_WA_B7"; # MOSI
Pin_inout "CFG_SPI_IO1" Loc = "IO_WA_A7"; # MISO
# Pin_inout "CFG_SPI_IO2" Loc = "IO_WA_B6"; # May be reused on the HAT for UART
# Pin_inout "CFG_SPI_IO3" Loc = "IO_WA_A6"; # May be reused on the HAT for UART
## HAT Adapter board

# This file is a part of the GMM-7550 VHDL Examples
# <https://github.com/ak-fau/gmm7550-examples.git>
#
# SPDX-License-Identifier: MIT
#
# Copyright (c) 2023 Anton Kuzmin <anton.kuzmin@cs.fau.de>

# D4 CFG_FAILED (Red)
Pin_out "led_red_n"     Loc = "IO_WA_A2";

# D2 CFG_DONE (Green)
Pin_out "led_green"     Loc = "IO_WA_B2";

### UART

Pin_out "uart_tx"       Loc = "IO_WA_A6"; # SPI D3, GPIO pin 10
Pin_in  "uart_rx"       Loc = "IO_WA_B6"; # SPI D2, GPIO pin 8

### Pmod J10

Pin_out   "J10_EN"      Loc = "IO_SA_A7";

Pin_inout "J10_IO[0]"   Loc = "IO_SA_A0";
Pin_inout "J10_IO[1]"   Loc = "IO_SA_A1";
Pin_inout "J10_IO[2]"   Loc = "IO_SA_A2";
Pin_inout "J10_IO[3]"   Loc = "IO_SA_A3";
Pin_inout "J10_IO[4]"   Loc = "IO_SA_B0";
Pin_inout "J10_IO[5]"   Loc = "IO_SA_B1";
Pin_inout "J10_IO[6]"   Loc = "IO_SA_B2";
Pin_inout "J10_IO[7]"   Loc = "IO_SA_B3";

### Pmod J9

Pin_out   "J9_EN"       Loc = "IO_SB_B3";

Pin_inout "J9_IO[0]"    Loc = "IO_SB_A6"; # CLK_2
Pin_inout "J9_IO[1]"    Loc = "IO_SB_A7"; # CLK_1
Pin_inout "J9_IO[2]"    Loc = "IO_SB_A8"; # CLK_0
Pin_inout "J9_IO[3]"    Loc = "IO_SB_A5"; # CLK_3
Pin_inout "J9_IO[4]"    Loc = "IO_SB_B6";
Pin_inout "J9_IO[5]"    Loc = "IO_SB_B7";
Pin_inout "J9_IO[6]"    Loc = "IO_SB_B8";
Pin_inout "J9_IO[7]"    Loc = "IO_SB_B5";