From dc7efbcfb4548de9dfd7d683585c23a1e7de91ee Mon Sep 17 00:00:00 2001 From: Blaise Tine Date: Tue, 21 Jul 2020 05:22:47 -0400 Subject: [PATCH] pipeline refactoring --- hw/rtl/VX_alu_unit.v | 2 +- hw/rtl/{VX_csr_pipe.v => VX_csr_unit.v} | 2 +- hw/rtl/VX_decode.v | 4 +- hw/rtl/VX_execute.v | 4 +- hw/rtl/VX_gpr_mux.v | 77 - hw/rtl/VX_gpr_ram.v | 1 + hw/rtl/VX_gpr_stage.v | 148 +- hw/rtl/VX_gpu_unit.v | 14 +- hw/rtl/VX_issue.v | 134 +- hw/rtl/VX_issue_mux.v | 76 + hw/rtl/VX_mul_unit.v | 4 +- hw/rtl/VX_scheduler.v | 41 +- hw/rtl/VX_warp.v | 69 - hw/rtl/VX_warp_sched.v | 26 +- hw/rtl/cache/VX_cache.v | 328 +- hw/rtl/cache/VX_cache_miss_resrv.v | 12 +- hw/rtl/interfaces/VX_alu_req_if.v | 8 +- hw/rtl/interfaces/VX_execute_if.v | 32 - hw/rtl/interfaces/VX_gpr_data_if.v | 13 + hw/rtl/interfaces/VX_ifetch_req_if.v | 4 +- hw/rtl/interfaces/VX_ifetch_rsp_if.v | 4 +- hw/rtl/interfaces/VX_lsu_req_if.v | 14 +- hw/rtl/interfaces/VX_mul_req_if.v | 20 +- hw/rtl/interfaces/VX_wb_if.v | 4 +- hw/rtl/libs/VX_generic_register.v | 4 +- hw/rtl/libs/VX_generic_stack.v | 4 +- hw/simulate/Makefile | 2 +- hw/simulate/ram.h | 2 +- runtime/tests/simple/vx_simple.dump | 5114 ++++------------------- runtime/tests/simple/vx_simple.elf | Bin 28756 -> 12500 bytes runtime/tests/simple/vx_simple.hex | 1308 ++---- 31 files changed, 1437 insertions(+), 6038 deletions(-) rename hw/rtl/{VX_csr_pipe.v => VX_csr_unit.v} (99%) delete mode 100644 hw/rtl/VX_gpr_mux.v create mode 100644 hw/rtl/VX_issue_mux.v delete mode 100644 hw/rtl/VX_warp.v delete mode 100644 hw/rtl/interfaces/VX_execute_if.v create mode 100644 hw/rtl/interfaces/VX_gpr_data_if.v diff --git a/hw/rtl/VX_alu_unit.v b/hw/rtl/VX_alu_unit.v index f47c90a6e..ff4c2b05a 100644 --- a/hw/rtl/VX_alu_unit.v +++ b/hw/rtl/VX_alu_unit.v @@ -89,7 +89,7 @@ module VX_alu_unit #( VX_generic_register #( .N(1 + `NW_BITS + 1 + 32) - ) rsp_reg ( + ) branch_reg ( .clk (clk), .reset (reset), .stall (stall), diff --git a/hw/rtl/VX_csr_pipe.v b/hw/rtl/VX_csr_unit.v similarity index 99% rename from hw/rtl/VX_csr_pipe.v rename to hw/rtl/VX_csr_unit.v index b8f88481d..15c3d1732 100644 --- a/hw/rtl/VX_csr_pipe.v +++ b/hw/rtl/VX_csr_unit.v @@ -1,6 +1,6 @@ `include "VX_define.vh" -module VX_csr_pipe #( +module VX_csr_unit #( parameter CORE_ID = 0 ) ( input wire clk, diff --git a/hw/rtl/VX_decode.v b/hw/rtl/VX_decode.v index 418eb70c8..7d90d21b1 100644 --- a/hw/rtl/VX_decode.v +++ b/hw/rtl/VX_decode.v @@ -235,10 +235,10 @@ module VX_decode #( is_ltype ? `WB_MEM : `WB_NO; - assign join_if.is_join = is_gpu && (gpu_op == `GPU_JOIN) && in_valid; + assign join_if.is_join = in_valid && is_gpu && (gpu_op == `GPU_JOIN); assign join_if.warp_num = ifetch_rsp_if.warp_num; - assign wstall_if.wstall = (is_br || is_gpu) && in_valid; + assign wstall_if.wstall = in_valid && (is_btype || is_jal || is_jalr || (is_gpu && (gpu_op == `GPU_TMC || gpu_op == `GPU_SPLIT || gpu_op == `GPU_BAR))); assign wstall_if.warp_num = ifetch_rsp_if.warp_num; wire stall = ~decode_if.ready && (| decode_if.valid); diff --git a/hw/rtl/VX_execute.v b/hw/rtl/VX_execute.v index 871fcaaff..adbd7c309 100644 --- a/hw/rtl/VX_execute.v +++ b/hw/rtl/VX_execute.v @@ -61,9 +61,9 @@ module VX_execute #( .lsu_commit_if (lsu_commit_if) ); - VX_csr_pipe #( + VX_csr_unit #( .CORE_ID(CORE_ID) - ) csr_pipe ( + ) csr_unit ( .clk (clk), .reset (reset), .perf_cntrs_if (perf_cntrs_if), diff --git a/hw/rtl/VX_gpr_mux.v b/hw/rtl/VX_gpr_mux.v deleted file mode 100644 index 9de519bc1..000000000 --- a/hw/rtl/VX_gpr_mux.v +++ /dev/null @@ -1,77 +0,0 @@ -`include "VX_define.vh" - -module VX_gpr_mux ( - // inputs - VX_execute_if execute_if, - input wire [`NUM_THREADS-1:0][31:0] rs1_data, - input wire [`NUM_THREADS-1:0][31:0] rs2_data, - - // outputs - VX_alu_req_if alu_req_if, - VX_lsu_req_if lsu_req_if, - VX_csr_req_if csr_req_if, - VX_mul_req_if mul_req_if, - VX_gpu_req_if gpu_req_if -); - - wire[`NUM_THREADS-1:0] is_alu = {`NUM_THREADS{execute_if.ex_type == `EX_ALU}}; - wire[`NUM_THREADS-1:0] is_lsu = {`NUM_THREADS{execute_if.ex_type == `EX_LSU}}; - wire[`NUM_THREADS-1:0] is_csr = {`NUM_THREADS{execute_if.ex_type == `EX_CSR}}; - wire[`NUM_THREADS-1:0] is_mul = {`NUM_THREADS{execute_if.ex_type == `EX_MUL}}; - wire[`NUM_THREADS-1:0] is_gpu = {`NUM_THREADS{execute_if.ex_type == `EX_GPU}}; - - // ALU unit - assign alu_req_if.valid = execute_if.valid & is_alu; - assign alu_req_if.warp_num = execute_if.warp_num; - assign alu_req_if.curr_PC = execute_if.curr_PC; - assign alu_req_if.alu_op = `ALU_OP(execute_if.instr_op); - assign alu_req_if.rd = execute_if.rd; - assign alu_req_if.wb = execute_if.wb; - assign alu_req_if.rs1_data = rs1_data; - assign alu_req_if.rs2_data = rs2_data; - assign alu_req_if.offset = execute_if.imm; - assign alu_req_if.next_PC = execute_if.next_PC; - - // LSU unit - assign lsu_req_if.valid = execute_if.valid & is_lsu; - assign lsu_req_if.warp_num = execute_if.warp_num; - assign lsu_req_if.curr_PC = execute_if.curr_PC; - assign lsu_req_if.base_addr = rs1_data; - assign lsu_req_if.store_data = rs2_data; - assign lsu_req_if.offset = execute_if.imm; - assign lsu_req_if.rw = `LSU_RW(execute_if.instr_op); - assign lsu_req_if.byteen = `LSU_BE(execute_if.instr_op); - assign lsu_req_if.rd = execute_if.rd; - assign lsu_req_if.wb = execute_if.wb; - - // CSR unit - assign csr_req_if.valid = execute_if.valid & is_csr; - assign csr_req_if.warp_num = execute_if.warp_num; - assign csr_req_if.curr_PC = execute_if.curr_PC; - assign csr_req_if.csr_op = `CSR_OP(execute_if.instr_op); - assign csr_req_if.csr_addr = execute_if.imm[`CSR_ADDR_SIZE-1:0]; - assign csr_req_if.csr_mask = execute_if.rs2_is_imm ? 32'(execute_if.rs1) : rs1_data[0]; - assign csr_req_if.rd = execute_if.rd; - assign csr_req_if.wb = execute_if.wb; - assign csr_req_if.is_io = 1'b0; - - // MUL unit - assign mul_req_if.valid = execute_if.valid & is_mul; - assign mul_req_if.warp_num = execute_if.warp_num; - assign mul_req_if.curr_PC = execute_if.curr_PC; - assign mul_req_if.mul_op = `MUL_OP(execute_if.instr_op); - assign mul_req_if.rs1_data = rs1_data; - assign mul_req_if.rs2_data = rs2_data; - assign mul_req_if.rd = execute_if.rd; - assign mul_req_if.wb = execute_if.wb; - - // GPU unit - assign gpu_req_if.valid = execute_if.valid & is_gpu; - assign gpu_req_if.warp_num = execute_if.warp_num; - assign gpu_req_if.curr_PC = execute_if.curr_PC; - assign gpu_req_if.gpu_op = `GPU_OP(execute_if.instr_op); - assign gpu_req_if.rs1_data = rs1_data; - assign gpu_req_if.rs2_data = rs2_data[0]; - assign gpu_req_if.next_PC = execute_if.next_PC; - -endmodule \ No newline at end of file diff --git a/hw/rtl/VX_gpr_ram.v b/hw/rtl/VX_gpr_ram.v index 78e1ea904..8782ae7c2 100644 --- a/hw/rtl/VX_gpr_ram.v +++ b/hw/rtl/VX_gpr_ram.v @@ -36,6 +36,7 @@ module VX_gpr_ram ( end end assert(~(|we) || (waddr != 0)); // ensure r0 is never written! + assert(0 == ram[0]); end assign rs1_data = ram[rs1]; diff --git a/hw/rtl/VX_gpr_stage.v b/hw/rtl/VX_gpr_stage.v index 4f04fd750..a56e7c67c 100644 --- a/hw/rtl/VX_gpr_stage.v +++ b/hw/rtl/VX_gpr_stage.v @@ -4,23 +4,16 @@ module VX_gpr_stage #( parameter CORE_ID = 0 ) ( input wire clk, - input wire reset, // inputs VX_wb_if writeback_if, - VX_execute_if execute_if, + VX_decode_if decode_if, // outputs - VX_alu_req_if alu_req_if, - VX_lsu_req_if lsu_req_if, - VX_csr_req_if csr_req_if, - VX_mul_req_if mul_req_if, - VX_gpu_req_if gpu_req_if + VX_gpr_data_if gpr_data_if ); wire [`NUM_THREADS-1:0][31:0] rs1_data_all [`NUM_WARPS-1:0]; wire [`NUM_THREADS-1:0][31:0] rs2_data_all [`NUM_WARPS-1:0]; - wire [`NUM_THREADS-1:0][31:0] rs1_data; - wire [`NUM_THREADS-1:0][31:0] rs2_data; wire [`NUM_THREADS-1:0][31:0] rs1_PC; wire [`NUM_THREADS-1:0][31:0] rs2_imm; wire [`NUM_THREADS-1:0] we [`NUM_WARPS-1:0]; @@ -28,128 +21,27 @@ module VX_gpr_stage #( genvar i; for (i = 0; i < `NUM_THREADS; i++) begin - assign rs1_PC[i] = execute_if.curr_PC; - assign rs2_imm[i] = execute_if.imm; + assign rs1_PC[i] = decode_if.curr_PC; + assign rs2_imm[i] = decode_if.imm; end - assign rs1_data = execute_if.rs1_is_PC ? rs1_PC : rs1_data_all[execute_if.warp_num]; - assign rs2_data = execute_if.rs2_is_imm ? rs2_imm : rs2_data_all[execute_if.warp_num]; - - generate - for (i = 0; i < `NUM_WARPS; i++) begin - assign we[i] = writeback_if.valid & {`NUM_THREADS{(i == writeback_if.warp_num)}}; - VX_gpr_ram gpr_ram ( - .clk (clk), - .we (we[i]), - .waddr (writeback_if.rd), - .wdata (writeback_if.data), - .rs1 (execute_if.rs1), - .rs2 (execute_if.rs2), - .rs1_data (rs1_data_all[i]), - .rs2_data (rs2_data_all[i]) - ); - end - endgenerate - - VX_alu_req_if alu_req_tmp_if(); - VX_lsu_req_if lsu_req_tmp_if(); - VX_csr_req_if csr_req_tmp_if(); - VX_mul_req_if mul_req_tmp_if(); - VX_gpu_req_if gpu_req_tmp_if(); - - VX_gpr_mux gpr_mux ( - .execute_if (execute_if), - .rs1_data (rs1_data), - .rs2_data (rs2_data), - .alu_req_if (alu_req_if), - .lsu_req_if (lsu_req_tmp_if), - .csr_req_if (csr_req_tmp_if), - .mul_req_if (mul_req_tmp_if), - .gpu_req_if (gpu_req_tmp_if) - ); - - wire stall_alu = ~alu_req_if.ready && (| alu_req_if.valid); - wire stall_lsu = ~lsu_req_if.ready && (| lsu_req_if.valid); - wire stall_csr = ~csr_req_if.ready && (| csr_req_if.valid); - wire stall_mul = ~mul_req_if.ready && (| mul_req_if.valid); - wire stall_gpu = ~gpu_req_if.ready && (| gpu_req_if.valid); - - VX_generic_register #( - .N(`NUM_THREADS +`NW_BITS + 32 + `ALU_BITS + (`NUM_THREADS * 32) + (`NUM_THREADS * 32) + `NR_BITS + `WB_BITS) - ) alu_reg ( - .clk (clk), - .reset (reset), - .stall (stall_alu), - .flush (0), - .in ({alu_req_tmp_if.valid, alu_req_tmp_if.warp_num, alu_req_tmp_if.curr_PC, alu_req_tmp_if.alu_op, alu_req_tmp_if.rs1_data, alu_req_tmp_if.rs2_data, alu_req_tmp_if.rd, alu_req_tmp_if.wb}), - .out ({alu_req_if.valid, alu_req_if.warp_num, alu_req_if.curr_PC, alu_req_if.alu_op, alu_req_if.rs1_data, alu_req_if.rs2_data, alu_req_if.rd, alu_req_if.wb}) - ); - - VX_generic_register #( - .N(`NUM_THREADS + `NW_BITS + 32 + (`NUM_THREADS * 32) + (`NUM_THREADS * 32) + 32 + 1 + `BYTEEN_BITS + `NR_BITS + `WB_BITS) - ) lsu_reg ( - .clk (clk), - .reset (reset), - .stall (stall_lsu), - .flush (0), - .in ({lsu_req_tmp_if.valid, lsu_req_tmp_if.warp_num, lsu_req_tmp_if.curr_PC, lsu_req_tmp_if.base_addr, lsu_req_tmp_if.store_data, lsu_req_tmp_if.offset, lsu_req_tmp_if.rw, lsu_req_tmp_if.byteen, lsu_req_tmp_if.rd, lsu_req_tmp_if.wb}), - .out ({lsu_req_if.valid, lsu_req_if.warp_num, lsu_req_if.curr_PC, lsu_req_if.base_addr, lsu_req_if.store_data, lsu_req_if.offset, lsu_req_if.rw, lsu_req_if.byteen, lsu_req_if.rd, lsu_req_if.wb}) - ); - - VX_generic_register #( - .N(`NUM_THREADS + `NW_BITS + 32 + `CSR_BITS + `CSR_ADDR_SIZE + 32 + 1 + `NR_BITS + `WB_BITS) - ) csr_reg ( - .clk (clk), - .reset (reset), - .stall (stall_csr), - .flush (0), - .in ({csr_req_tmp_if.valid, csr_req_tmp_if.warp_num, csr_req_tmp_if.curr_PC, csr_req_tmp_if.csr_op, csr_req_tmp_if.csr_addr, csr_req_tmp_if.csr_mask, csr_req_tmp_if.is_io, csr_req_tmp_if.rd, csr_req_tmp_if.wb}), - .out ({csr_req_if.valid, csr_req_if.warp_num, csr_req_if.curr_PC, csr_req_if.csr_op, csr_req_if.csr_addr, csr_req_if.csr_mask, csr_req_if.is_io, csr_req_if.rd, csr_req_if.wb}) - ); - - VX_generic_register #( - .N(`NUM_THREADS +`NW_BITS + 32 + `MUL_BITS + (`NUM_THREADS * 32) + (`NUM_THREADS * 32) + `NR_BITS + `WB_BITS) - ) mul_reg ( - .clk (clk), - .reset (reset), - .stall (stall_mul), - .flush (0), - .in ({mul_req_tmp_if.valid, mul_req_tmp_if.warp_num, mul_req_tmp_if.curr_PC, mul_req_tmp_if.mul_op, mul_req_tmp_if.rs1_data, mul_req_tmp_if.rs2_data, mul_req_tmp_if.rd, mul_req_tmp_if.wb}), - .out ({mul_req_if.valid, mul_req_if.warp_num, mul_req_if.curr_PC, mul_req_if.mul_op, mul_req_if.rs1_data, mul_req_if.rs2_data, mul_req_if.rd, mul_req_if.wb}) - ); - - VX_generic_register #( - .N(`NUM_THREADS + `NW_BITS + 32 + `GPU_BITS + (`NUM_THREADS * 32) + 32) - ) gpu_reg ( - .clk (clk), - .reset (reset), - .stall (stall_gpu), - .flush (0), - .in ({gpu_req_tmp_if.valid, gpu_req_tmp_if.warp_num, gpu_req_tmp_if.next_PC, gpu_req_tmp_if.gpu_op, gpu_req_tmp_if.rs1_data, gpu_req_tmp_if.rs2_data}), - .out ({gpu_req_if.valid, gpu_req_if.warp_num, gpu_req_if.next_PC, gpu_req_if.gpu_op, gpu_req_if.rs1_data, gpu_req_if.rs2_data}) - ); - - assign execute_if.alu_ready = ~stall_alu; - assign execute_if.lsu_ready = ~stall_lsu; - assign execute_if.csr_ready = ~stall_csr; - assign execute_if.mul_ready = ~stall_mul; - assign execute_if.gpu_ready = ~stall_gpu; + assign gpr_data_if.rs1_data = decode_if.rs1_is_PC ? rs1_PC : rs1_data_all[decode_if.warp_num]; + assign gpr_data_if.rs2_data = decode_if.rs2_is_imm ? rs2_imm : rs2_data_all[decode_if.warp_num]; + + for (i = 0; i < `NUM_WARPS; i++) begin + assign we[i] = writeback_if.valid & {`NUM_THREADS{(i == writeback_if.warp_num)}}; + VX_gpr_ram gpr_ram ( + .clk (clk), + .we (we[i]), + .waddr (writeback_if.rd), + .wdata (writeback_if.data), + .rs1 (decode_if.rs1), + .rs2 (decode_if.rs2), + .rs1_data (rs1_data_all[i]), + .rs2_data (rs2_data_all[i]) + ); + end assign writeback_if.ready = 1'b1; -`ifdef DBG_PRINT_PIPELINE - always @(posedge clk) begin - if ((| execute_if.valid)) begin - $display("%t: Core%0d-GPR: warp=%0d, PC=%0h, a=%0h, b=%0h", $time, CORE_ID, execute_if.warp_num, execute_if.curr_PC, rs1_data, rs2_data); - - // scheduler ensures the destination execute unit is ready (garanteed by the scheduler) - assert((execute_if.ex_type != `EX_ALU) || alu_req_if.ready); - assert((execute_if.ex_type != `EX_LSU) || lsu_req_if.ready); - assert((execute_if.ex_type != `EX_CSR) || csr_req_if.ready); - assert((execute_if.ex_type != `EX_MUL) || mul_req_if.ready); - assert((execute_if.ex_type != `EX_GPU) || gpu_req_if.ready); - end - end -`endif - endmodule diff --git a/hw/rtl/VX_gpu_unit.v b/hw/rtl/VX_gpu_unit.v index 3cab2bee9..f3bcb7261 100644 --- a/hw/rtl/VX_gpu_unit.v +++ b/hw/rtl/VX_gpu_unit.v @@ -16,12 +16,11 @@ module VX_gpu_unit #( wire is_split = (gpu_req_if.gpu_op == `GPU_SPLIT); wire is_bar = (gpu_req_if.gpu_op == `GPU_BAR); - wire [`NUM_THREADS-1:0] tmc_new_mask; - wire all_threads = `NUM_THREADS < gpu_req_if.rs1_data[0]; - + wire [`NUM_THREADS-1:0] tmc_new_mask; + genvar i; for (i = 0; i < `NUM_THREADS; i++) begin : tmc_new_mask_init - assign tmc_new_mask[i] = all_threads ? 1 : i < gpu_req_if.rs1_data[0]; + assign tmc_new_mask[i] = (i < gpu_req_if.rs1_data[0]); end wire valid_inst = (| curr_valids); @@ -35,11 +34,10 @@ module VX_gpu_unit #( wire wspawn = is_wspawn && valid_inst; wire [31:0] wspawn_pc = gpu_req_if.rs2_data; - wire all_active = `NUM_WARPS < gpu_req_if.rs1_data[0]; wire [`NUM_WARPS-1:0] wspawn_new_active; for (i = 0; i < `NUM_WARPS; i++) begin : wspawn_new_active_init - assign wspawn_new_active[i] = all_active ? 1 : i < gpu_req_if.rs1_data[0]; + assign wspawn_new_active[i] = (i < gpu_req_if.rs1_data[0]); end assign warp_ctl_if.is_barrier = is_bar && valid_inst; @@ -75,12 +73,14 @@ module VX_gpu_unit #( assign warp_ctl_if.split_later_mask = split_new_later_mask; assign warp_ctl_if.split_save_pc = gpu_req_if.next_PC; - assign gpu_req_if.ready = 1'b1; // has no stalls + assign gpu_req_if.ready = gpu_commit_if.ready; // commit assign gpu_commit_if.valid = gpu_req_if.valid; assign gpu_commit_if.warp_num = gpu_req_if.warp_num; assign gpu_commit_if.curr_PC = gpu_req_if.curr_PC; assign gpu_commit_if.wb = `WB_NO; + assign gpu_commit_if.rd = 0; + assign gpu_commit_if.data = 0; endmodule \ No newline at end of file diff --git a/hw/rtl/VX_issue.v b/hw/rtl/VX_issue.v index 446453fb6..737e7b606 100644 --- a/hw/rtl/VX_issue.v +++ b/hw/rtl/VX_issue.v @@ -15,7 +15,14 @@ module VX_issue #( VX_mul_req_if mul_req_if, VX_gpu_req_if gpu_req_if ); - VX_execute_if execute_if(); + VX_gpr_data_if gpr_data_if(); + wire schedule_delay; + + wire alu_busy = ~alu_req_if.ready/* && (| alu_req_if.valid)*/; + wire lsu_busy = ~lsu_req_if.ready/* && (| lsu_req_if.valid)*/; + wire csr_busy = ~csr_req_if.ready/* && (| csr_req_if.valid)*/; + wire mul_busy = ~mul_req_if.ready/* && (| mul_req_if.valid)*/; + wire gpu_busy = ~gpu_req_if.ready/* && (| gpu_req_if.valid)*/; VX_scheduler #( .CORE_ID(CORE_ID) @@ -23,25 +30,126 @@ module VX_issue #( .clk (clk), .reset (reset), .decode_if (decode_if), - .writeback_if (writeback_if), - .execute_if (execute_if), + .writeback_if (writeback_if), + .alu_busy (alu_busy), + .lsu_busy (lsu_busy), + .csr_busy (csr_busy), + .mul_busy (mul_busy), + .gpu_busy (gpu_busy), + .schedule_delay (schedule_delay), `UNUSED_PIN (is_empty) ); VX_gpr_stage #( .CORE_ID(CORE_ID) ) gpr_stage ( - .clk (clk), - .reset (reset), - - .execute_if (execute_if), + .clk (clk), + .decode_if (decode_if), .writeback_if (writeback_if), - - .alu_req_if (alu_req_if), - .lsu_req_if (lsu_req_if), - .csr_req_if (csr_req_if), - .mul_req_if (mul_req_if), - .gpu_req_if (gpu_req_if) + .gpr_data_if (gpr_data_if) ); + VX_alu_req_if alu_req_tmp_if(); + VX_lsu_req_if lsu_req_tmp_if(); + VX_csr_req_if csr_req_tmp_if(); + VX_mul_req_if mul_req_tmp_if(); + VX_gpu_req_if gpu_req_tmp_if(); + + VX_issue_mux issue_mux ( + .decode_if (decode_if), + .gpr_data_if (gpr_data_if), + .alu_req_if (alu_req_tmp_if), + .lsu_req_if (lsu_req_tmp_if), + .csr_req_if (csr_req_tmp_if), + .mul_req_if (mul_req_tmp_if), + .gpu_req_if (gpu_req_tmp_if) + ); + + wire stall_alu = ~alu_req_if.ready || schedule_delay; + wire stall_lsu = ~lsu_req_if.ready || schedule_delay; + wire stall_csr = ~csr_req_if.ready || schedule_delay; + wire stall_mul = ~mul_req_if.ready || schedule_delay; + wire stall_gpu = ~gpu_req_if.ready || schedule_delay; + + wire flush_alu = alu_req_if.ready && schedule_delay; + wire flush_lsu = lsu_req_if.ready && schedule_delay; + wire flush_csr = csr_req_if.ready && schedule_delay; + wire flush_mul = mul_req_if.ready && schedule_delay; + wire flush_gpu = gpu_req_if.ready && schedule_delay; + + VX_generic_register #( + .N(`NUM_THREADS +`NW_BITS + 32 + `ALU_BITS + `WB_BITS + `NR_BITS + (`NUM_THREADS * 32) + (`NUM_THREADS * 32) + 32 + 32) + ) alu_reg ( + .clk (clk), + .reset (reset), + .stall (stall_alu), + .flush (flush_alu), + .in ({alu_req_tmp_if.valid, alu_req_tmp_if.warp_num, alu_req_tmp_if.curr_PC, alu_req_tmp_if.alu_op, alu_req_tmp_if.wb, alu_req_tmp_if.rd, alu_req_tmp_if.rs1_data, alu_req_tmp_if.rs2_data, alu_req_tmp_if.offset, alu_req_tmp_if.next_PC}), + .out ({alu_req_if.valid, alu_req_if.warp_num, alu_req_if.curr_PC, alu_req_if.alu_op, alu_req_if.wb, alu_req_if.rd, alu_req_if.rs1_data, alu_req_if.rs2_data, alu_req_if.offset, alu_req_if.next_PC}) + ); + + VX_generic_register #( + .N(`NUM_THREADS + `NW_BITS + 32 + 1 + `BYTEEN_BITS + `WB_BITS + `NR_BITS + (`NUM_THREADS * 32) + (`NUM_THREADS * 32) + 32) + ) lsu_reg ( + .clk (clk), + .reset (reset), + .stall (stall_lsu), + .flush (flush_lsu), + .in ({lsu_req_tmp_if.valid, lsu_req_tmp_if.warp_num, lsu_req_tmp_if.curr_PC, lsu_req_tmp_if.rw, lsu_req_tmp_if.byteen, lsu_req_tmp_if.wb, lsu_req_tmp_if.rd, lsu_req_tmp_if.base_addr, lsu_req_tmp_if.offset, lsu_req_tmp_if.store_data}), + .out ({lsu_req_if.valid, lsu_req_if.warp_num, lsu_req_if.curr_PC, lsu_req_if.rw, lsu_req_if.byteen, lsu_req_if.wb, lsu_req_if.rd, lsu_req_if.base_addr, lsu_req_if.offset, lsu_req_if.store_data}) + ); + + VX_generic_register #( + .N(`NUM_THREADS + `NW_BITS + 32 + `CSR_BITS + `WB_BITS + `NR_BITS + `CSR_ADDR_SIZE + 32 + 1) + ) csr_reg ( + .clk (clk), + .reset (reset), + .stall (stall_csr), + .flush (flush_csr), + .in ({csr_req_tmp_if.valid, csr_req_tmp_if.warp_num, csr_req_tmp_if.curr_PC, csr_req_tmp_if.csr_op, csr_req_tmp_if.wb, csr_req_tmp_if.rd, csr_req_tmp_if.csr_addr, csr_req_tmp_if.csr_mask, csr_req_tmp_if.is_io}), + .out ({csr_req_if.valid, csr_req_if.warp_num, csr_req_if.curr_PC, csr_req_if.csr_op, csr_req_if.wb, csr_req_if.rd, csr_req_if.csr_addr, csr_req_if.csr_mask, csr_req_if.is_io}) + ); + + VX_generic_register #( + .N(`NUM_THREADS +`NW_BITS + 32 + `MUL_BITS + `WB_BITS + `NR_BITS + (`NUM_THREADS * 32) + (`NUM_THREADS * 32)) + ) mul_reg ( + .clk (clk), + .reset (reset), + .stall (stall_mul), + .flush (flush_mul), + .in ({mul_req_tmp_if.valid, mul_req_tmp_if.warp_num, mul_req_tmp_if.curr_PC, mul_req_tmp_if.mul_op, mul_req_tmp_if.wb, mul_req_tmp_if.rd, mul_req_tmp_if.rs1_data, mul_req_tmp_if.rs2_data}), + .out ({mul_req_if.valid, mul_req_if.warp_num, mul_req_if.curr_PC, mul_req_if.mul_op, mul_req_if.wb, mul_req_if.rd, mul_req_if.rs1_data, mul_req_if.rs2_data}) + ); + + VX_generic_register #( + .N(`NUM_THREADS + `NW_BITS + 32 + `GPU_BITS + (`NUM_THREADS * 32) + 32 + 32) + ) gpu_reg ( + .clk (clk), + .reset (reset), + .stall (stall_gpu), + .flush (flush_gpu), + .in ({gpu_req_tmp_if.valid, gpu_req_tmp_if.warp_num, gpu_req_tmp_if.curr_PC, gpu_req_tmp_if.gpu_op, gpu_req_tmp_if.rs1_data, gpu_req_tmp_if.rs2_data, gpu_req_tmp_if.next_PC}), + .out ({gpu_req_if.valid, gpu_req_if.warp_num, gpu_req_if.curr_PC, gpu_req_if.gpu_op, gpu_req_if.rs1_data, gpu_req_if.rs2_data, gpu_req_if.next_PC}) + ); + +`ifdef DBG_PRINT_PIPELINE + always @(posedge clk) begin + if ((| alu_req_tmp_if.valid) && ~stall_alu) begin + $display("%t: Core%0d-issue: warp=%0d, PC=%0h, ex=ALU, op=%0d, wb=%d, rd=%0d, rs1=%0h, rs2=%0h, offset=%0h, next_PC=%0h", $time, CORE_ID, alu_req_tmp_if.warp_num, alu_req_tmp_if.curr_PC, alu_req_tmp_if.alu_op, alu_req_tmp_if.wb, alu_req_tmp_if.rd, alu_req_tmp_if.rs1_data, alu_req_tmp_if.rs2_data, alu_req_tmp_if.offset, alu_req_tmp_if.next_PC); + end + if ((| mul_req_tmp_if.valid) && ~stall_mul) begin + $display("%t: Core%0d-issue: warp=%0d, PC=%0h, ex=MUL, op=%0d, wb=%d, rd=%0d, rs1=%0h, rs2=%0h", $time, CORE_ID, mul_req_tmp_if.warp_num, mul_req_tmp_if.curr_PC, mul_req_tmp_if.mul_op, mul_req_tmp_if.wb, mul_req_tmp_if.rd, mul_req_tmp_if.rs1_data, mul_req_tmp_if.rs2_data); + end + if ((| lsu_req_tmp_if.valid) && ~stall_lsu) begin + $display("%t: Core%0d-issue: warp=%0d, PC=%0h, ex=LSU, rw=%b, wb=%0d, rd=%0d, byteen=%b, baddr=%0h, offset=%0h", $time, CORE_ID, lsu_req_tmp_if.warp_num, lsu_req_tmp_if.curr_PC, lsu_req_tmp_if.rw, lsu_req_tmp_if.rd, lsu_req_tmp_if.wb, lsu_req_tmp_if.byteen, lsu_req_tmp_if.base_addr, lsu_req_tmp_if.offset); + end + if ((| csr_req_tmp_if.valid) && ~stall_csr) begin + $display("%t: Core%0d-issue: warp=%0d, PC=%0h, ex=CSR, op=%0d, wb=%d, rd=%0d, addr=%0h, mask=%0h", $time, CORE_ID, csr_req_tmp_if.warp_num, csr_req_tmp_if.curr_PC, csr_req_tmp_if.csr_op, csr_req_tmp_if.wb, csr_req_tmp_if.rd, csr_req_tmp_if.csr_addr, csr_req_tmp_if.csr_mask); + end + if ((| gpu_req_tmp_if.valid) && ~stall_gpu) begin + $display("%t: Core%0d-issue: warp=%0d, PC=%0h, ex=GPU, op=%0d, rs1=%0h, rs2=%0h", $time, CORE_ID, gpu_req_tmp_if.warp_num, gpu_req_tmp_if.curr_PC, gpu_req_tmp_if.gpu_op, gpu_req_tmp_if.rs1_data, gpu_req_tmp_if.rs2_data); + end + end +`endif + endmodule \ No newline at end of file diff --git a/hw/rtl/VX_issue_mux.v b/hw/rtl/VX_issue_mux.v new file mode 100644 index 000000000..e55d7986a --- /dev/null +++ b/hw/rtl/VX_issue_mux.v @@ -0,0 +1,76 @@ +`include "VX_define.vh" + +module VX_issue_mux ( + // inputs + VX_decode_if decode_if, + VX_gpr_data_if gpr_data_if, + + // outputs + VX_alu_req_if alu_req_if, + VX_lsu_req_if lsu_req_if, + VX_csr_req_if csr_req_if, + VX_mul_req_if mul_req_if, + VX_gpu_req_if gpu_req_if +); + + wire[`NUM_THREADS-1:0] is_alu = {`NUM_THREADS{decode_if.ex_type == `EX_ALU}}; + wire[`NUM_THREADS-1:0] is_lsu = {`NUM_THREADS{decode_if.ex_type == `EX_LSU}}; + wire[`NUM_THREADS-1:0] is_csr = {`NUM_THREADS{decode_if.ex_type == `EX_CSR}}; + wire[`NUM_THREADS-1:0] is_mul = {`NUM_THREADS{decode_if.ex_type == `EX_MUL}}; + wire[`NUM_THREADS-1:0] is_gpu = {`NUM_THREADS{decode_if.ex_type == `EX_GPU}}; + + // ALU unit + assign alu_req_if.valid = decode_if.valid & is_alu; + assign alu_req_if.warp_num = decode_if.warp_num; + assign alu_req_if.curr_PC = decode_if.curr_PC; + assign alu_req_if.alu_op = `ALU_OP(decode_if.instr_op); + assign alu_req_if.rd = decode_if.rd; + assign alu_req_if.wb = decode_if.wb; + assign alu_req_if.rs1_data = gpr_data_if.rs1_data; + assign alu_req_if.rs2_data = gpr_data_if.rs2_data; + assign alu_req_if.offset = decode_if.imm; + assign alu_req_if.next_PC = decode_if.next_PC; + + // LSU unit + assign lsu_req_if.valid = decode_if.valid & is_lsu; + assign lsu_req_if.warp_num = decode_if.warp_num; + assign lsu_req_if.curr_PC = decode_if.curr_PC; + assign lsu_req_if.base_addr = gpr_data_if.rs1_data; + assign lsu_req_if.store_data = gpr_data_if.rs2_data; + assign lsu_req_if.offset = decode_if.imm; + assign lsu_req_if.rw = `LSU_RW(decode_if.instr_op); + assign lsu_req_if.byteen = `LSU_BE(decode_if.instr_op); + assign lsu_req_if.rd = decode_if.rd; + assign lsu_req_if.wb = decode_if.wb; + + // CSR unit + assign csr_req_if.valid = decode_if.valid & is_csr; + assign csr_req_if.warp_num = decode_if.warp_num; + assign csr_req_if.curr_PC = decode_if.curr_PC; + assign csr_req_if.csr_op = `CSR_OP(decode_if.instr_op); + assign csr_req_if.csr_addr = decode_if.imm[`CSR_ADDR_SIZE-1:0]; + assign csr_req_if.csr_mask = decode_if.rs2_is_imm ? 32'(decode_if.rs1) : gpr_data_if.rs1_data[0]; + assign csr_req_if.rd = decode_if.rd; + assign csr_req_if.wb = decode_if.wb; + assign csr_req_if.is_io = 1'b0; + + // MUL unit + assign mul_req_if.valid = decode_if.valid & is_mul; + assign mul_req_if.warp_num = decode_if.warp_num; + assign mul_req_if.curr_PC = decode_if.curr_PC; + assign mul_req_if.mul_op = `MUL_OP(decode_if.instr_op); + assign mul_req_if.rs1_data = gpr_data_if.rs1_data; + assign mul_req_if.rs2_data = gpr_data_if.rs2_data; + assign mul_req_if.rd = decode_if.rd; + assign mul_req_if.wb = decode_if.wb; + + // GPU unit + assign gpu_req_if.valid = decode_if.valid & is_gpu; + assign gpu_req_if.warp_num = decode_if.warp_num; + assign gpu_req_if.curr_PC = decode_if.curr_PC; + assign gpu_req_if.gpu_op = `GPU_OP(decode_if.instr_op); + assign gpu_req_if.rs1_data = gpr_data_if.rs1_data; + assign gpu_req_if.rs2_data = gpr_data_if.rs2_data[0]; + assign gpu_req_if.next_PC = decode_if.next_PC; + +endmodule \ No newline at end of file diff --git a/hw/rtl/VX_mul_unit.v b/hw/rtl/VX_mul_unit.v index 7f349f95b..f6a6976de 100644 --- a/hw/rtl/VX_mul_unit.v +++ b/hw/rtl/VX_mul_unit.v @@ -107,13 +107,15 @@ module VX_mul_unit #( wire stall = (~mul_commit_if.ready && (| mul_commit_if.valid)) || pipeline_stall; + wire flush = mul_commit_if.ready && pipeline_stall; + VX_generic_register #( .N(`NUM_THREADS + `NW_BITS + 32 + `NR_BITS + `WB_BITS + (`NUM_THREADS * 32)), ) mul_reg ( .clk (clk), .reset (reset), .stall (stall), - .flush (0), + .flush (flush), .in ({mul_req_if.valid, mul_req_if.warp_num, mul_req_if.curr_PC, mul_req_if.rd, mul_req_if.wb, alu_result}), .out ({mul_commit_if.valid, mul_commit_if.warp_num, mul_commit_if.curr_PC, mul_commit_if.rd, mul_commit_if.wb, mul_commit_if.data}) ); diff --git a/hw/rtl/VX_scheduler.v b/hw/rtl/VX_scheduler.v index 29c77d520..1d9f31493 100644 --- a/hw/rtl/VX_scheduler.v +++ b/hw/rtl/VX_scheduler.v @@ -8,8 +8,12 @@ module VX_scheduler #( VX_decode_if decode_if, VX_wb_if writeback_if, - - VX_execute_if execute_if, + input wire alu_busy, + input wire lsu_busy, + input wire csr_busy, + input wire mul_busy, + input wire gpu_busy, + output wire schedule_delay, output wire is_empty ); localparam CTVW = `CLOG2(`NUM_WARPS * 32 + 1); @@ -28,13 +32,13 @@ module VX_scheduler #( wire rename_valid = (| decode_if.valid) && (rs1_rename_qual || rs2_rename_qual || rd_rename_qual); wire ex_stalled = (| decode_if.valid) - && ((!execute_if.alu_ready && (decode_if.ex_type == `EX_ALU)) - || (!execute_if.lsu_ready && (decode_if.ex_type == `EX_LSU)) - || (!execute_if.csr_ready && (decode_if.ex_type == `EX_CSR)) - || (!execute_if.mul_ready && (decode_if.ex_type == `EX_MUL)) - || (!execute_if.gpu_ready && (decode_if.ex_type == `EX_GPU))); + && ((alu_busy && (decode_if.ex_type == `EX_ALU)) + || (lsu_busy && (decode_if.ex_type == `EX_LSU)) + || (csr_busy && (decode_if.ex_type == `EX_CSR)) + || (mul_busy && (decode_if.ex_type == `EX_MUL)) + || (gpu_busy && (decode_if.ex_type == `EX_GPU))); - wire stall = rename_valid || ex_stalled; + wire stall = ex_stalled || rename_valid; wire acquire_rd = (| decode_if.valid) && (decode_if.wb != 0) && ~stall; @@ -67,19 +71,18 @@ module VX_scheduler #( end end - VX_generic_register #( - .N(`NUM_THREADS + `NW_BITS + 32 + 32 + `NR_BITS + `NR_BITS + `NR_BITS + 32 + 1 + 1 + `EX_BITS + `OP_BITS + `WB_BITS), - ) schedule_reg ( - .clk (clk), - .reset (reset), - .stall (stall), - .flush (0), - .in ({decode_if.valid, decode_if.warp_num, decode_if.curr_PC, decode_if.next_PC, decode_if.rd, decode_if.rs1, decode_if.rs2, decode_if.imm, decode_if.rs1_is_PC, decode_if.rs2_is_imm, decode_if.ex_type, decode_if.instr_op, decode_if.wb}), - .out ({execute_if.valid, execute_if.warp_num, execute_if.curr_PC, execute_if.next_PC, execute_if.rd, execute_if.rs1, execute_if.rs2, execute_if.imm, execute_if.rs1_is_PC, execute_if.rs2_is_imm, execute_if.ex_type, execute_if.instr_op, execute_if.wb}) - ); - assign decode_if.ready = ~stall; + assign schedule_delay = stall; + assign is_empty = (0 == count_valid); +`ifdef DBG_PRINT_PIPELINE + always @(posedge clk) begin + if (stall) begin + $display("%t: Core%0d-stall: warp=%0d, PC=%0h, rd=%0d, wb=%0d, rename=%b%b%b, alu=%b, lsu=%b, csr=%b, mul=%b, gpu=%b", $time, CORE_ID, decode_if.warp_num, decode_if.curr_PC, decode_if.rd, decode_if.wb, rd_rename_qual, rs1_rename_qual, rs2_rename_qual, alu_busy, lsu_busy, csr_busy, mul_busy, gpu_busy); + end + end +`endif + endmodule \ No newline at end of file diff --git a/hw/rtl/VX_warp.v b/hw/rtl/VX_warp.v deleted file mode 100644 index 55c2bb317..000000000 --- a/hw/rtl/VX_warp.v +++ /dev/null @@ -1,69 +0,0 @@ -`include "VX_define.vh" - - -module VX_warp ( - input wire clk, - input wire reset, - input wire stall, - input wire remove, - input wire[`NUM_THREADS-1:0] thread_mask, - input wire change_mask, - input wire jal, - input wire[31:0] dest, - input wire branch_taken, - input wire[31:0] branch_dest, - input wire wspawn, - input wire[31:0] wspawn_pc, - - output wire[31:0] PC, - output wire[`NUM_THREADS-1:0] valid -); - - reg [`NUM_THREADS-1:0] valid_t; - reg [31:0] real_PC; - reg [31:0] temp_PC; - reg [31:0] use_PC; - - always @(posedge clk) begin - if (reset) begin - valid_t <= {{(`NUM_THREADS-1){1'b0}},1'b1}; // Thread 1 active - end else if (remove) begin - valid_t <= 0; - end else if (change_mask) begin - valid_t <= thread_mask; - end - end - - genvar i; - generate - for (i = 0; i < `NUM_THREADS; i++) begin : valid_assign - assign valid[i] = change_mask ? thread_mask[i] : stall ? 1'b0 : valid_t[i]; - end - endgenerate - - always @(*) begin - if (jal == 1'b1) begin - temp_PC = dest; - end else if (branch_taken) begin - temp_PC = branch_dest; - end else begin - temp_PC = real_PC; - end - end - - assign use_PC = temp_PC; - assign PC = temp_PC; - - always @(posedge clk) begin - if (reset) begin - real_PC <= 0; - end else if (wspawn) begin - real_PC <= wspawn_pc; - end else if (!stall) begin - real_PC <= use_PC + 32'h4; - end else begin - real_PC <= use_PC; - end - end - -endmodule \ No newline at end of file diff --git a/hw/rtl/VX_warp_sched.v b/hw/rtl/VX_warp_sched.v index aa34593dd..a0040a5b5 100644 --- a/hw/rtl/VX_warp_sched.v +++ b/hw/rtl/VX_warp_sched.v @@ -20,7 +20,7 @@ module VX_warp_sched #( wire update_visible_active; wire scheduled_warp; - wire [(1+32+`NUM_THREADS-1):0] d[`NUM_WARPS-1:0]; + wire [(1+32+`NUM_THREADS-1):0] ipdom[`NUM_WARPS-1:0]; wire join_fall; wire [31:0] join_pc; @@ -71,9 +71,8 @@ module VX_warp_sched #( wire stall; - integer i; - always @(posedge clk) begin + integer i; if (reset) begin for (i = 0; i < `NUM_BARRIERS; i++) begin barrier_stall_mask[i] <= 0; @@ -99,9 +98,9 @@ module VX_warp_sched #( end else begin if (warp_ctl_if.wspawn) begin - warp_active <= warp_ctl_if.wspawn_new_active; - use_wspawn_pc <= warp_ctl_if.wspawn_pc; - use_wspawn <= warp_ctl_if.wspawn_new_active & (~`NUM_WARPS'b1); + warp_active <= warp_ctl_if.wspawn_new_active; + use_wspawn_pc <= warp_ctl_if.wspawn_pc; + use_wspawn <= warp_ctl_if.wspawn_new_active & (~`NUM_WARPS'(1)); end if (warp_ctl_if.is_barrier) begin @@ -205,13 +204,12 @@ module VX_warp_sched #( wire [(1+32+`NUM_THREADS-1):0] q1 = {1'b1, 32'b0, thread_masks[warp_ctl_if.warp_num]}; wire [(1+32+`NUM_THREADS-1):0] q2 = {1'b0, warp_ctl_if.split_save_pc, warp_ctl_if.split_later_mask}; - assign {join_fall, join_pc, join_tm} = d[join_if.warp_num]; + assign {join_fall, join_pc, join_tm} = ipdom[join_if.warp_num]; - genvar j; - - for (j = 0; j < `NUM_WARPS; j++) begin : stacks - wire correct_warp_s = (j == warp_ctl_if.warp_num); - wire correct_warp_j = (j == join_if.warp_num); + genvar i; + for (i = 0; i < `NUM_WARPS; i++) begin : stacks + wire correct_warp_s = (i == warp_ctl_if.warp_num); + wire correct_warp_j = (i == join_if.warp_num); wire push = (warp_ctl_if.is_split && warp_ctl_if.do_split) && correct_warp_s; wire pop = join_if.is_join && correct_warp_j; @@ -224,11 +222,11 @@ module VX_warp_sched #( .reset(reset), .push (push), .pop (pop), - .d (d[i]), + .d (ipdom[i]), .q1 (q1), .q2 (q2) ); - end + end wire should_bra = (branch_ctl_if.valid && branch_ctl_if.taken && (warp_to_schedule == branch_ctl_if.warp_num)); diff --git a/hw/rtl/cache/VX_cache.v b/hw/rtl/cache/VX_cache.v index e76430f94..7184847b9 100644 --- a/hw/rtl/cache/VX_cache.v +++ b/hw/rtl/cache/VX_cache.v @@ -249,187 +249,185 @@ module VX_cache #( genvar i; - generate - for (i = 0; i < NUM_BANKS; i++) begin - wire [NUM_REQUESTS-1:0] curr_bank_core_req_valid; - wire [NUM_REQUESTS-1:0] curr_bank_core_req_rw; - wire [NUM_REQUESTS-1:0][WORD_SIZE-1:0] curr_bank_core_req_byteen; - wire [NUM_REQUESTS-1:0][`WORD_ADDR_WIDTH-1:0] curr_bank_core_req_addr; - wire [`CORE_REQ_TAG_COUNT-1:0][CORE_TAG_WIDTH-1:0] curr_bank_core_req_tag; - wire [NUM_REQUESTS-1:0][`WORD_WIDTH-1:0] curr_bank_core_req_data; + for (i = 0; i < NUM_BANKS; i++) begin + wire [NUM_REQUESTS-1:0] curr_bank_core_req_valid; + wire [NUM_REQUESTS-1:0] curr_bank_core_req_rw; + wire [NUM_REQUESTS-1:0][WORD_SIZE-1:0] curr_bank_core_req_byteen; + wire [NUM_REQUESTS-1:0][`WORD_ADDR_WIDTH-1:0] curr_bank_core_req_addr; + wire [`CORE_REQ_TAG_COUNT-1:0][CORE_TAG_WIDTH-1:0] curr_bank_core_req_tag; + wire [NUM_REQUESTS-1:0][`WORD_WIDTH-1:0] curr_bank_core_req_data; - wire curr_bank_core_rsp_valid; - wire [`REQS_BITS-1:0] curr_bank_core_rsp_tid; - wire [`WORD_WIDTH-1:0] curr_bank_core_rsp_data; - wire [CORE_TAG_WIDTH-1:0] curr_bank_core_rsp_tag; - wire curr_bank_core_rsp_ready; + wire curr_bank_core_rsp_valid; + wire [`REQS_BITS-1:0] curr_bank_core_rsp_tid; + wire [`WORD_WIDTH-1:0] curr_bank_core_rsp_data; + wire [CORE_TAG_WIDTH-1:0] curr_bank_core_rsp_tag; + wire curr_bank_core_rsp_ready; - wire curr_bank_dram_fill_rsp_valid; - wire [`BANK_LINE_WIDTH-1:0] curr_bank_dram_fill_rsp_data; - wire [`LINE_ADDR_WIDTH-1:0] curr_bank_dram_fill_rsp_addr; - wire curr_bank_dram_fill_rsp_ready; + wire curr_bank_dram_fill_rsp_valid; + wire [`BANK_LINE_WIDTH-1:0] curr_bank_dram_fill_rsp_data; + wire [`LINE_ADDR_WIDTH-1:0] curr_bank_dram_fill_rsp_addr; + wire curr_bank_dram_fill_rsp_ready; - wire curr_bank_dram_fill_req_valid; - wire [`LINE_ADDR_WIDTH-1:0] curr_bank_dram_fill_req_addr; - wire curr_bank_dram_fill_req_ready; + wire curr_bank_dram_fill_req_valid; + wire [`LINE_ADDR_WIDTH-1:0] curr_bank_dram_fill_req_addr; + wire curr_bank_dram_fill_req_ready; - wire curr_bank_dram_wb_req_valid; - wire [BANK_LINE_SIZE-1:0] curr_bank_dram_wb_req_byteen; - wire [`LINE_ADDR_WIDTH-1:0] curr_bank_dram_wb_req_addr; - wire[`BANK_LINE_WIDTH-1:0] curr_bank_dram_wb_req_data; - wire curr_bank_dram_wb_req_ready; + wire curr_bank_dram_wb_req_valid; + wire [BANK_LINE_SIZE-1:0] curr_bank_dram_wb_req_byteen; + wire [`LINE_ADDR_WIDTH-1:0] curr_bank_dram_wb_req_addr; + wire[`BANK_LINE_WIDTH-1:0] curr_bank_dram_wb_req_data; + wire curr_bank_dram_wb_req_ready; - wire curr_bank_snp_req_valid; - wire [`LINE_ADDR_WIDTH-1:0] curr_bank_snp_req_addr; - wire curr_bank_snp_req_invalidate; - wire [SNP_REQ_TAG_WIDTH-1:0] curr_bank_snp_req_tag; - wire curr_bank_snp_req_ready; + wire curr_bank_snp_req_valid; + wire [`LINE_ADDR_WIDTH-1:0] curr_bank_snp_req_addr; + wire curr_bank_snp_req_invalidate; + wire [SNP_REQ_TAG_WIDTH-1:0] curr_bank_snp_req_tag; + wire curr_bank_snp_req_ready; - wire curr_bank_snp_rsp_valid; - wire [SNP_REQ_TAG_WIDTH-1:0] curr_bank_snp_rsp_tag; - wire curr_bank_snp_rsp_ready; + wire curr_bank_snp_rsp_valid; + wire [SNP_REQ_TAG_WIDTH-1:0] curr_bank_snp_rsp_tag; + wire curr_bank_snp_rsp_ready; - wire curr_bank_core_req_ready; + wire curr_bank_core_req_ready; - // Core Req - assign curr_bank_core_req_valid = (per_bank_valid[i] & {NUM_REQUESTS{core_req_ready}}); - assign curr_bank_core_req_addr = core_req_addr; - assign curr_bank_core_req_rw = core_req_rw; - assign curr_bank_core_req_byteen = core_req_byteen; - assign curr_bank_core_req_data = core_req_data; - assign curr_bank_core_req_tag = core_req_tag; - assign per_bank_core_req_ready[i] = curr_bank_core_req_ready; + // Core Req + assign curr_bank_core_req_valid = (per_bank_valid[i] & {NUM_REQUESTS{core_req_ready}}); + assign curr_bank_core_req_addr = core_req_addr; + assign curr_bank_core_req_rw = core_req_rw; + assign curr_bank_core_req_byteen = core_req_byteen; + assign curr_bank_core_req_data = core_req_data; + assign curr_bank_core_req_tag = core_req_tag; + assign per_bank_core_req_ready[i] = curr_bank_core_req_ready; - // Core WB - assign curr_bank_core_rsp_ready = per_bank_core_rsp_ready[i]; - assign per_bank_core_rsp_valid [i] = curr_bank_core_rsp_valid; - assign per_bank_core_rsp_tid [i] = curr_bank_core_rsp_tid; - assign per_bank_core_rsp_tag [i] = curr_bank_core_rsp_tag; - assign per_bank_core_rsp_data [i] = curr_bank_core_rsp_data; + // Core WB + assign curr_bank_core_rsp_ready = per_bank_core_rsp_ready[i]; + assign per_bank_core_rsp_valid [i] = curr_bank_core_rsp_valid; + assign per_bank_core_rsp_tid [i] = curr_bank_core_rsp_tid; + assign per_bank_core_rsp_tag [i] = curr_bank_core_rsp_tag; + assign per_bank_core_rsp_data [i] = curr_bank_core_rsp_data; - // Dram fill request - assign per_bank_dram_fill_req_valid[i] = curr_bank_dram_fill_req_valid; - if (NUM_BANKS == 1) begin - assign per_bank_dram_fill_req_addr[i] = curr_bank_dram_fill_req_addr; - end else begin - assign per_bank_dram_fill_req_addr[i] = `LINE_TO_DRAM_ADDR(curr_bank_dram_fill_req_addr, i); - end - assign curr_bank_dram_fill_req_ready = dram_fill_req_ready; + // Dram fill request + assign per_bank_dram_fill_req_valid[i] = curr_bank_dram_fill_req_valid; + if (NUM_BANKS == 1) begin + assign per_bank_dram_fill_req_addr[i] = curr_bank_dram_fill_req_addr; + end else begin + assign per_bank_dram_fill_req_addr[i] = `LINE_TO_DRAM_ADDR(curr_bank_dram_fill_req_addr, i); + end + assign curr_bank_dram_fill_req_ready = dram_fill_req_ready; + + // Dram fill response + if (NUM_BANKS == 1) begin + assign curr_bank_dram_fill_rsp_valid = dram_rsp_valid; + assign curr_bank_dram_fill_rsp_addr = dram_rsp_tag; + end else begin + assign curr_bank_dram_fill_rsp_valid = dram_rsp_valid && (`DRAM_ADDR_BANK(dram_rsp_tag) == i); + assign curr_bank_dram_fill_rsp_addr = `DRAM_TO_LINE_ADDR(dram_rsp_tag); + end + assign curr_bank_dram_fill_rsp_data = dram_rsp_data; + assign per_bank_dram_fill_rsp_ready[i] = curr_bank_dram_fill_rsp_ready; + + // Dram writeback request + assign per_bank_dram_wb_req_valid[i] = curr_bank_dram_wb_req_valid; + assign per_bank_dram_wb_req_byteen[i] = curr_bank_dram_wb_req_byteen; + if (NUM_BANKS == 1) begin + assign per_bank_dram_wb_req_addr[i] = curr_bank_dram_wb_req_addr; + end else begin + assign per_bank_dram_wb_req_addr[i] = `LINE_TO_DRAM_ADDR(curr_bank_dram_wb_req_addr, i); + end + assign per_bank_dram_wb_req_data[i] = curr_bank_dram_wb_req_data; + assign curr_bank_dram_wb_req_ready = per_bank_dram_wb_req_ready[i]; + + // Snoop request + if (NUM_BANKS == 1) begin + assign curr_bank_snp_req_valid = snp_req_valid_qual; + assign curr_bank_snp_req_addr = snp_req_addr_qual; + end else begin + assign curr_bank_snp_req_valid = snp_req_valid_qual && (`DRAM_ADDR_BANK(snp_req_addr_qual) == i); + assign curr_bank_snp_req_addr = `DRAM_TO_LINE_ADDR(snp_req_addr_qual); + end + assign curr_bank_snp_req_invalidate = snp_req_invalidate_qual; + assign curr_bank_snp_req_tag = snp_req_tag_qual; + assign per_bank_snp_req_ready[i] = curr_bank_snp_req_ready; + + // Snoop response + assign per_bank_snp_rsp_valid[i] = curr_bank_snp_rsp_valid; + assign per_bank_snp_rsp_tag[i] = curr_bank_snp_rsp_tag; + assign curr_bank_snp_rsp_ready = per_bank_snp_rsp_ready[i]; + + VX_bank #( + .BANK_ID (i), + .CACHE_ID (CACHE_ID), + .CACHE_SIZE (CACHE_SIZE), + .BANK_LINE_SIZE (BANK_LINE_SIZE), + .NUM_BANKS (NUM_BANKS), + .WORD_SIZE (WORD_SIZE), + .NUM_REQUESTS (NUM_REQUESTS), + .STAGE_1_CYCLES (STAGE_1_CYCLES), + .CREQ_SIZE (CREQ_SIZE), + .MRVQ_SIZE (MRVQ_SIZE), + .DFPQ_SIZE (DFPQ_SIZE), + .SNRQ_SIZE (SNRQ_SIZE), + .CWBQ_SIZE (CWBQ_SIZE), + .DWBQ_SIZE (DWBQ_SIZE), + .DFQQ_SIZE (DFQQ_SIZE), + .DRAM_ENABLE (DRAM_ENABLE), + .WRITE_ENABLE (WRITE_ENABLE), + .SNOOP_FORWARDING (SNOOP_FORWARDING), + .CORE_TAG_WIDTH (CORE_TAG_WIDTH), + .CORE_TAG_ID_BITS (CORE_TAG_ID_BITS), + .SNP_REQ_TAG_WIDTH (SNP_REQ_TAG_WIDTH) + ) bank ( + `SCOPE_SIGNALS_CACHE_BANK_BIND + + .clk (clk), + .reset (reset), + // Core request + .core_req_valid (curr_bank_core_req_valid), + .core_req_rw (curr_bank_core_req_rw), + .core_req_byteen (curr_bank_core_req_byteen), + .core_req_addr (curr_bank_core_req_addr), + .core_req_data (curr_bank_core_req_data), + .core_req_tag (curr_bank_core_req_tag), + .core_req_ready (curr_bank_core_req_ready), + + // Core response + .core_rsp_valid (curr_bank_core_rsp_valid), + .core_rsp_tid (curr_bank_core_rsp_tid), + .core_rsp_data (curr_bank_core_rsp_data), + .core_rsp_tag (curr_bank_core_rsp_tag), + .core_rsp_ready (curr_bank_core_rsp_ready), + + // Dram fill request + .dram_fill_req_valid (curr_bank_dram_fill_req_valid), + .dram_fill_req_addr (curr_bank_dram_fill_req_addr), + .dram_fill_req_ready (curr_bank_dram_fill_req_ready), // Dram fill response - if (NUM_BANKS == 1) begin - assign curr_bank_dram_fill_rsp_valid = dram_rsp_valid; - assign curr_bank_dram_fill_rsp_addr = dram_rsp_tag; - end else begin - assign curr_bank_dram_fill_rsp_valid = dram_rsp_valid && (`DRAM_ADDR_BANK(dram_rsp_tag) == i); - assign curr_bank_dram_fill_rsp_addr = `DRAM_TO_LINE_ADDR(dram_rsp_tag); - end - assign curr_bank_dram_fill_rsp_data = dram_rsp_data; - assign per_bank_dram_fill_rsp_ready[i] = curr_bank_dram_fill_rsp_ready; + .dram_fill_rsp_valid (curr_bank_dram_fill_rsp_valid), + .dram_fill_rsp_data (curr_bank_dram_fill_rsp_data), + .dram_fill_rsp_addr (curr_bank_dram_fill_rsp_addr), + .dram_fill_rsp_ready (curr_bank_dram_fill_rsp_ready), - // Dram writeback request - assign per_bank_dram_wb_req_valid[i] = curr_bank_dram_wb_req_valid; - assign per_bank_dram_wb_req_byteen[i] = curr_bank_dram_wb_req_byteen; - if (NUM_BANKS == 1) begin - assign per_bank_dram_wb_req_addr[i] = curr_bank_dram_wb_req_addr; - end else begin - assign per_bank_dram_wb_req_addr[i] = `LINE_TO_DRAM_ADDR(curr_bank_dram_wb_req_addr, i); - end - assign per_bank_dram_wb_req_data[i] = curr_bank_dram_wb_req_data; - assign curr_bank_dram_wb_req_ready = per_bank_dram_wb_req_ready[i]; + // Dram writeback request + .dram_wb_req_valid (curr_bank_dram_wb_req_valid), + .dram_wb_req_byteen (curr_bank_dram_wb_req_byteen), + .dram_wb_req_addr (curr_bank_dram_wb_req_addr), + .dram_wb_req_data (curr_bank_dram_wb_req_data), + .dram_wb_req_ready (curr_bank_dram_wb_req_ready), // Snoop request - if (NUM_BANKS == 1) begin - assign curr_bank_snp_req_valid = snp_req_valid_qual; - assign curr_bank_snp_req_addr = snp_req_addr_qual; - end else begin - assign curr_bank_snp_req_valid = snp_req_valid_qual && (`DRAM_ADDR_BANK(snp_req_addr_qual) == i); - assign curr_bank_snp_req_addr = `DRAM_TO_LINE_ADDR(snp_req_addr_qual); - end - assign curr_bank_snp_req_invalidate = snp_req_invalidate_qual; - assign curr_bank_snp_req_tag = snp_req_tag_qual; - assign per_bank_snp_req_ready[i] = curr_bank_snp_req_ready; + .snp_req_valid (curr_bank_snp_req_valid), + .snp_req_addr (curr_bank_snp_req_addr), + .snp_req_invalidate (curr_bank_snp_req_invalidate), + .snp_req_tag (curr_bank_snp_req_tag), + .snp_req_ready (curr_bank_snp_req_ready), - // Snoop response - assign per_bank_snp_rsp_valid[i] = curr_bank_snp_rsp_valid; - assign per_bank_snp_rsp_tag[i] = curr_bank_snp_rsp_tag; - assign curr_bank_snp_rsp_ready = per_bank_snp_rsp_ready[i]; - - VX_bank #( - .BANK_ID (i), - .CACHE_ID (CACHE_ID), - .CACHE_SIZE (CACHE_SIZE), - .BANK_LINE_SIZE (BANK_LINE_SIZE), - .NUM_BANKS (NUM_BANKS), - .WORD_SIZE (WORD_SIZE), - .NUM_REQUESTS (NUM_REQUESTS), - .STAGE_1_CYCLES (STAGE_1_CYCLES), - .CREQ_SIZE (CREQ_SIZE), - .MRVQ_SIZE (MRVQ_SIZE), - .DFPQ_SIZE (DFPQ_SIZE), - .SNRQ_SIZE (SNRQ_SIZE), - .CWBQ_SIZE (CWBQ_SIZE), - .DWBQ_SIZE (DWBQ_SIZE), - .DFQQ_SIZE (DFQQ_SIZE), - .DRAM_ENABLE (DRAM_ENABLE), - .WRITE_ENABLE (WRITE_ENABLE), - .SNOOP_FORWARDING (SNOOP_FORWARDING), - .CORE_TAG_WIDTH (CORE_TAG_WIDTH), - .CORE_TAG_ID_BITS (CORE_TAG_ID_BITS), - .SNP_REQ_TAG_WIDTH (SNP_REQ_TAG_WIDTH) - ) bank ( - `SCOPE_SIGNALS_CACHE_BANK_BIND - - .clk (clk), - .reset (reset), - // Core request - .core_req_valid (curr_bank_core_req_valid), - .core_req_rw (curr_bank_core_req_rw), - .core_req_byteen (curr_bank_core_req_byteen), - .core_req_addr (curr_bank_core_req_addr), - .core_req_data (curr_bank_core_req_data), - .core_req_tag (curr_bank_core_req_tag), - .core_req_ready (curr_bank_core_req_ready), - - // Core response - .core_rsp_valid (curr_bank_core_rsp_valid), - .core_rsp_tid (curr_bank_core_rsp_tid), - .core_rsp_data (curr_bank_core_rsp_data), - .core_rsp_tag (curr_bank_core_rsp_tag), - .core_rsp_ready (curr_bank_core_rsp_ready), - - // Dram fill request - .dram_fill_req_valid (curr_bank_dram_fill_req_valid), - .dram_fill_req_addr (curr_bank_dram_fill_req_addr), - .dram_fill_req_ready (curr_bank_dram_fill_req_ready), - - // Dram fill response - .dram_fill_rsp_valid (curr_bank_dram_fill_rsp_valid), - .dram_fill_rsp_data (curr_bank_dram_fill_rsp_data), - .dram_fill_rsp_addr (curr_bank_dram_fill_rsp_addr), - .dram_fill_rsp_ready (curr_bank_dram_fill_rsp_ready), - - // Dram writeback request - .dram_wb_req_valid (curr_bank_dram_wb_req_valid), - .dram_wb_req_byteen (curr_bank_dram_wb_req_byteen), - .dram_wb_req_addr (curr_bank_dram_wb_req_addr), - .dram_wb_req_data (curr_bank_dram_wb_req_data), - .dram_wb_req_ready (curr_bank_dram_wb_req_ready), - - // Snoop request - .snp_req_valid (curr_bank_snp_req_valid), - .snp_req_addr (curr_bank_snp_req_addr), - .snp_req_invalidate (curr_bank_snp_req_invalidate), - .snp_req_tag (curr_bank_snp_req_tag), - .snp_req_ready (curr_bank_snp_req_ready), - - // Snoop response - .snp_rsp_valid (curr_bank_snp_rsp_valid), - .snp_rsp_tag (curr_bank_snp_rsp_tag), - .snp_rsp_ready (curr_bank_snp_rsp_ready) - ); - end - endgenerate + // Snoop response + .snp_rsp_valid (curr_bank_snp_rsp_valid), + .snp_rsp_tag (curr_bank_snp_rsp_tag), + .snp_rsp_ready (curr_bank_snp_rsp_ready) + ); + end VX_cache_dram_req_arb #( .BANK_LINE_SIZE (BANK_LINE_SIZE), diff --git a/hw/rtl/cache/VX_cache_miss_resrv.v b/hw/rtl/cache/VX_cache_miss_resrv.v index c851629cf..b1f7a7e5e 100644 --- a/hw/rtl/cache/VX_cache_miss_resrv.v +++ b/hw/rtl/cache/VX_cache_miss_resrv.v @@ -78,13 +78,11 @@ module VX_cache_miss_resrv #( reg [MRVQ_SIZE-1:0] make_ready_push; reg [MRVQ_SIZE-1:0] valid_address_match; - genvar i; - generate - for (i = 0; i < MRVQ_SIZE; i++) begin - assign valid_address_match[i] = valid_table[i] ? (addr_table[i] == fill_addr_st1) : 0; - assign make_ready[i] = is_fill_st1 && valid_address_match[i]; - end - endgenerate + genvar i; + for (i = 0; i < MRVQ_SIZE; i++) begin + assign valid_address_match[i] = valid_table[i] ? (addr_table[i] == fill_addr_st1) : 0; + assign make_ready[i] = is_fill_st1 && valid_address_match[i]; + end assign pending_hazard = |(valid_address_match); diff --git a/hw/rtl/interfaces/VX_alu_req_if.v b/hw/rtl/interfaces/VX_alu_req_if.v index ce90f96f0..999e04203 100644 --- a/hw/rtl/interfaces/VX_alu_req_if.v +++ b/hw/rtl/interfaces/VX_alu_req_if.v @@ -11,14 +11,14 @@ interface VX_alu_req_if (); wire [`ALU_BITS-1:0] alu_op; + wire [`WB_BITS-1:0] wb; + wire [`NR_BITS-1:0] rd; + wire [`NUM_THREADS-1:0][31:0] rs1_data; wire [`NUM_THREADS-1:0][31:0] rs2_data; wire [31:0] offset; - wire [31:0] next_PC; - - wire [`NR_BITS-1:0] rd; - wire [`WB_BITS-1:0] wb; + wire [31:0] next_PC; wire ready; diff --git a/hw/rtl/interfaces/VX_execute_if.v b/hw/rtl/interfaces/VX_execute_if.v deleted file mode 100644 index 4f698c766..000000000 --- a/hw/rtl/interfaces/VX_execute_if.v +++ /dev/null @@ -1,32 +0,0 @@ -`ifndef VX_EXECUTE_IF -`define VX_EXECUTE_IF - -`include "VX_define.vh" - -interface VX_execute_if (); - - wire [`NUM_THREADS-1:0] valid; - wire [`NW_BITS-1:0] warp_num; - wire [31:0] curr_PC; - wire [`EX_BITS-1:0] ex_type; - wire [`OP_BITS-1:0] instr_op; - - wire [`NR_BITS-1:0] rd; - wire [`NR_BITS-1:0] rs1; - wire [`NR_BITS-1:0] rs2; - wire [31:0] imm; - wire rs1_is_PC; - wire rs2_is_imm; - wire [31:0] next_PC; - - wire [`WB_BITS-1:0] wb; - - wire alu_ready; - wire mul_ready; - wire lsu_ready; - wire csr_ready; - wire gpu_ready; - -endinterface - -`endif \ No newline at end of file diff --git a/hw/rtl/interfaces/VX_gpr_data_if.v b/hw/rtl/interfaces/VX_gpr_data_if.v new file mode 100644 index 000000000..fb58e6f79 --- /dev/null +++ b/hw/rtl/interfaces/VX_gpr_data_if.v @@ -0,0 +1,13 @@ +`ifndef VX_GPR_DATA_IF +`define VX_GPR_DATA_IF + +`include "VX_define.vh" + +interface VX_gpr_data_if (); + + wire [`NUM_THREADS-1:0][31:0] rs1_data; + wire [`NUM_THREADS-1:0][31:0] rs2_data; + +endinterface + +`endif \ No newline at end of file diff --git a/hw/rtl/interfaces/VX_ifetch_req_if.v b/hw/rtl/interfaces/VX_ifetch_req_if.v index ac95eaac1..82b31b6c5 100644 --- a/hw/rtl/interfaces/VX_ifetch_req_if.v +++ b/hw/rtl/interfaces/VX_ifetch_req_if.v @@ -5,9 +5,9 @@ interface VX_ifetch_req_if (); - wire [`NUM_THREADS-1:0] valid; - wire [31:0] curr_PC; + wire [`NUM_THREADS-1:0] valid; wire [`NW_BITS-1:0] warp_num; + wire [31:0] curr_PC; wire ready; endinterface diff --git a/hw/rtl/interfaces/VX_ifetch_rsp_if.v b/hw/rtl/interfaces/VX_ifetch_rsp_if.v index c8e5e2d79..0bc482c27 100644 --- a/hw/rtl/interfaces/VX_ifetch_rsp_if.v +++ b/hw/rtl/interfaces/VX_ifetch_rsp_if.v @@ -5,9 +5,9 @@ interface VX_ifetch_rsp_if (); - wire [`NUM_THREADS-1:0] valid; - wire [31:0] curr_PC; + wire [`NUM_THREADS-1:0] valid; wire [`NW_BITS-1:0] warp_num; + wire [31:0] curr_PC; wire [31:0] instr; wire ready; diff --git a/hw/rtl/interfaces/VX_lsu_req_if.v b/hw/rtl/interfaces/VX_lsu_req_if.v index c333961da..ce6731403 100644 --- a/hw/rtl/interfaces/VX_lsu_req_if.v +++ b/hw/rtl/interfaces/VX_lsu_req_if.v @@ -6,15 +6,19 @@ interface VX_lsu_req_if (); wire [`NUM_THREADS-1:0] valid; - wire [31:0] curr_PC; wire [`NW_BITS-1:0] warp_num; - wire [`NUM_THREADS-1:0][31:0] store_data; - wire [`NUM_THREADS-1:0][31:0] base_addr; - wire [31:0] offset; + wire [31:0] curr_PC; + wire rw; wire [`BYTEEN_BITS-1:0] byteen; - wire [`NR_BITS-1:0] rd; + wire [`WB_BITS-1:0] wb; + wire [`NR_BITS-1:0] rd; + + wire [`NUM_THREADS-1:0][31:0] store_data; + wire [`NUM_THREADS-1:0][31:0] base_addr; + wire [31:0] offset; + wire ready; endinterface diff --git a/hw/rtl/interfaces/VX_mul_req_if.v b/hw/rtl/interfaces/VX_mul_req_if.v index 26d175fba..01c0a621d 100644 --- a/hw/rtl/interfaces/VX_mul_req_if.v +++ b/hw/rtl/interfaces/VX_mul_req_if.v @@ -5,19 +5,19 @@ interface VX_mul_req_if (); - wire [`NUM_THREADS-1:0] valid; - wire [`NW_BITS-1:0] warp_num; - wire [31:0] curr_PC; + wire [`NUM_THREADS-1:0] valid; + wire [`NW_BITS-1:0] warp_num; + wire [31:0] curr_PC; + + wire [`MUL_BITS-1:0] mul_op; + + wire [`WB_BITS-1:0] wb; + wire [`NR_BITS-1:0] rd; wire [`NUM_THREADS-1:0][31:0] rs1_data; wire [`NUM_THREADS-1:0][31:0] rs2_data; - - wire [`MUL_BITS-1:0] mul_op; - - wire [`NR_BITS-1:0] rd; - wire [`WB_BITS-1:0] wb; - - wire ready; + + wire ready; endinterface diff --git a/hw/rtl/interfaces/VX_wb_if.v b/hw/rtl/interfaces/VX_wb_if.v index ceba55062..e363c5641 100644 --- a/hw/rtl/interfaces/VX_wb_if.v +++ b/hw/rtl/interfaces/VX_wb_if.v @@ -6,9 +6,9 @@ interface VX_wb_if (); wire [`NUM_THREADS-1:0] valid; - wire [`NW_BITS-1:0] warp_num; - wire [`NUM_THREADS-1:0][31:0] data; + wire [`NW_BITS-1:0] warp_num; wire [`NR_BITS-1:0] rd; + wire [`NUM_THREADS-1:0][31:0] data; wire ready; endinterface diff --git a/hw/rtl/libs/VX_generic_register.v b/hw/rtl/libs/VX_generic_register.v index b03283720..d3c76dff0 100644 --- a/hw/rtl/libs/VX_generic_register.v +++ b/hw/rtl/libs/VX_generic_register.v @@ -20,12 +20,10 @@ module VX_generic_register #( reg [(N-1):0] value; always @(posedge clk) begin - if (reset) begin + if (reset || flush) begin value <= N'(0); end else if (~stall) begin value <= in; - end else if (flush) begin - value <= N'(0); end end diff --git a/hw/rtl/libs/VX_generic_stack.v b/hw/rtl/libs/VX_generic_stack.v index fdebbacf7..d43b7816c 100644 --- a/hw/rtl/libs/VX_generic_stack.v +++ b/hw/rtl/libs/VX_generic_stack.v @@ -1,7 +1,7 @@ module VX_generic_stack #( - parameter WIDTH = 40, - parameter DEPTH = 2 + parameter WIDTH = 1, + parameter DEPTH = 1 ) ( input wire clk, input wire reset, diff --git a/hw/simulate/Makefile b/hw/simulate/Makefile index a3f119a41..c755d5d22 100644 --- a/hw/simulate/Makefile +++ b/hw/simulate/Makefile @@ -1,4 +1,4 @@ -SINGLECORE += -DNUM_CLUSTERS=1 -DNUM_CORES=1 +SINGLECORE += -DNUM_CLUSTERS=1 -DNUM_CORES=1 #MULTICORE += -DNUM_CLUSTERS=2 -DNUM_CORES=4 -DL2_ENABLE=1 #MULTICORE += -DNUM_CLUSTERS=1 -DNUM_CORES=4 -DL2_ENABLE=1 diff --git a/hw/simulate/ram.h b/hw/simulate/ram.h index 53df7e0f8..0ddd3e47a 100644 --- a/hw/simulate/ram.h +++ b/hw/simulate/ram.h @@ -36,7 +36,7 @@ public: void clear() { for (uint32_t i = 0; i < (1 << 12); i++) { if (mem_[i]) { - delete mem_[i]; + delete [] mem_[i]; mem_[i] = NULL; } } diff --git a/runtime/tests/simple/vx_simple.dump b/runtime/tests/simple/vx_simple.dump index 9b2c4b730..5175c11ce 100644 --- a/runtime/tests/simple/vx_simple.dump +++ b/runtime/tests/simple/vx_simple.dump @@ -12,17 +12,17 @@ Disassembly of section .init: 80000010: 684000ef jal ra,80000694 80000014: 00100513 li a0,1 80000018: 0005006b 0x5006b -8000001c: 0d818513 addi a0,gp,216 # 800048e0 <__malloc_max_total_mem> -80000020: 19018613 addi a2,gp,400 # 80004998 <__BSS_END__> +8000001c: cc418513 addi a0,gp,-828 # 800014cc +80000020: d2818613 addi a2,gp,-728 # 80001530 <__BSS_END__> 80000024: 40a60633 sub a2,a2,a0 80000028: 00000593 li a1,0 -8000002c: 381000ef jal ra,80000bac +8000002c: 289000ef jal ra,80000ab4 80000030: 00001517 auipc a0,0x1 -80000034: a8450513 addi a0,a0,-1404 # 80000ab4 <__libc_fini_array> -80000038: 239000ef jal ra,80000a70 -8000003c: 2d5000ef jal ra,80000b10 <__libc_init_array> +80000034: 98c50513 addi a0,a0,-1652 # 800009bc <__libc_fini_array> +80000038: 141000ef jal ra,80000978 +8000003c: 1dd000ef jal ra,80000a18 <__libc_init_array> 80000040: 008000ef jal ra,80000048
-80000044: 2410006f j 80000a84 +80000044: 1490006f j 8000098c Disassembly of section .text: @@ -38,8 +38,8 @@ Disassembly of section .text: 80000068: 0b512a23 sw s5,180(sp) 8000006c: 0b612823 sw s6,176(sp) 80000070: 66c000ef jal ra,800006dc -80000074: 80004537 lui a0,0x80004 -80000078: be850513 addi a0,a0,-1048 # 80003be8 <__BSS_END__+0xfffff250> +80000074: 80001537 lui a0,0x80001 +80000078: d4850513 addi a0,a0,-696 # 80000d48 <__global_pointer$+0xfffff540> 8000007c: 6d0000ef jal ra,8000074c 80000080: 02010493 addi s1,sp,32 80000084: 00048713 mv a4,s1 @@ -51,11 +51,11 @@ Disassembly of section .text: 8000009c: fed79ae3 bne a5,a3,80000090 800000a0: 00000413 li s0,0 800000a4: 00100713 li a4,1 -800000a8: 800049b7 lui s3,0x80004 +800000a8: 800019b7 lui s3,0x80001 800000ac: 02400913 li s2,36 800000b0: 0004a783 lw a5,0(s1) 800000b4: 00040593 mv a1,s0 -800000b8: c1498513 addi a0,s3,-1004 # 80003c14 <__BSS_END__+0xfffff27c> +800000b8: d7498513 addi a0,s3,-652 # 80000d74 <__global_pointer$+0xfffff56c> 800000bc: 00878663 beq a5,s0,800000c8 800000c0: 76c000ef jal ra,8000082c 800000c4: 00000713 li a4,0 @@ -63,72 +63,72 @@ Disassembly of section .text: 800000cc: 00448493 addi s1,s1,4 800000d0: ff2410e3 bne s0,s2,800000b0 800000d4: 16071e63 bnez a4,80000250 -800000d8: 80004537 lui a0,0x80004 -800000dc: c4850513 addi a0,a0,-952 # 80003c48 <__BSS_END__+0xfffff2b0> +800000d8: 80001537 lui a0,0x80001 +800000dc: da850513 addi a0,a0,-600 # 80000da8 <__global_pointer$+0xfffff5a0> 800000e0: 66c000ef jal ra,8000074c 800000e4: 264000ef jal ra,80000348 -800000e8: 80004537 lui a0,0x80004 -800000ec: c5850513 addi a0,a0,-936 # 80003c58 <__BSS_END__+0xfffff2c0> +800000e8: 80001537 lui a0,0x80001 +800000ec: db850513 addi a0,a0,-584 # 80000db8 <__global_pointer$+0xfffff5b0> 800000f0: 65c000ef jal ra,8000074c 800000f4: 00400513 li a0,4 800000f8: 5e4000ef jal ra,800006dc 800000fc: 2e4000ef jal ra,800003e0 80000100: 00100513 li a0,1 80000104: 5d8000ef jal ra,800006dc -80000108: 80004537 lui a0,0x80004 -8000010c: c6c50513 addi a0,a0,-916 # 80003c6c <__BSS_END__+0xfffff2d4> +80000108: 80001537 lui a0,0x80001 +8000010c: dcc50513 addi a0,a0,-564 # 80000dcc <__global_pointer$+0xfffff5c4> 80000110: 63c000ef jal ra,8000074c 80000114: 3a8000ef jal ra,800004bc -80000118: 80004537 lui a0,0x80004 -8000011c: c7c50513 addi a0,a0,-900 # 80003c7c <__BSS_END__+0xfffff2e4> +80000118: 80001537 lui a0,0x80001 +8000011c: ddc50513 addi a0,a0,-548 # 80000ddc <__global_pointer$+0xfffff5d4> 80000120: ffff0437 lui s0,0xffff0 80000124: 628000ef jal ra,8000074c 80000128: 00000493 li s1,0 -8000012c: 80004b37 lui s6,0x80004 -80000130: 80004ab7 lui s5,0x80004 -80000134: 80004a37 lui s4,0x80004 -80000138: 800049b7 lui s3,0x80004 -8000013c: 01440913 addi s2,s0,20 # ffff0014 <__BSS_END__+0x7ffeb67c> +8000012c: 80001b37 lui s6,0x80001 +80000130: 80001ab7 lui s5,0x80001 +80000134: 80001a37 lui s4,0x80001 +80000138: 800019b7 lui s3,0x80001 +8000013c: 01440913 addi s2,s0,20 # ffff0014 <__global_pointer$+0x7ffee80c> 80000140: 00942023 sw s1,0(s0) 80000144: 00040593 mv a1,s0 -80000148: c90b0513 addi a0,s6,-880 # 80003c90 <__BSS_END__+0xfffff2f8> +80000148: df0b0513 addi a0,s6,-528 # 80000df0 <__global_pointer$+0xfffff5e8> 8000014c: 6e0000ef jal ra,8000082c 80000150: 00048593 mv a1,s1 -80000154: c98a8513 addi a0,s5,-872 # 80003c98 <__BSS_END__+0xfffff300> +80000154: df8a8513 addi a0,s5,-520 # 80000df8 <__global_pointer$+0xfffff5f0> 80000158: 6d4000ef jal ra,8000082c 8000015c: 00048593 mv a1,s1 -80000160: caca0513 addi a0,s4,-852 # 80003cac <__BSS_END__+0xfffff314> +80000160: e0ca0513 addi a0,s4,-500 # 80000e0c <__global_pointer$+0xfffff604> 80000164: 6c8000ef jal ra,8000082c -80000168: cbc98513 addi a0,s3,-836 # 80003cbc <__BSS_END__+0xfffff324> +80000168: e1c98513 addi a0,s3,-484 # 80000e1c <__global_pointer$+0xfffff614> 8000016c: 00440413 addi s0,s0,4 80000170: 5dc000ef jal ra,8000074c 80000174: 00148493 addi s1,s1,1 80000178: fd2414e3 bne s0,s2,80000140 -8000017c: 80004537 lui a0,0x80004 -80000180: cd450513 addi a0,a0,-812 # 80003cd4 <__BSS_END__+0xfffff33c> +8000017c: 80001537 lui a0,0x80001 +80000180: e3450513 addi a0,a0,-460 # 80000e34 <__global_pointer$+0xfffff62c> 80000184: 5c8000ef jal ra,8000074c -80000188: 800047b7 lui a5,0x80004 -8000018c: 00878793 addi a5,a5,8 # 80004008 <__BSS_END__+0xfffff670> +80000188: 800017b7 lui a5,0x80001 +8000018c: 00878793 addi a5,a5,8 # 80001008 <__global_pointer$+0xfffff800> 80000190: 80000637 lui a2,0x80000 80000194: 00400713 li a4,4 80000198: 04078813 addi a6,a5,64 8000019c: 00c10693 addi a3,sp,12 -800001a0: 27860613 addi a2,a2,632 # 80000278 <__BSS_END__+0xffffb8e0> +800001a0: 27860613 addi a2,a2,632 # 80000278 <__global_pointer$+0xffffea70> 800001a4: 00400593 li a1,4 800001a8: 00400513 li a0,4 -800001ac: 0e818913 addi s2,gp,232 # 800048f0 +800001ac: cc818913 addi s2,gp,-824 # 800014d0 800001b0: 00f12623 sw a5,12(sp) 800001b4: 01012823 sw a6,16(sp) 800001b8: 00e12c23 sw a4,24(sp) 800001bc: 00e12e23 sw a4,28(sp) 800001c0: 01212a23 sw s2,20(sp) -800001c4: 788000ef jal ra,8000094c -800001c8: 80004537 lui a0,0x80004 -800001cc: cf450513 addi a0,a0,-780 # 80003cf4 <__BSS_END__+0xfffff35c> +800001c4: 744000ef jal ra,80000908 +800001c8: 80001537 lui a0,0x80001 +800001cc: e5450513 addi a0,a0,-428 # 80000e54 <__global_pointer$+0xfffff64c> 800001d0: 57c000ef jal ra,8000074c 800001d4: 00000493 li s1,0 -800001d8: 80004a37 lui s4,0x80004 -800001dc: 80004ab7 lui s5,0x80004 +800001d8: 80001a37 lui s4,0x80001 +800001dc: 80001ab7 lui s5,0x80001 800001e0: 00400993 li s3,4 800001e4: 00000413 li s0,0 800001e8: 01812783 lw a5,24(sp) @@ -139,11 +139,11 @@ Disassembly of section .text: 800001fc: 0007a503 lw a0,0(a5) 80000200: 00140413 addi s0,s0,1 80000204: 588000ef jal ra,8000078c -80000208: c94a0513 addi a0,s4,-876 # 80003c94 <__BSS_END__+0xfffff2fc> +80000208: df4a0513 addi a0,s4,-524 # 80000df4 <__global_pointer$+0xfffff5ec> 8000020c: 540000ef jal ra,8000074c 80000210: fd341ce3 bne s0,s3,800001e8 80000214: 00148493 addi s1,s1,1 -80000218: c10a8513 addi a0,s5,-1008 # 80003c10 <__BSS_END__+0xfffff278> +80000218: d70a8513 addi a0,s5,-656 # 80000d70 <__global_pointer$+0xfffff568> 8000021c: 530000ef jal ra,8000074c 80000220: fc8492e3 bne s1,s0,800001e4 80000224: 0cc12083 lw ra,204(sp) @@ -157,8 +157,8 @@ Disassembly of section .text: 80000244: 00000513 li a0,0 80000248: 0d010113 addi sp,sp,208 8000024c: 00008067 ret -80000250: 80004537 lui a0,0x80004 -80000254: c2050513 addi a0,a0,-992 # 80003c20 <__BSS_END__+0xfffff288> +80000250: 80001537 lui a0,0x80001 +80000254: d8050513 addi a0,a0,-640 # 80000d80 <__global_pointer$+0xfffff578> 80000258: 4f4000ef jal ra,8000074c 8000025c: e7dff06f j 800000d8 @@ -166,8 +166,8 @@ Disassembly of section .text: 80000260: 00000793 li a5,0 80000264: 00078863 beqz a5,80000274 80000268: 80001537 lui a0,0x80001 -8000026c: ab450513 addi a0,a0,-1356 # 80000ab4 <__BSS_END__+0xffffc11c> -80000270: 0010006f j 80000a70 +8000026c: 9bc50513 addi a0,a0,-1604 # 800009bc <__global_pointer$+0xfffff1b4> +80000270: 7080006f j 80000978 80000274: 00008067 ret 80000278 : @@ -204,7 +204,7 @@ Disassembly of section .text: 800002e8: 00112623 sw ra,12(sp) 800002ec: 410000ef jal ra,800006fc 800002f0: 00251713 slli a4,a0,0x2 -800002f4: 15018793 addi a5,gp,336 # 80004958 +800002f4: d0818793 addi a5,gp,-760 # 80001510 800002f8: 00e787b3 add a5,a5,a4 800002fc: 00a7a023 sw a0,0(a5) 80000300: 00051863 bnez a0,80000310 @@ -222,16 +222,16 @@ Disassembly of section .text: 80000328: 3e4000ef jal ra,8000070c 8000032c: 00c12083 lw ra,12(sp) 80000330: 00251713 slli a4,a0,0x2 -80000334: 88018793 addi a5,gp,-1920 # 80004088 +80000334: 88018793 addi a5,gp,-1920 # 80001088 80000338: 00e787b3 add a5,a5,a4 8000033c: 00a7a023 sw a0,0(a5) 80000340: 01010113 addi sp,sp,16 80000344: 00008067 ret 80000348 : -80000348: 80004537 lui a0,0x80004 +80000348: 80001537 lui a0,0x80001 8000034c: ff010113 addi sp,sp,-16 -80000350: d3050513 addi a0,a0,-720 # 80003d30 <__BSS_END__+0xfffff398> +80000350: e9050513 addi a0,a0,-368 # 80000e90 <__global_pointer$+0xfffff688> 80000354: 00112623 sw ra,12(sp) 80000358: 00812423 sw s0,8(sp) 8000035c: 00912223 sw s1,4(sp) @@ -239,7 +239,7 @@ Disassembly of section .text: 80000364: 00400513 li a0,4 80000368: 374000ef jal ra,800006dc 8000036c: 3a0000ef jal ra,8000070c -80000370: 88018413 addi s0,gp,-1920 # 80004088 +80000370: 88018413 addi s0,gp,-1920 # 80001088 80000374: 00251713 slli a4,a0,0x2 80000378: 00050793 mv a5,a0 8000037c: 00e40733 add a4,s0,a4 @@ -247,23 +247,23 @@ Disassembly of section .text: 80000384: 00f72023 sw a5,0(a4) 80000388: 354000ef jal ra,800006dc 8000038c: 00042503 lw a0,0(s0) -80000390: 800044b7 lui s1,0x80004 +80000390: 800014b7 lui s1,0x80001 80000394: 3f8000ef jal ra,8000078c -80000398: c1048513 addi a0,s1,-1008 # 80003c10 <__BSS_END__+0xfffff278> +80000398: d7048513 addi a0,s1,-656 # 80000d70 <__global_pointer$+0xfffff568> 8000039c: 3b0000ef jal ra,8000074c 800003a0: 00442503 lw a0,4(s0) 800003a4: 3e8000ef jal ra,8000078c -800003a8: c1048513 addi a0,s1,-1008 +800003a8: d7048513 addi a0,s1,-656 800003ac: 3a0000ef jal ra,8000074c 800003b0: 00842503 lw a0,8(s0) 800003b4: 3d8000ef jal ra,8000078c -800003b8: c1048513 addi a0,s1,-1008 +800003b8: d7048513 addi a0,s1,-656 800003bc: 390000ef jal ra,8000074c 800003c0: 00c42503 lw a0,12(s0) 800003c4: 3c8000ef jal ra,8000078c 800003c8: 00812403 lw s0,8(sp) 800003cc: 00c12083 lw ra,12(sp) -800003d0: c1048513 addi a0,s1,-1008 +800003d0: d7048513 addi a0,s1,-656 800003d4: 00412483 lw s1,4(sp) 800003d8: 01010113 addi sp,sp,16 800003dc: 3700006f j 8000074c @@ -282,7 +282,7 @@ Disassembly of section .text: 80000408: 00343513 sltiu a0,s0,3 8000040c: 2e0000ef jal ra,800006ec 80000410: 00200793 li a5,2 -80000414: 16018493 addi s1,gp,352 # 80004968 +80000414: d1818493 addi s1,gp,-744 # 80001520 80000418: 06f40863 beq s0,a5,80000488 8000041c: 00241413 slli s0,s0,0x2 80000420: 00848433 add s0,s1,s0 @@ -291,21 +291,21 @@ Disassembly of section .text: 8000042c: 2c8000ef jal ra,800006f4 80000430: 2c4000ef jal ra,800006f4 80000434: 0004a503 lw a0,0(s1) -80000438: 80004437 lui s0,0x80004 +80000438: 80001437 lui s0,0x80001 8000043c: 350000ef jal ra,8000078c -80000440: c1040513 addi a0,s0,-1008 # 80003c10 <__BSS_END__+0xfffff278> +80000440: d7040513 addi a0,s0,-656 # 80000d70 <__global_pointer$+0xfffff568> 80000444: 308000ef jal ra,8000074c 80000448: 0044a503 lw a0,4(s1) 8000044c: 340000ef jal ra,8000078c -80000450: c1040513 addi a0,s0,-1008 +80000450: d7040513 addi a0,s0,-656 80000454: 2f8000ef jal ra,8000074c 80000458: 0084a503 lw a0,8(s1) 8000045c: 330000ef jal ra,8000078c -80000460: c1040513 addi a0,s0,-1008 +80000460: d7040513 addi a0,s0,-656 80000464: 2e8000ef jal ra,8000074c 80000468: 00c4a503 lw a0,12(s1) 8000046c: 320000ef jal ra,8000078c -80000470: c1040513 addi a0,s0,-1008 +80000470: d7040513 addi a0,s0,-656 80000474: 00812403 lw s0,8(sp) 80000478: 00c12083 lw ra,12(sp) 8000047c: 00412483 lw s1,4(sp) @@ -316,7 +316,7 @@ Disassembly of section .text: 80000490: f9dff06f j 8000042c 80000494: 00144513 xori a0,s0,1 80000498: 254000ef jal ra,800006ec -8000049c: 16018493 addi s1,gp,352 # 80004968 +8000049c: d1818493 addi s1,gp,-744 # 80001520 800004a0: 00041863 bnez s0,800004b0 800004a4: 00a00793 li a5,10 800004a8: 00f4a023 sw a5,0(s1) @@ -328,36 +328,36 @@ Disassembly of section .text: 800004bc : 800004bc: 800005b7 lui a1,0x80000 800004c0: ff010113 addi sp,sp,-16 -800004c4: 2e458593 addi a1,a1,740 # 800002e4 <__BSS_END__+0xffffb94c> +800004c4: 2e458593 addi a1,a1,740 # 800002e4 <__global_pointer$+0xffffeadc> 800004c8: 00400513 li a0,4 800004cc: 00112623 sw ra,12(sp) 800004d0: 00812423 sw s0,8(sp) 800004d4: 00912223 sw s1,4(sp) 800004d8: 1fc000ef jal ra,800006d4 800004dc: 220000ef jal ra,800006fc -800004e0: 15018413 addi s0,gp,336 # 80004958 +800004e0: d0818413 addi s0,gp,-760 # 80001510 800004e4: 00251793 slli a5,a0,0x2 800004e8: 00f407b3 add a5,s0,a5 800004ec: 00a7a023 sw a0,0(a5) 800004f0: 04051c63 bnez a0,80000548 800004f4: 00042503 lw a0,0(s0) -800004f8: 800044b7 lui s1,0x80004 +800004f8: 800014b7 lui s1,0x80001 800004fc: 290000ef jal ra,8000078c -80000500: c1048513 addi a0,s1,-1008 # 80003c10 <__BSS_END__+0xfffff278> +80000500: d7048513 addi a0,s1,-656 # 80000d70 <__global_pointer$+0xfffff568> 80000504: 248000ef jal ra,8000074c 80000508: 00442503 lw a0,4(s0) 8000050c: 280000ef jal ra,8000078c -80000510: c1048513 addi a0,s1,-1008 +80000510: d7048513 addi a0,s1,-656 80000514: 238000ef jal ra,8000074c 80000518: 00842503 lw a0,8(s0) 8000051c: 270000ef jal ra,8000078c -80000520: c1048513 addi a0,s1,-1008 +80000520: d7048513 addi a0,s1,-656 80000524: 228000ef jal ra,8000074c 80000528: 00c42503 lw a0,12(s0) 8000052c: 260000ef jal ra,8000078c 80000530: 00812403 lw s0,8(sp) 80000534: 00c12083 lw ra,12(sp) -80000538: c1048513 addi a0,s1,-1008 +80000538: d7048513 addi a0,s1,-656 8000053c: 00412483 lw s1,4(sp) 80000540: 01010113 addi sp,sp,16 80000544: 2080006f j 8000074c @@ -366,9 +366,9 @@ Disassembly of section .text: 80000550: fa5ff06f j 800004f4 80000554 : -80000554: 80004537 lui a0,0x80004 +80000554: 80001537 lui a0,0x80001 80000558: ff010113 addi sp,sp,-16 -8000055c: d3050513 addi a0,a0,-720 # 80003d30 <__BSS_END__+0xfffff398> +8000055c: e9050513 addi a0,a0,-368 # 80000e90 <__global_pointer$+0xfffff688> 80000560: 00112623 sw ra,12(sp) 80000564: 00812423 sw s0,8(sp) 80000568: 00912223 sw s1,4(sp) @@ -376,7 +376,7 @@ Disassembly of section .text: 80000570: 00400513 li a0,4 80000574: 168000ef jal ra,800006dc 80000578: 194000ef jal ra,8000070c -8000057c: 88018493 addi s1,gp,-1920 # 80004088 +8000057c: 88018493 addi s1,gp,-1920 # 80001088 80000580: 00251713 slli a4,a0,0x2 80000584: 00050793 mv a5,a0 80000588: 00e48733 add a4,s1,a4 @@ -384,36 +384,36 @@ Disassembly of section .text: 80000590: 00f72023 sw a5,0(a4) 80000594: 148000ef jal ra,800006dc 80000598: 0004a503 lw a0,0(s1) -8000059c: 80004437 lui s0,0x80004 +8000059c: 80001437 lui s0,0x80001 800005a0: 1ec000ef jal ra,8000078c -800005a4: c1040513 addi a0,s0,-1008 # 80003c10 <__BSS_END__+0xfffff278> +800005a4: d7040513 addi a0,s0,-656 # 80000d70 <__global_pointer$+0xfffff568> 800005a8: 1a4000ef jal ra,8000074c 800005ac: 0044a503 lw a0,4(s1) 800005b0: 1dc000ef jal ra,8000078c -800005b4: c1040513 addi a0,s0,-1008 +800005b4: d7040513 addi a0,s0,-656 800005b8: 194000ef jal ra,8000074c 800005bc: 0084a503 lw a0,8(s1) 800005c0: 1cc000ef jal ra,8000078c -800005c4: c1040513 addi a0,s0,-1008 +800005c4: d7040513 addi a0,s0,-656 800005c8: 184000ef jal ra,8000074c 800005cc: 00c4a503 lw a0,12(s1) -800005d0: 15018493 addi s1,gp,336 # 80004958 +800005d0: d0818493 addi s1,gp,-760 # 80001510 800005d4: 1b8000ef jal ra,8000078c -800005d8: c1040513 addi a0,s0,-1008 +800005d8: d7040513 addi a0,s0,-656 800005dc: 170000ef jal ra,8000074c -800005e0: 80004537 lui a0,0x80004 -800005e4: c5850513 addi a0,a0,-936 # 80003c58 <__BSS_END__+0xfffff2c0> +800005e0: 80001537 lui a0,0x80001 +800005e4: db850513 addi a0,a0,-584 # 80000db8 <__global_pointer$+0xfffff5b0> 800005e8: 164000ef jal ra,8000074c 800005ec: 00400513 li a0,4 800005f0: 0ec000ef jal ra,800006dc 800005f4: dedff0ef jal ra,800003e0 800005f8: 00100513 li a0,1 800005fc: 0e0000ef jal ra,800006dc -80000600: 80004537 lui a0,0x80004 -80000604: d4050513 addi a0,a0,-704 # 80003d40 <__BSS_END__+0xfffff3a8> +80000600: 80001537 lui a0,0x80001 +80000604: ea050513 addi a0,a0,-352 # 80000ea0 <__global_pointer$+0xfffff698> 80000608: 144000ef jal ra,8000074c 8000060c: 800005b7 lui a1,0x80000 -80000610: 2e458593 addi a1,a1,740 # 800002e4 <__BSS_END__+0xffffb94c> +80000610: 2e458593 addi a1,a1,740 # 800002e4 <__global_pointer$+0xffffeadc> 80000614: 00400513 li a0,4 80000618: 0bc000ef jal ra,800006d4 8000061c: 0e0000ef jal ra,800006fc @@ -423,19 +423,19 @@ Disassembly of section .text: 8000062c: 04051a63 bnez a0,80000680 80000630: 0004a503 lw a0,0(s1) 80000634: 158000ef jal ra,8000078c -80000638: c1040513 addi a0,s0,-1008 +80000638: d7040513 addi a0,s0,-656 8000063c: 110000ef jal ra,8000074c 80000640: 0044a503 lw a0,4(s1) 80000644: 148000ef jal ra,8000078c -80000648: c1040513 addi a0,s0,-1008 +80000648: d7040513 addi a0,s0,-656 8000064c: 100000ef jal ra,8000074c 80000650: 0084a503 lw a0,8(s1) 80000654: 138000ef jal ra,8000078c -80000658: c1040513 addi a0,s0,-1008 +80000658: d7040513 addi a0,s0,-656 8000065c: 0f0000ef jal ra,8000074c 80000660: 00c4a503 lw a0,12(s1) 80000664: 128000ef jal ra,8000078c -80000668: c1040513 addi a0,s0,-1008 +80000668: d7040513 addi a0,s0,-656 8000066c: 00812403 lw s0,8(sp) 80000670: 00c12083 lw ra,12(sp) 80000674: 00412483 lw s1,4(sp) @@ -452,8 +452,8 @@ Disassembly of section .text: 80000694 : 80000694: 02502573 csrr a0,0x25 80000698: 0005006b 0x5006b -8000069c: 00004197 auipc gp,0x4 -800006a0: 16c18193 addi gp,gp,364 # 80004808 <__global_pointer$> +8000069c: 00001197 auipc gp,0x1 +800006a0: 16c18193 addi gp,gp,364 # 80001808 <__global_pointer$> 800006a4: f14025f3 csrr a1,mhartid 800006a8: 00a59593 slli a1,a1,0xa 800006ac: 02002673 csrr a2,0x20 @@ -548,7 +548,7 @@ Disassembly of section .text: 80000778: 00008067 ret 8000077c : -8000077c: 89018293 addi t0,gp,-1904 # 80004098 +8000077c: 89018293 addi t0,gp,-1904 # 80001098 80000780: 0002a283 lw t0,0(t0) 80000784: 00b2a023 sw a1,0(t0) 80000788: 00008067 ret @@ -562,10 +562,10 @@ Disassembly of section .text: 800007a0: 00f00793 li a5,15 800007a4: 00050493 mv s1,a0 800007a8: 04a7fc63 bgeu a5,a0,80000800 -800007ac: 80004937 lui s2,0x80004 +800007ac: 80001937 lui s2,0x80001 800007b0: 00000693 li a3,0 800007b4: 02000413 li s0,32 -800007b8: d8c90913 addi s2,s2,-628 # 80003d8c <__BSS_END__+0xfffff3f4> +800007b8: eec90913 addi s2,s2,-276 # 80000eec <__global_pointer$+0xfffff6e4> 800007bc: ffc40413 addi s0,s0,-4 800007c0: 0084d7b3 srl a5,s1,s0 800007c4: 00f7f793 andi a5,a5,15 @@ -583,9 +583,9 @@ Disassembly of section .text: 800007f4: 00012903 lw s2,0(sp) 800007f8: 01010113 addi sp,sp,16 800007fc: 00008067 ret -80000800: 800047b7 lui a5,0x80004 +80000800: 800017b7 lui a5,0x80001 80000804: 00251493 slli s1,a0,0x2 -80000808: d8c78793 addi a5,a5,-628 # 80003d8c <__BSS_END__+0xfffff3f4> +80000808: eec78793 addi a5,a5,-276 # 80000eec <__global_pointer$+0xfffff6e4> 8000080c: 00812403 lw s0,8(sp) 80000810: 009784b3 add s1,a5,s1 80000814: 0004a503 lw a0,0(s1) @@ -605,10 +605,10 @@ Disassembly of section .text: 80000844: f09ff0ef jal ra,8000074c 80000848: 00f00793 li a5,15 8000084c: 0687f063 bgeu a5,s0,800008ac -80000850: 80004937 lui s2,0x80004 +80000850: 80001937 lui s2,0x80001 80000854: 00000693 li a3,0 80000858: 02000493 li s1,32 -8000085c: d8c90913 addi s2,s2,-628 # 80003d8c <__BSS_END__+0xfffff3f4> +8000085c: eec90913 addi s2,s2,-276 # 80000eec <__global_pointer$+0xfffff6e4> 80000860: ffc48493 addi s1,s1,-4 80000864: 009457b3 srl a5,s0,s1 80000868: 00f7f793 andi a5,a5,15 @@ -624,12 +624,12 @@ Disassembly of section .text: 80000890: 00c12083 lw ra,12(sp) 80000894: 00412483 lw s1,4(sp) 80000898: 00012903 lw s2,0(sp) -8000089c: 80004537 lui a0,0x80004 -800008a0: c1050513 addi a0,a0,-1008 # 80003c10 <__BSS_END__+0xfffff278> +8000089c: 80001537 lui a0,0x80001 +800008a0: d7050513 addi a0,a0,-656 # 80000d70 <__global_pointer$+0xfffff568> 800008a4: 01010113 addi sp,sp,16 800008a8: ea5ff06f j 8000074c -800008ac: 800047b7 lui a5,0x80004 -800008b0: d8c78793 addi a5,a5,-628 # 80003d8c <__BSS_END__+0xfffff3f4> +800008ac: 800017b7 lui a5,0x80001 +800008b0: eec78793 addi a5,a5,-276 # 80000eec <__global_pointer$+0xfffff6e4> 800008b4: 00241413 slli s0,s0,0x2 800008b8: 00878433 add s0,a5,s0 800008bc: 00042503 lw a0,0(s0) @@ -637,4356 +637,656 @@ Disassembly of section .text: 800008c4: fc9ff06f j 8000088c 800008c8 : -800008c8: 1881a503 lw a0,392(gp) # 80004990 -800008cc: ff010113 addi sp,sp,-16 -800008d0: 00112623 sw ra,12(sp) -800008d4: e09ff0ef jal ra,800006dc -800008d8: 1741a503 lw a0,372(gp) # 8000497c -800008dc: 1781a783 lw a5,376(gp) # 80004980 -800008e0: 000780e7 jalr a5 -800008e4: e19ff0ef jal ra,800006fc -800008e8: 00c12083 lw ra,12(sp) -800008ec: 00153513 seqz a0,a0 -800008f0: 01010113 addi sp,sp,16 -800008f4: de9ff06f j 800006dc +800008c8: ff010113 addi sp,sp,-16 +800008cc: 00812423 sw s0,8(sp) +800008d0: cc41a783 lw a5,-828(gp) # 800014cc +800008d4: 00112623 sw ra,12(sp) +800008d8: 0087a503 lw a0,8(a5) +800008dc: e01ff0ef jal ra,800006dc +800008e0: cc41a783 lw a5,-828(gp) # 800014cc +800008e4: 0047a503 lw a0,4(a5) +800008e8: 0007a783 lw a5,0(a5) +800008ec: 000780e7 jalr a5 +800008f0: e0dff0ef jal ra,800006fc +800008f4: 00812403 lw s0,8(sp) +800008f8: 00c12083 lw ra,12(sp) +800008fc: 00153513 seqz a0,a0 +80000900: 01010113 addi sp,sp,16 +80000904: dd9ff06f j 800006dc -800008f8 : -800008f8: 17c1a503 lw a0,380(gp) # 80004984 -800008fc: ff010113 addi sp,sp,-16 -80000900: 00112623 sw ra,12(sp) -80000904: 00812423 sw s0,8(sp) -80000908: dd5ff0ef jal ra,800006dc -8000090c: e01ff0ef jal ra,8000070c -80000910: 00050413 mv s0,a0 -80000914: df1ff0ef jal ra,80000704 -80000918: 1841a583 lw a1,388(gp) # 8000498c -8000091c: 00050693 mv a3,a0 -80000920: 1801a503 lw a0,384(gp) # 80004988 -80000924: 1701a783 lw a5,368(gp) # 80004978 -80000928: 00040613 mv a2,s0 -8000092c: 00000713 li a4,0 -80000930: 000780e7 jalr a5 -80000934: dc9ff0ef jal ra,800006fc -80000938: 00812403 lw s0,8(sp) -8000093c: 00c12083 lw ra,12(sp) -80000940: 00153513 seqz a0,a0 -80000944: 01010113 addi sp,sp,16 -80000948: d95ff06f j 800006dc +80000908 : +80000908: fe010113 addi sp,sp,-32 +8000090c: 00410793 addi a5,sp,4 +80000910: 00812c23 sw s0,24(sp) +80000914: ccf1a223 sw a5,-828(gp) # 800014cc +80000918: 00112e23 sw ra,28(sp) +8000091c: 00c12223 sw a2,4(sp) +80000920: 00d12423 sw a3,8(sp) +80000924: 00b12623 sw a1,12(sp) +80000928: 00100793 li a5,1 +8000092c: 00a7dc63 bge a5,a0,80000944 +80000930: 800015b7 lui a1,0x80001 +80000934: 8c858593 addi a1,a1,-1848 # 800008c8 <__global_pointer$+0xfffff0c0> +80000938: d9dff0ef jal ra,800006d4 +8000093c: cc41a783 lw a5,-828(gp) # 800014cc +80000940: 0087a583 lw a1,8(a5) +80000944: 00058513 mv a0,a1 +80000948: d95ff0ef jal ra,800006dc +8000094c: cc41a783 lw a5,-828(gp) # 800014cc +80000950: 0047a503 lw a0,4(a5) +80000954: 0007a783 lw a5,0(a5) +80000958: 000780e7 jalr a5 +8000095c: da1ff0ef jal ra,800006fc +80000960: 00153513 seqz a0,a0 +80000964: d79ff0ef jal ra,800006dc +80000968: 01c12083 lw ra,28(sp) +8000096c: 01812403 lw s0,24(sp) +80000970: 02010113 addi sp,sp,32 +80000974: 00008067 ret -8000094c : -8000094c: ff010113 addi sp,sp,-16 -80000950: 00812423 sw s0,8(sp) -80000954: 00912223 sw s1,4(sp) -80000958: 01212023 sw s2,0(sp) -8000095c: 00112623 sw ra,12(sp) -80000960: 16c1ac23 sw a2,376(gp) # 80004980 -80000964: 16d1aa23 sw a3,372(gp) # 8000497c -80000968: 18b1a423 sw a1,392(gp) # 80004990 -8000096c: 00100793 li a5,1 -80000970: 00a7da63 bge a5,a0,80000984 -80000974: 800015b7 lui a1,0x80001 -80000978: 8c858593 addi a1,a1,-1848 # 800008c8 <__BSS_END__+0xffffbf30> -8000097c: d59ff0ef jal ra,800006d4 -80000980: 1881a583 lw a1,392(gp) # 80004990 -80000984: 00058513 mv a0,a1 -80000988: d55ff0ef jal ra,800006dc -8000098c: 1741a503 lw a0,372(gp) # 8000497c -80000990: 1781a783 lw a5,376(gp) # 80004980 -80000994: 000780e7 jalr a5 -80000998: d65ff0ef jal ra,800006fc -8000099c: 00812403 lw s0,8(sp) -800009a0: 00c12083 lw ra,12(sp) -800009a4: 00412483 lw s1,4(sp) -800009a8: 00012903 lw s2,0(sp) -800009ac: 00153513 seqz a0,a0 -800009b0: 01010113 addi sp,sp,16 -800009b4: d29ff06f j 800006dc +80000978 : +80000978: 00050593 mv a1,a0 +8000097c: 00000693 li a3,0 +80000980: 00000613 li a2,0 +80000984: 00000513 li a0,0 +80000988: 2080006f j 80000b90 <__register_exitproc> -800009b8 : -800009b8: 00852683 lw a3,8(a0) -800009bc: 00100713 li a4,1 -800009c0: 0ad76263 bltu a4,a3,80000a64 -800009c4: 00050793 mv a5,a0 -800009c8: 00052503 lw a0,0(a0) -800009cc: fe010113 addi sp,sp,-32 -800009d0: 0047a683 lw a3,4(a5) -800009d4: 00812c23 sw s0,24(sp) -800009d8: 00912a23 sw s1,20(sp) -800009dc: 01212823 sw s2,16(sp) -800009e0: 01312623 sw s3,12(sp) -800009e4: 00112e23 sw ra,28(sp) -800009e8: 16a1ae23 sw a0,380(gp) # 80004984 -800009ec: 18f1a223 sw a5,388(gp) # 8000498c -800009f0: 16b1a823 sw a1,368(gp) # 80004978 -800009f4: 18c1a023 sw a2,384(gp) # 80004988 -800009f8: 04d76a63 bltu a4,a3,80000a4c -800009fc: ce1ff0ef jal ra,800006dc -80000a00: d0dff0ef jal ra,8000070c -80000a04: 00050413 mv s0,a0 -80000a08: cfdff0ef jal ra,80000704 -80000a0c: 1841a583 lw a1,388(gp) # 8000498c -80000a10: 1701a783 lw a5,368(gp) # 80004978 -80000a14: 00050693 mv a3,a0 -80000a18: 1801a503 lw a0,384(gp) # 80004988 -80000a1c: 00040613 mv a2,s0 -80000a20: 00000713 li a4,0 -80000a24: 000780e7 jalr a5 -80000a28: cd5ff0ef jal ra,800006fc -80000a2c: 01812403 lw s0,24(sp) -80000a30: 01c12083 lw ra,28(sp) -80000a34: 01412483 lw s1,20(sp) -80000a38: 01012903 lw s2,16(sp) -80000a3c: 00c12983 lw s3,12(sp) -80000a40: 00153513 seqz a0,a0 -80000a44: 02010113 addi sp,sp,32 -80000a48: c95ff06f j 800006dc -80000a4c: 800015b7 lui a1,0x80001 -80000a50: 00068513 mv a0,a3 -80000a54: 8f858593 addi a1,a1,-1800 # 800008f8 <__BSS_END__+0xffffbf60> -80000a58: c7dff0ef jal ra,800006d4 -80000a5c: 17c1a503 lw a0,380(gp) # 80004984 -80000a60: f9dff06f j 800009fc -80000a64: 80004537 lui a0,0x80004 -80000a68: dcc50513 addi a0,a0,-564 # 80003dcc <__BSS_END__+0xfffff434> -80000a6c: 2ec0006f j 80000d58 +8000098c : +8000098c: ff010113 addi sp,sp,-16 +80000990: 00000593 li a1,0 +80000994: 00812423 sw s0,8(sp) +80000998: 00112623 sw ra,12(sp) +8000099c: 00050413 mv s0,a0 +800009a0: 288000ef jal ra,80000c28 <__call_exitprocs> +800009a4: cc01a503 lw a0,-832(gp) # 800014c8 <_global_impure_ptr> +800009a8: 03c52783 lw a5,60(a0) +800009ac: 00078463 beqz a5,800009b4 +800009b0: 000780e7 jalr a5 +800009b4: 00040513 mv a0,s0 +800009b8: cd5ff0ef jal ra,8000068c <_exit> -80000a70 : -80000a70: 00050593 mv a1,a0 -80000a74: 00000693 li a3,0 -80000a78: 00000613 li a2,0 -80000a7c: 00000513 li a0,0 -80000a80: 3700006f j 80000df0 <__register_exitproc> +800009bc <__libc_fini_array>: +800009bc: ff010113 addi sp,sp,-16 +800009c0: 00812423 sw s0,8(sp) +800009c4: 800017b7 lui a5,0x80001 +800009c8: 80001437 lui s0,0x80001 +800009cc: 00440413 addi s0,s0,4 # 80001004 <__global_pointer$+0xfffff7fc> +800009d0: 00478793 addi a5,a5,4 # 80001004 <__global_pointer$+0xfffff7fc> +800009d4: 408787b3 sub a5,a5,s0 +800009d8: 00912223 sw s1,4(sp) +800009dc: 00112623 sw ra,12(sp) +800009e0: 4027d493 srai s1,a5,0x2 +800009e4: 02048063 beqz s1,80000a04 <__libc_fini_array+0x48> +800009e8: ffc78793 addi a5,a5,-4 +800009ec: 00878433 add s0,a5,s0 +800009f0: 00042783 lw a5,0(s0) +800009f4: fff48493 addi s1,s1,-1 +800009f8: ffc40413 addi s0,s0,-4 +800009fc: 000780e7 jalr a5 +80000a00: fe0498e3 bnez s1,800009f0 <__libc_fini_array+0x34> +80000a04: 00c12083 lw ra,12(sp) +80000a08: 00812403 lw s0,8(sp) +80000a0c: 00412483 lw s1,4(sp) +80000a10: 01010113 addi sp,sp,16 +80000a14: 00008067 ret -80000a84 : -80000a84: ff010113 addi sp,sp,-16 -80000a88: 00000593 li a1,0 -80000a8c: 00812423 sw s0,8(sp) -80000a90: 00112623 sw ra,12(sp) -80000a94: 00050413 mv s0,a0 -80000a98: 3f0000ef jal ra,80000e88 <__call_exitprocs> -80000a9c: 0c81a503 lw a0,200(gp) # 800048d0 <_global_impure_ptr> -80000aa0: 03c52783 lw a5,60(a0) -80000aa4: 00078463 beqz a5,80000aac -80000aa8: 000780e7 jalr a5 -80000aac: 00040513 mv a0,s0 -80000ab0: bddff0ef jal ra,8000068c <_exit> +80000a18 <__libc_init_array>: +80000a18: ff010113 addi sp,sp,-16 +80000a1c: 00812423 sw s0,8(sp) +80000a20: 01212023 sw s2,0(sp) +80000a24: 80001437 lui s0,0x80001 +80000a28: 80001937 lui s2,0x80001 +80000a2c: 00040793 mv a5,s0 +80000a30: 00090913 mv s2,s2 +80000a34: 40f90933 sub s2,s2,a5 +80000a38: 00112623 sw ra,12(sp) +80000a3c: 00912223 sw s1,4(sp) +80000a40: 40295913 srai s2,s2,0x2 +80000a44: 02090063 beqz s2,80000a64 <__libc_init_array+0x4c> +80000a48: 00040413 mv s0,s0 +80000a4c: 00000493 li s1,0 +80000a50: 00042783 lw a5,0(s0) # 80001000 <__global_pointer$+0xfffff7f8> +80000a54: 00148493 addi s1,s1,1 +80000a58: 00440413 addi s0,s0,4 +80000a5c: 000780e7 jalr a5 +80000a60: fe9918e3 bne s2,s1,80000a50 <__libc_init_array+0x38> +80000a64: 80001437 lui s0,0x80001 +80000a68: 80001937 lui s2,0x80001 +80000a6c: 00040793 mv a5,s0 +80000a70: 00490913 addi s2,s2,4 # 80001004 <__global_pointer$+0xfffff7fc> +80000a74: 40f90933 sub s2,s2,a5 +80000a78: 40295913 srai s2,s2,0x2 +80000a7c: 02090063 beqz s2,80000a9c <__libc_init_array+0x84> +80000a80: 00040413 mv s0,s0 +80000a84: 00000493 li s1,0 +80000a88: 00042783 lw a5,0(s0) # 80001000 <__global_pointer$+0xfffff7f8> +80000a8c: 00148493 addi s1,s1,1 +80000a90: 00440413 addi s0,s0,4 +80000a94: 000780e7 jalr a5 +80000a98: fe9918e3 bne s2,s1,80000a88 <__libc_init_array+0x70> +80000a9c: 00c12083 lw ra,12(sp) +80000aa0: 00812403 lw s0,8(sp) +80000aa4: 00412483 lw s1,4(sp) +80000aa8: 00012903 lw s2,0(sp) +80000aac: 01010113 addi sp,sp,16 +80000ab0: 00008067 ret -80000ab4 <__libc_fini_array>: -80000ab4: ff010113 addi sp,sp,-16 -80000ab8: 00812423 sw s0,8(sp) -80000abc: 800047b7 lui a5,0x80004 -80000ac0: 80004437 lui s0,0x80004 -80000ac4: 00440413 addi s0,s0,4 # 80004004 <__BSS_END__+0xfffff66c> -80000ac8: 00478793 addi a5,a5,4 # 80004004 <__BSS_END__+0xfffff66c> -80000acc: 408787b3 sub a5,a5,s0 -80000ad0: 00912223 sw s1,4(sp) -80000ad4: 00112623 sw ra,12(sp) -80000ad8: 4027d493 srai s1,a5,0x2 -80000adc: 02048063 beqz s1,80000afc <__libc_fini_array+0x48> -80000ae0: ffc78793 addi a5,a5,-4 -80000ae4: 00878433 add s0,a5,s0 -80000ae8: 00042783 lw a5,0(s0) -80000aec: fff48493 addi s1,s1,-1 -80000af0: ffc40413 addi s0,s0,-4 -80000af4: 000780e7 jalr a5 -80000af8: fe0498e3 bnez s1,80000ae8 <__libc_fini_array+0x34> -80000afc: 00c12083 lw ra,12(sp) -80000b00: 00812403 lw s0,8(sp) -80000b04: 00412483 lw s1,4(sp) -80000b08: 01010113 addi sp,sp,16 -80000b0c: 00008067 ret +80000ab4 : +80000ab4: 00f00313 li t1,15 +80000ab8: 00050713 mv a4,a0 +80000abc: 02c37e63 bgeu t1,a2,80000af8 +80000ac0: 00f77793 andi a5,a4,15 +80000ac4: 0a079063 bnez a5,80000b64 +80000ac8: 08059263 bnez a1,80000b4c +80000acc: ff067693 andi a3,a2,-16 +80000ad0: 00f67613 andi a2,a2,15 +80000ad4: 00e686b3 add a3,a3,a4 +80000ad8: 00b72023 sw a1,0(a4) +80000adc: 00b72223 sw a1,4(a4) +80000ae0: 00b72423 sw a1,8(a4) +80000ae4: 00b72623 sw a1,12(a4) +80000ae8: 01070713 addi a4,a4,16 +80000aec: fed766e3 bltu a4,a3,80000ad8 +80000af0: 00061463 bnez a2,80000af8 +80000af4: 00008067 ret +80000af8: 40c306b3 sub a3,t1,a2 +80000afc: 00269693 slli a3,a3,0x2 +80000b00: 00000297 auipc t0,0x0 +80000b04: 005686b3 add a3,a3,t0 +80000b08: 00c68067 jr 12(a3) +80000b0c: 00b70723 sb a1,14(a4) +80000b10: 00b706a3 sb a1,13(a4) +80000b14: 00b70623 sb a1,12(a4) +80000b18: 00b705a3 sb a1,11(a4) +80000b1c: 00b70523 sb a1,10(a4) +80000b20: 00b704a3 sb a1,9(a4) +80000b24: 00b70423 sb a1,8(a4) +80000b28: 00b703a3 sb a1,7(a4) +80000b2c: 00b70323 sb a1,6(a4) +80000b30: 00b702a3 sb a1,5(a4) +80000b34: 00b70223 sb a1,4(a4) +80000b38: 00b701a3 sb a1,3(a4) +80000b3c: 00b70123 sb a1,2(a4) +80000b40: 00b700a3 sb a1,1(a4) +80000b44: 00b70023 sb a1,0(a4) +80000b48: 00008067 ret +80000b4c: 0ff5f593 andi a1,a1,255 +80000b50: 00859693 slli a3,a1,0x8 +80000b54: 00d5e5b3 or a1,a1,a3 +80000b58: 01059693 slli a3,a1,0x10 +80000b5c: 00d5e5b3 or a1,a1,a3 +80000b60: f6dff06f j 80000acc +80000b64: 00279693 slli a3,a5,0x2 +80000b68: 00000297 auipc t0,0x0 +80000b6c: 005686b3 add a3,a3,t0 +80000b70: 00008293 mv t0,ra +80000b74: fa0680e7 jalr -96(a3) +80000b78: 00028093 mv ra,t0 +80000b7c: ff078793 addi a5,a5,-16 +80000b80: 40f70733 sub a4,a4,a5 +80000b84: 00f60633 add a2,a2,a5 +80000b88: f6c378e3 bgeu t1,a2,80000af8 +80000b8c: f3dff06f j 80000ac8 -80000b10 <__libc_init_array>: -80000b10: ff010113 addi sp,sp,-16 -80000b14: 00812423 sw s0,8(sp) -80000b18: 01212023 sw s2,0(sp) -80000b1c: 80004437 lui s0,0x80004 -80000b20: 80004937 lui s2,0x80004 -80000b24: 00040793 mv a5,s0 -80000b28: 00090913 mv s2,s2 -80000b2c: 40f90933 sub s2,s2,a5 -80000b30: 00112623 sw ra,12(sp) -80000b34: 00912223 sw s1,4(sp) -80000b38: 40295913 srai s2,s2,0x2 -80000b3c: 02090063 beqz s2,80000b5c <__libc_init_array+0x4c> -80000b40: 00040413 mv s0,s0 -80000b44: 00000493 li s1,0 -80000b48: 00042783 lw a5,0(s0) # 80004000 <__BSS_END__+0xfffff668> -80000b4c: 00148493 addi s1,s1,1 -80000b50: 00440413 addi s0,s0,4 -80000b54: 000780e7 jalr a5 -80000b58: fe9918e3 bne s2,s1,80000b48 <__libc_init_array+0x38> -80000b5c: 80004437 lui s0,0x80004 -80000b60: 80004937 lui s2,0x80004 -80000b64: 00040793 mv a5,s0 -80000b68: 00490913 addi s2,s2,4 # 80004004 <__BSS_END__+0xfffff66c> -80000b6c: 40f90933 sub s2,s2,a5 -80000b70: 40295913 srai s2,s2,0x2 -80000b74: 02090063 beqz s2,80000b94 <__libc_init_array+0x84> -80000b78: 00040413 mv s0,s0 -80000b7c: 00000493 li s1,0 -80000b80: 00042783 lw a5,0(s0) # 80004000 <__BSS_END__+0xfffff668> -80000b84: 00148493 addi s1,s1,1 -80000b88: 00440413 addi s0,s0,4 -80000b8c: 000780e7 jalr a5 -80000b90: fe9918e3 bne s2,s1,80000b80 <__libc_init_array+0x70> -80000b94: 00c12083 lw ra,12(sp) -80000b98: 00812403 lw s0,8(sp) -80000b9c: 00412483 lw s1,4(sp) -80000ba0: 00012903 lw s2,0(sp) -80000ba4: 01010113 addi sp,sp,16 -80000ba8: 00008067 ret - -80000bac : -80000bac: 00f00313 li t1,15 -80000bb0: 00050713 mv a4,a0 -80000bb4: 02c37e63 bgeu t1,a2,80000bf0 -80000bb8: 00f77793 andi a5,a4,15 -80000bbc: 0a079063 bnez a5,80000c5c -80000bc0: 08059263 bnez a1,80000c44 -80000bc4: ff067693 andi a3,a2,-16 -80000bc8: 00f67613 andi a2,a2,15 -80000bcc: 00e686b3 add a3,a3,a4 -80000bd0: 00b72023 sw a1,0(a4) -80000bd4: 00b72223 sw a1,4(a4) -80000bd8: 00b72423 sw a1,8(a4) -80000bdc: 00b72623 sw a1,12(a4) -80000be0: 01070713 addi a4,a4,16 -80000be4: fed766e3 bltu a4,a3,80000bd0 -80000be8: 00061463 bnez a2,80000bf0 +80000b90 <__register_exitproc>: +80000b90: cc01a703 lw a4,-832(gp) # 800014c8 <_global_impure_ptr> +80000b94: 14872783 lw a5,328(a4) +80000b98: 04078c63 beqz a5,80000bf0 <__register_exitproc+0x60> +80000b9c: 0047a703 lw a4,4(a5) +80000ba0: 01f00813 li a6,31 +80000ba4: 06e84e63 blt a6,a4,80000c20 <__register_exitproc+0x90> +80000ba8: 00271813 slli a6,a4,0x2 +80000bac: 02050663 beqz a0,80000bd8 <__register_exitproc+0x48> +80000bb0: 01078333 add t1,a5,a6 +80000bb4: 08c32423 sw a2,136(t1) +80000bb8: 1887a883 lw a7,392(a5) +80000bbc: 00100613 li a2,1 +80000bc0: 00e61633 sll a2,a2,a4 +80000bc4: 00c8e8b3 or a7,a7,a2 +80000bc8: 1917a423 sw a7,392(a5) +80000bcc: 10d32423 sw a3,264(t1) +80000bd0: 00200693 li a3,2 +80000bd4: 02d50463 beq a0,a3,80000bfc <__register_exitproc+0x6c> +80000bd8: 00170713 addi a4,a4,1 +80000bdc: 00e7a223 sw a4,4(a5) +80000be0: 010787b3 add a5,a5,a6 +80000be4: 00b7a423 sw a1,8(a5) +80000be8: 00000513 li a0,0 80000bec: 00008067 ret -80000bf0: 40c306b3 sub a3,t1,a2 -80000bf4: 00269693 slli a3,a3,0x2 -80000bf8: 00000297 auipc t0,0x0 -80000bfc: 005686b3 add a3,a3,t0 -80000c00: 00c68067 jr 12(a3) -80000c04: 00b70723 sb a1,14(a4) -80000c08: 00b706a3 sb a1,13(a4) -80000c0c: 00b70623 sb a1,12(a4) -80000c10: 00b705a3 sb a1,11(a4) -80000c14: 00b70523 sb a1,10(a4) -80000c18: 00b704a3 sb a1,9(a4) -80000c1c: 00b70423 sb a1,8(a4) -80000c20: 00b703a3 sb a1,7(a4) -80000c24: 00b70323 sb a1,6(a4) -80000c28: 00b702a3 sb a1,5(a4) -80000c2c: 00b70223 sb a1,4(a4) -80000c30: 00b701a3 sb a1,3(a4) -80000c34: 00b70123 sb a1,2(a4) -80000c38: 00b700a3 sb a1,1(a4) -80000c3c: 00b70023 sb a1,0(a4) -80000c40: 00008067 ret -80000c44: 0ff5f593 andi a1,a1,255 -80000c48: 00859693 slli a3,a1,0x8 -80000c4c: 00d5e5b3 or a1,a1,a3 -80000c50: 01059693 slli a3,a1,0x10 -80000c54: 00d5e5b3 or a1,a1,a3 -80000c58: f6dff06f j 80000bc4 -80000c5c: 00279693 slli a3,a5,0x2 -80000c60: 00000297 auipc t0,0x0 -80000c64: 005686b3 add a3,a3,t0 -80000c68: 00008293 mv t0,ra -80000c6c: fa0680e7 jalr -96(a3) -80000c70: 00028093 mv ra,t0 -80000c74: ff078793 addi a5,a5,-16 -80000c78: 40f70733 sub a4,a4,a5 -80000c7c: 00f60633 add a2,a2,a5 -80000c80: f6c378e3 bgeu t1,a2,80000bf0 -80000c84: f3dff06f j 80000bc0 +80000bf0: 14c70793 addi a5,a4,332 +80000bf4: 14f72423 sw a5,328(a4) +80000bf8: fa5ff06f j 80000b9c <__register_exitproc+0xc> +80000bfc: 18c7a683 lw a3,396(a5) +80000c00: 00170713 addi a4,a4,1 +80000c04: 00e7a223 sw a4,4(a5) +80000c08: 00c6e633 or a2,a3,a2 +80000c0c: 18c7a623 sw a2,396(a5) +80000c10: 010787b3 add a5,a5,a6 +80000c14: 00b7a423 sw a1,8(a5) +80000c18: 00000513 li a0,0 +80000c1c: 00008067 ret +80000c20: fff00513 li a0,-1 +80000c24: 00008067 ret -80000c88 <_puts_r>: -80000c88: fc010113 addi sp,sp,-64 -80000c8c: 02812c23 sw s0,56(sp) -80000c90: 00050413 mv s0,a0 -80000c94: 00058513 mv a0,a1 -80000c98: 02912a23 sw s1,52(sp) -80000c9c: 02112e23 sw ra,60(sp) -80000ca0: 00058493 mv s1,a1 -80000ca4: 0c0000ef jal ra,80000d64 -80000ca8: 800047b7 lui a5,0x80004 -80000cac: c1078793 addi a5,a5,-1008 # 80003c10 <__BSS_END__+0xfffff278> -80000cb0: 02f12423 sw a5,40(sp) -80000cb4: 00100793 li a5,1 -80000cb8: 02f12623 sw a5,44(sp) -80000cbc: 03842703 lw a4,56(s0) -80000cc0: 02010793 addi a5,sp,32 -80000cc4: 00150693 addi a3,a0,1 -80000cc8: 00f12a23 sw a5,20(sp) -80000ccc: 00200793 li a5,2 -80000cd0: 02912023 sw s1,32(sp) -80000cd4: 02a12223 sw a0,36(sp) -80000cd8: 00d12e23 sw a3,28(sp) -80000cdc: 00f12c23 sw a5,24(sp) -80000ce0: 00842583 lw a1,8(s0) -80000ce4: 06070063 beqz a4,80000d44 <_puts_r+0xbc> -80000ce8: 00c59783 lh a5,12(a1) -80000cec: 01279713 slli a4,a5,0x12 -80000cf0: 02074263 bltz a4,80000d14 <_puts_r+0x8c> -80000cf4: 0645a703 lw a4,100(a1) -80000cf8: 000026b7 lui a3,0x2 -80000cfc: 00d7e7b3 or a5,a5,a3 -80000d00: ffffe6b7 lui a3,0xffffe -80000d04: fff68693 addi a3,a3,-1 # ffffdfff <__BSS_END__+0x7fff9667> -80000d08: 00d77733 and a4,a4,a3 -80000d0c: 00f59623 sh a5,12(a1) -80000d10: 06e5a223 sw a4,100(a1) -80000d14: 01410613 addi a2,sp,20 -80000d18: 00040513 mv a0,s0 -80000d1c: 5e8000ef jal ra,80001304 <__sfvwrite_r> -80000d20: 03c12083 lw ra,60(sp) -80000d24: 03812403 lw s0,56(sp) -80000d28: 00a03533 snez a0,a0 -80000d2c: 40a00533 neg a0,a0 -80000d30: ff557513 andi a0,a0,-11 -80000d34: 03412483 lw s1,52(sp) -80000d38: 00a50513 addi a0,a0,10 -80000d3c: 04010113 addi sp,sp,64 -80000d40: 00008067 ret -80000d44: 00040513 mv a0,s0 -80000d48: 00b12623 sw a1,12(sp) -80000d4c: 578000ef jal ra,800012c4 <__sinit> -80000d50: 00c12583 lw a1,12(sp) -80000d54: f95ff06f j 80000ce8 <_puts_r+0x60> - -80000d58 : -80000d58: 00050593 mv a1,a0 -80000d5c: 0cc1a503 lw a0,204(gp) # 800048d4 <_impure_ptr> -80000d60: f29ff06f j 80000c88 <_puts_r> - -80000d64 : -80000d64: 00357793 andi a5,a0,3 -80000d68: 00050713 mv a4,a0 -80000d6c: 04079c63 bnez a5,80000dc4 -80000d70: 7f7f86b7 lui a3,0x7f7f8 -80000d74: f7f68693 addi a3,a3,-129 # 7f7f7f7f <_start-0x808081> -80000d78: fff00593 li a1,-1 -80000d7c: 00072603 lw a2,0(a4) -80000d80: 00470713 addi a4,a4,4 -80000d84: 00d677b3 and a5,a2,a3 -80000d88: 00d787b3 add a5,a5,a3 -80000d8c: 00c7e7b3 or a5,a5,a2 -80000d90: 00d7e7b3 or a5,a5,a3 -80000d94: feb784e3 beq a5,a1,80000d7c -80000d98: ffc74683 lbu a3,-4(a4) -80000d9c: ffd74603 lbu a2,-3(a4) -80000da0: ffe74783 lbu a5,-2(a4) -80000da4: 40a70733 sub a4,a4,a0 -80000da8: 04068063 beqz a3,80000de8 -80000dac: 02060a63 beqz a2,80000de0 -80000db0: 00f03533 snez a0,a5 -80000db4: 00e50533 add a0,a0,a4 -80000db8: ffe50513 addi a0,a0,-2 -80000dbc: 00008067 ret -80000dc0: fa0688e3 beqz a3,80000d70 -80000dc4: 00074783 lbu a5,0(a4) -80000dc8: 00170713 addi a4,a4,1 -80000dcc: 00377693 andi a3,a4,3 -80000dd0: fe0798e3 bnez a5,80000dc0 -80000dd4: 40a70733 sub a4,a4,a0 -80000dd8: fff70513 addi a0,a4,-1 -80000ddc: 00008067 ret -80000de0: ffd70513 addi a0,a4,-3 -80000de4: 00008067 ret -80000de8: ffc70513 addi a0,a4,-4 -80000dec: 00008067 ret - -80000df0 <__register_exitproc>: -80000df0: 0c81a703 lw a4,200(gp) # 800048d0 <_global_impure_ptr> -80000df4: 14872783 lw a5,328(a4) -80000df8: 04078c63 beqz a5,80000e50 <__register_exitproc+0x60> -80000dfc: 0047a703 lw a4,4(a5) -80000e00: 01f00813 li a6,31 -80000e04: 06e84e63 blt a6,a4,80000e80 <__register_exitproc+0x90> -80000e08: 00271813 slli a6,a4,0x2 -80000e0c: 02050663 beqz a0,80000e38 <__register_exitproc+0x48> -80000e10: 01078333 add t1,a5,a6 -80000e14: 08c32423 sw a2,136(t1) -80000e18: 1887a883 lw a7,392(a5) -80000e1c: 00100613 li a2,1 -80000e20: 00e61633 sll a2,a2,a4 -80000e24: 00c8e8b3 or a7,a7,a2 -80000e28: 1917a423 sw a7,392(a5) -80000e2c: 10d32423 sw a3,264(t1) -80000e30: 00200693 li a3,2 -80000e34: 02d50463 beq a0,a3,80000e5c <__register_exitproc+0x6c> -80000e38: 00170713 addi a4,a4,1 -80000e3c: 00e7a223 sw a4,4(a5) -80000e40: 010787b3 add a5,a5,a6 -80000e44: 00b7a423 sw a1,8(a5) -80000e48: 00000513 li a0,0 -80000e4c: 00008067 ret -80000e50: 14c70793 addi a5,a4,332 -80000e54: 14f72423 sw a5,328(a4) -80000e58: fa5ff06f j 80000dfc <__register_exitproc+0xc> -80000e5c: 18c7a683 lw a3,396(a5) -80000e60: 00170713 addi a4,a4,1 -80000e64: 00e7a223 sw a4,4(a5) -80000e68: 00c6e633 or a2,a3,a2 -80000e6c: 18c7a623 sw a2,396(a5) -80000e70: 010787b3 add a5,a5,a6 -80000e74: 00b7a423 sw a1,8(a5) -80000e78: 00000513 li a0,0 -80000e7c: 00008067 ret -80000e80: fff00513 li a0,-1 -80000e84: 00008067 ret - -80000e88 <__call_exitprocs>: -80000e88: fd010113 addi sp,sp,-48 -80000e8c: 01412c23 sw s4,24(sp) -80000e90: 0c81aa03 lw s4,200(gp) # 800048d0 <_global_impure_ptr> -80000e94: 03212023 sw s2,32(sp) -80000e98: 02112623 sw ra,44(sp) -80000e9c: 148a2903 lw s2,328(s4) -80000ea0: 02812423 sw s0,40(sp) -80000ea4: 02912223 sw s1,36(sp) -80000ea8: 01312e23 sw s3,28(sp) -80000eac: 01512a23 sw s5,20(sp) -80000eb0: 01612823 sw s6,16(sp) -80000eb4: 01712623 sw s7,12(sp) -80000eb8: 01812423 sw s8,8(sp) -80000ebc: 04090063 beqz s2,80000efc <__call_exitprocs+0x74> -80000ec0: 00050b13 mv s6,a0 -80000ec4: 00058b93 mv s7,a1 -80000ec8: 00100a93 li s5,1 -80000ecc: fff00993 li s3,-1 -80000ed0: 00492483 lw s1,4(s2) -80000ed4: fff48413 addi s0,s1,-1 -80000ed8: 02044263 bltz s0,80000efc <__call_exitprocs+0x74> -80000edc: 00249493 slli s1,s1,0x2 -80000ee0: 009904b3 add s1,s2,s1 -80000ee4: 040b8463 beqz s7,80000f2c <__call_exitprocs+0xa4> -80000ee8: 1044a783 lw a5,260(s1) -80000eec: 05778063 beq a5,s7,80000f2c <__call_exitprocs+0xa4> -80000ef0: fff40413 addi s0,s0,-1 -80000ef4: ffc48493 addi s1,s1,-4 -80000ef8: ff3416e3 bne s0,s3,80000ee4 <__call_exitprocs+0x5c> -80000efc: 02c12083 lw ra,44(sp) -80000f00: 02812403 lw s0,40(sp) -80000f04: 02412483 lw s1,36(sp) -80000f08: 02012903 lw s2,32(sp) -80000f0c: 01c12983 lw s3,28(sp) -80000f10: 01812a03 lw s4,24(sp) -80000f14: 01412a83 lw s5,20(sp) -80000f18: 01012b03 lw s6,16(sp) -80000f1c: 00c12b83 lw s7,12(sp) -80000f20: 00812c03 lw s8,8(sp) -80000f24: 03010113 addi sp,sp,48 -80000f28: 00008067 ret -80000f2c: 00492783 lw a5,4(s2) -80000f30: 0044a683 lw a3,4(s1) -80000f34: fff78793 addi a5,a5,-1 -80000f38: 04878e63 beq a5,s0,80000f94 <__call_exitprocs+0x10c> -80000f3c: 0004a223 sw zero,4(s1) -80000f40: fa0688e3 beqz a3,80000ef0 <__call_exitprocs+0x68> -80000f44: 18892783 lw a5,392(s2) -80000f48: 008a9733 sll a4,s5,s0 -80000f4c: 00492c03 lw s8,4(s2) -80000f50: 00f777b3 and a5,a4,a5 -80000f54: 02079263 bnez a5,80000f78 <__call_exitprocs+0xf0> -80000f58: 000680e7 jalr a3 -80000f5c: 00492703 lw a4,4(s2) -80000f60: 148a2783 lw a5,328(s4) -80000f64: 01871463 bne a4,s8,80000f6c <__call_exitprocs+0xe4> -80000f68: f8f904e3 beq s2,a5,80000ef0 <__call_exitprocs+0x68> -80000f6c: f80788e3 beqz a5,80000efc <__call_exitprocs+0x74> -80000f70: 00078913 mv s2,a5 -80000f74: f5dff06f j 80000ed0 <__call_exitprocs+0x48> -80000f78: 18c92783 lw a5,396(s2) -80000f7c: 0844a583 lw a1,132(s1) -80000f80: 00f77733 and a4,a4,a5 -80000f84: 00071c63 bnez a4,80000f9c <__call_exitprocs+0x114> -80000f88: 000b0513 mv a0,s6 -80000f8c: 000680e7 jalr a3 -80000f90: fcdff06f j 80000f5c <__call_exitprocs+0xd4> -80000f94: 00892223 sw s0,4(s2) -80000f98: fa9ff06f j 80000f40 <__call_exitprocs+0xb8> -80000f9c: 00058513 mv a0,a1 -80000fa0: 000680e7 jalr a3 -80000fa4: fb9ff06f j 80000f5c <__call_exitprocs+0xd4> - -80000fa8 <__fp_lock>: -80000fa8: 00000513 li a0,0 -80000fac: 00008067 ret - -80000fb0 <_cleanup_r>: -80000fb0: 800035b7 lui a1,0x80003 -80000fb4: d0058593 addi a1,a1,-768 # 80002d00 <__BSS_END__+0xffffe368> -80000fb8: 0990006f j 80001850 <_fwalk_reent> - -80000fbc <__sinit.part.0>: -80000fbc: fe010113 addi sp,sp,-32 -80000fc0: 800017b7 lui a5,0x80001 -80000fc4: 00112e23 sw ra,28(sp) -80000fc8: 00812c23 sw s0,24(sp) -80000fcc: 00912a23 sw s1,20(sp) -80000fd0: 01212823 sw s2,16(sp) -80000fd4: 01312623 sw s3,12(sp) -80000fd8: 01412423 sw s4,8(sp) -80000fdc: 01512223 sw s5,4(sp) -80000fe0: 01612023 sw s6,0(sp) -80000fe4: 00452403 lw s0,4(a0) -80000fe8: fb078793 addi a5,a5,-80 # 80000fb0 <__BSS_END__+0xffffc618> -80000fec: 02f52e23 sw a5,60(a0) -80000ff0: 2ec50713 addi a4,a0,748 -80000ff4: 00300793 li a5,3 -80000ff8: 2ee52423 sw a4,744(a0) -80000ffc: 2ef52223 sw a5,740(a0) -80001000: 2e052023 sw zero,736(a0) -80001004: 00400793 li a5,4 -80001008: 00050913 mv s2,a0 -8000100c: 00f42623 sw a5,12(s0) -80001010: 00800613 li a2,8 -80001014: 00000593 li a1,0 -80001018: 06042223 sw zero,100(s0) -8000101c: 00042023 sw zero,0(s0) -80001020: 00042223 sw zero,4(s0) -80001024: 00042423 sw zero,8(s0) -80001028: 00042823 sw zero,16(s0) -8000102c: 00042a23 sw zero,20(s0) -80001030: 00042c23 sw zero,24(s0) -80001034: 05c40513 addi a0,s0,92 -80001038: b75ff0ef jal ra,80000bac -8000103c: 80003b37 lui s6,0x80003 -80001040: 00892483 lw s1,8(s2) -80001044: 80003ab7 lui s5,0x80003 -80001048: 80003a37 lui s4,0x80003 -8000104c: 800039b7 lui s3,0x80003 -80001050: 984b0b13 addi s6,s6,-1660 # 80002984 <__BSS_END__+0xffffdfec> -80001054: 9e8a8a93 addi s5,s5,-1560 # 800029e8 <__BSS_END__+0xffffe050> -80001058: a70a0a13 addi s4,s4,-1424 # 80002a70 <__BSS_END__+0xffffe0d8> -8000105c: ad898993 addi s3,s3,-1320 # 80002ad8 <__BSS_END__+0xffffe140> -80001060: 000107b7 lui a5,0x10 -80001064: 03642023 sw s6,32(s0) -80001068: 03542223 sw s5,36(s0) -8000106c: 03442423 sw s4,40(s0) -80001070: 03342623 sw s3,44(s0) -80001074: 00842e23 sw s0,28(s0) -80001078: 00978793 addi a5,a5,9 # 10009 <_start-0x7ffefff7> -8000107c: 00f4a623 sw a5,12(s1) -80001080: 00800613 li a2,8 -80001084: 00000593 li a1,0 -80001088: 0604a223 sw zero,100(s1) -8000108c: 0004a023 sw zero,0(s1) -80001090: 0004a223 sw zero,4(s1) -80001094: 0004a423 sw zero,8(s1) -80001098: 0004a823 sw zero,16(s1) -8000109c: 0004aa23 sw zero,20(s1) -800010a0: 0004ac23 sw zero,24(s1) -800010a4: 05c48513 addi a0,s1,92 -800010a8: b05ff0ef jal ra,80000bac -800010ac: 00c92403 lw s0,12(s2) -800010b0: 000207b7 lui a5,0x20 -800010b4: 0364a023 sw s6,32(s1) -800010b8: 0354a223 sw s5,36(s1) -800010bc: 0344a423 sw s4,40(s1) -800010c0: 0334a623 sw s3,44(s1) -800010c4: 0094ae23 sw s1,28(s1) -800010c8: 01278793 addi a5,a5,18 # 20012 <_start-0x7ffdffee> -800010cc: 00f42623 sw a5,12(s0) -800010d0: 06042223 sw zero,100(s0) -800010d4: 00042023 sw zero,0(s0) -800010d8: 00042223 sw zero,4(s0) -800010dc: 00042423 sw zero,8(s0) -800010e0: 00042823 sw zero,16(s0) -800010e4: 00042a23 sw zero,20(s0) -800010e8: 00042c23 sw zero,24(s0) -800010ec: 05c40513 addi a0,s0,92 -800010f0: 00800613 li a2,8 -800010f4: 00000593 li a1,0 -800010f8: ab5ff0ef jal ra,80000bac -800010fc: 01c12083 lw ra,28(sp) -80001100: 03642023 sw s6,32(s0) -80001104: 03542223 sw s5,36(s0) -80001108: 03442423 sw s4,40(s0) -8000110c: 03342623 sw s3,44(s0) -80001110: 00842e23 sw s0,28(s0) -80001114: 01812403 lw s0,24(sp) -80001118: 00100793 li a5,1 -8000111c: 02f92c23 sw a5,56(s2) -80001120: 01412483 lw s1,20(sp) -80001124: 01012903 lw s2,16(sp) -80001128: 00c12983 lw s3,12(sp) -8000112c: 00812a03 lw s4,8(sp) -80001130: 00412a83 lw s5,4(sp) -80001134: 00012b03 lw s6,0(sp) -80001138: 02010113 addi sp,sp,32 -8000113c: 00008067 ret - -80001140 <__fp_unlock>: -80001140: 00000513 li a0,0 -80001144: 00008067 ret - -80001148 <__sfmoreglue>: -80001148: ff010113 addi sp,sp,-16 -8000114c: 00912223 sw s1,4(sp) -80001150: 06800613 li a2,104 -80001154: fff58493 addi s1,a1,-1 -80001158: 02c484b3 mul s1,s1,a2 -8000115c: 01212023 sw s2,0(sp) -80001160: 00058913 mv s2,a1 -80001164: 00812423 sw s0,8(sp) -80001168: 00112623 sw ra,12(sp) -8000116c: 07448593 addi a1,s1,116 -80001170: 794000ef jal ra,80001904 <_malloc_r> -80001174: 00050413 mv s0,a0 -80001178: 02050063 beqz a0,80001198 <__sfmoreglue+0x50> -8000117c: 00c50513 addi a0,a0,12 -80001180: 00042023 sw zero,0(s0) -80001184: 01242223 sw s2,4(s0) -80001188: 00a42423 sw a0,8(s0) -8000118c: 06848613 addi a2,s1,104 -80001190: 00000593 li a1,0 -80001194: a19ff0ef jal ra,80000bac -80001198: 00c12083 lw ra,12(sp) -8000119c: 00040513 mv a0,s0 -800011a0: 00812403 lw s0,8(sp) -800011a4: 00412483 lw s1,4(sp) -800011a8: 00012903 lw s2,0(sp) -800011ac: 01010113 addi sp,sp,16 -800011b0: 00008067 ret - -800011b4 <__sfp>: -800011b4: fe010113 addi sp,sp,-32 -800011b8: 01212823 sw s2,16(sp) -800011bc: 0c81a903 lw s2,200(gp) # 800048d0 <_global_impure_ptr> -800011c0: 01312623 sw s3,12(sp) -800011c4: 00112e23 sw ra,28(sp) -800011c8: 03892783 lw a5,56(s2) -800011cc: 00812c23 sw s0,24(sp) -800011d0: 00912a23 sw s1,20(sp) -800011d4: 00050993 mv s3,a0 -800011d8: 0a078663 beqz a5,80001284 <__sfp+0xd0> -800011dc: 2e090913 addi s2,s2,736 -800011e0: fff00493 li s1,-1 -800011e4: 00492783 lw a5,4(s2) -800011e8: 00892403 lw s0,8(s2) -800011ec: fff78793 addi a5,a5,-1 -800011f0: 0007d863 bgez a5,80001200 <__sfp+0x4c> -800011f4: 0800006f j 80001274 <__sfp+0xc0> -800011f8: 06840413 addi s0,s0,104 -800011fc: 06978c63 beq a5,s1,80001274 <__sfp+0xc0> -80001200: 00c41703 lh a4,12(s0) -80001204: fff78793 addi a5,a5,-1 -80001208: fe0718e3 bnez a4,800011f8 <__sfp+0x44> -8000120c: ffff07b7 lui a5,0xffff0 -80001210: 00178793 addi a5,a5,1 # ffff0001 <__BSS_END__+0x7ffeb669> -80001214: 06042223 sw zero,100(s0) -80001218: 00042023 sw zero,0(s0) -8000121c: 00042223 sw zero,4(s0) -80001220: 00042423 sw zero,8(s0) -80001224: 00f42623 sw a5,12(s0) -80001228: 00042823 sw zero,16(s0) -8000122c: 00042a23 sw zero,20(s0) -80001230: 00042c23 sw zero,24(s0) -80001234: 00800613 li a2,8 -80001238: 00000593 li a1,0 -8000123c: 05c40513 addi a0,s0,92 -80001240: 96dff0ef jal ra,80000bac -80001244: 02042823 sw zero,48(s0) -80001248: 02042a23 sw zero,52(s0) -8000124c: 04042223 sw zero,68(s0) -80001250: 04042423 sw zero,72(s0) -80001254: 01c12083 lw ra,28(sp) -80001258: 00040513 mv a0,s0 -8000125c: 01812403 lw s0,24(sp) -80001260: 01412483 lw s1,20(sp) -80001264: 01012903 lw s2,16(sp) -80001268: 00c12983 lw s3,12(sp) -8000126c: 02010113 addi sp,sp,32 -80001270: 00008067 ret -80001274: 00092403 lw s0,0(s2) -80001278: 00040c63 beqz s0,80001290 <__sfp+0xdc> -8000127c: 00040913 mv s2,s0 -80001280: f65ff06f j 800011e4 <__sfp+0x30> -80001284: 00090513 mv a0,s2 -80001288: d35ff0ef jal ra,80000fbc <__sinit.part.0> -8000128c: f51ff06f j 800011dc <__sfp+0x28> -80001290: 00400593 li a1,4 -80001294: 00098513 mv a0,s3 -80001298: eb1ff0ef jal ra,80001148 <__sfmoreglue> -8000129c: 00a92023 sw a0,0(s2) -800012a0: 00050413 mv s0,a0 -800012a4: fc051ce3 bnez a0,8000127c <__sfp+0xc8> -800012a8: 00c00793 li a5,12 -800012ac: 00f9a023 sw a5,0(s3) -800012b0: fa5ff06f j 80001254 <__sfp+0xa0> - -800012b4 <_cleanup>: -800012b4: 0c81a503 lw a0,200(gp) # 800048d0 <_global_impure_ptr> -800012b8: 800035b7 lui a1,0x80003 -800012bc: d0058593 addi a1,a1,-768 # 80002d00 <__BSS_END__+0xffffe368> -800012c0: 5900006f j 80001850 <_fwalk_reent> - -800012c4 <__sinit>: -800012c4: 03852783 lw a5,56(a0) -800012c8: 00078463 beqz a5,800012d0 <__sinit+0xc> -800012cc: 00008067 ret -800012d0: cedff06f j 80000fbc <__sinit.part.0> - -800012d4 <__sfp_lock_acquire>: -800012d4: 00008067 ret - -800012d8 <__sfp_lock_release>: -800012d8: 00008067 ret - -800012dc <__sinit_lock_acquire>: -800012dc: 00008067 ret - -800012e0 <__sinit_lock_release>: -800012e0: 00008067 ret - -800012e4 <__fp_lock_all>: -800012e4: 0cc1a503 lw a0,204(gp) # 800048d4 <_impure_ptr> -800012e8: 800015b7 lui a1,0x80001 -800012ec: fa858593 addi a1,a1,-88 # 80000fa8 <__BSS_END__+0xffffc610> -800012f0: 4bc0006f j 800017ac <_fwalk> - -800012f4 <__fp_unlock_all>: -800012f4: 0cc1a503 lw a0,204(gp) # 800048d4 <_impure_ptr> -800012f8: 800015b7 lui a1,0x80001 -800012fc: 14058593 addi a1,a1,320 # 80001140 <__BSS_END__+0xffffc7a8> -80001300: 4ac0006f j 800017ac <_fwalk> - -80001304 <__sfvwrite_r>: -80001304: 00862783 lw a5,8(a2) -80001308: 32078e63 beqz a5,80001644 <__sfvwrite_r+0x340> -8000130c: 00c5d783 lhu a5,12(a1) -80001310: fd010113 addi sp,sp,-48 -80001314: 02812423 sw s0,40(sp) -80001318: 01412c23 sw s4,24(sp) -8000131c: 01512a23 sw s5,20(sp) -80001320: 02112623 sw ra,44(sp) -80001324: 02912223 sw s1,36(sp) -80001328: 03212023 sw s2,32(sp) -8000132c: 01312e23 sw s3,28(sp) -80001330: 01612823 sw s6,16(sp) -80001334: 01712623 sw s7,12(sp) -80001338: 01812423 sw s8,8(sp) -8000133c: 01912223 sw s9,4(sp) -80001340: 01a12023 sw s10,0(sp) -80001344: 0087f713 andi a4,a5,8 -80001348: 00060a13 mv s4,a2 -8000134c: 00050a93 mv s5,a0 -80001350: 00058413 mv s0,a1 -80001354: 08070663 beqz a4,800013e0 <__sfvwrite_r+0xdc> -80001358: 0105a703 lw a4,16(a1) -8000135c: 08070263 beqz a4,800013e0 <__sfvwrite_r+0xdc> -80001360: 0027f713 andi a4,a5,2 -80001364: 000a2483 lw s1,0(s4) -80001368: 08070c63 beqz a4,80001400 <__sfvwrite_r+0xfc> -8000136c: 02442783 lw a5,36(s0) -80001370: 01c42583 lw a1,28(s0) -80001374: 80000b37 lui s6,0x80000 -80001378: 00000993 li s3,0 -8000137c: 00000913 li s2,0 -80001380: c00b4b13 xori s6,s6,-1024 -80001384: 00098613 mv a2,s3 -80001388: 000a8513 mv a0,s5 -8000138c: 04090263 beqz s2,800013d0 <__sfvwrite_r+0xcc> -80001390: 00090693 mv a3,s2 -80001394: 012b7463 bgeu s6,s2,8000139c <__sfvwrite_r+0x98> -80001398: 000b0693 mv a3,s6 -8000139c: 000780e7 jalr a5 -800013a0: 28a05863 blez a0,80001630 <__sfvwrite_r+0x32c> -800013a4: 008a2783 lw a5,8(s4) -800013a8: 00a989b3 add s3,s3,a0 -800013ac: 40a90933 sub s2,s2,a0 -800013b0: 40a78533 sub a0,a5,a0 -800013b4: 00aa2423 sw a0,8(s4) -800013b8: 20050a63 beqz a0,800015cc <__sfvwrite_r+0x2c8> -800013bc: 02442783 lw a5,36(s0) -800013c0: 01c42583 lw a1,28(s0) -800013c4: 00098613 mv a2,s3 -800013c8: 000a8513 mv a0,s5 -800013cc: fc0912e3 bnez s2,80001390 <__sfvwrite_r+0x8c> -800013d0: 0004a983 lw s3,0(s1) -800013d4: 0044a903 lw s2,4(s1) -800013d8: 00848493 addi s1,s1,8 -800013dc: fa9ff06f j 80001384 <__sfvwrite_r+0x80> -800013e0: 00040593 mv a1,s0 -800013e4: 000a8513 mv a0,s5 -800013e8: 760010ef jal ra,80002b48 <__swsetup_r> -800013ec: 3a051c63 bnez a0,800017a4 <__sfvwrite_r+0x4a0> -800013f0: 00c45783 lhu a5,12(s0) -800013f4: 000a2483 lw s1,0(s4) -800013f8: 0027f713 andi a4,a5,2 -800013fc: f60718e3 bnez a4,8000136c <__sfvwrite_r+0x68> -80001400: 0017f713 andi a4,a5,1 -80001404: 24071463 bnez a4,8000164c <__sfvwrite_r+0x348> -80001408: 00842c83 lw s9,8(s0) -8000140c: 00042503 lw a0,0(s0) -80001410: 80000b37 lui s6,0x80000 -80001414: ffeb4b93 xori s7,s6,-2 -80001418: 00000c13 li s8,0 -8000141c: 00000913 li s2,0 -80001420: fffb4b13 not s6,s6 -80001424: 0e090e63 beqz s2,80001520 <__sfvwrite_r+0x21c> -80001428: 2007f713 andi a4,a5,512 -8000142c: 24070c63 beqz a4,80001684 <__sfvwrite_r+0x380> -80001430: 000c8d13 mv s10,s9 -80001434: 2f996263 bltu s2,s9,80001718 <__sfvwrite_r+0x414> -80001438: 4807f713 andi a4,a5,1152 -8000143c: 08070a63 beqz a4,800014d0 <__sfvwrite_r+0x1cc> -80001440: 01442983 lw s3,20(s0) -80001444: 01042583 lw a1,16(s0) -80001448: 00190713 addi a4,s2,1 -8000144c: 00199693 slli a3,s3,0x1 -80001450: 013686b3 add a3,a3,s3 -80001454: 01f6d993 srli s3,a3,0x1f -80001458: 40b50d33 sub s10,a0,a1 -8000145c: 00d989b3 add s3,s3,a3 -80001460: 4019d993 srai s3,s3,0x1 -80001464: 01a70733 add a4,a4,s10 -80001468: 00098613 mv a2,s3 -8000146c: 00e9f663 bgeu s3,a4,80001478 <__sfvwrite_r+0x174> -80001470: 00070993 mv s3,a4 -80001474: 00070613 mv a2,a4 -80001478: 4007f793 andi a5,a5,1024 -8000147c: 2e078463 beqz a5,80001764 <__sfvwrite_r+0x460> -80001480: 00060593 mv a1,a2 -80001484: 000a8513 mv a0,s5 -80001488: 47c000ef jal ra,80001904 <_malloc_r> -8000148c: 00050c93 mv s9,a0 -80001490: 30050263 beqz a0,80001794 <__sfvwrite_r+0x490> -80001494: 01042583 lw a1,16(s0) -80001498: 000d0613 mv a2,s10 -8000149c: 4d5000ef jal ra,80002170 -800014a0: 00c45783 lhu a5,12(s0) -800014a4: b7f7f793 andi a5,a5,-1153 -800014a8: 0807e793 ori a5,a5,128 -800014ac: 00f41623 sh a5,12(s0) -800014b0: 01ac8533 add a0,s9,s10 -800014b4: 41a987b3 sub a5,s3,s10 -800014b8: 01942823 sw s9,16(s0) -800014bc: 00a42023 sw a0,0(s0) -800014c0: 01342a23 sw s3,20(s0) -800014c4: 00090c93 mv s9,s2 -800014c8: 00f42423 sw a5,8(s0) -800014cc: 00090d13 mv s10,s2 -800014d0: 000d0613 mv a2,s10 -800014d4: 000c0593 mv a1,s8 -800014d8: 5b5000ef jal ra,8000228c -800014dc: 00842703 lw a4,8(s0) -800014e0: 00042783 lw a5,0(s0) -800014e4: 00090993 mv s3,s2 -800014e8: 41970cb3 sub s9,a4,s9 -800014ec: 01a787b3 add a5,a5,s10 -800014f0: 01942423 sw s9,8(s0) -800014f4: 00f42023 sw a5,0(s0) -800014f8: 00000913 li s2,0 -800014fc: 008a2603 lw a2,8(s4) -80001500: 013c0c33 add s8,s8,s3 -80001504: 413609b3 sub s3,a2,s3 -80001508: 013a2423 sw s3,8(s4) -8000150c: 0c098063 beqz s3,800015cc <__sfvwrite_r+0x2c8> -80001510: 00842c83 lw s9,8(s0) -80001514: 00042503 lw a0,0(s0) -80001518: 00c45783 lhu a5,12(s0) -8000151c: f00916e3 bnez s2,80001428 <__sfvwrite_r+0x124> -80001520: 0004ac03 lw s8,0(s1) -80001524: 0044a903 lw s2,4(s1) -80001528: 00848493 addi s1,s1,8 -8000152c: ef9ff06f j 80001424 <__sfvwrite_r+0x120> -80001530: 0044a983 lw s3,4(s1) -80001534: 0004ac03 lw s8,0(s1) -80001538: 00848493 addi s1,s1,8 -8000153c: fe098ae3 beqz s3,80001530 <__sfvwrite_r+0x22c> -80001540: 00098613 mv a2,s3 -80001544: 00a00593 li a1,10 -80001548: 000c0513 mv a0,s8 -8000154c: 351000ef jal ra,8000209c -80001550: 12050463 beqz a0,80001678 <__sfvwrite_r+0x374> -80001554: 00150513 addi a0,a0,1 -80001558: 41850b33 sub s6,a0,s8 -8000155c: 000b0793 mv a5,s6 -80001560: 00098b93 mv s7,s3 -80001564: 0137f463 bgeu a5,s3,8000156c <__sfvwrite_r+0x268> -80001568: 00078b93 mv s7,a5 -8000156c: 00042503 lw a0,0(s0) -80001570: 01042783 lw a5,16(s0) -80001574: 01442683 lw a3,20(s0) -80001578: 00a7f863 bgeu a5,a0,80001588 <__sfvwrite_r+0x284> -8000157c: 00842903 lw s2,8(s0) -80001580: 01268933 add s2,a3,s2 -80001584: 09794263 blt s2,s7,80001608 <__sfvwrite_r+0x304> -80001588: 1adbc863 blt s7,a3,80001738 <__sfvwrite_r+0x434> -8000158c: 02442783 lw a5,36(s0) -80001590: 01c42583 lw a1,28(s0) -80001594: 000c0613 mv a2,s8 -80001598: 000a8513 mv a0,s5 -8000159c: 000780e7 jalr a5 -800015a0: 00050913 mv s2,a0 -800015a4: 08a05663 blez a0,80001630 <__sfvwrite_r+0x32c> -800015a8: 412b0b33 sub s6,s6,s2 -800015ac: 00100513 li a0,1 -800015b0: 160b0a63 beqz s6,80001724 <__sfvwrite_r+0x420> -800015b4: 008a2603 lw a2,8(s4) -800015b8: 012c0c33 add s8,s8,s2 -800015bc: 412989b3 sub s3,s3,s2 -800015c0: 41260933 sub s2,a2,s2 -800015c4: 012a2423 sw s2,8(s4) -800015c8: 08091a63 bnez s2,8000165c <__sfvwrite_r+0x358> -800015cc: 00000513 li a0,0 -800015d0: 02c12083 lw ra,44(sp) -800015d4: 02812403 lw s0,40(sp) -800015d8: 02412483 lw s1,36(sp) -800015dc: 02012903 lw s2,32(sp) -800015e0: 01c12983 lw s3,28(sp) -800015e4: 01812a03 lw s4,24(sp) -800015e8: 01412a83 lw s5,20(sp) -800015ec: 01012b03 lw s6,16(sp) -800015f0: 00c12b83 lw s7,12(sp) -800015f4: 00812c03 lw s8,8(sp) -800015f8: 00412c83 lw s9,4(sp) -800015fc: 00012d03 lw s10,0(sp) -80001600: 03010113 addi sp,sp,48 -80001604: 00008067 ret -80001608: 000c0593 mv a1,s8 -8000160c: 00090613 mv a2,s2 -80001610: 47d000ef jal ra,8000228c -80001614: 00042783 lw a5,0(s0) -80001618: 00040593 mv a1,s0 -8000161c: 000a8513 mv a0,s5 -80001620: 012787b3 add a5,a5,s2 -80001624: 00f42023 sw a5,0(s0) -80001628: 251010ef jal ra,80003078 <_fflush_r> -8000162c: f6050ee3 beqz a0,800015a8 <__sfvwrite_r+0x2a4> -80001630: 00c41783 lh a5,12(s0) -80001634: 0407e793 ori a5,a5,64 -80001638: 00f41623 sh a5,12(s0) -8000163c: fff00513 li a0,-1 -80001640: f91ff06f j 800015d0 <__sfvwrite_r+0x2cc> -80001644: 00000513 li a0,0 -80001648: 00008067 ret -8000164c: 00000b13 li s6,0 -80001650: 00000513 li a0,0 -80001654: 00000c13 li s8,0 -80001658: 00000993 li s3,0 -8000165c: ec098ae3 beqz s3,80001530 <__sfvwrite_r+0x22c> -80001660: ee051ee3 bnez a0,8000155c <__sfvwrite_r+0x258> -80001664: 00098613 mv a2,s3 -80001668: 00a00593 li a1,10 -8000166c: 000c0513 mv a0,s8 -80001670: 22d000ef jal ra,8000209c -80001674: ee0510e3 bnez a0,80001554 <__sfvwrite_r+0x250> -80001678: 00198793 addi a5,s3,1 -8000167c: 00078b13 mv s6,a5 -80001680: ee1ff06f j 80001560 <__sfvwrite_r+0x25c> -80001684: 01042783 lw a5,16(s0) -80001688: 04a7e263 bltu a5,a0,800016cc <__sfvwrite_r+0x3c8> -8000168c: 01442783 lw a5,20(s0) -80001690: 02f96e63 bltu s2,a5,800016cc <__sfvwrite_r+0x3c8> -80001694: 00090693 mv a3,s2 -80001698: 012bf463 bgeu s7,s2,800016a0 <__sfvwrite_r+0x39c> -8000169c: 000b0693 mv a3,s6 -800016a0: 02f6c6b3 div a3,a3,a5 -800016a4: 02442703 lw a4,36(s0) -800016a8: 01c42583 lw a1,28(s0) -800016ac: 000c0613 mv a2,s8 -800016b0: 000a8513 mv a0,s5 -800016b4: 02f686b3 mul a3,a3,a5 -800016b8: 000700e7 jalr a4 -800016bc: 00050993 mv s3,a0 -800016c0: f6a058e3 blez a0,80001630 <__sfvwrite_r+0x32c> -800016c4: 41390933 sub s2,s2,s3 -800016c8: e35ff06f j 800014fc <__sfvwrite_r+0x1f8> -800016cc: 000c8993 mv s3,s9 -800016d0: 01997463 bgeu s2,s9,800016d8 <__sfvwrite_r+0x3d4> -800016d4: 00090993 mv s3,s2 -800016d8: 00098613 mv a2,s3 -800016dc: 000c0593 mv a1,s8 -800016e0: 3ad000ef jal ra,8000228c -800016e4: 00842783 lw a5,8(s0) -800016e8: 00042703 lw a4,0(s0) -800016ec: 413787b3 sub a5,a5,s3 -800016f0: 01370733 add a4,a4,s3 -800016f4: 00f42423 sw a5,8(s0) -800016f8: 00e42023 sw a4,0(s0) -800016fc: fc0794e3 bnez a5,800016c4 <__sfvwrite_r+0x3c0> -80001700: 00040593 mv a1,s0 -80001704: 000a8513 mv a0,s5 -80001708: 171010ef jal ra,80003078 <_fflush_r> -8000170c: f20512e3 bnez a0,80001630 <__sfvwrite_r+0x32c> -80001710: 41390933 sub s2,s2,s3 -80001714: de9ff06f j 800014fc <__sfvwrite_r+0x1f8> -80001718: 00090c93 mv s9,s2 -8000171c: 00090d13 mv s10,s2 -80001720: db1ff06f j 800014d0 <__sfvwrite_r+0x1cc> -80001724: 00040593 mv a1,s0 -80001728: 000a8513 mv a0,s5 -8000172c: 14d010ef jal ra,80003078 <_fflush_r> -80001730: e80502e3 beqz a0,800015b4 <__sfvwrite_r+0x2b0> -80001734: efdff06f j 80001630 <__sfvwrite_r+0x32c> -80001738: 000b8613 mv a2,s7 -8000173c: 000c0593 mv a1,s8 -80001740: 34d000ef jal ra,8000228c -80001744: 00842783 lw a5,8(s0) -80001748: 00042603 lw a2,0(s0) -8000174c: 000b8913 mv s2,s7 -80001750: 417787b3 sub a5,a5,s7 -80001754: 01760633 add a2,a2,s7 -80001758: 00f42423 sw a5,8(s0) -8000175c: 00c42023 sw a2,0(s0) -80001760: e49ff06f j 800015a8 <__sfvwrite_r+0x2a4> -80001764: 000a8513 mv a0,s5 -80001768: 44d000ef jal ra,800023b4 <_realloc_r> -8000176c: 00050c93 mv s9,a0 -80001770: d40510e3 bnez a0,800014b0 <__sfvwrite_r+0x1ac> -80001774: 01042583 lw a1,16(s0) -80001778: 000a8513 mv a0,s5 -8000177c: 2ad010ef jal ra,80003228 <_free_r> -80001780: 00c41783 lh a5,12(s0) -80001784: 00c00713 li a4,12 -80001788: 00eaa023 sw a4,0(s5) -8000178c: f7f7f793 andi a5,a5,-129 -80001790: ea5ff06f j 80001634 <__sfvwrite_r+0x330> -80001794: 00c00713 li a4,12 -80001798: 00c41783 lh a5,12(s0) -8000179c: 00eaa023 sw a4,0(s5) -800017a0: e95ff06f j 80001634 <__sfvwrite_r+0x330> -800017a4: fff00513 li a0,-1 -800017a8: e29ff06f j 800015d0 <__sfvwrite_r+0x2cc> - -800017ac <_fwalk>: -800017ac: fe010113 addi sp,sp,-32 -800017b0: 01212823 sw s2,16(sp) -800017b4: 01312623 sw s3,12(sp) -800017b8: 01412423 sw s4,8(sp) -800017bc: 01512223 sw s5,4(sp) -800017c0: 01612023 sw s6,0(sp) -800017c4: 00112e23 sw ra,28(sp) -800017c8: 00812c23 sw s0,24(sp) -800017cc: 00912a23 sw s1,20(sp) -800017d0: 00058b13 mv s6,a1 -800017d4: 2e050a93 addi s5,a0,736 -800017d8: 00000a13 li s4,0 -800017dc: 00100993 li s3,1 -800017e0: fff00913 li s2,-1 -800017e4: 004aa483 lw s1,4(s5) -800017e8: 008aa403 lw s0,8(s5) -800017ec: fff48493 addi s1,s1,-1 -800017f0: 0204c663 bltz s1,8000181c <_fwalk+0x70> -800017f4: 00c45783 lhu a5,12(s0) -800017f8: fff48493 addi s1,s1,-1 -800017fc: 00f9fc63 bgeu s3,a5,80001814 <_fwalk+0x68> -80001800: 00e41783 lh a5,14(s0) -80001804: 00040513 mv a0,s0 -80001808: 01278663 beq a5,s2,80001814 <_fwalk+0x68> -8000180c: 000b00e7 jalr s6 # 80000000 <__BSS_END__+0xffffb668> -80001810: 00aa6a33 or s4,s4,a0 -80001814: 06840413 addi s0,s0,104 -80001818: fd249ee3 bne s1,s2,800017f4 <_fwalk+0x48> -8000181c: 000aaa83 lw s5,0(s5) -80001820: fc0a92e3 bnez s5,800017e4 <_fwalk+0x38> -80001824: 01c12083 lw ra,28(sp) -80001828: 01812403 lw s0,24(sp) -8000182c: 01412483 lw s1,20(sp) -80001830: 01012903 lw s2,16(sp) -80001834: 00c12983 lw s3,12(sp) -80001838: 00412a83 lw s5,4(sp) -8000183c: 00012b03 lw s6,0(sp) -80001840: 000a0513 mv a0,s4 -80001844: 00812a03 lw s4,8(sp) -80001848: 02010113 addi sp,sp,32 -8000184c: 00008067 ret - -80001850 <_fwalk_reent>: -80001850: fd010113 addi sp,sp,-48 -80001854: 03212023 sw s2,32(sp) -80001858: 01312e23 sw s3,28(sp) -8000185c: 01412c23 sw s4,24(sp) -80001860: 01512a23 sw s5,20(sp) -80001864: 01612823 sw s6,16(sp) -80001868: 01712623 sw s7,12(sp) -8000186c: 02112623 sw ra,44(sp) -80001870: 02812423 sw s0,40(sp) -80001874: 02912223 sw s1,36(sp) -80001878: 00050a93 mv s5,a0 -8000187c: 00058b93 mv s7,a1 -80001880: 2e050b13 addi s6,a0,736 -80001884: 00000a13 li s4,0 -80001888: 00100993 li s3,1 -8000188c: fff00913 li s2,-1 -80001890: 004b2483 lw s1,4(s6) -80001894: 008b2403 lw s0,8(s6) -80001898: fff48493 addi s1,s1,-1 -8000189c: 0204c863 bltz s1,800018cc <_fwalk_reent+0x7c> -800018a0: 00c45783 lhu a5,12(s0) -800018a4: fff48493 addi s1,s1,-1 -800018a8: 00f9fe63 bgeu s3,a5,800018c4 <_fwalk_reent+0x74> -800018ac: 00e41783 lh a5,14(s0) -800018b0: 00040593 mv a1,s0 -800018b4: 000a8513 mv a0,s5 -800018b8: 01278663 beq a5,s2,800018c4 <_fwalk_reent+0x74> -800018bc: 000b80e7 jalr s7 -800018c0: 00aa6a33 or s4,s4,a0 -800018c4: 06840413 addi s0,s0,104 -800018c8: fd249ce3 bne s1,s2,800018a0 <_fwalk_reent+0x50> -800018cc: 000b2b03 lw s6,0(s6) -800018d0: fc0b10e3 bnez s6,80001890 <_fwalk_reent+0x40> -800018d4: 02c12083 lw ra,44(sp) -800018d8: 02812403 lw s0,40(sp) -800018dc: 02412483 lw s1,36(sp) -800018e0: 02012903 lw s2,32(sp) -800018e4: 01c12983 lw s3,28(sp) -800018e8: 01412a83 lw s5,20(sp) -800018ec: 01012b03 lw s6,16(sp) -800018f0: 00c12b83 lw s7,12(sp) -800018f4: 000a0513 mv a0,s4 -800018f8: 01812a03 lw s4,24(sp) -800018fc: 03010113 addi sp,sp,48 -80001900: 00008067 ret - -80001904 <_malloc_r>: -80001904: fd010113 addi sp,sp,-48 -80001908: 01312e23 sw s3,28(sp) -8000190c: 02112623 sw ra,44(sp) -80001910: 02812423 sw s0,40(sp) -80001914: 02912223 sw s1,36(sp) -80001918: 03212023 sw s2,32(sp) -8000191c: 01412c23 sw s4,24(sp) -80001920: 01512a23 sw s5,20(sp) -80001924: 01612823 sw s6,16(sp) -80001928: 01712623 sw s7,12(sp) -8000192c: 01812423 sw s8,8(sp) -80001930: 01912223 sw s9,4(sp) -80001934: 00b58793 addi a5,a1,11 -80001938: 01600713 li a4,22 -8000193c: 00050993 mv s3,a0 -80001940: 06f76463 bltu a4,a5,800019a8 <_malloc_r+0xa4> -80001944: 01000793 li a5,16 -80001948: 1eb7e263 bltu a5,a1,80001b2c <_malloc_r+0x228> -8000194c: 261000ef jal ra,800023ac <__malloc_lock> -80001950: 01000493 li s1,16 -80001954: 00200613 li a2,2 -80001958: 01800793 li a5,24 -8000195c: cc018913 addi s2,gp,-832 # 800044c8 <__malloc_av_> -80001960: 00f907b3 add a5,s2,a5 -80001964: 0047a403 lw s0,4(a5) -80001968: ff878713 addi a4,a5,-8 -8000196c: 20e40863 beq s0,a4,80001b7c <_malloc_r+0x278> -80001970: 00442783 lw a5,4(s0) -80001974: 00c42683 lw a3,12(s0) -80001978: 00842603 lw a2,8(s0) -8000197c: ffc7f793 andi a5,a5,-4 -80001980: 00f407b3 add a5,s0,a5 -80001984: 0047a703 lw a4,4(a5) -80001988: 00d62623 sw a3,12(a2) -8000198c: 00c6a423 sw a2,8(a3) -80001990: 00176713 ori a4,a4,1 -80001994: 00098513 mv a0,s3 -80001998: 00e7a223 sw a4,4(a5) -8000199c: 215000ef jal ra,800023b0 <__malloc_unlock> -800019a0: 00840513 addi a0,s0,8 -800019a4: 1940006f j 80001b38 <_malloc_r+0x234> -800019a8: ff87f493 andi s1,a5,-8 -800019ac: 1807c063 bltz a5,80001b2c <_malloc_r+0x228> -800019b0: 16b4ee63 bltu s1,a1,80001b2c <_malloc_r+0x228> -800019b4: 1f9000ef jal ra,800023ac <__malloc_lock> -800019b8: 1f700793 li a5,503 -800019bc: 4497fa63 bgeu a5,s1,80001e10 <_malloc_r+0x50c> -800019c0: 0094d793 srli a5,s1,0x9 -800019c4: 1a078463 beqz a5,80001b6c <_malloc_r+0x268> -800019c8: 00400713 li a4,4 -800019cc: 3cf76063 bltu a4,a5,80001d8c <_malloc_r+0x488> -800019d0: 0064d793 srli a5,s1,0x6 -800019d4: 03978613 addi a2,a5,57 -800019d8: 03878513 addi a0,a5,56 -800019dc: 00361693 slli a3,a2,0x3 -800019e0: cc018913 addi s2,gp,-832 # 800044c8 <__malloc_av_> -800019e4: 00d906b3 add a3,s2,a3 -800019e8: 0046a403 lw s0,4(a3) -800019ec: ff868693 addi a3,a3,-8 -800019f0: 02868663 beq a3,s0,80001a1c <_malloc_r+0x118> -800019f4: 00f00593 li a1,15 -800019f8: 0100006f j 80001a08 <_malloc_r+0x104> -800019fc: 32075263 bgez a4,80001d20 <_malloc_r+0x41c> -80001a00: 00c42403 lw s0,12(s0) -80001a04: 00868c63 beq a3,s0,80001a1c <_malloc_r+0x118> -80001a08: 00442783 lw a5,4(s0) -80001a0c: ffc7f793 andi a5,a5,-4 -80001a10: 40978733 sub a4,a5,s1 -80001a14: fee5d4e3 bge a1,a4,800019fc <_malloc_r+0xf8> -80001a18: 00050613 mv a2,a0 -80001a1c: 01092403 lw s0,16(s2) -80001a20: 00890893 addi a7,s2,8 -80001a24: 17140863 beq s0,a7,80001b94 <_malloc_r+0x290> -80001a28: 00442503 lw a0,4(s0) -80001a2c: 00f00693 li a3,15 -80001a30: ffc57513 andi a0,a0,-4 -80001a34: 409507b3 sub a5,a0,s1 -80001a38: 40f6c263 blt a3,a5,80001e3c <_malloc_r+0x538> -80001a3c: 01192a23 sw a7,20(s2) -80001a40: 01192823 sw a7,16(s2) -80001a44: 3c07dc63 bgez a5,80001e1c <_malloc_r+0x518> -80001a48: 1ff00793 li a5,511 -80001a4c: 2ea7e063 bltu a5,a0,80001d2c <_malloc_r+0x428> -80001a50: ff857793 andi a5,a0,-8 -80001a54: 00878793 addi a5,a5,8 -80001a58: 00492583 lw a1,4(s2) -80001a5c: 00f907b3 add a5,s2,a5 -80001a60: 0007a683 lw a3,0(a5) -80001a64: 00555513 srli a0,a0,0x5 -80001a68: 00100713 li a4,1 -80001a6c: 00a71733 sll a4,a4,a0 -80001a70: 00b76733 or a4,a4,a1 -80001a74: ff878593 addi a1,a5,-8 -80001a78: 00b42623 sw a1,12(s0) -80001a7c: 00d42423 sw a3,8(s0) -80001a80: 00e92223 sw a4,4(s2) -80001a84: 0087a023 sw s0,0(a5) -80001a88: 0086a623 sw s0,12(a3) -80001a8c: 40265793 srai a5,a2,0x2 -80001a90: 00100593 li a1,1 -80001a94: 00f595b3 sll a1,a1,a5 -80001a98: 10b76863 bltu a4,a1,80001ba8 <_malloc_r+0x2a4> -80001a9c: 00e5f7b3 and a5,a1,a4 -80001aa0: 02079463 bnez a5,80001ac8 <_malloc_r+0x1c4> -80001aa4: 00159593 slli a1,a1,0x1 -80001aa8: ffc67613 andi a2,a2,-4 -80001aac: 00e5f7b3 and a5,a1,a4 -80001ab0: 00460613 addi a2,a2,4 -80001ab4: 00079a63 bnez a5,80001ac8 <_malloc_r+0x1c4> -80001ab8: 00159593 slli a1,a1,0x1 -80001abc: 00e5f7b3 and a5,a1,a4 -80001ac0: 00460613 addi a2,a2,4 -80001ac4: fe078ae3 beqz a5,80001ab8 <_malloc_r+0x1b4> -80001ac8: 00f00813 li a6,15 -80001acc: 00361313 slli t1,a2,0x3 -80001ad0: 00690333 add t1,s2,t1 -80001ad4: 00030513 mv a0,t1 -80001ad8: 00c52783 lw a5,12(a0) -80001adc: 00060e13 mv t3,a2 -80001ae0: 2cf50863 beq a0,a5,80001db0 <_malloc_r+0x4ac> -80001ae4: 0047a703 lw a4,4(a5) -80001ae8: 00078413 mv s0,a5 -80001aec: 00c7a783 lw a5,12(a5) -80001af0: ffc77713 andi a4,a4,-4 -80001af4: 409706b3 sub a3,a4,s1 -80001af8: 2cd84863 blt a6,a3,80001dc8 <_malloc_r+0x4c4> -80001afc: fe06c2e3 bltz a3,80001ae0 <_malloc_r+0x1dc> -80001b00: 00e40733 add a4,s0,a4 -80001b04: 00472683 lw a3,4(a4) -80001b08: 00842603 lw a2,8(s0) -80001b0c: 00098513 mv a0,s3 -80001b10: 0016e693 ori a3,a3,1 -80001b14: 00d72223 sw a3,4(a4) -80001b18: 00f62623 sw a5,12(a2) -80001b1c: 00c7a423 sw a2,8(a5) -80001b20: 091000ef jal ra,800023b0 <__malloc_unlock> -80001b24: 00840513 addi a0,s0,8 -80001b28: 0100006f j 80001b38 <_malloc_r+0x234> -80001b2c: 00c00793 li a5,12 -80001b30: 00f9a023 sw a5,0(s3) -80001b34: 00000513 li a0,0 -80001b38: 02c12083 lw ra,44(sp) -80001b3c: 02812403 lw s0,40(sp) -80001b40: 02412483 lw s1,36(sp) -80001b44: 02012903 lw s2,32(sp) -80001b48: 01c12983 lw s3,28(sp) -80001b4c: 01812a03 lw s4,24(sp) -80001b50: 01412a83 lw s5,20(sp) -80001b54: 01012b03 lw s6,16(sp) -80001b58: 00c12b83 lw s7,12(sp) -80001b5c: 00812c03 lw s8,8(sp) -80001b60: 00412c83 lw s9,4(sp) -80001b64: 03010113 addi sp,sp,48 -80001b68: 00008067 ret -80001b6c: 20000693 li a3,512 -80001b70: 04000613 li a2,64 -80001b74: 03f00513 li a0,63 -80001b78: e69ff06f j 800019e0 <_malloc_r+0xdc> -80001b7c: 00c7a403 lw s0,12(a5) -80001b80: 00260613 addi a2,a2,2 -80001b84: de8796e3 bne a5,s0,80001970 <_malloc_r+0x6c> -80001b88: 01092403 lw s0,16(s2) -80001b8c: 00890893 addi a7,s2,8 -80001b90: e9141ce3 bne s0,a7,80001a28 <_malloc_r+0x124> -80001b94: 00492703 lw a4,4(s2) -80001b98: 40265793 srai a5,a2,0x2 -80001b9c: 00100593 li a1,1 -80001ba0: 00f595b3 sll a1,a1,a5 -80001ba4: eeb77ce3 bgeu a4,a1,80001a9c <_malloc_r+0x198> -80001ba8: 00892403 lw s0,8(s2) -80001bac: 00442a83 lw s5,4(s0) -80001bb0: ffcafb13 andi s6,s5,-4 -80001bb4: 009b6863 bltu s6,s1,80001bc4 <_malloc_r+0x2c0> -80001bb8: 409b07b3 sub a5,s6,s1 -80001bbc: 00f00713 li a4,15 -80001bc0: 12f74c63 blt a4,a5,80001cf8 <_malloc_r+0x3f4> -80001bc4: 0e01aa83 lw s5,224(gp) # 800048e8 <__malloc_top_pad> -80001bc8: 0d01a703 lw a4,208(gp) # 800048d8 <__malloc_sbrk_base> -80001bcc: fff00793 li a5,-1 -80001bd0: 01640a33 add s4,s0,s6 -80001bd4: 01548ab3 add s5,s1,s5 -80001bd8: 34f70463 beq a4,a5,80001f20 <_malloc_r+0x61c> -80001bdc: 000017b7 lui a5,0x1 -80001be0: 00f78793 addi a5,a5,15 # 100f <_start-0x7fffeff1> -80001be4: 00fa8ab3 add s5,s5,a5 -80001be8: fffff7b7 lui a5,0xfffff -80001bec: 00fafab3 and s5,s5,a5 -80001bf0: 000a8593 mv a1,s5 -80001bf4: 00098513 mv a0,s3 -80001bf8: 531000ef jal ra,80002928 <_sbrk_r> -80001bfc: fff00793 li a5,-1 -80001c00: 00050b93 mv s7,a0 -80001c04: 28f50663 beq a0,a5,80001e90 <_malloc_r+0x58c> -80001c08: 29456263 bltu a0,s4,80001e8c <_malloc_r+0x588> -80001c0c: 12818c13 addi s8,gp,296 # 80004930 <__malloc_current_mallinfo> -80001c10: 000c2583 lw a1,0(s8) -80001c14: 00ba85b3 add a1,s5,a1 -80001c18: 00bc2023 sw a1,0(s8) -80001c1c: 00058793 mv a5,a1 -80001c20: 38aa0e63 beq s4,a0,80001fbc <_malloc_r+0x6b8> -80001c24: 0d01a683 lw a3,208(gp) # 800048d8 <__malloc_sbrk_base> -80001c28: fff00713 li a4,-1 -80001c2c: 3ae68663 beq a3,a4,80001fd8 <_malloc_r+0x6d4> -80001c30: 414b8a33 sub s4,s7,s4 -80001c34: 00fa07b3 add a5,s4,a5 -80001c38: 00fc2023 sw a5,0(s8) -80001c3c: 007bfc93 andi s9,s7,7 -80001c40: 300c8263 beqz s9,80001f44 <_malloc_r+0x640> -80001c44: 000017b7 lui a5,0x1 -80001c48: 419b8bb3 sub s7,s7,s9 -80001c4c: 00878593 addi a1,a5,8 # 1008 <_start-0x7fffeff8> -80001c50: 008b8b93 addi s7,s7,8 -80001c54: 419585b3 sub a1,a1,s9 -80001c58: 015b8ab3 add s5,s7,s5 -80001c5c: fff78793 addi a5,a5,-1 -80001c60: 415585b3 sub a1,a1,s5 -80001c64: 00f5fa33 and s4,a1,a5 -80001c68: 000a0593 mv a1,s4 -80001c6c: 00098513 mv a0,s3 -80001c70: 4b9000ef jal ra,80002928 <_sbrk_r> -80001c74: fff00793 li a5,-1 -80001c78: 3af50a63 beq a0,a5,8000202c <_malloc_r+0x728> -80001c7c: 41750533 sub a0,a0,s7 -80001c80: 01450ab3 add s5,a0,s4 -80001c84: 000c2583 lw a1,0(s8) -80001c88: 01792423 sw s7,8(s2) -80001c8c: 001aea93 ori s5,s5,1 -80001c90: 00ba05b3 add a1,s4,a1 -80001c94: 00bc2023 sw a1,0(s8) -80001c98: 015ba223 sw s5,4(s7) -80001c9c: 35240263 beq s0,s2,80001fe0 <_malloc_r+0x6dc> -80001ca0: 00f00693 li a3,15 -80001ca4: 3566f263 bgeu a3,s6,80001fe8 <_malloc_r+0x6e4> -80001ca8: 00442703 lw a4,4(s0) -80001cac: ff4b0793 addi a5,s6,-12 -80001cb0: ff87f793 andi a5,a5,-8 -80001cb4: 00177713 andi a4,a4,1 -80001cb8: 00f76733 or a4,a4,a5 -80001cbc: 00e42223 sw a4,4(s0) -80001cc0: 00500613 li a2,5 -80001cc4: 00f40733 add a4,s0,a5 -80001cc8: 00c72223 sw a2,4(a4) -80001ccc: 00c72423 sw a2,8(a4) -80001cd0: 36f6e863 bltu a3,a5,80002040 <_malloc_r+0x73c> -80001cd4: 004baa83 lw s5,4(s7) -80001cd8: 000b8413 mv s0,s7 -80001cdc: 0dc1a703 lw a4,220(gp) # 800048e4 <__malloc_max_sbrked_mem> -80001ce0: 00b77463 bgeu a4,a1,80001ce8 <_malloc_r+0x3e4> -80001ce4: 0cb1ae23 sw a1,220(gp) # 800048e4 <__malloc_max_sbrked_mem> -80001ce8: 0d81a703 lw a4,216(gp) # 800048e0 <__malloc_max_total_mem> -80001cec: 1ab77663 bgeu a4,a1,80001e98 <_malloc_r+0x594> -80001cf0: 0cb1ac23 sw a1,216(gp) # 800048e0 <__malloc_max_total_mem> -80001cf4: 1a40006f j 80001e98 <_malloc_r+0x594> -80001cf8: 0014e713 ori a4,s1,1 -80001cfc: 00e42223 sw a4,4(s0) -80001d00: 009404b3 add s1,s0,s1 -80001d04: 00992423 sw s1,8(s2) -80001d08: 0017e793 ori a5,a5,1 -80001d0c: 00098513 mv a0,s3 -80001d10: 00f4a223 sw a5,4(s1) -80001d14: 69c000ef jal ra,800023b0 <__malloc_unlock> -80001d18: 00840513 addi a0,s0,8 -80001d1c: e1dff06f j 80001b38 <_malloc_r+0x234> -80001d20: 00c42683 lw a3,12(s0) -80001d24: 00842603 lw a2,8(s0) -80001d28: c59ff06f j 80001980 <_malloc_r+0x7c> -80001d2c: 00955793 srli a5,a0,0x9 -80001d30: 00400713 li a4,4 -80001d34: 14f77263 bgeu a4,a5,80001e78 <_malloc_r+0x574> -80001d38: 01400713 li a4,20 -80001d3c: 22f76a63 bltu a4,a5,80001f70 <_malloc_r+0x66c> -80001d40: 05c78693 addi a3,a5,92 -80001d44: 05b78593 addi a1,a5,91 -80001d48: 00369693 slli a3,a3,0x3 -80001d4c: 00d906b3 add a3,s2,a3 -80001d50: 0006a783 lw a5,0(a3) -80001d54: ff868693 addi a3,a3,-8 -80001d58: 1cf68863 beq a3,a5,80001f28 <_malloc_r+0x624> -80001d5c: 0047a703 lw a4,4(a5) -80001d60: ffc77713 andi a4,a4,-4 -80001d64: 00e57663 bgeu a0,a4,80001d70 <_malloc_r+0x46c> -80001d68: 0087a783 lw a5,8(a5) -80001d6c: fef698e3 bne a3,a5,80001d5c <_malloc_r+0x458> -80001d70: 00c7a683 lw a3,12(a5) -80001d74: 00492703 lw a4,4(s2) -80001d78: 00d42623 sw a3,12(s0) -80001d7c: 00f42423 sw a5,8(s0) -80001d80: 0086a423 sw s0,8(a3) -80001d84: 0087a623 sw s0,12(a5) -80001d88: d05ff06f j 80001a8c <_malloc_r+0x188> -80001d8c: 01400713 li a4,20 -80001d90: 12f77663 bgeu a4,a5,80001ebc <_malloc_r+0x5b8> -80001d94: 05400713 li a4,84 -80001d98: 1ef76a63 bltu a4,a5,80001f8c <_malloc_r+0x688> -80001d9c: 00c4d793 srli a5,s1,0xc -80001da0: 06f78613 addi a2,a5,111 -80001da4: 06e78513 addi a0,a5,110 -80001da8: 00361693 slli a3,a2,0x3 -80001dac: c35ff06f j 800019e0 <_malloc_r+0xdc> -80001db0: 001e0e13 addi t3,t3,1 -80001db4: 003e7793 andi a5,t3,3 -80001db8: 00850513 addi a0,a0,8 -80001dbc: 10078e63 beqz a5,80001ed8 <_malloc_r+0x5d4> -80001dc0: 00c52783 lw a5,12(a0) -80001dc4: d1dff06f j 80001ae0 <_malloc_r+0x1dc> -80001dc8: 00842603 lw a2,8(s0) -80001dcc: 0014e593 ori a1,s1,1 -80001dd0: 00b42223 sw a1,4(s0) -80001dd4: 00f62623 sw a5,12(a2) -80001dd8: 00c7a423 sw a2,8(a5) -80001ddc: 009404b3 add s1,s0,s1 -80001de0: 00992a23 sw s1,20(s2) -80001de4: 00992823 sw s1,16(s2) -80001de8: 0016e793 ori a5,a3,1 -80001dec: 0114a623 sw a7,12(s1) -80001df0: 0114a423 sw a7,8(s1) -80001df4: 00f4a223 sw a5,4(s1) -80001df8: 00e40733 add a4,s0,a4 -80001dfc: 00098513 mv a0,s3 -80001e00: 00d72023 sw a3,0(a4) -80001e04: 5ac000ef jal ra,800023b0 <__malloc_unlock> -80001e08: 00840513 addi a0,s0,8 -80001e0c: d2dff06f j 80001b38 <_malloc_r+0x234> -80001e10: 0034d613 srli a2,s1,0x3 -80001e14: 00848793 addi a5,s1,8 -80001e18: b45ff06f j 8000195c <_malloc_r+0x58> -80001e1c: 00a40733 add a4,s0,a0 -80001e20: 00472783 lw a5,4(a4) -80001e24: 00098513 mv a0,s3 -80001e28: 0017e793 ori a5,a5,1 -80001e2c: 00f72223 sw a5,4(a4) -80001e30: 580000ef jal ra,800023b0 <__malloc_unlock> -80001e34: 00840513 addi a0,s0,8 -80001e38: d01ff06f j 80001b38 <_malloc_r+0x234> -80001e3c: 0014e713 ori a4,s1,1 -80001e40: 00e42223 sw a4,4(s0) -80001e44: 009404b3 add s1,s0,s1 -80001e48: 00992a23 sw s1,20(s2) -80001e4c: 00992823 sw s1,16(s2) -80001e50: 0017e713 ori a4,a5,1 -80001e54: 0114a623 sw a7,12(s1) -80001e58: 0114a423 sw a7,8(s1) -80001e5c: 00e4a223 sw a4,4(s1) -80001e60: 00a40533 add a0,s0,a0 -80001e64: 00f52023 sw a5,0(a0) -80001e68: 00098513 mv a0,s3 -80001e6c: 544000ef jal ra,800023b0 <__malloc_unlock> -80001e70: 00840513 addi a0,s0,8 -80001e74: cc5ff06f j 80001b38 <_malloc_r+0x234> -80001e78: 00655793 srli a5,a0,0x6 -80001e7c: 03978693 addi a3,a5,57 -80001e80: 03878593 addi a1,a5,56 -80001e84: 00369693 slli a3,a3,0x3 -80001e88: ec5ff06f j 80001d4c <_malloc_r+0x448> -80001e8c: 11240e63 beq s0,s2,80001fa8 <_malloc_r+0x6a4> -80001e90: 00892403 lw s0,8(s2) -80001e94: 00442a83 lw s5,4(s0) -80001e98: ffcafa93 andi s5,s5,-4 -80001e9c: 409a87b3 sub a5,s5,s1 -80001ea0: 009ae663 bltu s5,s1,80001eac <_malloc_r+0x5a8> -80001ea4: 00f00713 li a4,15 -80001ea8: e4f748e3 blt a4,a5,80001cf8 <_malloc_r+0x3f4> -80001eac: 00098513 mv a0,s3 -80001eb0: 500000ef jal ra,800023b0 <__malloc_unlock> -80001eb4: 00000513 li a0,0 -80001eb8: c81ff06f j 80001b38 <_malloc_r+0x234> -80001ebc: 05c78613 addi a2,a5,92 -80001ec0: 05b78513 addi a0,a5,91 -80001ec4: 00361693 slli a3,a2,0x3 -80001ec8: b19ff06f j 800019e0 <_malloc_r+0xdc> -80001ecc: 00832783 lw a5,8(t1) -80001ed0: fff60613 addi a2,a2,-1 -80001ed4: 1c679063 bne a5,t1,80002094 <_malloc_r+0x790> -80001ed8: 00367793 andi a5,a2,3 -80001edc: ff830313 addi t1,t1,-8 -80001ee0: fe0796e3 bnez a5,80001ecc <_malloc_r+0x5c8> -80001ee4: 00492703 lw a4,4(s2) -80001ee8: fff5c793 not a5,a1 -80001eec: 00e7f7b3 and a5,a5,a4 -80001ef0: 00f92223 sw a5,4(s2) -80001ef4: 00159593 slli a1,a1,0x1 -80001ef8: cab7e8e3 bltu a5,a1,80001ba8 <_malloc_r+0x2a4> -80001efc: ca0586e3 beqz a1,80001ba8 <_malloc_r+0x2a4> -80001f00: 00f5f733 and a4,a1,a5 -80001f04: 00071a63 bnez a4,80001f18 <_malloc_r+0x614> -80001f08: 00159593 slli a1,a1,0x1 -80001f0c: 00f5f733 and a4,a1,a5 -80001f10: 004e0e13 addi t3,t3,4 -80001f14: fe070ae3 beqz a4,80001f08 <_malloc_r+0x604> -80001f18: 000e0613 mv a2,t3 -80001f1c: bb1ff06f j 80001acc <_malloc_r+0x1c8> -80001f20: 010a8a93 addi s5,s5,16 -80001f24: ccdff06f j 80001bf0 <_malloc_r+0x2ec> -80001f28: 00492503 lw a0,4(s2) -80001f2c: 4025d593 srai a1,a1,0x2 -80001f30: 00100713 li a4,1 -80001f34: 00b71733 sll a4,a4,a1 -80001f38: 00a76733 or a4,a4,a0 -80001f3c: 00e92223 sw a4,4(s2) -80001f40: e39ff06f j 80001d78 <_malloc_r+0x474> -80001f44: 015b85b3 add a1,s7,s5 -80001f48: 40b005b3 neg a1,a1 -80001f4c: 01459593 slli a1,a1,0x14 -80001f50: 0145da13 srli s4,a1,0x14 -80001f54: 000a0593 mv a1,s4 -80001f58: 00098513 mv a0,s3 -80001f5c: 1cd000ef jal ra,80002928 <_sbrk_r> -80001f60: fff00793 li a5,-1 -80001f64: d0f51ce3 bne a0,a5,80001c7c <_malloc_r+0x378> -80001f68: 00000a13 li s4,0 -80001f6c: d19ff06f j 80001c84 <_malloc_r+0x380> -80001f70: 05400713 li a4,84 -80001f74: 08f76063 bltu a4,a5,80001ff4 <_malloc_r+0x6f0> -80001f78: 00c55793 srli a5,a0,0xc -80001f7c: 06f78693 addi a3,a5,111 -80001f80: 06e78593 addi a1,a5,110 -80001f84: 00369693 slli a3,a3,0x3 -80001f88: dc5ff06f j 80001d4c <_malloc_r+0x448> -80001f8c: 15400713 li a4,340 -80001f90: 08f76063 bltu a4,a5,80002010 <_malloc_r+0x70c> -80001f94: 00f4d793 srli a5,s1,0xf -80001f98: 07878613 addi a2,a5,120 -80001f9c: 07778513 addi a0,a5,119 -80001fa0: 00361693 slli a3,a2,0x3 -80001fa4: a3dff06f j 800019e0 <_malloc_r+0xdc> -80001fa8: 12818c13 addi s8,gp,296 # 80004930 <__malloc_current_mallinfo> -80001fac: 000c2783 lw a5,0(s8) -80001fb0: 00fa87b3 add a5,s5,a5 -80001fb4: 00fc2023 sw a5,0(s8) -80001fb8: c6dff06f j 80001c24 <_malloc_r+0x320> -80001fbc: 014a1713 slli a4,s4,0x14 -80001fc0: c60712e3 bnez a4,80001c24 <_malloc_r+0x320> -80001fc4: 00892403 lw s0,8(s2) -80001fc8: 015b0ab3 add s5,s6,s5 -80001fcc: 001aea93 ori s5,s5,1 -80001fd0: 01542223 sw s5,4(s0) -80001fd4: d09ff06f j 80001cdc <_malloc_r+0x3d8> -80001fd8: 0d71a823 sw s7,208(gp) # 800048d8 <__malloc_sbrk_base> -80001fdc: c61ff06f j 80001c3c <_malloc_r+0x338> -80001fe0: 000b8413 mv s0,s7 -80001fe4: cf9ff06f j 80001cdc <_malloc_r+0x3d8> -80001fe8: 00100793 li a5,1 -80001fec: 00fba223 sw a5,4(s7) -80001ff0: ebdff06f j 80001eac <_malloc_r+0x5a8> -80001ff4: 15400713 li a4,340 -80001ff8: 06f76263 bltu a4,a5,8000205c <_malloc_r+0x758> -80001ffc: 00f55793 srli a5,a0,0xf -80002000: 07878693 addi a3,a5,120 -80002004: 07778593 addi a1,a5,119 -80002008: 00369693 slli a3,a3,0x3 -8000200c: d41ff06f j 80001d4c <_malloc_r+0x448> -80002010: 55400713 li a4,1364 -80002014: 06f76263 bltu a4,a5,80002078 <_malloc_r+0x774> -80002018: 0124d793 srli a5,s1,0x12 -8000201c: 07d78613 addi a2,a5,125 -80002020: 07c78513 addi a0,a5,124 -80002024: 00361693 slli a3,a2,0x3 -80002028: 9b9ff06f j 800019e0 <_malloc_r+0xdc> -8000202c: ff8c8c93 addi s9,s9,-8 -80002030: 019a8ab3 add s5,s5,s9 -80002034: 417a8ab3 sub s5,s5,s7 -80002038: 00000a13 li s4,0 -8000203c: c49ff06f j 80001c84 <_malloc_r+0x380> -80002040: 00840593 addi a1,s0,8 -80002044: 00098513 mv a0,s3 -80002048: 1e0010ef jal ra,80003228 <_free_r> -8000204c: 00892403 lw s0,8(s2) -80002050: 000c2583 lw a1,0(s8) -80002054: 00442a83 lw s5,4(s0) -80002058: c85ff06f j 80001cdc <_malloc_r+0x3d8> -8000205c: 55400713 li a4,1364 -80002060: 02f76463 bltu a4,a5,80002088 <_malloc_r+0x784> -80002064: 01255793 srli a5,a0,0x12 -80002068: 07d78693 addi a3,a5,125 -8000206c: 07c78593 addi a1,a5,124 -80002070: 00369693 slli a3,a3,0x3 -80002074: cd9ff06f j 80001d4c <_malloc_r+0x448> -80002078: 3f800693 li a3,1016 -8000207c: 07f00613 li a2,127 -80002080: 07e00513 li a0,126 -80002084: 95dff06f j 800019e0 <_malloc_r+0xdc> -80002088: 3f800693 li a3,1016 -8000208c: 07e00593 li a1,126 -80002090: cbdff06f j 80001d4c <_malloc_r+0x448> -80002094: 00492783 lw a5,4(s2) -80002098: e5dff06f j 80001ef4 <_malloc_r+0x5f0> - -8000209c : -8000209c: 00357793 andi a5,a0,3 -800020a0: 0ff5f693 andi a3,a1,255 -800020a4: 02078a63 beqz a5,800020d8 -800020a8: fff60793 addi a5,a2,-1 -800020ac: 02060e63 beqz a2,800020e8 -800020b0: fff00613 li a2,-1 -800020b4: 0180006f j 800020cc -800020b8: 00150513 addi a0,a0,1 -800020bc: 00357713 andi a4,a0,3 -800020c0: 00070e63 beqz a4,800020dc -800020c4: fff78793 addi a5,a5,-1 -800020c8: 02c78063 beq a5,a2,800020e8 -800020cc: 00054703 lbu a4,0(a0) -800020d0: fed714e3 bne a4,a3,800020b8 -800020d4: 00008067 ret -800020d8: 00060793 mv a5,a2 -800020dc: 00300713 li a4,3 -800020e0: 02f76663 bltu a4,a5,8000210c -800020e4: 00079663 bnez a5,800020f0 -800020e8: 00000513 li a0,0 -800020ec: 00008067 ret -800020f0: 00f507b3 add a5,a0,a5 -800020f4: 00c0006f j 80002100 -800020f8: 00150513 addi a0,a0,1 -800020fc: fea786e3 beq a5,a0,800020e8 -80002100: 00054703 lbu a4,0(a0) -80002104: fed71ae3 bne a4,a3,800020f8 -80002108: 00008067 ret -8000210c: 00010737 lui a4,0x10 -80002110: 00859893 slli a7,a1,0x8 -80002114: fff70713 addi a4,a4,-1 # ffff <_start-0x7fff0001> -80002118: 00e8f8b3 and a7,a7,a4 -8000211c: 0ff5f593 andi a1,a1,255 -80002120: 00b8e5b3 or a1,a7,a1 -80002124: 01059893 slli a7,a1,0x10 -80002128: 00b8e8b3 or a7,a7,a1 -8000212c: feff0837 lui a6,0xfeff0 -80002130: 808085b7 lui a1,0x80808 -80002134: eff80813 addi a6,a6,-257 # fefefeff <__BSS_END__+0x7efeb567> -80002138: 08058593 addi a1,a1,128 # 80808080 <__BSS_END__+0x8036e8> -8000213c: 00300313 li t1,3 -80002140: 00052703 lw a4,0(a0) -80002144: 00e8c733 xor a4,a7,a4 -80002148: 01070633 add a2,a4,a6 -8000214c: fff74713 not a4,a4 -80002150: 00e67733 and a4,a2,a4 -80002154: 00b77733 and a4,a4,a1 -80002158: f8071ce3 bnez a4,800020f0 -8000215c: ffc78793 addi a5,a5,-4 -80002160: 00450513 addi a0,a0,4 -80002164: fcf36ee3 bltu t1,a5,80002140 -80002168: f80794e3 bnez a5,800020f0 -8000216c: f7dff06f j 800020e8 - -80002170 : -80002170: 00a5c7b3 xor a5,a1,a0 -80002174: 0037f793 andi a5,a5,3 -80002178: 00c508b3 add a7,a0,a2 -8000217c: 06079263 bnez a5,800021e0 -80002180: 00300793 li a5,3 -80002184: 04c7fe63 bgeu a5,a2,800021e0 -80002188: 00357793 andi a5,a0,3 -8000218c: 00050713 mv a4,a0 -80002190: 06079863 bnez a5,80002200 -80002194: ffc8f613 andi a2,a7,-4 -80002198: fe060793 addi a5,a2,-32 -8000219c: 08f76c63 bltu a4,a5,80002234 -800021a0: 02c77c63 bgeu a4,a2,800021d8 -800021a4: 00058693 mv a3,a1 -800021a8: 00070793 mv a5,a4 -800021ac: 0006a803 lw a6,0(a3) -800021b0: 00478793 addi a5,a5,4 -800021b4: 00468693 addi a3,a3,4 -800021b8: ff07ae23 sw a6,-4(a5) -800021bc: fec7e8e3 bltu a5,a2,800021ac -800021c0: fff60793 addi a5,a2,-1 -800021c4: 40e787b3 sub a5,a5,a4 -800021c8: ffc7f793 andi a5,a5,-4 -800021cc: 00478793 addi a5,a5,4 -800021d0: 00f70733 add a4,a4,a5 -800021d4: 00f585b3 add a1,a1,a5 -800021d8: 01176863 bltu a4,a7,800021e8 -800021dc: 00008067 ret -800021e0: 00050713 mv a4,a0 -800021e4: ff157ce3 bgeu a0,a7,800021dc -800021e8: 0005c783 lbu a5,0(a1) -800021ec: 00170713 addi a4,a4,1 -800021f0: 00158593 addi a1,a1,1 -800021f4: fef70fa3 sb a5,-1(a4) -800021f8: ff1768e3 bltu a4,a7,800021e8 -800021fc: 00008067 ret -80002200: 0005c683 lbu a3,0(a1) -80002204: 00170713 addi a4,a4,1 -80002208: 00377793 andi a5,a4,3 -8000220c: fed70fa3 sb a3,-1(a4) -80002210: 00158593 addi a1,a1,1 -80002214: f80780e3 beqz a5,80002194 -80002218: 0005c683 lbu a3,0(a1) -8000221c: 00170713 addi a4,a4,1 -80002220: 00377793 andi a5,a4,3 -80002224: fed70fa3 sb a3,-1(a4) -80002228: 00158593 addi a1,a1,1 -8000222c: fc079ae3 bnez a5,80002200 -80002230: f65ff06f j 80002194 -80002234: 0045a683 lw a3,4(a1) -80002238: 0005a283 lw t0,0(a1) -8000223c: 0085af83 lw t6,8(a1) -80002240: 00c5af03 lw t5,12(a1) -80002244: 0105ae83 lw t4,16(a1) -80002248: 0145ae03 lw t3,20(a1) -8000224c: 0185a303 lw t1,24(a1) -80002250: 01c5a803 lw a6,28(a1) -80002254: 00d72223 sw a3,4(a4) -80002258: 0205a683 lw a3,32(a1) -8000225c: 00572023 sw t0,0(a4) -80002260: 01f72423 sw t6,8(a4) -80002264: 01e72623 sw t5,12(a4) -80002268: 01d72823 sw t4,16(a4) -8000226c: 01c72a23 sw t3,20(a4) -80002270: 00672c23 sw t1,24(a4) -80002274: 01072e23 sw a6,28(a4) -80002278: 02d72023 sw a3,32(a4) -8000227c: 02470713 addi a4,a4,36 -80002280: 02458593 addi a1,a1,36 -80002284: faf768e3 bltu a4,a5,80002234 -80002288: f19ff06f j 800021a0 - -8000228c : -8000228c: 02a5f663 bgeu a1,a0,800022b8 -80002290: 00c587b3 add a5,a1,a2 -80002294: 02f57263 bgeu a0,a5,800022b8 -80002298: 00c50733 add a4,a0,a2 -8000229c: 0e060a63 beqz a2,80002390 -800022a0: fff7c683 lbu a3,-1(a5) -800022a4: fff78793 addi a5,a5,-1 -800022a8: fff70713 addi a4,a4,-1 -800022ac: 00d70023 sb a3,0(a4) -800022b0: fef598e3 bne a1,a5,800022a0 -800022b4: 00008067 ret -800022b8: 00f00793 li a5,15 -800022bc: 02c7e863 bltu a5,a2,800022ec -800022c0: 00050793 mv a5,a0 -800022c4: fff60693 addi a3,a2,-1 -800022c8: 0c060c63 beqz a2,800023a0 -800022cc: 00168693 addi a3,a3,1 -800022d0: 00d786b3 add a3,a5,a3 -800022d4: 0005c703 lbu a4,0(a1) -800022d8: 00178793 addi a5,a5,1 -800022dc: 00158593 addi a1,a1,1 -800022e0: fee78fa3 sb a4,-1(a5) -800022e4: fed798e3 bne a5,a3,800022d4 -800022e8: 00008067 ret -800022ec: 00a5e7b3 or a5,a1,a0 -800022f0: 0037f793 andi a5,a5,3 -800022f4: 0a079063 bnez a5,80002394 -800022f8: ff060893 addi a7,a2,-16 -800022fc: ff08f893 andi a7,a7,-16 -80002300: 01088893 addi a7,a7,16 -80002304: 01150833 add a6,a0,a7 -80002308: 00058713 mv a4,a1 -8000230c: 00050793 mv a5,a0 -80002310: 00072683 lw a3,0(a4) -80002314: 01070713 addi a4,a4,16 -80002318: 01078793 addi a5,a5,16 -8000231c: fed7a823 sw a3,-16(a5) -80002320: ff472683 lw a3,-12(a4) -80002324: fed7aa23 sw a3,-12(a5) -80002328: ff872683 lw a3,-8(a4) -8000232c: fed7ac23 sw a3,-8(a5) -80002330: ffc72683 lw a3,-4(a4) -80002334: fed7ae23 sw a3,-4(a5) -80002338: fcf81ce3 bne a6,a5,80002310 -8000233c: 00c67713 andi a4,a2,12 -80002340: 011585b3 add a1,a1,a7 -80002344: 00f67813 andi a6,a2,15 -80002348: 04070e63 beqz a4,800023a4 -8000234c: 00058713 mv a4,a1 -80002350: 00078893 mv a7,a5 -80002354: 00300e13 li t3,3 -80002358: 00072303 lw t1,0(a4) -8000235c: 00470713 addi a4,a4,4 -80002360: 40e806b3 sub a3,a6,a4 -80002364: 0068a023 sw t1,0(a7) -80002368: 00d586b3 add a3,a1,a3 -8000236c: 00488893 addi a7,a7,4 -80002370: fede64e3 bltu t3,a3,80002358 -80002374: ffc80713 addi a4,a6,-4 -80002378: ffc77713 andi a4,a4,-4 -8000237c: 00470713 addi a4,a4,4 -80002380: 00367613 andi a2,a2,3 -80002384: 00e787b3 add a5,a5,a4 -80002388: 00e585b3 add a1,a1,a4 -8000238c: f39ff06f j 800022c4 -80002390: 00008067 ret -80002394: fff60693 addi a3,a2,-1 -80002398: 00050793 mv a5,a0 -8000239c: f31ff06f j 800022cc -800023a0: 00008067 ret -800023a4: 00080613 mv a2,a6 -800023a8: f1dff06f j 800022c4 - -800023ac <__malloc_lock>: -800023ac: 00008067 ret - -800023b0 <__malloc_unlock>: -800023b0: 00008067 ret - -800023b4 <_realloc_r>: -800023b4: fd010113 addi sp,sp,-48 -800023b8: 03212023 sw s2,32(sp) -800023bc: 02112623 sw ra,44(sp) -800023c0: 02812423 sw s0,40(sp) -800023c4: 02912223 sw s1,36(sp) -800023c8: 01312e23 sw s3,28(sp) -800023cc: 01412c23 sw s4,24(sp) -800023d0: 01512a23 sw s5,20(sp) -800023d4: 01612823 sw s6,16(sp) -800023d8: 01712623 sw s7,12(sp) -800023dc: 01812423 sw s8,8(sp) -800023e0: 00060913 mv s2,a2 -800023e4: 22058263 beqz a1,80002608 <_realloc_r+0x254> -800023e8: 00058413 mv s0,a1 -800023ec: 00050993 mv s3,a0 -800023f0: fbdff0ef jal ra,800023ac <__malloc_lock> -800023f4: 00b90493 addi s1,s2,11 -800023f8: 01600793 li a5,22 -800023fc: 0e97fc63 bgeu a5,s1,800024f4 <_realloc_r+0x140> -80002400: ff84f493 andi s1,s1,-8 -80002404: 00048713 mv a4,s1 -80002408: 0e04cc63 bltz s1,80002500 <_realloc_r+0x14c> -8000240c: 0f24ea63 bltu s1,s2,80002500 <_realloc_r+0x14c> -80002410: ffc42783 lw a5,-4(s0) -80002414: ff840a93 addi s5,s0,-8 -80002418: ffc7fa13 andi s4,a5,-4 -8000241c: 014a8b33 add s6,s5,s4 -80002420: 18ea5a63 bge s4,a4,800025b4 <_realloc_r+0x200> -80002424: cc018b93 addi s7,gp,-832 # 800044c8 <__malloc_av_> -80002428: 008ba603 lw a2,8(s7) -8000242c: 004b2683 lw a3,4(s6) -80002430: 23660e63 beq a2,s6,8000266c <_realloc_r+0x2b8> -80002434: ffe6f613 andi a2,a3,-2 -80002438: 00cb0633 add a2,s6,a2 -8000243c: 00462603 lw a2,4(a2) -80002440: 00167613 andi a2,a2,1 -80002444: 1a061463 bnez a2,800025ec <_realloc_r+0x238> -80002448: ffc6f693 andi a3,a3,-4 -8000244c: 00da0633 add a2,s4,a3 -80002450: 32e65e63 bge a2,a4,8000278c <_realloc_r+0x3d8> -80002454: 0017f793 andi a5,a5,1 -80002458: 02079463 bnez a5,80002480 <_realloc_r+0xcc> -8000245c: ff842c03 lw s8,-8(s0) -80002460: 418a8c33 sub s8,s5,s8 -80002464: 004c2783 lw a5,4(s8) -80002468: ffc7f793 andi a5,a5,-4 -8000246c: 00d786b3 add a3,a5,a3 -80002470: 01468bb3 add s7,a3,s4 -80002474: 34ebda63 bge s7,a4,800027c8 <_realloc_r+0x414> -80002478: 00fa0bb3 add s7,s4,a5 -8000247c: 0cebd263 bge s7,a4,80002540 <_realloc_r+0x18c> -80002480: 00090593 mv a1,s2 -80002484: 00098513 mv a0,s3 -80002488: c7cff0ef jal ra,80001904 <_malloc_r> -8000248c: 00050913 mv s2,a0 -80002490: 04050c63 beqz a0,800024e8 <_realloc_r+0x134> -80002494: ffc42783 lw a5,-4(s0) -80002498: ff850713 addi a4,a0,-8 -8000249c: ffe7f793 andi a5,a5,-2 -800024a0: 00fa87b3 add a5,s5,a5 -800024a4: 30e78263 beq a5,a4,800027a8 <_realloc_r+0x3f4> -800024a8: ffca0613 addi a2,s4,-4 -800024ac: 02400793 li a5,36 -800024b0: 30c7e663 bltu a5,a2,800027bc <_realloc_r+0x408> -800024b4: 01300713 li a4,19 -800024b8: 00042683 lw a3,0(s0) -800024bc: 26c76c63 bltu a4,a2,80002734 <_realloc_r+0x380> -800024c0: 00050793 mv a5,a0 -800024c4: 00040713 mv a4,s0 -800024c8: 00d7a023 sw a3,0(a5) -800024cc: 00472683 lw a3,4(a4) -800024d0: 00d7a223 sw a3,4(a5) -800024d4: 00872703 lw a4,8(a4) -800024d8: 00e7a423 sw a4,8(a5) -800024dc: 00040593 mv a1,s0 -800024e0: 00098513 mv a0,s3 -800024e4: 545000ef jal ra,80003228 <_free_r> -800024e8: 00098513 mv a0,s3 -800024ec: ec5ff0ef jal ra,800023b0 <__malloc_unlock> -800024f0: 01c0006f j 8000250c <_realloc_r+0x158> -800024f4: 01000493 li s1,16 -800024f8: 01000713 li a4,16 -800024fc: f124fae3 bgeu s1,s2,80002410 <_realloc_r+0x5c> -80002500: 00c00793 li a5,12 -80002504: 00f9a023 sw a5,0(s3) -80002508: 00000913 li s2,0 -8000250c: 02c12083 lw ra,44(sp) -80002510: 02812403 lw s0,40(sp) -80002514: 02412483 lw s1,36(sp) -80002518: 01c12983 lw s3,28(sp) -8000251c: 01812a03 lw s4,24(sp) -80002520: 01412a83 lw s5,20(sp) -80002524: 01012b03 lw s6,16(sp) -80002528: 00c12b83 lw s7,12(sp) -8000252c: 00812c03 lw s8,8(sp) -80002530: 00090513 mv a0,s2 -80002534: 02012903 lw s2,32(sp) -80002538: 03010113 addi sp,sp,48 -8000253c: 00008067 ret -80002540: 00cc2783 lw a5,12(s8) -80002544: 008c2703 lw a4,8(s8) -80002548: ffca0613 addi a2,s4,-4 -8000254c: 02400693 li a3,36 -80002550: 00f72623 sw a5,12(a4) -80002554: 00e7a423 sw a4,8(a5) -80002558: 008c0913 addi s2,s8,8 -8000255c: 017c0b33 add s6,s8,s7 -80002560: 2ec6e463 bltu a3,a2,80002848 <_realloc_r+0x494> -80002564: 01300593 li a1,19 -80002568: 00042703 lw a4,0(s0) -8000256c: 00090793 mv a5,s2 -80002570: 02c5f263 bgeu a1,a2,80002594 <_realloc_r+0x1e0> -80002574: 00ec2423 sw a4,8(s8) -80002578: 00442703 lw a4,4(s0) -8000257c: 01b00793 li a5,27 -80002580: 00ec2623 sw a4,12(s8) -80002584: 30c7e263 bltu a5,a2,80002888 <_realloc_r+0x4d4> -80002588: 00842703 lw a4,8(s0) -8000258c: 010c0793 addi a5,s8,16 -80002590: 00840413 addi s0,s0,8 -80002594: 00e7a023 sw a4,0(a5) -80002598: 00442703 lw a4,4(s0) -8000259c: 000b8a13 mv s4,s7 -800025a0: 000c0a93 mv s5,s8 -800025a4: 00e7a223 sw a4,4(a5) -800025a8: 00842703 lw a4,8(s0) -800025ac: 00090413 mv s0,s2 -800025b0: 00e7a423 sw a4,8(a5) -800025b4: 004aa783 lw a5,4(s5) -800025b8: 409a0733 sub a4,s4,s1 -800025bc: 00f00693 li a3,15 -800025c0: 0017f793 andi a5,a5,1 -800025c4: 06e6ec63 bltu a3,a4,8000263c <_realloc_r+0x288> -800025c8: 00fa67b3 or a5,s4,a5 -800025cc: 00faa223 sw a5,4(s5) -800025d0: 004b2783 lw a5,4(s6) -800025d4: 0017e793 ori a5,a5,1 -800025d8: 00fb2223 sw a5,4(s6) -800025dc: 00098513 mv a0,s3 -800025e0: dd1ff0ef jal ra,800023b0 <__malloc_unlock> -800025e4: 00040913 mv s2,s0 -800025e8: f25ff06f j 8000250c <_realloc_r+0x158> -800025ec: 0017f793 andi a5,a5,1 -800025f0: e80798e3 bnez a5,80002480 <_realloc_r+0xcc> -800025f4: ff842c03 lw s8,-8(s0) -800025f8: 418a8c33 sub s8,s5,s8 -800025fc: 004c2783 lw a5,4(s8) -80002600: ffc7f793 andi a5,a5,-4 -80002604: e75ff06f j 80002478 <_realloc_r+0xc4> -80002608: 02812403 lw s0,40(sp) -8000260c: 02c12083 lw ra,44(sp) -80002610: 02412483 lw s1,36(sp) -80002614: 02012903 lw s2,32(sp) -80002618: 01c12983 lw s3,28(sp) -8000261c: 01812a03 lw s4,24(sp) -80002620: 01412a83 lw s5,20(sp) -80002624: 01012b03 lw s6,16(sp) -80002628: 00c12b83 lw s7,12(sp) -8000262c: 00812c03 lw s8,8(sp) -80002630: 00060593 mv a1,a2 -80002634: 03010113 addi sp,sp,48 -80002638: accff06f j 80001904 <_malloc_r> -8000263c: 0097e7b3 or a5,a5,s1 -80002640: 00faa223 sw a5,4(s5) -80002644: 009a85b3 add a1,s5,s1 -80002648: 00176713 ori a4,a4,1 -8000264c: 00e5a223 sw a4,4(a1) -80002650: 004b2783 lw a5,4(s6) -80002654: 00858593 addi a1,a1,8 -80002658: 00098513 mv a0,s3 -8000265c: 0017e793 ori a5,a5,1 -80002660: 00fb2223 sw a5,4(s6) -80002664: 3c5000ef jal ra,80003228 <_free_r> -80002668: f75ff06f j 800025dc <_realloc_r+0x228> -8000266c: ffc6f693 andi a3,a3,-4 -80002670: 00da0633 add a2,s4,a3 -80002674: 01048593 addi a1,s1,16 -80002678: 0eb65063 bge a2,a1,80002758 <_realloc_r+0x3a4> -8000267c: 0017f793 andi a5,a5,1 -80002680: e00790e3 bnez a5,80002480 <_realloc_r+0xcc> -80002684: ff842c03 lw s8,-8(s0) -80002688: 418a8c33 sub s8,s5,s8 -8000268c: 004c2783 lw a5,4(s8) -80002690: ffc7f793 andi a5,a5,-4 -80002694: 00d786b3 add a3,a5,a3 -80002698: 01468b33 add s6,a3,s4 -8000269c: dcbb4ee3 blt s6,a1,80002478 <_realloc_r+0xc4> -800026a0: 00cc2783 lw a5,12(s8) -800026a4: 008c2703 lw a4,8(s8) -800026a8: ffca0613 addi a2,s4,-4 -800026ac: 02400693 li a3,36 -800026b0: 00f72623 sw a5,12(a4) -800026b4: 00e7a423 sw a4,8(a5) -800026b8: 008c0913 addi s2,s8,8 -800026bc: 20c6ee63 bltu a3,a2,800028d8 <_realloc_r+0x524> -800026c0: 01300593 li a1,19 -800026c4: 00042703 lw a4,0(s0) -800026c8: 00090793 mv a5,s2 -800026cc: 02c5f263 bgeu a1,a2,800026f0 <_realloc_r+0x33c> -800026d0: 00ec2423 sw a4,8(s8) -800026d4: 00442703 lw a4,4(s0) -800026d8: 01b00793 li a5,27 -800026dc: 00ec2623 sw a4,12(s8) -800026e0: 20c7e463 bltu a5,a2,800028e8 <_realloc_r+0x534> -800026e4: 00842703 lw a4,8(s0) -800026e8: 010c0793 addi a5,s8,16 -800026ec: 00840413 addi s0,s0,8 -800026f0: 00e7a023 sw a4,0(a5) -800026f4: 00442703 lw a4,4(s0) -800026f8: 00e7a223 sw a4,4(a5) -800026fc: 00842703 lw a4,8(s0) -80002700: 00e7a423 sw a4,8(a5) -80002704: 009c0733 add a4,s8,s1 -80002708: 409b07b3 sub a5,s6,s1 -8000270c: 00eba423 sw a4,8(s7) -80002710: 0017e793 ori a5,a5,1 -80002714: 00f72223 sw a5,4(a4) -80002718: 004c2783 lw a5,4(s8) -8000271c: 00098513 mv a0,s3 -80002720: 0017f793 andi a5,a5,1 -80002724: 0097e4b3 or s1,a5,s1 -80002728: 009c2223 sw s1,4(s8) -8000272c: c85ff0ef jal ra,800023b0 <__malloc_unlock> -80002730: dddff06f j 8000250c <_realloc_r+0x158> -80002734: 00d52023 sw a3,0(a0) -80002738: 00442683 lw a3,4(s0) -8000273c: 01b00713 li a4,27 -80002740: 00d52223 sw a3,4(a0) -80002744: 12c76063 bltu a4,a2,80002864 <_realloc_r+0x4b0> -80002748: 00842683 lw a3,8(s0) -8000274c: 00840713 addi a4,s0,8 -80002750: 00850793 addi a5,a0,8 -80002754: d75ff06f j 800024c8 <_realloc_r+0x114> -80002758: 009a8ab3 add s5,s5,s1 -8000275c: 409607b3 sub a5,a2,s1 -80002760: 015ba423 sw s5,8(s7) -80002764: 0017e793 ori a5,a5,1 -80002768: 00faa223 sw a5,4(s5) -8000276c: ffc42783 lw a5,-4(s0) -80002770: 00098513 mv a0,s3 -80002774: 00040913 mv s2,s0 -80002778: 0017f793 andi a5,a5,1 -8000277c: 0097e4b3 or s1,a5,s1 -80002780: fe942e23 sw s1,-4(s0) -80002784: c2dff0ef jal ra,800023b0 <__malloc_unlock> -80002788: d85ff06f j 8000250c <_realloc_r+0x158> -8000278c: 00cb2783 lw a5,12(s6) -80002790: 008b2703 lw a4,8(s6) -80002794: 00060a13 mv s4,a2 -80002798: 00ca8b33 add s6,s5,a2 -8000279c: 00f72623 sw a5,12(a4) -800027a0: 00e7a423 sw a4,8(a5) -800027a4: e11ff06f j 800025b4 <_realloc_r+0x200> -800027a8: ffc52783 lw a5,-4(a0) -800027ac: ffc7f793 andi a5,a5,-4 -800027b0: 00fa0a33 add s4,s4,a5 -800027b4: 014a8b33 add s6,s5,s4 -800027b8: dfdff06f j 800025b4 <_realloc_r+0x200> -800027bc: 00040593 mv a1,s0 -800027c0: acdff0ef jal ra,8000228c -800027c4: d19ff06f j 800024dc <_realloc_r+0x128> -800027c8: 00cb2783 lw a5,12(s6) -800027cc: 008b2703 lw a4,8(s6) -800027d0: ffca0613 addi a2,s4,-4 -800027d4: 02400693 li a3,36 -800027d8: 00f72623 sw a5,12(a4) -800027dc: 00e7a423 sw a4,8(a5) -800027e0: 008c2703 lw a4,8(s8) -800027e4: 00cc2783 lw a5,12(s8) -800027e8: 008c0913 addi s2,s8,8 -800027ec: 017c0b33 add s6,s8,s7 -800027f0: 00f72623 sw a5,12(a4) -800027f4: 00e7a423 sw a4,8(a5) -800027f8: 04c6e863 bltu a3,a2,80002848 <_realloc_r+0x494> -800027fc: 01300693 li a3,19 -80002800: 00042703 lw a4,0(s0) -80002804: 00090793 mv a5,s2 -80002808: d8c6f6e3 bgeu a3,a2,80002594 <_realloc_r+0x1e0> -8000280c: 00ec2423 sw a4,8(s8) -80002810: 00442703 lw a4,4(s0) -80002814: 01b00793 li a5,27 -80002818: 00ec2623 sw a4,12(s8) -8000281c: 00842703 lw a4,8(s0) -80002820: d6c7f6e3 bgeu a5,a2,8000258c <_realloc_r+0x1d8> -80002824: 00ec2823 sw a4,16(s8) -80002828: 00c42703 lw a4,12(s0) -8000282c: 02400793 li a5,36 -80002830: 00ec2a23 sw a4,20(s8) -80002834: 01042703 lw a4,16(s0) -80002838: 06f60463 beq a2,a5,800028a0 <_realloc_r+0x4ec> -8000283c: 018c0793 addi a5,s8,24 -80002840: 01040413 addi s0,s0,16 -80002844: d51ff06f j 80002594 <_realloc_r+0x1e0> -80002848: 00040593 mv a1,s0 -8000284c: 00090513 mv a0,s2 -80002850: a3dff0ef jal ra,8000228c -80002854: 00090413 mv s0,s2 -80002858: 000b8a13 mv s4,s7 -8000285c: 000c0a93 mv s5,s8 -80002860: d55ff06f j 800025b4 <_realloc_r+0x200> -80002864: 00842703 lw a4,8(s0) -80002868: 00e52423 sw a4,8(a0) -8000286c: 00c42703 lw a4,12(s0) -80002870: 00e52623 sw a4,12(a0) -80002874: 01042683 lw a3,16(s0) -80002878: 04f60263 beq a2,a5,800028bc <_realloc_r+0x508> -8000287c: 01040713 addi a4,s0,16 -80002880: 01050793 addi a5,a0,16 -80002884: c45ff06f j 800024c8 <_realloc_r+0x114> -80002888: 00842783 lw a5,8(s0) -8000288c: 00fc2823 sw a5,16(s8) -80002890: 00c42783 lw a5,12(s0) -80002894: 00fc2a23 sw a5,20(s8) -80002898: 01042703 lw a4,16(s0) -8000289c: fad610e3 bne a2,a3,8000283c <_realloc_r+0x488> -800028a0: 00ec2c23 sw a4,24(s8) -800028a4: 01442703 lw a4,20(s0) -800028a8: 020c0793 addi a5,s8,32 -800028ac: 01840413 addi s0,s0,24 -800028b0: 00ec2e23 sw a4,28(s8) -800028b4: 00042703 lw a4,0(s0) -800028b8: cddff06f j 80002594 <_realloc_r+0x1e0> -800028bc: 00d52823 sw a3,16(a0) -800028c0: 01442683 lw a3,20(s0) -800028c4: 01840713 addi a4,s0,24 -800028c8: 01850793 addi a5,a0,24 -800028cc: 00d52a23 sw a3,20(a0) -800028d0: 01842683 lw a3,24(s0) -800028d4: bf5ff06f j 800024c8 <_realloc_r+0x114> -800028d8: 00040593 mv a1,s0 -800028dc: 00090513 mv a0,s2 -800028e0: 9adff0ef jal ra,8000228c -800028e4: e21ff06f j 80002704 <_realloc_r+0x350> -800028e8: 00842783 lw a5,8(s0) -800028ec: 00fc2823 sw a5,16(s8) -800028f0: 00c42783 lw a5,12(s0) -800028f4: 00fc2a23 sw a5,20(s8) -800028f8: 01042703 lw a4,16(s0) -800028fc: 00d60863 beq a2,a3,8000290c <_realloc_r+0x558> -80002900: 018c0793 addi a5,s8,24 -80002904: 01040413 addi s0,s0,16 -80002908: de9ff06f j 800026f0 <_realloc_r+0x33c> -8000290c: 00ec2c23 sw a4,24(s8) -80002910: 01442703 lw a4,20(s0) -80002914: 020c0793 addi a5,s8,32 -80002918: 01840413 addi s0,s0,24 -8000291c: 00ec2e23 sw a4,28(s8) -80002920: 00042703 lw a4,0(s0) -80002924: dcdff06f j 800026f0 <_realloc_r+0x33c> - -80002928 <_sbrk_r>: -80002928: ff010113 addi sp,sp,-16 -8000292c: 00812423 sw s0,8(sp) -80002930: 00912223 sw s1,4(sp) -80002934: 00050413 mv s0,a0 -80002938: 00058513 mv a0,a1 -8000293c: 00112623 sw ra,12(sp) -80002940: 1801a623 sw zero,396(gp) # 80004994 -80002944: 10c010ef jal ra,80003a50 <_sbrk> -80002948: fff00793 li a5,-1 -8000294c: 00f50c63 beq a0,a5,80002964 <_sbrk_r+0x3c> -80002950: 00c12083 lw ra,12(sp) -80002954: 00812403 lw s0,8(sp) -80002958: 00412483 lw s1,4(sp) -8000295c: 01010113 addi sp,sp,16 -80002960: 00008067 ret -80002964: 18c1a783 lw a5,396(gp) # 80004994 -80002968: fe0784e3 beqz a5,80002950 <_sbrk_r+0x28> -8000296c: 00c12083 lw ra,12(sp) -80002970: 00f42023 sw a5,0(s0) -80002974: 00812403 lw s0,8(sp) -80002978: 00412483 lw s1,4(sp) -8000297c: 01010113 addi sp,sp,16 -80002980: 00008067 ret - -80002984 <__sread>: -80002984: ff010113 addi sp,sp,-16 -80002988: 00812423 sw s0,8(sp) -8000298c: 00058413 mv s0,a1 -80002990: 00e59583 lh a1,14(a1) -80002994: 00112623 sw ra,12(sp) -80002998: 5e9000ef jal ra,80003780 <_read_r> -8000299c: 02054063 bltz a0,800029bc <__sread+0x38> -800029a0: 05042783 lw a5,80(s0) -800029a4: 00c12083 lw ra,12(sp) -800029a8: 00a787b3 add a5,a5,a0 -800029ac: 04f42823 sw a5,80(s0) -800029b0: 00812403 lw s0,8(sp) -800029b4: 01010113 addi sp,sp,16 -800029b8: 00008067 ret -800029bc: 00c45783 lhu a5,12(s0) -800029c0: fffff737 lui a4,0xfffff -800029c4: fff70713 addi a4,a4,-1 # ffffefff <__BSS_END__+0x7fffa667> -800029c8: 00e7f7b3 and a5,a5,a4 -800029cc: 00c12083 lw ra,12(sp) -800029d0: 00f41623 sh a5,12(s0) -800029d4: 00812403 lw s0,8(sp) -800029d8: 01010113 addi sp,sp,16 -800029dc: 00008067 ret - -800029e0 <__seofread>: -800029e0: 00000513 li a0,0 -800029e4: 00008067 ret - -800029e8 <__swrite>: -800029e8: 00c59783 lh a5,12(a1) -800029ec: fe010113 addi sp,sp,-32 -800029f0: 00812c23 sw s0,24(sp) -800029f4: 00912a23 sw s1,20(sp) -800029f8: 01212823 sw s2,16(sp) -800029fc: 01312623 sw s3,12(sp) -80002a00: 00112e23 sw ra,28(sp) -80002a04: 1007f713 andi a4,a5,256 -80002a08: 00058413 mv s0,a1 -80002a0c: 00050493 mv s1,a0 -80002a10: 00e59583 lh a1,14(a1) -80002a14: 00060913 mv s2,a2 -80002a18: 00068993 mv s3,a3 -80002a1c: 02071e63 bnez a4,80002a58 <__swrite+0x70> -80002a20: fffff737 lui a4,0xfffff -80002a24: fff70713 addi a4,a4,-1 # ffffefff <__BSS_END__+0x7fffa667> -80002a28: 00e7f7b3 and a5,a5,a4 -80002a2c: 00f41623 sh a5,12(s0) -80002a30: 01812403 lw s0,24(sp) -80002a34: 01c12083 lw ra,28(sp) -80002a38: 00098693 mv a3,s3 -80002a3c: 00090613 mv a2,s2 -80002a40: 00c12983 lw s3,12(sp) -80002a44: 01012903 lw s2,16(sp) -80002a48: 00048513 mv a0,s1 -80002a4c: 01412483 lw s1,20(sp) -80002a50: 02010113 addi sp,sp,32 -80002a54: 08c0006f j 80002ae0 <_write_r> -80002a58: 00200693 li a3,2 -80002a5c: 00000613 li a2,0 -80002a60: 2c9000ef jal ra,80003528 <_lseek_r> -80002a64: 00c41783 lh a5,12(s0) -80002a68: 00e41583 lh a1,14(s0) -80002a6c: fb5ff06f j 80002a20 <__swrite+0x38> - -80002a70 <__sseek>: -80002a70: ff010113 addi sp,sp,-16 -80002a74: 00812423 sw s0,8(sp) -80002a78: 00058413 mv s0,a1 -80002a7c: 00e59583 lh a1,14(a1) -80002a80: 00112623 sw ra,12(sp) -80002a84: 2a5000ef jal ra,80003528 <_lseek_r> -80002a88: fff00793 li a5,-1 -80002a8c: 02f50463 beq a0,a5,80002ab4 <__sseek+0x44> -80002a90: 00c45783 lhu a5,12(s0) -80002a94: 00001737 lui a4,0x1 -80002a98: 00c12083 lw ra,12(sp) -80002a9c: 00e7e7b3 or a5,a5,a4 -80002aa0: 04a42823 sw a0,80(s0) -80002aa4: 00f41623 sh a5,12(s0) -80002aa8: 00812403 lw s0,8(sp) -80002aac: 01010113 addi sp,sp,16 -80002ab0: 00008067 ret -80002ab4: 00c45783 lhu a5,12(s0) -80002ab8: fffff737 lui a4,0xfffff -80002abc: fff70713 addi a4,a4,-1 # ffffefff <__BSS_END__+0x7fffa667> -80002ac0: 00e7f7b3 and a5,a5,a4 -80002ac4: 00c12083 lw ra,12(sp) -80002ac8: 00f41623 sh a5,12(s0) -80002acc: 00812403 lw s0,8(sp) -80002ad0: 01010113 addi sp,sp,16 -80002ad4: 00008067 ret - -80002ad8 <__sclose>: -80002ad8: 00e59583 lh a1,14(a1) -80002adc: 1c80006f j 80002ca4 <_close_r> - -80002ae0 <_write_r>: -80002ae0: ff010113 addi sp,sp,-16 -80002ae4: 00058713 mv a4,a1 -80002ae8: 00812423 sw s0,8(sp) -80002aec: 00912223 sw s1,4(sp) -80002af0: 00060593 mv a1,a2 -80002af4: 00050413 mv s0,a0 -80002af8: 00068613 mv a2,a3 -80002afc: 00070513 mv a0,a4 -80002b00: 00112623 sw ra,12(sp) -80002b04: 1801a623 sw zero,396(gp) # 80004994 -80002b08: 7e5000ef jal ra,80003aec <_write> -80002b0c: fff00793 li a5,-1 -80002b10: 00f50c63 beq a0,a5,80002b28 <_write_r+0x48> -80002b14: 00c12083 lw ra,12(sp) -80002b18: 00812403 lw s0,8(sp) -80002b1c: 00412483 lw s1,4(sp) -80002b20: 01010113 addi sp,sp,16 -80002b24: 00008067 ret -80002b28: 18c1a783 lw a5,396(gp) # 80004994 -80002b2c: fe0784e3 beqz a5,80002b14 <_write_r+0x34> -80002b30: 00c12083 lw ra,12(sp) -80002b34: 00f42023 sw a5,0(s0) -80002b38: 00812403 lw s0,8(sp) -80002b3c: 00412483 lw s1,4(sp) -80002b40: 01010113 addi sp,sp,16 -80002b44: 00008067 ret - -80002b48 <__swsetup_r>: -80002b48: 0cc1a783 lw a5,204(gp) # 800048d4 <_impure_ptr> -80002b4c: ff010113 addi sp,sp,-16 -80002b50: 00812423 sw s0,8(sp) -80002b54: 00912223 sw s1,4(sp) -80002b58: 00112623 sw ra,12(sp) -80002b5c: 00050493 mv s1,a0 -80002b60: 00058413 mv s0,a1 -80002b64: 00078663 beqz a5,80002b70 <__swsetup_r+0x28> -80002b68: 0387a703 lw a4,56(a5) -80002b6c: 0e070063 beqz a4,80002c4c <__swsetup_r+0x104> -80002b70: 00c41703 lh a4,12(s0) -80002b74: 01071793 slli a5,a4,0x10 -80002b78: 00877693 andi a3,a4,8 -80002b7c: 0107d793 srli a5,a5,0x10 -80002b80: 04068063 beqz a3,80002bc0 <__swsetup_r+0x78> -80002b84: 01042683 lw a3,16(s0) -80002b88: 06068063 beqz a3,80002be8 <__swsetup_r+0xa0> -80002b8c: 0017f613 andi a2,a5,1 -80002b90: 08060463 beqz a2,80002c18 <__swsetup_r+0xd0> -80002b94: 01442603 lw a2,20(s0) -80002b98: 00042423 sw zero,8(s0) -80002b9c: 00000513 li a0,0 -80002ba0: 40c00633 neg a2,a2 -80002ba4: 00c42c23 sw a2,24(s0) -80002ba8: 08068663 beqz a3,80002c34 <__swsetup_r+0xec> -80002bac: 00c12083 lw ra,12(sp) -80002bb0: 00812403 lw s0,8(sp) -80002bb4: 00412483 lw s1,4(sp) -80002bb8: 01010113 addi sp,sp,16 -80002bbc: 00008067 ret -80002bc0: 0107f693 andi a3,a5,16 -80002bc4: 0c068463 beqz a3,80002c8c <__swsetup_r+0x144> -80002bc8: 0047f793 andi a5,a5,4 -80002bcc: 08079663 bnez a5,80002c58 <__swsetup_r+0x110> -80002bd0: 01042683 lw a3,16(s0) -80002bd4: 00876713 ori a4,a4,8 -80002bd8: 01071793 slli a5,a4,0x10 -80002bdc: 00e41623 sh a4,12(s0) -80002be0: 0107d793 srli a5,a5,0x10 -80002be4: fa0694e3 bnez a3,80002b8c <__swsetup_r+0x44> -80002be8: 2807f613 andi a2,a5,640 -80002bec: 20000593 li a1,512 -80002bf0: f8b60ee3 beq a2,a1,80002b8c <__swsetup_r+0x44> -80002bf4: 00040593 mv a1,s0 -80002bf8: 00048513 mv a0,s1 -80002bfc: 265000ef jal ra,80003660 <__smakebuf_r> -80002c00: 00c41703 lh a4,12(s0) -80002c04: 01042683 lw a3,16(s0) -80002c08: 01071793 slli a5,a4,0x10 -80002c0c: 0107d793 srli a5,a5,0x10 -80002c10: 0017f613 andi a2,a5,1 -80002c14: f80610e3 bnez a2,80002b94 <__swsetup_r+0x4c> -80002c18: 0027f613 andi a2,a5,2 -80002c1c: 00000593 li a1,0 -80002c20: 00061463 bnez a2,80002c28 <__swsetup_r+0xe0> -80002c24: 01442583 lw a1,20(s0) -80002c28: 00b42423 sw a1,8(s0) -80002c2c: 00000513 li a0,0 -80002c30: f6069ee3 bnez a3,80002bac <__swsetup_r+0x64> -80002c34: 0807f793 andi a5,a5,128 -80002c38: f6078ae3 beqz a5,80002bac <__swsetup_r+0x64> -80002c3c: 04076713 ori a4,a4,64 -80002c40: 00e41623 sh a4,12(s0) -80002c44: fff00513 li a0,-1 -80002c48: f65ff06f j 80002bac <__swsetup_r+0x64> -80002c4c: 00078513 mv a0,a5 -80002c50: e74fe0ef jal ra,800012c4 <__sinit> -80002c54: f1dff06f j 80002b70 <__swsetup_r+0x28> -80002c58: 03042583 lw a1,48(s0) -80002c5c: 00058e63 beqz a1,80002c78 <__swsetup_r+0x130> -80002c60: 04040793 addi a5,s0,64 -80002c64: 00f58863 beq a1,a5,80002c74 <__swsetup_r+0x12c> -80002c68: 00048513 mv a0,s1 -80002c6c: 5bc000ef jal ra,80003228 <_free_r> -80002c70: 00c41703 lh a4,12(s0) -80002c74: 02042823 sw zero,48(s0) -80002c78: 01042683 lw a3,16(s0) -80002c7c: fdb77713 andi a4,a4,-37 -80002c80: 00042223 sw zero,4(s0) -80002c84: 00d42023 sw a3,0(s0) -80002c88: f4dff06f j 80002bd4 <__swsetup_r+0x8c> -80002c8c: 00900793 li a5,9 -80002c90: 00f4a023 sw a5,0(s1) -80002c94: 04076713 ori a4,a4,64 -80002c98: 00e41623 sh a4,12(s0) -80002c9c: fff00513 li a0,-1 -80002ca0: f0dff06f j 80002bac <__swsetup_r+0x64> - -80002ca4 <_close_r>: -80002ca4: ff010113 addi sp,sp,-16 -80002ca8: 00812423 sw s0,8(sp) -80002cac: 00912223 sw s1,4(sp) -80002cb0: 00050413 mv s0,a0 -80002cb4: 00058513 mv a0,a1 -80002cb8: 00112623 sw ra,12(sp) -80002cbc: 1801a623 sw zero,396(gp) # 80004994 -80002cc0: 3e9000ef jal ra,800038a8 <_close> -80002cc4: fff00793 li a5,-1 -80002cc8: 00f50c63 beq a0,a5,80002ce0 <_close_r+0x3c> -80002ccc: 00c12083 lw ra,12(sp) -80002cd0: 00812403 lw s0,8(sp) -80002cd4: 00412483 lw s1,4(sp) -80002cd8: 01010113 addi sp,sp,16 -80002cdc: 00008067 ret -80002ce0: 18c1a783 lw a5,396(gp) # 80004994 -80002ce4: fe0784e3 beqz a5,80002ccc <_close_r+0x28> -80002ce8: 00c12083 lw ra,12(sp) -80002cec: 00f42023 sw a5,0(s0) -80002cf0: 00812403 lw s0,8(sp) -80002cf4: 00412483 lw s1,4(sp) -80002cf8: 01010113 addi sp,sp,16 -80002cfc: 00008067 ret - -80002d00 <_fclose_r>: -80002d00: ff010113 addi sp,sp,-16 -80002d04: 00112623 sw ra,12(sp) -80002d08: 00812423 sw s0,8(sp) -80002d0c: 00912223 sw s1,4(sp) -80002d10: 01212023 sw s2,0(sp) -80002d14: 02058063 beqz a1,80002d34 <_fclose_r+0x34> -80002d18: 00058413 mv s0,a1 -80002d1c: 00050493 mv s1,a0 -80002d20: 00050663 beqz a0,80002d2c <_fclose_r+0x2c> -80002d24: 03852783 lw a5,56(a0) -80002d28: 0a078c63 beqz a5,80002de0 <_fclose_r+0xe0> -80002d2c: 00c41783 lh a5,12(s0) -80002d30: 02079263 bnez a5,80002d54 <_fclose_r+0x54> -80002d34: 00c12083 lw ra,12(sp) -80002d38: 00812403 lw s0,8(sp) -80002d3c: 00000913 li s2,0 -80002d40: 00412483 lw s1,4(sp) -80002d44: 00090513 mv a0,s2 -80002d48: 00012903 lw s2,0(sp) -80002d4c: 01010113 addi sp,sp,16 -80002d50: 00008067 ret -80002d54: 00040593 mv a1,s0 -80002d58: 00048513 mv a0,s1 -80002d5c: 0c0000ef jal ra,80002e1c <__sflush_r> -80002d60: 02c42783 lw a5,44(s0) -80002d64: 00050913 mv s2,a0 -80002d68: 00078a63 beqz a5,80002d7c <_fclose_r+0x7c> -80002d6c: 01c42583 lw a1,28(s0) -80002d70: 00048513 mv a0,s1 -80002d74: 000780e7 jalr a5 -80002d78: 06054c63 bltz a0,80002df0 <_fclose_r+0xf0> -80002d7c: 00c45783 lhu a5,12(s0) -80002d80: 0807f793 andi a5,a5,128 -80002d84: 06079e63 bnez a5,80002e00 <_fclose_r+0x100> -80002d88: 03042583 lw a1,48(s0) -80002d8c: 00058c63 beqz a1,80002da4 <_fclose_r+0xa4> -80002d90: 04040793 addi a5,s0,64 -80002d94: 00f58663 beq a1,a5,80002da0 <_fclose_r+0xa0> -80002d98: 00048513 mv a0,s1 -80002d9c: 48c000ef jal ra,80003228 <_free_r> -80002da0: 02042823 sw zero,48(s0) -80002da4: 04442583 lw a1,68(s0) -80002da8: 00058863 beqz a1,80002db8 <_fclose_r+0xb8> -80002dac: 00048513 mv a0,s1 -80002db0: 478000ef jal ra,80003228 <_free_r> -80002db4: 04042223 sw zero,68(s0) -80002db8: d1cfe0ef jal ra,800012d4 <__sfp_lock_acquire> -80002dbc: 00041623 sh zero,12(s0) -80002dc0: d18fe0ef jal ra,800012d8 <__sfp_lock_release> -80002dc4: 00c12083 lw ra,12(sp) -80002dc8: 00812403 lw s0,8(sp) -80002dcc: 00412483 lw s1,4(sp) -80002dd0: 00090513 mv a0,s2 -80002dd4: 00012903 lw s2,0(sp) -80002dd8: 01010113 addi sp,sp,16 -80002ddc: 00008067 ret -80002de0: ce4fe0ef jal ra,800012c4 <__sinit> -80002de4: 00c41783 lh a5,12(s0) -80002de8: f40786e3 beqz a5,80002d34 <_fclose_r+0x34> -80002dec: f69ff06f j 80002d54 <_fclose_r+0x54> -80002df0: 00c45783 lhu a5,12(s0) -80002df4: fff00913 li s2,-1 -80002df8: 0807f793 andi a5,a5,128 -80002dfc: f80786e3 beqz a5,80002d88 <_fclose_r+0x88> -80002e00: 01042583 lw a1,16(s0) -80002e04: 00048513 mv a0,s1 -80002e08: 420000ef jal ra,80003228 <_free_r> -80002e0c: f7dff06f j 80002d88 <_fclose_r+0x88> - -80002e10 : -80002e10: 00050593 mv a1,a0 -80002e14: 0cc1a503 lw a0,204(gp) # 800048d4 <_impure_ptr> -80002e18: ee9ff06f j 80002d00 <_fclose_r> - -80002e1c <__sflush_r>: -80002e1c: 00c59783 lh a5,12(a1) -80002e20: fe010113 addi sp,sp,-32 -80002e24: 00812c23 sw s0,24(sp) -80002e28: 01312623 sw s3,12(sp) -80002e2c: 00112e23 sw ra,28(sp) -80002e30: 00912a23 sw s1,20(sp) -80002e34: 01212823 sw s2,16(sp) -80002e38: 0087f693 andi a3,a5,8 -80002e3c: 00058413 mv s0,a1 -80002e40: 00050993 mv s3,a0 -80002e44: 10069a63 bnez a3,80002f58 <__sflush_r+0x13c> -80002e48: 00001737 lui a4,0x1 -80002e4c: 80070713 addi a4,a4,-2048 # 800 <_start-0x7ffff800> -80002e50: 0045a683 lw a3,4(a1) -80002e54: 00e7e7b3 or a5,a5,a4 -80002e58: 00f59623 sh a5,12(a1) -80002e5c: 18d05463 blez a3,80002fe4 <__sflush_r+0x1c8> -80002e60: 02842703 lw a4,40(s0) -80002e64: 0c070a63 beqz a4,80002f38 <__sflush_r+0x11c> -80002e68: 0009a483 lw s1,0(s3) -80002e6c: 01079693 slli a3,a5,0x10 -80002e70: 0009a023 sw zero,0(s3) -80002e74: 01379613 slli a2,a5,0x13 -80002e78: 01c42583 lw a1,28(s0) -80002e7c: 0106d693 srli a3,a3,0x10 -80002e80: 16064863 bltz a2,80002ff0 <__sflush_r+0x1d4> -80002e84: 00100693 li a3,1 -80002e88: 00000613 li a2,0 -80002e8c: 00098513 mv a0,s3 -80002e90: 000700e7 jalr a4 -80002e94: fff00793 li a5,-1 -80002e98: 18f50c63 beq a0,a5,80003030 <__sflush_r+0x214> -80002e9c: 00c45683 lhu a3,12(s0) -80002ea0: 02842703 lw a4,40(s0) -80002ea4: 01c42583 lw a1,28(s0) -80002ea8: 0046f693 andi a3,a3,4 -80002eac: 00068e63 beqz a3,80002ec8 <__sflush_r+0xac> -80002eb0: 00442683 lw a3,4(s0) -80002eb4: 03042783 lw a5,48(s0) -80002eb8: 40d50533 sub a0,a0,a3 -80002ebc: 00078663 beqz a5,80002ec8 <__sflush_r+0xac> -80002ec0: 03c42783 lw a5,60(s0) -80002ec4: 40f50533 sub a0,a0,a5 -80002ec8: 00050613 mv a2,a0 -80002ecc: 00000693 li a3,0 -80002ed0: 00098513 mv a0,s3 -80002ed4: 000700e7 jalr a4 -80002ed8: fff00793 li a5,-1 -80002edc: 10f51e63 bne a0,a5,80002ff8 <__sflush_r+0x1dc> -80002ee0: 0009a703 lw a4,0(s3) -80002ee4: 00c41783 lh a5,12(s0) -80002ee8: 16070863 beqz a4,80003058 <__sflush_r+0x23c> -80002eec: 01d00693 li a3,29 -80002ef0: 00d70663 beq a4,a3,80002efc <__sflush_r+0xe0> -80002ef4: 01600693 li a3,22 -80002ef8: 0cd71463 bne a4,a3,80002fc0 <__sflush_r+0x1a4> -80002efc: 01042683 lw a3,16(s0) -80002f00: fffff737 lui a4,0xfffff -80002f04: 7ff70713 addi a4,a4,2047 # fffff7ff <__BSS_END__+0x7fffae67> -80002f08: 00e7f7b3 and a5,a5,a4 -80002f0c: 00f41623 sh a5,12(s0) -80002f10: 00042223 sw zero,4(s0) -80002f14: 00d42023 sw a3,0(s0) -80002f18: 03042583 lw a1,48(s0) -80002f1c: 0099a023 sw s1,0(s3) -80002f20: 00058c63 beqz a1,80002f38 <__sflush_r+0x11c> -80002f24: 04040793 addi a5,s0,64 -80002f28: 00f58663 beq a1,a5,80002f34 <__sflush_r+0x118> -80002f2c: 00098513 mv a0,s3 -80002f30: 2f8000ef jal ra,80003228 <_free_r> -80002f34: 02042823 sw zero,48(s0) -80002f38: 00000513 li a0,0 -80002f3c: 01c12083 lw ra,28(sp) -80002f40: 01812403 lw s0,24(sp) -80002f44: 01412483 lw s1,20(sp) -80002f48: 01012903 lw s2,16(sp) -80002f4c: 00c12983 lw s3,12(sp) -80002f50: 02010113 addi sp,sp,32 -80002f54: 00008067 ret -80002f58: 0105a903 lw s2,16(a1) -80002f5c: fc090ee3 beqz s2,80002f38 <__sflush_r+0x11c> -80002f60: 0005a483 lw s1,0(a1) -80002f64: 01079713 slli a4,a5,0x10 -80002f68: 01075713 srli a4,a4,0x10 -80002f6c: 00377713 andi a4,a4,3 -80002f70: 0125a023 sw s2,0(a1) -80002f74: 412484b3 sub s1,s1,s2 -80002f78: 00000793 li a5,0 -80002f7c: 00071463 bnez a4,80002f84 <__sflush_r+0x168> -80002f80: 0145a783 lw a5,20(a1) -80002f84: 00f42423 sw a5,8(s0) -80002f88: 00904863 bgtz s1,80002f98 <__sflush_r+0x17c> -80002f8c: fadff06f j 80002f38 <__sflush_r+0x11c> -80002f90: 00a90933 add s2,s2,a0 -80002f94: fa9052e3 blez s1,80002f38 <__sflush_r+0x11c> -80002f98: 02442783 lw a5,36(s0) -80002f9c: 01c42583 lw a1,28(s0) -80002fa0: 00048693 mv a3,s1 -80002fa4: 00090613 mv a2,s2 -80002fa8: 00098513 mv a0,s3 -80002fac: 000780e7 jalr a5 -80002fb0: 40a484b3 sub s1,s1,a0 -80002fb4: fca04ee3 bgtz a0,80002f90 <__sflush_r+0x174> -80002fb8: 00c45783 lhu a5,12(s0) -80002fbc: fff00513 li a0,-1 -80002fc0: 0407e793 ori a5,a5,64 -80002fc4: 01c12083 lw ra,28(sp) -80002fc8: 00f41623 sh a5,12(s0) -80002fcc: 01812403 lw s0,24(sp) -80002fd0: 01412483 lw s1,20(sp) -80002fd4: 01012903 lw s2,16(sp) -80002fd8: 00c12983 lw s3,12(sp) -80002fdc: 02010113 addi sp,sp,32 -80002fe0: 00008067 ret -80002fe4: 03c5a703 lw a4,60(a1) -80002fe8: e6e04ce3 bgtz a4,80002e60 <__sflush_r+0x44> -80002fec: f4dff06f j 80002f38 <__sflush_r+0x11c> -80002ff0: 05042503 lw a0,80(s0) -80002ff4: eb5ff06f j 80002ea8 <__sflush_r+0x8c> -80002ff8: 00c45783 lhu a5,12(s0) -80002ffc: fffff737 lui a4,0xfffff -80003000: 7ff70713 addi a4,a4,2047 # fffff7ff <__BSS_END__+0x7fffae67> -80003004: 00e7f7b3 and a5,a5,a4 -80003008: 01042683 lw a3,16(s0) -8000300c: 01079793 slli a5,a5,0x10 -80003010: 4107d793 srai a5,a5,0x10 -80003014: 00f41623 sh a5,12(s0) -80003018: 00042223 sw zero,4(s0) -8000301c: 00d42023 sw a3,0(s0) -80003020: 01379713 slli a4,a5,0x13 -80003024: ee075ae3 bgez a4,80002f18 <__sflush_r+0xfc> -80003028: 04a42823 sw a0,80(s0) -8000302c: eedff06f j 80002f18 <__sflush_r+0xfc> -80003030: 0009a783 lw a5,0(s3) -80003034: e60784e3 beqz a5,80002e9c <__sflush_r+0x80> -80003038: 01d00713 li a4,29 -8000303c: 02e78863 beq a5,a4,8000306c <__sflush_r+0x250> -80003040: 01600713 li a4,22 -80003044: 02e78463 beq a5,a4,8000306c <__sflush_r+0x250> -80003048: 00c45783 lhu a5,12(s0) -8000304c: 0407e793 ori a5,a5,64 -80003050: 00f41623 sh a5,12(s0) -80003054: ee9ff06f j 80002f3c <__sflush_r+0x120> -80003058: fffff737 lui a4,0xfffff -8000305c: 7ff70713 addi a4,a4,2047 # fffff7ff <__BSS_END__+0x7fffae67> -80003060: 01042683 lw a3,16(s0) -80003064: 00e7f7b3 and a5,a5,a4 -80003068: fadff06f j 80003014 <__sflush_r+0x1f8> -8000306c: 0099a023 sw s1,0(s3) -80003070: 00000513 li a0,0 -80003074: ec9ff06f j 80002f3c <__sflush_r+0x120> - -80003078 <_fflush_r>: -80003078: fe010113 addi sp,sp,-32 -8000307c: 00812c23 sw s0,24(sp) -80003080: 00112e23 sw ra,28(sp) -80003084: 00050413 mv s0,a0 -80003088: 00050663 beqz a0,80003094 <_fflush_r+0x1c> -8000308c: 03852783 lw a5,56(a0) -80003090: 02078063 beqz a5,800030b0 <_fflush_r+0x38> -80003094: 00c59783 lh a5,12(a1) -80003098: 02079663 bnez a5,800030c4 <_fflush_r+0x4c> -8000309c: 01c12083 lw ra,28(sp) -800030a0: 01812403 lw s0,24(sp) -800030a4: 00000513 li a0,0 -800030a8: 02010113 addi sp,sp,32 -800030ac: 00008067 ret -800030b0: 00b12623 sw a1,12(sp) -800030b4: a10fe0ef jal ra,800012c4 <__sinit> -800030b8: 00c12583 lw a1,12(sp) -800030bc: 00c59783 lh a5,12(a1) -800030c0: fc078ee3 beqz a5,8000309c <_fflush_r+0x24> -800030c4: 00040513 mv a0,s0 -800030c8: 01812403 lw s0,24(sp) -800030cc: 01c12083 lw ra,28(sp) -800030d0: 02010113 addi sp,sp,32 -800030d4: d49ff06f j 80002e1c <__sflush_r> - -800030d8 : -800030d8: 00050593 mv a1,a0 -800030dc: 00050663 beqz a0,800030e8 -800030e0: 0cc1a503 lw a0,204(gp) # 800048d4 <_impure_ptr> -800030e4: f95ff06f j 80003078 <_fflush_r> -800030e8: 0c81a503 lw a0,200(gp) # 800048d0 <_global_impure_ptr> -800030ec: 800035b7 lui a1,0x80003 -800030f0: 07858593 addi a1,a1,120 # 80003078 <__BSS_END__+0xffffe6e0> -800030f4: f5cfe06f j 80001850 <_fwalk_reent> - -800030f8 <_malloc_trim_r>: -800030f8: fe010113 addi sp,sp,-32 -800030fc: 01312623 sw s3,12(sp) -80003100: 00812c23 sw s0,24(sp) -80003104: 00912a23 sw s1,20(sp) -80003108: 01212823 sw s2,16(sp) -8000310c: 01412423 sw s4,8(sp) -80003110: 00112e23 sw ra,28(sp) -80003114: 00058a13 mv s4,a1 -80003118: 00050913 mv s2,a0 -8000311c: cc018993 addi s3,gp,-832 # 800044c8 <__malloc_av_> -80003120: a8cff0ef jal ra,800023ac <__malloc_lock> -80003124: 0089a703 lw a4,8(s3) -80003128: 000017b7 lui a5,0x1 -8000312c: fef78413 addi s0,a5,-17 # fef <_start-0x7ffff011> -80003130: 00472483 lw s1,4(a4) -80003134: 41440433 sub s0,s0,s4 -80003138: ffc4f493 andi s1,s1,-4 -8000313c: 00940433 add s0,s0,s1 -80003140: 00c45413 srli s0,s0,0xc -80003144: fff40413 addi s0,s0,-1 -80003148: 00c41413 slli s0,s0,0xc -8000314c: 00f44e63 blt s0,a5,80003168 <_malloc_trim_r+0x70> -80003150: 00000593 li a1,0 -80003154: 00090513 mv a0,s2 -80003158: fd0ff0ef jal ra,80002928 <_sbrk_r> -8000315c: 0089a783 lw a5,8(s3) -80003160: 009787b3 add a5,a5,s1 -80003164: 02f50863 beq a0,a5,80003194 <_malloc_trim_r+0x9c> -80003168: 00090513 mv a0,s2 -8000316c: a44ff0ef jal ra,800023b0 <__malloc_unlock> -80003170: 01c12083 lw ra,28(sp) -80003174: 01812403 lw s0,24(sp) -80003178: 01412483 lw s1,20(sp) -8000317c: 01012903 lw s2,16(sp) -80003180: 00c12983 lw s3,12(sp) -80003184: 00812a03 lw s4,8(sp) -80003188: 00000513 li a0,0 -8000318c: 02010113 addi sp,sp,32 -80003190: 00008067 ret -80003194: 408005b3 neg a1,s0 -80003198: 00090513 mv a0,s2 -8000319c: f8cff0ef jal ra,80002928 <_sbrk_r> -800031a0: fff00793 li a5,-1 -800031a4: 04f50863 beq a0,a5,800031f4 <_malloc_trim_r+0xfc> -800031a8: 12818793 addi a5,gp,296 # 80004930 <__malloc_current_mallinfo> -800031ac: 0007a703 lw a4,0(a5) -800031b0: 0089a683 lw a3,8(s3) -800031b4: 408484b3 sub s1,s1,s0 -800031b8: 0014e493 ori s1,s1,1 -800031bc: 40870433 sub s0,a4,s0 -800031c0: 00090513 mv a0,s2 -800031c4: 0096a223 sw s1,4(a3) -800031c8: 0087a023 sw s0,0(a5) -800031cc: 9e4ff0ef jal ra,800023b0 <__malloc_unlock> -800031d0: 01c12083 lw ra,28(sp) -800031d4: 01812403 lw s0,24(sp) -800031d8: 01412483 lw s1,20(sp) -800031dc: 01012903 lw s2,16(sp) -800031e0: 00c12983 lw s3,12(sp) -800031e4: 00812a03 lw s4,8(sp) -800031e8: 00100513 li a0,1 -800031ec: 02010113 addi sp,sp,32 -800031f0: 00008067 ret -800031f4: 00000593 li a1,0 -800031f8: 00090513 mv a0,s2 -800031fc: f2cff0ef jal ra,80002928 <_sbrk_r> -80003200: 0089a703 lw a4,8(s3) -80003204: 00f00693 li a3,15 -80003208: 40e507b3 sub a5,a0,a4 -8000320c: f4f6dee3 bge a3,a5,80003168 <_malloc_trim_r+0x70> -80003210: 0d01a683 lw a3,208(gp) # 800048d8 <__malloc_sbrk_base> -80003214: 0017e793 ori a5,a5,1 -80003218: 00f72223 sw a5,4(a4) -8000321c: 40d50533 sub a0,a0,a3 -80003220: 12a1a423 sw a0,296(gp) # 80004930 <__malloc_current_mallinfo> -80003224: f45ff06f j 80003168 <_malloc_trim_r+0x70> - -80003228 <_free_r>: -80003228: 12058463 beqz a1,80003350 <_free_r+0x128> -8000322c: ff010113 addi sp,sp,-16 -80003230: 00812423 sw s0,8(sp) -80003234: 00912223 sw s1,4(sp) -80003238: 00058413 mv s0,a1 -8000323c: 00050493 mv s1,a0 -80003240: 00112623 sw ra,12(sp) -80003244: 968ff0ef jal ra,800023ac <__malloc_lock> -80003248: ffc42803 lw a6,-4(s0) -8000324c: ff840713 addi a4,s0,-8 -80003250: ffe87793 andi a5,a6,-2 -80003254: 00f70633 add a2,a4,a5 -80003258: cc018593 addi a1,gp,-832 # 800044c8 <__malloc_av_> -8000325c: 00462683 lw a3,4(a2) -80003260: 0085a503 lw a0,8(a1) -80003264: ffc6f693 andi a3,a3,-4 -80003268: 1ac50663 beq a0,a2,80003414 <_free_r+0x1ec> -8000326c: 00d62223 sw a3,4(a2) -80003270: 00187813 andi a6,a6,1 -80003274: 00d60533 add a0,a2,a3 -80003278: 08081e63 bnez a6,80003314 <_free_r+0xec> -8000327c: ff842303 lw t1,-8(s0) -80003280: 00452803 lw a6,4(a0) -80003284: 40670733 sub a4,a4,t1 -80003288: 00872883 lw a7,8(a4) -8000328c: cc818513 addi a0,gp,-824 # 800044d0 <__malloc_av_+0x8> -80003290: 006787b3 add a5,a5,t1 -80003294: 00187813 andi a6,a6,1 -80003298: 12a88e63 beq a7,a0,800033d4 <_free_r+0x1ac> -8000329c: 00c72303 lw t1,12(a4) -800032a0: 0068a623 sw t1,12(a7) -800032a4: 01132423 sw a7,8(t1) -800032a8: 1c080e63 beqz a6,80003484 <_free_r+0x25c> -800032ac: 0017e693 ori a3,a5,1 -800032b0: 00d72223 sw a3,4(a4) -800032b4: 00f62023 sw a5,0(a2) -800032b8: 1ff00693 li a3,511 -800032bc: 0af6e663 bltu a3,a5,80003368 <_free_r+0x140> -800032c0: ff87f693 andi a3,a5,-8 -800032c4: 00868693 addi a3,a3,8 -800032c8: 0045a503 lw a0,4(a1) -800032cc: 00d586b3 add a3,a1,a3 -800032d0: 0006a603 lw a2,0(a3) -800032d4: 0057d813 srli a6,a5,0x5 -800032d8: 00100793 li a5,1 -800032dc: 010797b3 sll a5,a5,a6 -800032e0: 00a7e7b3 or a5,a5,a0 -800032e4: ff868513 addi a0,a3,-8 -800032e8: 00a72623 sw a0,12(a4) -800032ec: 00c72423 sw a2,8(a4) -800032f0: 00f5a223 sw a5,4(a1) -800032f4: 00e6a023 sw a4,0(a3) -800032f8: 00e62623 sw a4,12(a2) -800032fc: 00812403 lw s0,8(sp) -80003300: 00c12083 lw ra,12(sp) -80003304: 00048513 mv a0,s1 -80003308: 00412483 lw s1,4(sp) -8000330c: 01010113 addi sp,sp,16 -80003310: 8a0ff06f j 800023b0 <__malloc_unlock> -80003314: 00452503 lw a0,4(a0) -80003318: 00157513 andi a0,a0,1 -8000331c: 02051c63 bnez a0,80003354 <_free_r+0x12c> -80003320: 00d787b3 add a5,a5,a3 -80003324: cc818513 addi a0,gp,-824 # 800044d0 <__malloc_av_+0x8> -80003328: 00862683 lw a3,8(a2) -8000332c: 0017e893 ori a7,a5,1 -80003330: 00f70833 add a6,a4,a5 -80003334: 16a68463 beq a3,a0,8000349c <_free_r+0x274> -80003338: 00c62603 lw a2,12(a2) -8000333c: 00c6a623 sw a2,12(a3) -80003340: 00d62423 sw a3,8(a2) -80003344: 01172223 sw a7,4(a4) -80003348: 00f82023 sw a5,0(a6) -8000334c: f6dff06f j 800032b8 <_free_r+0x90> -80003350: 00008067 ret -80003354: 0017e693 ori a3,a5,1 -80003358: fed42e23 sw a3,-4(s0) -8000335c: 00f62023 sw a5,0(a2) -80003360: 1ff00693 li a3,511 -80003364: f4f6fee3 bgeu a3,a5,800032c0 <_free_r+0x98> -80003368: 0097d693 srli a3,a5,0x9 -8000336c: 00400613 li a2,4 -80003370: 0ed66863 bltu a2,a3,80003460 <_free_r+0x238> -80003374: 0067d693 srli a3,a5,0x6 -80003378: 03968813 addi a6,a3,57 -8000337c: 03868613 addi a2,a3,56 -80003380: 00381813 slli a6,a6,0x3 -80003384: 01058833 add a6,a1,a6 -80003388: 00082683 lw a3,0(a6) -8000338c: ff880813 addi a6,a6,-8 -80003390: 12d80463 beq a6,a3,800034b8 <_free_r+0x290> -80003394: 0046a603 lw a2,4(a3) -80003398: ffc67613 andi a2,a2,-4 -8000339c: 00c7f663 bgeu a5,a2,800033a8 <_free_r+0x180> -800033a0: 0086a683 lw a3,8(a3) -800033a4: fed818e3 bne a6,a3,80003394 <_free_r+0x16c> -800033a8: 00c6a803 lw a6,12(a3) -800033ac: 01072623 sw a6,12(a4) -800033b0: 00d72423 sw a3,8(a4) -800033b4: 00812403 lw s0,8(sp) -800033b8: 00c12083 lw ra,12(sp) -800033bc: 00e82423 sw a4,8(a6) -800033c0: 00048513 mv a0,s1 -800033c4: 00412483 lw s1,4(sp) -800033c8: 00e6a623 sw a4,12(a3) -800033cc: 01010113 addi sp,sp,16 -800033d0: fe1fe06f j 800023b0 <__malloc_unlock> -800033d4: 14081263 bnez a6,80003518 <_free_r+0x2f0> -800033d8: 00c62583 lw a1,12(a2) -800033dc: 00862603 lw a2,8(a2) -800033e0: 00f687b3 add a5,a3,a5 -800033e4: 00812403 lw s0,8(sp) -800033e8: 00b62623 sw a1,12(a2) -800033ec: 00c5a423 sw a2,8(a1) -800033f0: 0017e693 ori a3,a5,1 -800033f4: 00c12083 lw ra,12(sp) -800033f8: 00d72223 sw a3,4(a4) -800033fc: 00048513 mv a0,s1 -80003400: 00f70733 add a4,a4,a5 -80003404: 00412483 lw s1,4(sp) -80003408: 00f72023 sw a5,0(a4) -8000340c: 01010113 addi sp,sp,16 -80003410: fa1fe06f j 800023b0 <__malloc_unlock> -80003414: 00187813 andi a6,a6,1 -80003418: 00d787b3 add a5,a5,a3 -8000341c: 02081063 bnez a6,8000343c <_free_r+0x214> -80003420: ff842503 lw a0,-8(s0) -80003424: 40a70733 sub a4,a4,a0 -80003428: 00c72683 lw a3,12(a4) -8000342c: 00872603 lw a2,8(a4) -80003430: 00a787b3 add a5,a5,a0 -80003434: 00d62623 sw a3,12(a2) -80003438: 00c6a423 sw a2,8(a3) -8000343c: 0017e613 ori a2,a5,1 -80003440: 0d41a683 lw a3,212(gp) # 800048dc <__malloc_trim_threshold> -80003444: 00c72223 sw a2,4(a4) -80003448: 00e5a423 sw a4,8(a1) -8000344c: ead7e8e3 bltu a5,a3,800032fc <_free_r+0xd4> -80003450: 0e01a583 lw a1,224(gp) # 800048e8 <__malloc_top_pad> -80003454: 00048513 mv a0,s1 -80003458: ca1ff0ef jal ra,800030f8 <_malloc_trim_r> -8000345c: ea1ff06f j 800032fc <_free_r+0xd4> -80003460: 01400613 li a2,20 -80003464: 02d67463 bgeu a2,a3,8000348c <_free_r+0x264> -80003468: 05400613 li a2,84 -8000346c: 06d66463 bltu a2,a3,800034d4 <_free_r+0x2ac> -80003470: 00c7d693 srli a3,a5,0xc -80003474: 06f68813 addi a6,a3,111 -80003478: 06e68613 addi a2,a3,110 -8000347c: 00381813 slli a6,a6,0x3 -80003480: f05ff06f j 80003384 <_free_r+0x15c> -80003484: 00d787b3 add a5,a5,a3 -80003488: ea1ff06f j 80003328 <_free_r+0x100> -8000348c: 05c68813 addi a6,a3,92 -80003490: 05b68613 addi a2,a3,91 -80003494: 00381813 slli a6,a6,0x3 -80003498: eedff06f j 80003384 <_free_r+0x15c> -8000349c: 00e5aa23 sw a4,20(a1) -800034a0: 00e5a823 sw a4,16(a1) -800034a4: 00a72623 sw a0,12(a4) -800034a8: 00a72423 sw a0,8(a4) -800034ac: 01172223 sw a7,4(a4) -800034b0: 00f82023 sw a5,0(a6) -800034b4: e49ff06f j 800032fc <_free_r+0xd4> -800034b8: 0045a503 lw a0,4(a1) -800034bc: 40265613 srai a2,a2,0x2 -800034c0: 00100793 li a5,1 -800034c4: 00c79633 sll a2,a5,a2 -800034c8: 00a66633 or a2,a2,a0 -800034cc: 00c5a223 sw a2,4(a1) -800034d0: eddff06f j 800033ac <_free_r+0x184> -800034d4: 15400613 li a2,340 -800034d8: 00d66c63 bltu a2,a3,800034f0 <_free_r+0x2c8> -800034dc: 00f7d693 srli a3,a5,0xf -800034e0: 07868813 addi a6,a3,120 -800034e4: 07768613 addi a2,a3,119 -800034e8: 00381813 slli a6,a6,0x3 -800034ec: e99ff06f j 80003384 <_free_r+0x15c> -800034f0: 55400613 li a2,1364 -800034f4: 00d66c63 bltu a2,a3,8000350c <_free_r+0x2e4> -800034f8: 0127d693 srli a3,a5,0x12 -800034fc: 07d68813 addi a6,a3,125 -80003500: 07c68613 addi a2,a3,124 -80003504: 00381813 slli a6,a6,0x3 -80003508: e7dff06f j 80003384 <_free_r+0x15c> -8000350c: 3f800813 li a6,1016 -80003510: 07e00613 li a2,126 -80003514: e71ff06f j 80003384 <_free_r+0x15c> -80003518: 0017e693 ori a3,a5,1 -8000351c: 00d72223 sw a3,4(a4) -80003520: 00f62023 sw a5,0(a2) -80003524: dd9ff06f j 800032fc <_free_r+0xd4> - -80003528 <_lseek_r>: -80003528: ff010113 addi sp,sp,-16 -8000352c: 00058713 mv a4,a1 -80003530: 00812423 sw s0,8(sp) -80003534: 00912223 sw s1,4(sp) -80003538: 00060593 mv a1,a2 -8000353c: 00050413 mv s0,a0 -80003540: 00068613 mv a2,a3 -80003544: 00070513 mv a0,a4 -80003548: 00112623 sw ra,12(sp) -8000354c: 1801a623 sw zero,396(gp) # 80004994 -80003550: 460000ef jal ra,800039b0 <_lseek> -80003554: fff00793 li a5,-1 -80003558: 00f50c63 beq a0,a5,80003570 <_lseek_r+0x48> -8000355c: 00c12083 lw ra,12(sp) -80003560: 00812403 lw s0,8(sp) -80003564: 00412483 lw s1,4(sp) -80003568: 01010113 addi sp,sp,16 -8000356c: 00008067 ret -80003570: 18c1a783 lw a5,396(gp) # 80004994 -80003574: fe0784e3 beqz a5,8000355c <_lseek_r+0x34> -80003578: 00c12083 lw ra,12(sp) -8000357c: 00f42023 sw a5,0(s0) -80003580: 00812403 lw s0,8(sp) -80003584: 00412483 lw s1,4(sp) -80003588: 01010113 addi sp,sp,16 -8000358c: 00008067 ret - -80003590 <__swhatbuf_r>: -80003590: f9010113 addi sp,sp,-112 -80003594: 06812423 sw s0,104(sp) -80003598: 00058413 mv s0,a1 -8000359c: 00e59583 lh a1,14(a1) -800035a0: 06912223 sw s1,100(sp) -800035a4: 07212023 sw s2,96(sp) -800035a8: 06112623 sw ra,108(sp) -800035ac: 00060493 mv s1,a2 -800035b0: 00068913 mv s2,a3 -800035b4: 0405ca63 bltz a1,80003608 <__swhatbuf_r+0x78> -800035b8: 00810613 addi a2,sp,8 -800035bc: 22c000ef jal ra,800037e8 <_fstat_r> -800035c0: 04054463 bltz a0,80003608 <__swhatbuf_r+0x78> -800035c4: 00c12703 lw a4,12(sp) -800035c8: 0000f7b7 lui a5,0xf -800035cc: 06c12083 lw ra,108(sp) -800035d0: 00e7f7b3 and a5,a5,a4 -800035d4: ffffe737 lui a4,0xffffe -800035d8: 00e787b3 add a5,a5,a4 -800035dc: 06812403 lw s0,104(sp) -800035e0: 0017b793 seqz a5,a5 -800035e4: 00f92023 sw a5,0(s2) -800035e8: 40000793 li a5,1024 -800035ec: 00f4a023 sw a5,0(s1) -800035f0: 00001537 lui a0,0x1 -800035f4: 06412483 lw s1,100(sp) -800035f8: 06012903 lw s2,96(sp) -800035fc: 80050513 addi a0,a0,-2048 # 800 <_start-0x7ffff800> -80003600: 07010113 addi sp,sp,112 -80003604: 00008067 ret -80003608: 00c45783 lhu a5,12(s0) -8000360c: 00092023 sw zero,0(s2) -80003610: 0807f793 andi a5,a5,128 -80003614: 02078463 beqz a5,8000363c <__swhatbuf_r+0xac> -80003618: 06c12083 lw ra,108(sp) -8000361c: 06812403 lw s0,104(sp) -80003620: 04000793 li a5,64 -80003624: 00f4a023 sw a5,0(s1) -80003628: 06012903 lw s2,96(sp) -8000362c: 06412483 lw s1,100(sp) -80003630: 00000513 li a0,0 -80003634: 07010113 addi sp,sp,112 -80003638: 00008067 ret -8000363c: 06c12083 lw ra,108(sp) -80003640: 06812403 lw s0,104(sp) -80003644: 40000793 li a5,1024 -80003648: 00f4a023 sw a5,0(s1) -8000364c: 06012903 lw s2,96(sp) -80003650: 06412483 lw s1,100(sp) -80003654: 00000513 li a0,0 -80003658: 07010113 addi sp,sp,112 -8000365c: 00008067 ret - -80003660 <__smakebuf_r>: -80003660: 00c5d783 lhu a5,12(a1) -80003664: fe010113 addi sp,sp,-32 -80003668: 00812c23 sw s0,24(sp) -8000366c: 00112e23 sw ra,28(sp) -80003670: 00912a23 sw s1,20(sp) -80003674: 01212823 sw s2,16(sp) -80003678: 0027f793 andi a5,a5,2 -8000367c: 00058413 mv s0,a1 -80003680: 02078863 beqz a5,800036b0 <__smakebuf_r+0x50> -80003684: 04358793 addi a5,a1,67 -80003688: 00f5a023 sw a5,0(a1) -8000368c: 00f5a823 sw a5,16(a1) -80003690: 00100793 li a5,1 -80003694: 00f5aa23 sw a5,20(a1) -80003698: 01c12083 lw ra,28(sp) -8000369c: 01812403 lw s0,24(sp) -800036a0: 01412483 lw s1,20(sp) -800036a4: 01012903 lw s2,16(sp) -800036a8: 02010113 addi sp,sp,32 -800036ac: 00008067 ret -800036b0: 00c10693 addi a3,sp,12 -800036b4: 00810613 addi a2,sp,8 -800036b8: 00050493 mv s1,a0 -800036bc: ed5ff0ef jal ra,80003590 <__swhatbuf_r> -800036c0: 00812583 lw a1,8(sp) -800036c4: 00050913 mv s2,a0 -800036c8: 00048513 mv a0,s1 -800036cc: a38fe0ef jal ra,80001904 <_malloc_r> -800036d0: 00c41783 lh a5,12(s0) -800036d4: 04050863 beqz a0,80003724 <__smakebuf_r+0xc4> -800036d8: 80001737 lui a4,0x80001 -800036dc: fb070713 addi a4,a4,-80 # 80000fb0 <__BSS_END__+0xffffc618> -800036e0: 02e4ae23 sw a4,60(s1) -800036e4: 00812703 lw a4,8(sp) -800036e8: 00c12683 lw a3,12(sp) -800036ec: 0807e793 ori a5,a5,128 -800036f0: 00f41623 sh a5,12(s0) -800036f4: 00a42023 sw a0,0(s0) -800036f8: 00a42823 sw a0,16(s0) -800036fc: 00e42a23 sw a4,20(s0) -80003700: 04069863 bnez a3,80003750 <__smakebuf_r+0xf0> -80003704: 0127e7b3 or a5,a5,s2 -80003708: 01c12083 lw ra,28(sp) -8000370c: 00f41623 sh a5,12(s0) -80003710: 01812403 lw s0,24(sp) -80003714: 01412483 lw s1,20(sp) -80003718: 01012903 lw s2,16(sp) -8000371c: 02010113 addi sp,sp,32 -80003720: 00008067 ret -80003724: 2007f713 andi a4,a5,512 -80003728: f60718e3 bnez a4,80003698 <__smakebuf_r+0x38> -8000372c: ffc7f793 andi a5,a5,-4 -80003730: 0027e793 ori a5,a5,2 -80003734: 04340713 addi a4,s0,67 -80003738: 00f41623 sh a5,12(s0) -8000373c: 00100793 li a5,1 -80003740: 00e42023 sw a4,0(s0) -80003744: 00e42823 sw a4,16(s0) -80003748: 00f42a23 sw a5,20(s0) -8000374c: f4dff06f j 80003698 <__smakebuf_r+0x38> -80003750: 00e41583 lh a1,14(s0) -80003754: 00048513 mv a0,s1 -80003758: 0f4000ef jal ra,8000384c <_isatty_r> -8000375c: 00051663 bnez a0,80003768 <__smakebuf_r+0x108> -80003760: 00c41783 lh a5,12(s0) -80003764: fa1ff06f j 80003704 <__smakebuf_r+0xa4> -80003768: 00c45703 lhu a4,12(s0) -8000376c: ffc77713 andi a4,a4,-4 -80003770: 00176713 ori a4,a4,1 -80003774: 01071793 slli a5,a4,0x10 -80003778: 4107d793 srai a5,a5,0x10 -8000377c: f89ff06f j 80003704 <__smakebuf_r+0xa4> - -80003780 <_read_r>: -80003780: ff010113 addi sp,sp,-16 -80003784: 00058713 mv a4,a1 -80003788: 00812423 sw s0,8(sp) -8000378c: 00912223 sw s1,4(sp) -80003790: 00060593 mv a1,a2 -80003794: 00050413 mv s0,a0 -80003798: 00068613 mv a2,a3 -8000379c: 00070513 mv a0,a4 -800037a0: 00112623 sw ra,12(sp) -800037a4: 1801a623 sw zero,396(gp) # 80004994 -800037a8: 258000ef jal ra,80003a00 <_read> -800037ac: fff00793 li a5,-1 -800037b0: 00f50c63 beq a0,a5,800037c8 <_read_r+0x48> -800037b4: 00c12083 lw ra,12(sp) -800037b8: 00812403 lw s0,8(sp) -800037bc: 00412483 lw s1,4(sp) -800037c0: 01010113 addi sp,sp,16 -800037c4: 00008067 ret -800037c8: 18c1a783 lw a5,396(gp) # 80004994 -800037cc: fe0784e3 beqz a5,800037b4 <_read_r+0x34> -800037d0: 00c12083 lw ra,12(sp) -800037d4: 00f42023 sw a5,0(s0) -800037d8: 00812403 lw s0,8(sp) -800037dc: 00412483 lw s1,4(sp) -800037e0: 01010113 addi sp,sp,16 -800037e4: 00008067 ret - -800037e8 <_fstat_r>: -800037e8: ff010113 addi sp,sp,-16 -800037ec: 00058713 mv a4,a1 -800037f0: 00812423 sw s0,8(sp) -800037f4: 00912223 sw s1,4(sp) -800037f8: 00050413 mv s0,a0 -800037fc: 00060593 mv a1,a2 -80003800: 00070513 mv a0,a4 -80003804: 00112623 sw ra,12(sp) -80003808: 1801a623 sw zero,396(gp) # 80004994 -8000380c: 0f4000ef jal ra,80003900 <_fstat> -80003810: fff00793 li a5,-1 -80003814: 00f50c63 beq a0,a5,8000382c <_fstat_r+0x44> -80003818: 00c12083 lw ra,12(sp) -8000381c: 00812403 lw s0,8(sp) -80003820: 00412483 lw s1,4(sp) -80003824: 01010113 addi sp,sp,16 -80003828: 00008067 ret -8000382c: 18c1a783 lw a5,396(gp) # 80004994 -80003830: fe0784e3 beqz a5,80003818 <_fstat_r+0x30> -80003834: 00c12083 lw ra,12(sp) -80003838: 00f42023 sw a5,0(s0) -8000383c: 00812403 lw s0,8(sp) -80003840: 00412483 lw s1,4(sp) -80003844: 01010113 addi sp,sp,16 -80003848: 00008067 ret - -8000384c <_isatty_r>: -8000384c: ff010113 addi sp,sp,-16 -80003850: 00812423 sw s0,8(sp) -80003854: 00912223 sw s1,4(sp) -80003858: 00050413 mv s0,a0 -8000385c: 00058513 mv a0,a1 -80003860: 00112623 sw ra,12(sp) -80003864: 1801a623 sw zero,396(gp) # 80004994 -80003868: 108000ef jal ra,80003970 <_isatty> -8000386c: fff00793 li a5,-1 -80003870: 00f50c63 beq a0,a5,80003888 <_isatty_r+0x3c> -80003874: 00c12083 lw ra,12(sp) -80003878: 00812403 lw s0,8(sp) -8000387c: 00412483 lw s1,4(sp) -80003880: 01010113 addi sp,sp,16 -80003884: 00008067 ret -80003888: 18c1a783 lw a5,396(gp) # 80004994 -8000388c: fe0784e3 beqz a5,80003874 <_isatty_r+0x28> -80003890: 00c12083 lw ra,12(sp) -80003894: 00f42023 sw a5,0(s0) -80003898: 00812403 lw s0,8(sp) -8000389c: 00412483 lw s1,4(sp) -800038a0: 01010113 addi sp,sp,16 -800038a4: 00008067 ret - -800038a8 <_close>: -800038a8: ff010113 addi sp,sp,-16 -800038ac: 00112623 sw ra,12(sp) -800038b0: 00812423 sw s0,8(sp) -800038b4: 00000593 li a1,0 -800038b8: 00000613 li a2,0 -800038bc: 00000693 li a3,0 -800038c0: 00000713 li a4,0 -800038c4: 00000793 li a5,0 -800038c8: 03900893 li a7,57 -800038cc: 00000073 ecall -800038d0: 00050413 mv s0,a0 -800038d4: 00054c63 bltz a0,800038ec <_close+0x44> -800038d8: 00c12083 lw ra,12(sp) -800038dc: 00040513 mv a0,s0 -800038e0: 00812403 lw s0,8(sp) -800038e4: 01010113 addi sp,sp,16 -800038e8: 00008067 ret -800038ec: 40800433 neg s0,s0 -800038f0: 2f0000ef jal ra,80003be0 <__errno> -800038f4: 00852023 sw s0,0(a0) -800038f8: fff00413 li s0,-1 -800038fc: fddff06f j 800038d8 <_close+0x30> - -80003900 <_fstat>: -80003900: f7010113 addi sp,sp,-144 -80003904: 08912223 sw s1,132(sp) -80003908: 08112623 sw ra,140(sp) -8000390c: 00058493 mv s1,a1 -80003910: 08812423 sw s0,136(sp) -80003914: 00010593 mv a1,sp -80003918: 00000613 li a2,0 -8000391c: 00000693 li a3,0 -80003920: 00000713 li a4,0 -80003924: 00000793 li a5,0 -80003928: 05000893 li a7,80 -8000392c: 00000073 ecall -80003930: 00050413 mv s0,a0 -80003934: 02054463 bltz a0,8000395c <_fstat+0x5c> -80003938: 00048513 mv a0,s1 -8000393c: 00010593 mv a1,sp -80003940: 1fc000ef jal ra,80003b3c <_conv_stat> -80003944: 08c12083 lw ra,140(sp) -80003948: 00040513 mv a0,s0 -8000394c: 08812403 lw s0,136(sp) -80003950: 08412483 lw s1,132(sp) -80003954: 09010113 addi sp,sp,144 -80003958: 00008067 ret -8000395c: 40800433 neg s0,s0 -80003960: 280000ef jal ra,80003be0 <__errno> -80003964: 00852023 sw s0,0(a0) -80003968: fff00413 li s0,-1 -8000396c: fcdff06f j 80003938 <_fstat+0x38> - -80003970 <_isatty>: -80003970: f9010113 addi sp,sp,-112 -80003974: 00810593 addi a1,sp,8 -80003978: 06112623 sw ra,108(sp) -8000397c: f85ff0ef jal ra,80003900 <_fstat> -80003980: fff00793 li a5,-1 -80003984: 00f50e63 beq a0,a5,800039a0 <_isatty+0x30> -80003988: 00c12503 lw a0,12(sp) -8000398c: 06c12083 lw ra,108(sp) -80003990: 00d55513 srli a0,a0,0xd -80003994: 00157513 andi a0,a0,1 -80003998: 07010113 addi sp,sp,112 -8000399c: 00008067 ret -800039a0: 06c12083 lw ra,108(sp) -800039a4: 00000513 li a0,0 -800039a8: 07010113 addi sp,sp,112 -800039ac: 00008067 ret - -800039b0 <_lseek>: -800039b0: ff010113 addi sp,sp,-16 -800039b4: 00112623 sw ra,12(sp) -800039b8: 00812423 sw s0,8(sp) -800039bc: 00000693 li a3,0 -800039c0: 00000713 li a4,0 -800039c4: 00000793 li a5,0 -800039c8: 03e00893 li a7,62 -800039cc: 00000073 ecall -800039d0: 00050413 mv s0,a0 -800039d4: 00054c63 bltz a0,800039ec <_lseek+0x3c> -800039d8: 00c12083 lw ra,12(sp) -800039dc: 00040513 mv a0,s0 -800039e0: 00812403 lw s0,8(sp) -800039e4: 01010113 addi sp,sp,16 -800039e8: 00008067 ret -800039ec: 40800433 neg s0,s0 -800039f0: 1f0000ef jal ra,80003be0 <__errno> -800039f4: 00852023 sw s0,0(a0) -800039f8: fff00413 li s0,-1 -800039fc: fddff06f j 800039d8 <_lseek+0x28> - -80003a00 <_read>: -80003a00: ff010113 addi sp,sp,-16 -80003a04: 00112623 sw ra,12(sp) -80003a08: 00812423 sw s0,8(sp) -80003a0c: 00000693 li a3,0 -80003a10: 00000713 li a4,0 -80003a14: 00000793 li a5,0 -80003a18: 03f00893 li a7,63 -80003a1c: 00000073 ecall -80003a20: 00050413 mv s0,a0 -80003a24: 00054c63 bltz a0,80003a3c <_read+0x3c> -80003a28: 00c12083 lw ra,12(sp) -80003a2c: 00040513 mv a0,s0 -80003a30: 00812403 lw s0,8(sp) -80003a34: 01010113 addi sp,sp,16 -80003a38: 00008067 ret -80003a3c: 40800433 neg s0,s0 -80003a40: 1a0000ef jal ra,80003be0 <__errno> -80003a44: 00852023 sw s0,0(a0) -80003a48: fff00413 li s0,-1 -80003a4c: fddff06f j 80003a28 <_read+0x28> - -80003a50 <_sbrk>: -80003a50: 0e41a783 lw a5,228(gp) # 800048ec -80003a54: ff010113 addi sp,sp,-16 -80003a58: 00112623 sw ra,12(sp) -80003a5c: 00050813 mv a6,a0 -80003a60: 02079863 bnez a5,80003a90 <_sbrk+0x40> -80003a64: 00000513 li a0,0 -80003a68: 00000593 li a1,0 -80003a6c: 00000613 li a2,0 -80003a70: 00000693 li a3,0 -80003a74: 00000713 li a4,0 -80003a78: 0d600893 li a7,214 -80003a7c: 00000073 ecall -80003a80: fff00713 li a4,-1 -80003a84: 00050793 mv a5,a0 -80003a88: 04e50463 beq a0,a4,80003ad0 <_sbrk+0x80> -80003a8c: 0ea1a223 sw a0,228(gp) # 800048ec -80003a90: 00f80533 add a0,a6,a5 -80003a94: 00000593 li a1,0 -80003a98: 00000613 li a2,0 -80003a9c: 00000693 li a3,0 -80003aa0: 00000713 li a4,0 -80003aa4: 00000793 li a5,0 -80003aa8: 0d600893 li a7,214 -80003aac: 00000073 ecall -80003ab0: 0e41a783 lw a5,228(gp) # 800048ec -80003ab4: 00f80833 add a6,a6,a5 -80003ab8: 01051c63 bne a0,a6,80003ad0 <_sbrk+0x80> -80003abc: 00c12083 lw ra,12(sp) -80003ac0: 0ea1a223 sw a0,228(gp) # 800048ec -80003ac4: 00078513 mv a0,a5 -80003ac8: 01010113 addi sp,sp,16 -80003acc: 00008067 ret -80003ad0: 110000ef jal ra,80003be0 <__errno> -80003ad4: 00c12083 lw ra,12(sp) -80003ad8: 00c00793 li a5,12 -80003adc: 00f52023 sw a5,0(a0) -80003ae0: fff00513 li a0,-1 -80003ae4: 01010113 addi sp,sp,16 -80003ae8: 00008067 ret - -80003aec <_write>: -80003aec: ff010113 addi sp,sp,-16 -80003af0: 00112623 sw ra,12(sp) -80003af4: 00812423 sw s0,8(sp) -80003af8: 00000693 li a3,0 -80003afc: 00000713 li a4,0 -80003b00: 00000793 li a5,0 -80003b04: 04000893 li a7,64 -80003b08: 00000073 ecall -80003b0c: 00050413 mv s0,a0 -80003b10: 00054c63 bltz a0,80003b28 <_write+0x3c> -80003b14: 00c12083 lw ra,12(sp) -80003b18: 00040513 mv a0,s0 -80003b1c: 00812403 lw s0,8(sp) -80003b20: 01010113 addi sp,sp,16 -80003b24: 00008067 ret -80003b28: 40800433 neg s0,s0 -80003b2c: 0b4000ef jal ra,80003be0 <__errno> -80003b30: 00852023 sw s0,0(a0) -80003b34: fff00413 li s0,-1 -80003b38: fddff06f j 80003b14 <_write+0x28> - -80003b3c <_conv_stat>: -80003b3c: ff010113 addi sp,sp,-16 -80003b40: 0145a383 lw t2,20(a1) -80003b44: 0185a283 lw t0,24(a1) -80003b48: 01c5af83 lw t6,28(a1) -80003b4c: 0205af03 lw t5,32(a1) -80003b50: 0305ae83 lw t4,48(a1) -80003b54: 0405ae03 lw t3,64(a1) -80003b58: 0385a303 lw t1,56(a1) -80003b5c: 0485a803 lw a6,72(a1) -80003b60: 04c5a883 lw a7,76(a1) -80003b64: 0585a603 lw a2,88(a1) -80003b68: 00812623 sw s0,12(sp) -80003b6c: 00912423 sw s1,8(sp) -80003b70: 0105a403 lw s0,16(a1) -80003b74: 0085a483 lw s1,8(a1) -80003b78: 01212223 sw s2,4(sp) -80003b7c: 0005a903 lw s2,0(a1) -80003b80: 05c5a683 lw a3,92(a1) -80003b84: 0685a703 lw a4,104(a1) -80003b88: 06c5a783 lw a5,108(a1) -80003b8c: 01251023 sh s2,0(a0) -80003b90: 00951123 sh s1,2(a0) -80003b94: 00852223 sw s0,4(a0) -80003b98: 00751423 sh t2,8(a0) -80003b9c: 00551523 sh t0,10(a0) -80003ba0: 01f51623 sh t6,12(a0) -80003ba4: 01e51723 sh t5,14(a0) -80003ba8: 01d52823 sw t4,16(a0) -80003bac: 05c52623 sw t3,76(a0) -80003bb0: 04652423 sw t1,72(a0) -80003bb4: 01052c23 sw a6,24(a0) -80003bb8: 01152e23 sw a7,28(a0) -80003bbc: 02c52423 sw a2,40(a0) -80003bc0: 02d52623 sw a3,44(a0) -80003bc4: 00c12403 lw s0,12(sp) -80003bc8: 02e52c23 sw a4,56(a0) -80003bcc: 02f52e23 sw a5,60(a0) -80003bd0: 00812483 lw s1,8(sp) -80003bd4: 00412903 lw s2,4(sp) -80003bd8: 01010113 addi sp,sp,16 -80003bdc: 00008067 ret - -80003be0 <__errno>: -80003be0: 0cc1a503 lw a0,204(gp) # 800048d4 <_impure_ptr> -80003be4: 00008067 ret +80000c28 <__call_exitprocs>: +80000c28: fd010113 addi sp,sp,-48 +80000c2c: 01412c23 sw s4,24(sp) +80000c30: cc01aa03 lw s4,-832(gp) # 800014c8 <_global_impure_ptr> +80000c34: 03212023 sw s2,32(sp) +80000c38: 02112623 sw ra,44(sp) +80000c3c: 148a2903 lw s2,328(s4) +80000c40: 02812423 sw s0,40(sp) +80000c44: 02912223 sw s1,36(sp) +80000c48: 01312e23 sw s3,28(sp) +80000c4c: 01512a23 sw s5,20(sp) +80000c50: 01612823 sw s6,16(sp) +80000c54: 01712623 sw s7,12(sp) +80000c58: 01812423 sw s8,8(sp) +80000c5c: 04090063 beqz s2,80000c9c <__call_exitprocs+0x74> +80000c60: 00050b13 mv s6,a0 +80000c64: 00058b93 mv s7,a1 +80000c68: 00100a93 li s5,1 +80000c6c: fff00993 li s3,-1 +80000c70: 00492483 lw s1,4(s2) +80000c74: fff48413 addi s0,s1,-1 +80000c78: 02044263 bltz s0,80000c9c <__call_exitprocs+0x74> +80000c7c: 00249493 slli s1,s1,0x2 +80000c80: 009904b3 add s1,s2,s1 +80000c84: 040b8463 beqz s7,80000ccc <__call_exitprocs+0xa4> +80000c88: 1044a783 lw a5,260(s1) +80000c8c: 05778063 beq a5,s7,80000ccc <__call_exitprocs+0xa4> +80000c90: fff40413 addi s0,s0,-1 +80000c94: ffc48493 addi s1,s1,-4 +80000c98: ff3416e3 bne s0,s3,80000c84 <__call_exitprocs+0x5c> +80000c9c: 02c12083 lw ra,44(sp) +80000ca0: 02812403 lw s0,40(sp) +80000ca4: 02412483 lw s1,36(sp) +80000ca8: 02012903 lw s2,32(sp) +80000cac: 01c12983 lw s3,28(sp) +80000cb0: 01812a03 lw s4,24(sp) +80000cb4: 01412a83 lw s5,20(sp) +80000cb8: 01012b03 lw s6,16(sp) +80000cbc: 00c12b83 lw s7,12(sp) +80000cc0: 00812c03 lw s8,8(sp) +80000cc4: 03010113 addi sp,sp,48 +80000cc8: 00008067 ret +80000ccc: 00492783 lw a5,4(s2) +80000cd0: 0044a683 lw a3,4(s1) +80000cd4: fff78793 addi a5,a5,-1 +80000cd8: 04878e63 beq a5,s0,80000d34 <__call_exitprocs+0x10c> +80000cdc: 0004a223 sw zero,4(s1) +80000ce0: fa0688e3 beqz a3,80000c90 <__call_exitprocs+0x68> +80000ce4: 18892783 lw a5,392(s2) +80000ce8: 008a9733 sll a4,s5,s0 +80000cec: 00492c03 lw s8,4(s2) +80000cf0: 00f777b3 and a5,a4,a5 +80000cf4: 02079263 bnez a5,80000d18 <__call_exitprocs+0xf0> +80000cf8: 000680e7 jalr a3 +80000cfc: 00492703 lw a4,4(s2) +80000d00: 148a2783 lw a5,328(s4) +80000d04: 01871463 bne a4,s8,80000d0c <__call_exitprocs+0xe4> +80000d08: f8f904e3 beq s2,a5,80000c90 <__call_exitprocs+0x68> +80000d0c: f80788e3 beqz a5,80000c9c <__call_exitprocs+0x74> +80000d10: 00078913 mv s2,a5 +80000d14: f5dff06f j 80000c70 <__call_exitprocs+0x48> +80000d18: 18c92783 lw a5,396(s2) +80000d1c: 0844a583 lw a1,132(s1) +80000d20: 00f77733 and a4,a4,a5 +80000d24: 00071c63 bnez a4,80000d3c <__call_exitprocs+0x114> +80000d28: 000b0513 mv a0,s6 +80000d2c: 000680e7 jalr a3 +80000d30: fcdff06f j 80000cfc <__call_exitprocs+0xd4> +80000d34: 00892223 sw s0,4(s2) +80000d38: fa9ff06f j 80000ce0 <__call_exitprocs+0xb8> +80000d3c: 00058513 mv a0,a1 +80000d40: 000680e7 jalr a3 +80000d44: fb9ff06f j 80000cfc <__call_exitprocs+0xd4> Disassembly of section .rodata: -80003be8 : -80003be8: 654c flw fa1,12(a0) -80003bea: 2774 fld fa3,200(a4) -80003bec: 74732073 csrs 0x747,t1 -80003bf0: 7261 lui tp,0xffff8 -80003bf2: 2e74 fld fa3,216(a2) -80003bf4: 2e2e fld ft8,200(sp) -80003bf6: 2820 fld fs0,80(s0) -80003bf8: 6854 flw fa3,20(s0) -80003bfa: 7369 lui t1,0xffffa -80003bfc: 6d20 flw fs0,88(a0) -80003bfe: 6769 lui a4,0x1a -80003c00: 7468 flw fa0,108(s0) -80003c02: 7420 flw fs0,104(s0) -80003c04: 6b61 lui s6,0x18 -80003c06: 2065 jal 80003cae <__errno+0xce> -80003c08: 2061 jal 80003c90 <__errno+0xb0> -80003c0a: 6c696877 0x6c696877 -80003c0e: 2965 jal 800040c6 -80003c10: 000a c.slli zero,0x2 -80003c12: 0000 unimp -80003c14: 3254 fld fa3,160(a2) -80003c16: 4620 lw s0,72(a2) -80003c18: 6961 lui s2,0x18 -80003c1a: 206c fld fa1,192(s0) -80003c1c: 00206e6f jal t3,80009c1e <__BSS_END__+0x5286> -80003c20: 3e2d7257 0x3e2d7257 -80003c24: 6572 flw fa0,28(sp) -80003c26: 6461 lui s0,0x18 -80003c28: 6120 flw fs0,64(a0) -80003c2a: 646e flw fs0,216(sp) -80003c2c: 7220 flw fs0,96(a2) -80003c2e: 7065 c.lui zero,0xffff9 -80003c30: 6165 addi sp,sp,112 -80003c32: 2874 fld fa3,208(s0) -80003c34: 20297257 0x20297257 -80003c38: 6574 flw fa3,76(a0) -80003c3a: 20737473 csrrci s0,0x207,6 -80003c3e: 6170 flw fa2,68(a0) -80003c40: 64657373 csrrci t1,0x646,10 -80003c44: 0a21 addi s4,s4,8 -80003c46: 0000 unimp -80003c48: 706d6953 0x706d6953 -80003c4c: 656c flw fa1,76(a0) -80003c4e: 4d20 lw s0,88(a0) -80003c50: 6961 lui s2,0x18 -80003c52: 0a6e slli s4,s4,0x1b -80003c54: 0000 unimp -80003c56: 0000 unimp -80003c58: 6574 flw fa3,76(a0) -80003c5a: 645f7473 csrrci s0,0x645,30 -80003c5e: 7669 lui a2,0xffffa -80003c60: 7265 lui tp,0xffff9 -80003c62: 636e6567 0x636e6567 -80003c66: 0a65 addi s4,s4,25 -80003c68: 0000 unimp -80003c6a: 0000 unimp -80003c6c: 6574 flw fa3,76(a0) -80003c6e: 775f7473 csrrci s0,0x775,30 -80003c72: 77617073 csrci 0x776,2 -80003c76: 0a6e slli s4,s4,0x1b -80003c78: 0000 unimp -80003c7a: 0000 unimp -80003c7c: 72616853 0x72616853 -80003c80: 6465 lui s0,0x19 -80003c82: 4d20 lw s0,88(a0) -80003c84: 6d65 lui s10,0x19 -80003c86: 2079726f jal tp,8009b68c <__BSS_END__+0x96cf4> -80003c8a: 6574 flw fa3,76(a0) -80003c8c: 000a7473 csrrci s0,ustatus,20 -80003c90: 7470 flw fa2,108(s0) -80003c92: 3a72 fld fs4,312(sp) -80003c94: 0020 addi s0,sp,8 -80003c96: 0000 unimp -80003c98: 6769724f fnmadd.q ft4,fs2,fs6,fa2 -80003c9c: 6e69 lui t3,0x1a -80003c9e: 6c61 lui s8,0x18 -80003ca0: 5620 lw s0,104(a2) -80003ca2: 6c61 lui s8,0x18 -80003ca4: 6575 lui a0,0x1d -80003ca6: 203a fld ft0,392(sp) -80003ca8: 0000 unimp -80003caa: 0000 unimp -80003cac: 6552 flw fa0,20(sp) -80003cae: 6461 lui s0,0x18 -80003cb0: 5620 lw s0,104(a2) -80003cb2: 6c61 lui s8,0x18 -80003cb4: 6575 lui a0,0x1d -80003cb6: 203a fld ft0,392(sp) -80003cb8: 0000 unimp -80003cba: 0000 unimp -80003cbc: 2d2d jal 800042f6 -80003cbe: 2d2d jal 800042f8 -80003cc0: 2d2d jal 800042fa -80003cc2: 2d2d jal 800042fc -80003cc4: 2d2d jal 800042fe -80003cc6: 2d2d jal 80004300 -80003cc8: 2d2d jal 80004302 -80003cca: 2d2d jal 80004304 -80003ccc: 2d2d jal 80004306 -80003cce: 0a2d addi s4,s4,11 -80003cd0: 0000 unimp -80003cd2: 0000 unimp -80003cd4: 7876 flw fa6,124(sp) -80003cd6: 735f 6170 6e77 0x6e776170735f -80003cdc: 775f 7261 7370 0x73707261775f -80003ce2: 6d20 flw fs0,88(a0) -80003ce4: 7461 lui s0,0xffff8 -80003ce6: 615f 6464 6b5f 0x6b5f6464615f -80003cec: 7265 lui tp,0xffff9 -80003cee: 656e flw fa0,216(sp) -80003cf0: 0a6c addi a1,sp,284 -80003cf2: 0000 unimp -80003cf4: 74696157 0x74696157 -80003cf8: 6e69 lui t3,0x1a -80003cfa: 6f742067 0x6f742067 -80003cfe: 6520 flw fs0,72(a0) -80003d00: 736e flw ft6,248(sp) -80003d02: 7275 lui tp,0xffffd -80003d04: 2065 jal 80003dac -80003d06: 6568746f jal s0,8008b35c <__BSS_END__+0x869c4> -80003d0a: 2072 fld ft0,280(sp) -80003d0c: 70726177 0x70726177 -80003d10: 72612073 csrs 0x726,sp -80003d14: 2065 jal 80003dbc -80003d16: 6f64 flw fs1,92(a4) -80003d18: 656e flw fa0,216(sp) -80003d1a: 2e2e fld ft8,200(sp) -80003d1c: 202e fld ft0,200(sp) -80003d1e: 5428 lw a0,104(s0) -80003d20: 6b61 lui s6,0x18 -80003d22: 7365 lui t1,0xffff9 -80003d24: 6120 flw fs0,64(a0) -80003d26: 7720 flw fs0,104(a4) -80003d28: 6968 flw fa0,84(a0) -80003d2a: 656c flw fa1,76(a0) -80003d2c: 0a29 addi s4,s4,10 -80003d2e: 0000 unimp -80003d30: 6574 flw fa3,76(a0) -80003d32: 6e697473 csrrci s0,0x6e6,18 -80003d36: 6d745f67 0x6d745f67 -80003d3a: 00000a63 beqz zero,80003d4e <__errno+0x16e> -80003d3e: 0000 unimp -80003d40: 6574 flw fa3,76(a0) -80003d42: 735f7473 csrrci s0,0x735,30 -80003d46: 6170 flw fa2,68(a0) -80003d48: 000a6e77 0xa6e77 -80003d4c: 0030 addi a2,sp,8 -80003d4e: 0000 unimp -80003d50: 0031 c.nop 12 -80003d52: 0000 unimp -80003d54: 0032 c.slli zero,0xc -80003d56: 0000 unimp -80003d58: 00000033 add zero,zero,zero -80003d5c: 0034 addi a3,sp,8 -80003d5e: 0000 unimp -80003d60: 0035 c.nop 13 -80003d62: 0000 unimp -80003d64: 0036 c.slli zero,0xd -80003d66: 0000 unimp -80003d68: 00000037 lui zero,0x0 -80003d6c: 0038 addi a4,sp,8 -80003d6e: 0000 unimp -80003d70: 0039 c.nop 14 -80003d72: 0000 unimp -80003d74: 0061 c.nop 24 -80003d76: 0000 unimp -80003d78: 0062 c.slli zero,0x18 -80003d7a: 0000 unimp -80003d7c: 00000063 beqz zero,80003d7c <__errno+0x19c> -80003d80: 0064 addi s1,sp,12 -80003d82: 0000 unimp -80003d84: 0065 c.nop 25 -80003d86: 0000 unimp -80003d88: 0066 c.slli zero,0x19 +80000d48 : +80000d48: 654c flw fa1,12(a0) +80000d4a: 2774 fld fa3,200(a4) +80000d4c: 74732073 csrs 0x747,t1 +80000d50: 7261 lui tp,0xffff8 +80000d52: 2e74 fld fa3,216(a2) +80000d54: 2e2e fld ft8,200(sp) +80000d56: 2820 fld fs0,80(s0) +80000d58: 6854 flw fa3,20(s0) +80000d5a: 7369 lui t1,0xffffa +80000d5c: 6d20 flw fs0,88(a0) +80000d5e: 6769 lui a4,0x1a +80000d60: 7468 flw fa0,108(s0) +80000d62: 7420 flw fs0,104(s0) +80000d64: 6b61 lui s6,0x18 +80000d66: 2065 jal 80000e0e <__call_exitprocs+0x1e6> +80000d68: 2061 jal 80000df0 <__call_exitprocs+0x1c8> +80000d6a: 6c696877 0x6c696877 +80000d6e: 2965 jal 80001226 +80000d70: 000a c.slli zero,0x2 +80000d72: 0000 unimp +80000d74: 3254 fld fa3,160(a2) +80000d76: 4620 lw s0,72(a2) +80000d78: 6961 lui s2,0x18 +80000d7a: 206c fld fa1,192(s0) +80000d7c: 00206e6f jal t3,80006d7e <__global_pointer$+0x5576> +80000d80: 3e2d7257 0x3e2d7257 +80000d84: 6572 flw fa0,28(sp) +80000d86: 6461 lui s0,0x18 +80000d88: 6120 flw fs0,64(a0) +80000d8a: 646e flw fs0,216(sp) +80000d8c: 7220 flw fs0,96(a2) +80000d8e: 7065 c.lui zero,0xffff9 +80000d90: 6165 addi sp,sp,112 +80000d92: 2874 fld fa3,208(s0) +80000d94: 20297257 0x20297257 +80000d98: 6574 flw fa3,76(a0) +80000d9a: 20737473 csrrci s0,0x207,6 +80000d9e: 6170 flw fa2,68(a0) +80000da0: 64657373 csrrci t1,0x646,10 +80000da4: 0a21 addi s4,s4,8 +80000da6: 0000 unimp +80000da8: 706d6953 0x706d6953 +80000dac: 656c flw fa1,76(a0) +80000dae: 4d20 lw s0,88(a0) +80000db0: 6961 lui s2,0x18 +80000db2: 0a6e slli s4,s4,0x1b +80000db4: 0000 unimp +80000db6: 0000 unimp +80000db8: 6574 flw fa3,76(a0) +80000dba: 645f7473 csrrci s0,0x645,30 +80000dbe: 7669 lui a2,0xffffa +80000dc0: 7265 lui tp,0xffff9 +80000dc2: 636e6567 0x636e6567 +80000dc6: 0a65 addi s4,s4,25 +80000dc8: 0000 unimp +80000dca: 0000 unimp +80000dcc: 6574 flw fa3,76(a0) +80000dce: 775f7473 csrrci s0,0x775,30 +80000dd2: 77617073 csrci 0x776,2 +80000dd6: 0a6e slli s4,s4,0x1b +80000dd8: 0000 unimp +80000dda: 0000 unimp +80000ddc: 72616853 0x72616853 +80000de0: 6465 lui s0,0x19 +80000de2: 4d20 lw s0,88(a0) +80000de4: 6d65 lui s10,0x19 +80000de6: 2079726f jal tp,800987ec <__global_pointer$+0x96fe4> +80000dea: 6574 flw fa3,76(a0) +80000dec: 000a7473 csrrci s0,ustatus,20 +80000df0: 7470 flw fa2,108(s0) +80000df2: 3a72 fld fs4,312(sp) +80000df4: 0020 addi s0,sp,8 +80000df6: 0000 unimp +80000df8: 6769724f fnmadd.q ft4,fs2,fs6,fa2 +80000dfc: 6e69 lui t3,0x1a +80000dfe: 6c61 lui s8,0x18 +80000e00: 5620 lw s0,104(a2) +80000e02: 6c61 lui s8,0x18 +80000e04: 6575 lui a0,0x1d +80000e06: 203a fld ft0,392(sp) +80000e08: 0000 unimp +80000e0a: 0000 unimp +80000e0c: 6552 flw fa0,20(sp) +80000e0e: 6461 lui s0,0x18 +80000e10: 5620 lw s0,104(a2) +80000e12: 6c61 lui s8,0x18 +80000e14: 6575 lui a0,0x1d +80000e16: 203a fld ft0,392(sp) +80000e18: 0000 unimp +80000e1a: 0000 unimp +80000e1c: 2d2d jal 80001456 +80000e1e: 2d2d jal 80001458 +80000e20: 2d2d jal 8000145a +80000e22: 2d2d jal 8000145c +80000e24: 2d2d jal 8000145e +80000e26: 2d2d jal 80001460 +80000e28: 2d2d jal 80001462 +80000e2a: 2d2d jal 80001464 +80000e2c: 2d2d jal 80001466 +80000e2e: 0a2d addi s4,s4,11 +80000e30: 0000 unimp +80000e32: 0000 unimp +80000e34: 7876 flw fa6,124(sp) +80000e36: 735f 6170 6e77 0x6e776170735f +80000e3c: 775f 7261 7370 0x73707261775f +80000e42: 6d20 flw fs0,88(a0) +80000e44: 7461 lui s0,0xffff8 +80000e46: 615f 6464 6b5f 0x6b5f6464615f +80000e4c: 7265 lui tp,0xffff9 +80000e4e: 656e flw fa0,216(sp) +80000e50: 0a6c addi a1,sp,284 +80000e52: 0000 unimp +80000e54: 74696157 0x74696157 +80000e58: 6e69 lui t3,0x1a +80000e5a: 6f742067 0x6f742067 +80000e5e: 6520 flw fs0,72(a0) +80000e60: 736e flw ft6,248(sp) +80000e62: 7275 lui tp,0xffffd +80000e64: 2065 jal 80000f0c +80000e66: 6568746f jal s0,800884bc <__global_pointer$+0x86cb4> +80000e6a: 2072 fld ft0,280(sp) +80000e6c: 70726177 0x70726177 +80000e70: 72612073 csrs 0x726,sp +80000e74: 2065 jal 80000f1c +80000e76: 6f64 flw fs1,92(a4) +80000e78: 656e flw fa0,216(sp) +80000e7a: 2e2e fld ft8,200(sp) +80000e7c: 202e fld ft0,200(sp) +80000e7e: 5428 lw a0,104(s0) +80000e80: 6b61 lui s6,0x18 +80000e82: 7365 lui t1,0xffff9 +80000e84: 6120 flw fs0,64(a0) +80000e86: 7720 flw fs0,104(a4) +80000e88: 6968 flw fa0,84(a0) +80000e8a: 656c flw fa1,76(a0) +80000e8c: 0a29 addi s4,s4,10 +80000e8e: 0000 unimp +80000e90: 6574 flw fa3,76(a0) +80000e92: 6e697473 csrrci s0,0x6e6,18 +80000e96: 6d745f67 0x6d745f67 +80000e9a: 00000a63 beqz zero,80000eae <__call_exitprocs+0x286> +80000e9e: 0000 unimp +80000ea0: 6574 flw fa3,76(a0) +80000ea2: 735f7473 csrrci s0,0x735,30 +80000ea6: 6170 flw fa2,68(a0) +80000ea8: 000a6e77 0xa6e77 +80000eac: 0030 addi a2,sp,8 +80000eae: 0000 unimp +80000eb0: 0031 c.nop 12 +80000eb2: 0000 unimp +80000eb4: 0032 c.slli zero,0xc +80000eb6: 0000 unimp +80000eb8: 00000033 add zero,zero,zero +80000ebc: 0034 addi a3,sp,8 +80000ebe: 0000 unimp +80000ec0: 0035 c.nop 13 +80000ec2: 0000 unimp +80000ec4: 0036 c.slli zero,0xd +80000ec6: 0000 unimp +80000ec8: 00000037 lui zero,0x0 +80000ecc: 0038 addi a4,sp,8 +80000ece: 0000 unimp +80000ed0: 0039 c.nop 14 +80000ed2: 0000 unimp +80000ed4: 0061 c.nop 24 +80000ed6: 0000 unimp +80000ed8: 0062 c.slli zero,0x18 +80000eda: 0000 unimp +80000edc: 00000063 beqz zero,80000edc <__call_exitprocs+0x2b4> +80000ee0: 0064 addi s1,sp,12 +80000ee2: 0000 unimp +80000ee4: 0065 c.nop 25 +80000ee6: 0000 unimp +80000ee8: 0066 c.slli zero,0x19 ... -80003d8c : -80003d8c: 3d4c fld fa1,184(a0) -80003d8e: 8000 0x8000 -80003d90: 3d50 fld fa2,184(a0) -80003d92: 8000 0x8000 -80003d94: 3d54 fld fa3,184(a0) -80003d96: 8000 0x8000 -80003d98: 3d58 fld fa4,184(a0) -80003d9a: 8000 0x8000 -80003d9c: 3d5c fld fa5,184(a0) -80003d9e: 8000 0x8000 -80003da0: 3d60 fld fs0,248(a0) -80003da2: 8000 0x8000 -80003da4: 3d64 fld fs1,248(a0) -80003da6: 8000 0x8000 -80003da8: 3d68 fld fa0,248(a0) -80003daa: 8000 0x8000 -80003dac: 3d6c fld fa1,248(a0) -80003dae: 8000 0x8000 -80003db0: 3d70 fld fa2,248(a0) -80003db2: 8000 0x8000 -80003db4: 3d74 fld fa3,248(a0) -80003db6: 8000 0x8000 -80003db8: 3d78 fld fa4,248(a0) -80003dba: 8000 0x8000 -80003dbc: 3d7c fld fa5,248(a0) -80003dbe: 8000 0x8000 -80003dc0: 3d80 fld fs0,56(a1) -80003dc2: 8000 0x8000 -80003dc4: 3d84 fld fs1,56(a1) -80003dc6: 8000 0x8000 -80003dc8: 3d88 fld fa0,56(a1) -80003dca: 8000 0x8000 -80003dcc: 5245 li tp,-15 -80003dce: 4f52 lw t5,20(sp) -80003dd0: 3a52 fld fs4,304(sp) -80003dd2: 7020 flw fs0,96(s0) -80003dd4: 5f6c636f jal t1,800ca3ca <__BSS_END__+0xc5a32> -80003dd8: 77617073 csrci 0x776,2 -80003ddc: 206e fld ft0,216(sp) -80003dde: 6f64 flw fs1,92(a4) -80003de0: 7365 lui t1,0xffff9 -80003de2: 276e fld fa4,216(sp) -80003de4: 2074 fld fa3,192(s0) -80003de6: 70707573 csrrci a0,0x707,0 -80003dea: 2074726f jal tp,8004b7f0 <__BSS_END__+0x46e58> -80003dee: 205a fld ft0,400(sp) -80003df0: 6964 flw fs1,84(a0) -80003df2: 656d lui a0,0x1b -80003df4: 736e flw ft6,248(sp) -80003df6: 6f69 lui t5,0x1a -80003df8: 206e fld ft0,216(sp) -80003dfa: 6579 lui a0,0x1e -80003dfc: 2174 fld fa3,192(a0) - ... +80000eec : +80000eec: 0eac addi a1,sp,856 +80000eee: 8000 0x8000 +80000ef0: 0eb0 addi a2,sp,856 +80000ef2: 8000 0x8000 +80000ef4: 0eb4 addi a3,sp,856 +80000ef6: 8000 0x8000 +80000ef8: 0eb8 addi a4,sp,856 +80000efa: 8000 0x8000 +80000efc: 0ebc addi a5,sp,856 +80000efe: 8000 0x8000 +80000f00: 0ec0 addi s0,sp,852 +80000f02: 8000 0x8000 +80000f04: 0ec4 addi s1,sp,852 +80000f06: 8000 0x8000 +80000f08: 0ec8 addi a0,sp,852 +80000f0a: 8000 0x8000 +80000f0c: 0ecc addi a1,sp,852 +80000f0e: 8000 0x8000 +80000f10: 0ed0 addi a2,sp,852 +80000f12: 8000 0x8000 +80000f14: 0ed4 addi a3,sp,852 +80000f16: 8000 0x8000 +80000f18: 0ed8 addi a4,sp,852 +80000f1a: 8000 0x8000 +80000f1c: 0edc addi a5,sp,852 +80000f1e: 8000 0x8000 +80000f20: 0ee0 addi s0,sp,860 +80000f22: 8000 0x8000 +80000f24: 0ee4 addi s1,sp,860 +80000f26: 8000 0x8000 +80000f28: 0ee8 addi a0,sp,860 +80000f2a: 8000 0x8000 Disassembly of section .init_array: -80004000 <__init_array_start>: -80004000: 0260 addi s0,sp,268 -80004002: 8000 0x8000 +80001000 <__init_array_start>: +80001000: 0260 addi s0,sp,268 +80001002: 8000 0x8000 Disassembly of section .data: -80004008 : -80004008: 0005 c.nop 1 -8000400a: 0000 unimp -8000400c: 0005 c.nop 1 -8000400e: 0000 unimp -80004010: 0005 c.nop 1 -80004012: 0000 unimp -80004014: 0005 c.nop 1 -80004016: 0000 unimp -80004018: 0006 c.slli zero,0x1 -8000401a: 0000 unimp -8000401c: 0006 c.slli zero,0x1 -8000401e: 0000 unimp -80004020: 0006 c.slli zero,0x1 -80004022: 0000 unimp -80004024: 0006 c.slli zero,0x1 -80004026: 0000 unimp -80004028: 00000007 0x7 -8000402c: 00000007 0x7 -80004030: 00000007 0x7 -80004034: 00000007 0x7 -80004038: 0008 0x8 -8000403a: 0000 unimp -8000403c: 0008 0x8 -8000403e: 0000 unimp -80004040: 0008 0x8 -80004042: 0000 unimp -80004044: 0008 0x8 +80001008 : +80001008: 0005 c.nop 1 +8000100a: 0000 unimp +8000100c: 0005 c.nop 1 +8000100e: 0000 unimp +80001010: 0005 c.nop 1 +80001012: 0000 unimp +80001014: 0005 c.nop 1 +80001016: 0000 unimp +80001018: 0006 c.slli zero,0x1 +8000101a: 0000 unimp +8000101c: 0006 c.slli zero,0x1 +8000101e: 0000 unimp +80001020: 0006 c.slli zero,0x1 +80001022: 0000 unimp +80001024: 0006 c.slli zero,0x1 +80001026: 0000 unimp +80001028: 00000007 0x7 +8000102c: 00000007 0x7 +80001030: 00000007 0x7 +80001034: 00000007 0x7 +80001038: 0008 0x8 +8000103a: 0000 unimp +8000103c: 0008 0x8 +8000103e: 0000 unimp +80001040: 0008 0x8 +80001042: 0000 unimp +80001044: 0008 0x8 ... -80004048 : -80004048: 0001 nop -8000404a: 0000 unimp -8000404c: 0001 nop -8000404e: 0000 unimp -80004050: 0001 nop -80004052: 0000 unimp -80004054: 0001 nop -80004056: 0000 unimp -80004058: 0001 nop -8000405a: 0000 unimp -8000405c: 0001 nop -8000405e: 0000 unimp -80004060: 0001 nop -80004062: 0000 unimp -80004064: 0001 nop -80004066: 0000 unimp -80004068: 0001 nop -8000406a: 0000 unimp -8000406c: 0001 nop -8000406e: 0000 unimp -80004070: 0001 nop -80004072: 0000 unimp -80004074: 0001 nop -80004076: 0000 unimp -80004078: 0001 nop -8000407a: 0000 unimp -8000407c: 0001 nop -8000407e: 0000 unimp -80004080: 0001 nop -80004082: 0000 unimp -80004084: 0001 nop +80001048 : +80001048: 0001 nop +8000104a: 0000 unimp +8000104c: 0001 nop +8000104e: 0000 unimp +80001050: 0001 nop +80001052: 0000 unimp +80001054: 0001 nop +80001056: 0000 unimp +80001058: 0001 nop +8000105a: 0000 unimp +8000105c: 0001 nop +8000105e: 0000 unimp +80001060: 0001 nop +80001062: 0000 unimp +80001064: 0001 nop +80001066: 0000 unimp +80001068: 0001 nop +8000106a: 0000 unimp +8000106c: 0001 nop +8000106e: 0000 unimp +80001070: 0001 nop +80001072: 0000 unimp +80001074: 0001 nop +80001076: 0000 unimp +80001078: 0001 nop +8000107a: 0000 unimp +8000107c: 0001 nop +8000107e: 0000 unimp +80001080: 0001 nop +80001082: 0000 unimp +80001084: 0001 nop ... -80004088 : -80004088: 0005 c.nop 1 -8000408a: 0000 unimp -8000408c: 0005 c.nop 1 -8000408e: 0000 unimp -80004090: 0005 c.nop 1 -80004092: 0000 unimp -80004094: 0005 c.nop 1 +80001088 : +80001088: 0005 c.nop 1 +8000108a: 0000 unimp +8000108c: 0005 c.nop 1 +8000108e: 0000 unimp +80001090: 0005 c.nop 1 +80001092: 0000 unimp +80001094: 0005 c.nop 1 ... -80004098 : -80004098: fffc fsw fa5,124(a5) -8000409a: ffff 0xffff -8000409c: 0000 unimp +80001098 : +80001098: fffc fsw fa5,124(a5) +8000109a: ffff 0xffff +8000109c: 0000 unimp ... -800040a0 : -800040a0: 0000 unimp -800040a2: 0000 unimp -800040a4: 438c lw a1,0(a5) -800040a6: 8000 0x8000 -800040a8: 43f4 lw a3,68(a5) -800040aa: 8000 0x8000 -800040ac: 445c lw a5,12(s0) -800040ae: 8000 0x8000 +800010a0 : +800010a0: 0000 unimp +800010a2: 0000 unimp +800010a4: 138c addi a1,sp,480 +800010a6: 8000 0x8000 +800010a8: 13f4 addi a3,sp,492 +800010aa: 8000 0x8000 +800010ac: 145c addi a5,sp,548 +800010ae: 8000 0x8000 ... -80004148: 0001 nop -8000414a: 0000 unimp -8000414c: 0000 unimp -8000414e: 0000 unimp -80004150: 330e fld ft6,224(sp) -80004152: abcd j 80004744 <__malloc_av_+0x27c> -80004154: 1234 addi a3,sp,296 -80004156: e66d bnez a2,80004240 -80004158: deec sw a1,124(a3) -8000415a: 0005 c.nop 1 -8000415c: 0000000b 0xb +80001148: 0001 nop +8000114a: 0000 unimp +8000114c: 0000 unimp +8000114e: 0000 unimp +80001150: 330e fld ft6,224(sp) +80001152: abcd j 80001744 <__BSS_END__+0x214> +80001154: 1234 addi a3,sp,296 +80001156: e66d bnez a2,80001240 +80001158: deec sw a1,124(a3) +8000115a: 0005 c.nop 1 +8000115c: 0000000b 0xb ... -800044c8 <__malloc_av_>: - ... -800044d0: 44c8 lw a0,12(s1) -800044d2: 8000 0x8000 -800044d4: 44c8 lw a0,12(s1) -800044d6: 8000 0x8000 -800044d8: 44d0 lw a2,12(s1) -800044da: 8000 0x8000 -800044dc: 44d0 lw a2,12(s1) -800044de: 8000 0x8000 -800044e0: 44d8 lw a4,12(s1) -800044e2: 8000 0x8000 -800044e4: 44d8 lw a4,12(s1) -800044e6: 8000 0x8000 -800044e8: 44e0 lw s0,76(s1) -800044ea: 8000 0x8000 -800044ec: 44e0 lw s0,76(s1) -800044ee: 8000 0x8000 -800044f0: 44e8 lw a0,76(s1) -800044f2: 8000 0x8000 -800044f4: 44e8 lw a0,76(s1) -800044f6: 8000 0x8000 -800044f8: 44f0 lw a2,76(s1) -800044fa: 8000 0x8000 -800044fc: 44f0 lw a2,76(s1) -800044fe: 8000 0x8000 -80004500: 44f8 lw a4,76(s1) -80004502: 8000 0x8000 -80004504: 44f8 lw a4,76(s1) -80004506: 8000 0x8000 -80004508: 4500 lw s0,8(a0) -8000450a: 8000 0x8000 -8000450c: 4500 lw s0,8(a0) -8000450e: 8000 0x8000 -80004510: 4508 lw a0,8(a0) -80004512: 8000 0x8000 -80004514: 4508 lw a0,8(a0) -80004516: 8000 0x8000 -80004518: 4510 lw a2,8(a0) -8000451a: 8000 0x8000 -8000451c: 4510 lw a2,8(a0) -8000451e: 8000 0x8000 -80004520: 4518 lw a4,8(a0) -80004522: 8000 0x8000 -80004524: 4518 lw a4,8(a0) -80004526: 8000 0x8000 -80004528: 4520 lw s0,72(a0) -8000452a: 8000 0x8000 -8000452c: 4520 lw s0,72(a0) -8000452e: 8000 0x8000 -80004530: 4528 lw a0,72(a0) -80004532: 8000 0x8000 -80004534: 4528 lw a0,72(a0) -80004536: 8000 0x8000 -80004538: 4530 lw a2,72(a0) -8000453a: 8000 0x8000 -8000453c: 4530 lw a2,72(a0) -8000453e: 8000 0x8000 -80004540: 4538 lw a4,72(a0) -80004542: 8000 0x8000 -80004544: 4538 lw a4,72(a0) -80004546: 8000 0x8000 -80004548: 4540 lw s0,12(a0) -8000454a: 8000 0x8000 -8000454c: 4540 lw s0,12(a0) -8000454e: 8000 0x8000 -80004550: 4548 lw a0,12(a0) -80004552: 8000 0x8000 -80004554: 4548 lw a0,12(a0) -80004556: 8000 0x8000 -80004558: 4550 lw a2,12(a0) -8000455a: 8000 0x8000 -8000455c: 4550 lw a2,12(a0) -8000455e: 8000 0x8000 -80004560: 4558 lw a4,12(a0) -80004562: 8000 0x8000 -80004564: 4558 lw a4,12(a0) -80004566: 8000 0x8000 -80004568: 4560 lw s0,76(a0) -8000456a: 8000 0x8000 -8000456c: 4560 lw s0,76(a0) -8000456e: 8000 0x8000 -80004570: 4568 lw a0,76(a0) -80004572: 8000 0x8000 -80004574: 4568 lw a0,76(a0) -80004576: 8000 0x8000 -80004578: 4570 lw a2,76(a0) -8000457a: 8000 0x8000 -8000457c: 4570 lw a2,76(a0) -8000457e: 8000 0x8000 -80004580: 4578 lw a4,76(a0) -80004582: 8000 0x8000 -80004584: 4578 lw a4,76(a0) -80004586: 8000 0x8000 -80004588: 4580 lw s0,8(a1) -8000458a: 8000 0x8000 -8000458c: 4580 lw s0,8(a1) -8000458e: 8000 0x8000 -80004590: 4588 lw a0,8(a1) -80004592: 8000 0x8000 -80004594: 4588 lw a0,8(a1) -80004596: 8000 0x8000 -80004598: 4590 lw a2,8(a1) -8000459a: 8000 0x8000 -8000459c: 4590 lw a2,8(a1) -8000459e: 8000 0x8000 -800045a0: 4598 lw a4,8(a1) -800045a2: 8000 0x8000 -800045a4: 4598 lw a4,8(a1) -800045a6: 8000 0x8000 -800045a8: 45a0 lw s0,72(a1) -800045aa: 8000 0x8000 -800045ac: 45a0 lw s0,72(a1) -800045ae: 8000 0x8000 -800045b0: 45a8 lw a0,72(a1) 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8000 0x8000 -80004600: 45f8 lw a4,76(a1) -80004602: 8000 0x8000 -80004604: 45f8 lw a4,76(a1) -80004606: 8000 0x8000 -80004608: 4600 lw s0,8(a2) -8000460a: 8000 0x8000 -8000460c: 4600 lw s0,8(a2) -8000460e: 8000 0x8000 -80004610: 4608 lw a0,8(a2) -80004612: 8000 0x8000 -80004614: 4608 lw a0,8(a2) -80004616: 8000 0x8000 -80004618: 4610 lw a2,8(a2) -8000461a: 8000 0x8000 -8000461c: 4610 lw a2,8(a2) -8000461e: 8000 0x8000 -80004620: 4618 lw a4,8(a2) -80004622: 8000 0x8000 -80004624: 4618 lw a4,8(a2) -80004626: 8000 0x8000 -80004628: 4620 lw s0,72(a2) -8000462a: 8000 0x8000 -8000462c: 4620 lw s0,72(a2) -8000462e: 8000 0x8000 -80004630: 4628 lw a0,72(a2) -80004632: 8000 0x8000 -80004634: 4628 lw a0,72(a2) -80004636: 8000 0x8000 -80004638: 4630 lw a2,72(a2) -8000463a: 8000 0x8000 -8000463c: 4630 lw a2,72(a2) -8000463e: 8000 0x8000 -80004640: 4638 lw a4,72(a2) -80004642: 8000 0x8000 -80004644: 4638 lw a4,72(a2) -80004646: 8000 0x8000 -80004648: 4640 lw s0,12(a2) -8000464a: 8000 0x8000 -8000464c: 4640 lw s0,12(a2) -8000464e: 8000 0x8000 -80004650: 4648 lw a0,12(a2) -80004652: 8000 0x8000 -80004654: 4648 lw a0,12(a2) -80004656: 8000 0x8000 -80004658: 4650 lw a2,12(a2) -8000465a: 8000 0x8000 -8000465c: 4650 lw a2,12(a2) -8000465e: 8000 0x8000 -80004660: 4658 lw a4,12(a2) -80004662: 8000 0x8000 -80004664: 4658 lw a4,12(a2) -80004666: 8000 0x8000 -80004668: 4660 lw s0,76(a2) -8000466a: 8000 0x8000 -8000466c: 4660 lw s0,76(a2) -8000466e: 8000 0x8000 -80004670: 4668 lw a0,76(a2) -80004672: 8000 0x8000 -80004674: 4668 lw a0,76(a2) -80004676: 8000 0x8000 -80004678: 4670 lw a2,76(a2) -8000467a: 8000 0x8000 -8000467c: 4670 lw a2,76(a2) -8000467e: 8000 0x8000 -80004680: 4678 lw a4,76(a2) -80004682: 8000 0x8000 -80004684: 4678 lw a4,76(a2) -80004686: 8000 0x8000 -80004688: 4680 lw s0,8(a3) -8000468a: 8000 0x8000 -8000468c: 4680 lw s0,8(a3) -8000468e: 8000 0x8000 -80004690: 4688 lw a0,8(a3) -80004692: 8000 0x8000 -80004694: 4688 lw a0,8(a3) -80004696: 8000 0x8000 -80004698: 4690 lw a2,8(a3) -8000469a: 8000 0x8000 -8000469c: 4690 lw a2,8(a3) -8000469e: 8000 0x8000 -800046a0: 4698 lw a4,8(a3) -800046a2: 8000 0x8000 -800046a4: 4698 lw a4,8(a3) -800046a6: 8000 0x8000 -800046a8: 46a0 lw s0,72(a3) -800046aa: 8000 0x8000 -800046ac: 46a0 lw s0,72(a3) -800046ae: 8000 0x8000 -800046b0: 46a8 lw a0,72(a3) -800046b2: 8000 0x8000 -800046b4: 46a8 lw a0,72(a3) -800046b6: 8000 0x8000 -800046b8: 46b0 lw a2,72(a3) -800046ba: 8000 0x8000 -800046bc: 46b0 lw a2,72(a3) -800046be: 8000 0x8000 -800046c0: 46b8 lw a4,72(a3) -800046c2: 8000 0x8000 -800046c4: 46b8 lw a4,72(a3) -800046c6: 8000 0x8000 -800046c8: 46c0 lw s0,12(a3) -800046ca: 8000 0x8000 -800046cc: 46c0 lw s0,12(a3) -800046ce: 8000 0x8000 -800046d0: 46c8 lw a0,12(a3) -800046d2: 8000 0x8000 -800046d4: 46c8 lw a0,12(a3) -800046d6: 8000 0x8000 -800046d8: 46d0 lw a2,12(a3) -800046da: 8000 0x8000 -800046dc: 46d0 lw a2,12(a3) -800046de: 8000 0x8000 -800046e0: 46d8 lw a4,12(a3) -800046e2: 8000 0x8000 -800046e4: 46d8 lw a4,12(a3) -800046e6: 8000 0x8000 -800046e8: 46e0 lw s0,76(a3) -800046ea: 8000 0x8000 -800046ec: 46e0 lw s0,76(a3) -800046ee: 8000 0x8000 -800046f0: 46e8 lw a0,76(a3) -800046f2: 8000 0x8000 -800046f4: 46e8 lw a0,76(a3) -800046f6: 8000 0x8000 -800046f8: 46f0 lw a2,76(a3) -800046fa: 8000 0x8000 -800046fc: 46f0 lw a2,76(a3) -800046fe: 8000 0x8000 -80004700: 46f8 lw a4,76(a3) -80004702: 8000 0x8000 -80004704: 46f8 lw a4,76(a3) -80004706: 8000 0x8000 -80004708: 4700 lw s0,8(a4) -8000470a: 8000 0x8000 -8000470c: 4700 lw s0,8(a4) -8000470e: 8000 0x8000 -80004710: 4708 lw a0,8(a4) -80004712: 8000 0x8000 -80004714: 4708 lw a0,8(a4) -80004716: 8000 0x8000 -80004718: 4710 lw a2,8(a4) -8000471a: 8000 0x8000 -8000471c: 4710 lw a2,8(a4) -8000471e: 8000 0x8000 -80004720: 4718 lw a4,8(a4) -80004722: 8000 0x8000 -80004724: 4718 lw a4,8(a4) -80004726: 8000 0x8000 -80004728: 4720 lw s0,72(a4) -8000472a: 8000 0x8000 -8000472c: 4720 lw s0,72(a4) -8000472e: 8000 0x8000 -80004730: 4728 lw a0,72(a4) -80004732: 8000 0x8000 -80004734: 4728 lw a0,72(a4) -80004736: 8000 0x8000 -80004738: 4730 lw a2,72(a4) -8000473a: 8000 0x8000 -8000473c: 4730 lw a2,72(a4) -8000473e: 8000 0x8000 -80004740: 4738 lw a4,72(a4) -80004742: 8000 0x8000 -80004744: 4738 lw a4,72(a4) -80004746: 8000 0x8000 -80004748: 4740 lw s0,12(a4) -8000474a: 8000 0x8000 -8000474c: 4740 lw s0,12(a4) -8000474e: 8000 0x8000 -80004750: 4748 lw a0,12(a4) -80004752: 8000 0x8000 -80004754: 4748 lw a0,12(a4) -80004756: 8000 0x8000 -80004758: 4750 lw a2,12(a4) -8000475a: 8000 0x8000 -8000475c: 4750 lw a2,12(a4) -8000475e: 8000 0x8000 -80004760: 4758 lw a4,12(a4) -80004762: 8000 0x8000 -80004764: 4758 lw a4,12(a4) -80004766: 8000 0x8000 -80004768: 4760 lw s0,76(a4) -8000476a: 8000 0x8000 -8000476c: 4760 lw s0,76(a4) -8000476e: 8000 0x8000 -80004770: 4768 lw a0,76(a4) -80004772: 8000 0x8000 -80004774: 4768 lw a0,76(a4) -80004776: 8000 0x8000 -80004778: 4770 lw a2,76(a4) -8000477a: 8000 0x8000 -8000477c: 4770 lw a2,76(a4) -8000477e: 8000 0x8000 -80004780: 4778 lw a4,76(a4) -80004782: 8000 0x8000 -80004784: 4778 lw a4,76(a4) -80004786: 8000 0x8000 -80004788: 4780 lw s0,8(a5) -8000478a: 8000 0x8000 -8000478c: 4780 lw s0,8(a5) -8000478e: 8000 0x8000 -80004790: 4788 lw a0,8(a5) -80004792: 8000 0x8000 -80004794: 4788 lw a0,8(a5) -80004796: 8000 0x8000 -80004798: 4790 lw a2,8(a5) -8000479a: 8000 0x8000 -8000479c: 4790 lw a2,8(a5) -8000479e: 8000 0x8000 -800047a0: 4798 lw a4,8(a5) -800047a2: 8000 0x8000 -800047a4: 4798 lw a4,8(a5) -800047a6: 8000 0x8000 -800047a8: 47a0 lw s0,72(a5) -800047aa: 8000 0x8000 -800047ac: 47a0 lw s0,72(a5) -800047ae: 8000 0x8000 -800047b0: 47a8 lw a0,72(a5) -800047b2: 8000 0x8000 -800047b4: 47a8 lw a0,72(a5) -800047b6: 8000 0x8000 -800047b8: 47b0 lw a2,72(a5) -800047ba: 8000 0x8000 -800047bc: 47b0 lw a2,72(a5) -800047be: 8000 0x8000 -800047c0: 47b8 lw a4,72(a5) -800047c2: 8000 0x8000 -800047c4: 47b8 lw a4,72(a5) -800047c6: 8000 0x8000 -800047c8: 47c0 lw s0,12(a5) -800047ca: 8000 0x8000 -800047cc: 47c0 lw s0,12(a5) -800047ce: 8000 0x8000 -800047d0: 47c8 lw a0,12(a5) -800047d2: 8000 0x8000 -800047d4: 47c8 lw a0,12(a5) -800047d6: 8000 0x8000 -800047d8: 47d0 lw a2,12(a5) -800047da: 8000 0x8000 -800047dc: 47d0 lw a2,12(a5) -800047de: 8000 0x8000 -800047e0: 47d8 lw a4,12(a5) -800047e2: 8000 0x8000 -800047e4: 47d8 lw a4,12(a5) -800047e6: 8000 0x8000 -800047e8: 47e0 lw s0,76(a5) -800047ea: 8000 0x8000 -800047ec: 47e0 lw s0,76(a5) -800047ee: 8000 0x8000 -800047f0: 47e8 lw a0,76(a5) -800047f2: 8000 0x8000 -800047f4: 47e8 lw a0,76(a5) -800047f6: 8000 0x8000 -800047f8: 47f0 lw a2,76(a5) -800047fa: 8000 0x8000 -800047fc: 47f0 lw a2,76(a5) -800047fe: 8000 0x8000 -80004800: 47f8 lw a4,76(a5) -80004802: 8000 0x8000 -80004804: 47f8 lw a4,76(a5) -80004806: 8000 0x8000 -80004808: 4800 lw s0,16(s0) -8000480a: 8000 0x8000 -8000480c: 4800 lw s0,16(s0) -8000480e: 8000 0x8000 -80004810: 4808 lw a0,16(s0) -80004812: 8000 0x8000 -80004814: 4808 lw a0,16(s0) -80004816: 8000 0x8000 -80004818: 4810 lw a2,16(s0) -8000481a: 8000 0x8000 -8000481c: 4810 lw a2,16(s0) -8000481e: 8000 0x8000 -80004820: 4818 lw a4,16(s0) -80004822: 8000 0x8000 -80004824: 4818 lw a4,16(s0) -80004826: 8000 0x8000 -80004828: 4820 lw s0,80(s0) -8000482a: 8000 0x8000 -8000482c: 4820 lw s0,80(s0) -8000482e: 8000 0x8000 -80004830: 4828 lw a0,80(s0) -80004832: 8000 0x8000 -80004834: 4828 lw a0,80(s0) -80004836: 8000 0x8000 -80004838: 4830 lw a2,80(s0) -8000483a: 8000 0x8000 -8000483c: 4830 lw a2,80(s0) -8000483e: 8000 0x8000 -80004840: 4838 lw a4,80(s0) -80004842: 8000 0x8000 -80004844: 4838 lw a4,80(s0) -80004846: 8000 0x8000 -80004848: 4840 lw s0,20(s0) -8000484a: 8000 0x8000 -8000484c: 4840 lw s0,20(s0) -8000484e: 8000 0x8000 -80004850: 4848 lw a0,20(s0) -80004852: 8000 0x8000 -80004854: 4848 lw a0,20(s0) -80004856: 8000 0x8000 -80004858: 4850 lw a2,20(s0) -8000485a: 8000 0x8000 -8000485c: 4850 lw a2,20(s0) -8000485e: 8000 0x8000 -80004860: 4858 lw a4,20(s0) -80004862: 8000 0x8000 -80004864: 4858 lw a4,20(s0) -80004866: 8000 0x8000 -80004868: 4860 lw s0,84(s0) -8000486a: 8000 0x8000 -8000486c: 4860 lw s0,84(s0) -8000486e: 8000 0x8000 -80004870: 4868 lw a0,84(s0) -80004872: 8000 0x8000 -80004874: 4868 lw a0,84(s0) -80004876: 8000 0x8000 -80004878: 4870 lw a2,84(s0) -8000487a: 8000 0x8000 -8000487c: 4870 lw a2,84(s0) -8000487e: 8000 0x8000 -80004880: 4878 lw a4,84(s0) -80004882: 8000 0x8000 -80004884: 4878 lw a4,84(s0) -80004886: 8000 0x8000 -80004888: 4880 lw s0,16(s1) -8000488a: 8000 0x8000 -8000488c: 4880 lw s0,16(s1) -8000488e: 8000 0x8000 -80004890: 4888 lw a0,16(s1) -80004892: 8000 0x8000 -80004894: 4888 lw a0,16(s1) -80004896: 8000 0x8000 -80004898: 4890 lw a2,16(s1) -8000489a: 8000 0x8000 -8000489c: 4890 lw a2,16(s1) -8000489e: 8000 0x8000 -800048a0: 4898 lw a4,16(s1) -800048a2: 8000 0x8000 -800048a4: 4898 lw a4,16(s1) -800048a6: 8000 0x8000 -800048a8: 48a0 lw s0,80(s1) -800048aa: 8000 0x8000 -800048ac: 48a0 lw s0,80(s1) -800048ae: 8000 0x8000 -800048b0: 48a8 lw a0,80(s1) -800048b2: 8000 0x8000 -800048b4: 48a8 lw a0,80(s1) -800048b6: 8000 0x8000 -800048b8: 48b0 lw a2,80(s1) -800048ba: 8000 0x8000 -800048bc: 48b0 lw a2,80(s1) -800048be: 8000 0x8000 -800048c0: 48b8 lw a4,80(s1) -800048c2: 8000 0x8000 -800048c4: 48b8 lw a4,80(s1) -800048c6: 8000 0x8000 -800048c8: 48c0 lw s0,20(s1) -800048ca: 8000 0x8000 -800048cc: 48c0 lw s0,20(s1) -800048ce: 8000 0x8000 - Disassembly of section .sdata: -800048d0 <_global_impure_ptr>: -800048d0: 40a0 lw s0,64(s1) -800048d2: 8000 0x8000 - -800048d4 <_impure_ptr>: -800048d4: 40a0 lw s0,64(s1) -800048d6: 8000 0x8000 - -800048d8 <__malloc_sbrk_base>: -800048d8: ffff 0xffff -800048da: ffff 0xffff - -800048dc <__malloc_trim_threshold>: -800048dc: 0000 unimp -800048de: 0002 c.slli64 zero +800014c8 <_global_impure_ptr>: +800014c8: 10a0 addi s0,sp,104 +800014ca: 8000 0x8000 Disassembly of section .sbss: -800048e0 <__malloc_max_total_mem>: -800048e0: 0000 unimp - ... - -800048e4 <__malloc_max_sbrked_mem>: -800048e4: 0000 unimp - ... - -800048e8 <__malloc_top_pad>: -800048e8: 0000 unimp - ... - -800048ec : -800048ec: 0000 unimp +800014cc : +800014cc: 0000 unimp ... Disassembly of section .bss: -800048f0 : +800014d0 : ... -80004930 <__malloc_current_mallinfo>: +80001510 : ... -80004958 : - ... - -80004968 : - ... - -80004978 : -80004978: 0000 unimp - ... - -8000497c : -8000497c: 0000 unimp - ... - -80004980 : -80004980: 0000 unimp - ... - -80004984 : -80004984: 0000 unimp - ... - -80004988 : -80004988: 0000 unimp - ... - -8000498c : -8000498c: 0000 unimp - ... - -80004990 : -80004990: 0000 unimp - ... - -80004994 : -80004994: 0000 unimp +80001520 : ... Disassembly of section .comment: @@ -5016,6 +1316,6 @@ Disassembly of section .riscv.attributes: 16: 6932 flw fs2,12(sp) 18: 7032 flw ft0,44(sp) 1a: 5f30 lw a2,120(a4) - 1c: 326d jal fffff9c6 <__BSS_END__+0x7fffb02e> + 1c: 326d jal fffff9c6 <__global_pointer$+0x7fffe1be> 1e: 3070 fld fa2,224(s0) ... diff --git a/runtime/tests/simple/vx_simple.elf b/runtime/tests/simple/vx_simple.elf index cba1ea90968089021b1d976e839d12fa7179e30b..c4ce71a288f99610da0672dd0bee67d29c6b8f8c 100755 GIT binary patch delta 3122 zcmZ9Oe{7S-8ONX3uiw~dLSpB2636+0i4!-CLP!fJqa?!tqK2+&q0O`{ZTI3hZZJ5u zWgAGRPJT1u(jm4%4DP6YR*j5CB3`< zVr6?@PJVsjYp`2?rant+!N@Dog1F_L^#EeBN%Iudx+dT}m5YTEbcYcAwPOE?w_7 z-@OYSW(cgip43?vsojuS&Bso`<36SPkjif4i6Sh`{T;*DH>QoHzbs>aSWaL0Og8UC z9@&@Kq=RlcTE5YJ^xwq#OQzXccFf)?xTKv){@cUeJ<;LgCLKJwzLPj3Hijo>*$*P~2Cg$0Hs`iv|bwRi* zOVYpCpxnE|K`O%7Ca2AdFuzr7<)NzIHuy=gb&_+h!CS=E4>|XUEfaLa{Q<%-FR}%B zyJ_Mh=5(yvs+ptBvc%1)U1EltqfG{H5Hs8yZ8W%3%y4t`1ZS3Xv~x34j_pGTwzidK zEUV<1nx;U5WENY^G^<;GOb-4Cz4F)@T)NFEM9vRl_b5yI>JADn`p+=T`$SPZrU%BzAEZKO575ch# z2kVYmiBy*E?=@VoxQ0Y2*oxS?umlkm%gy@QLXO{1QzU*kB zjgv=-7ad95j;@^hnx7gE|LW6yIgi&)V&*8;)-H1vGf!dOLZ7P^uD^V*;G3&Sw|(w9 z`u{OYA9*?^$n%@8a-L2*r990akf-G%@_64RX0cIVX_{tnL|Hn09ESeEjURy{IW57k zqVa>y)?St2B)@WQ5yw%0V*!p#qblKcN~9Hq7X~j$lvFoQg1;&}5hSqz6@y_?+r*5J zJM!oyF)*oTfdX@ff8`svGOtXxgZE8R~yfogxt)j zCWkO{`#bLlzTZ`ldI53~@;+n^l7)N-xeUoc<{=A^PasQ>WymeaZOF-qg*SI+%4AYk zAuqx6$%!*89I?*q-ZL(mr|@vHW4s<{^A7gQAN)bEv7w6P+n1|<3+)(3G_zlEObN6{}8=^p|YDrrL{ zUkAJI1(34R&oQxDwBa=PwW0u~z#T>Wd+--U`tO0c1G5%T30(m@A0hSEU>?vla7)qt zJK(Pi`%_T(Hzvx96impl!+PI9Ie4xVC(AI{1m^}iM z4*OHa{%zn}#(IiJ_%tTk%5m`!2gsq~0OK28;v;?O$^U zu)IGSiV*r3R+9lfiX0qM4*TP=1cyW{97>Wh8jcS8!%Ao@b}$}PV#zouN;oteP(qPV zQt`**{#OfIll$U9|A@AkTTwzI?7;qZ%P34C4)*qb*JH3dj6Ir#c_lmy&rA;FFjp=MJXEAfMoXe1D%1m74`4g}+oU>Nqdzwm<6 z|LjghA#PO z0{c7r2K$ul{ZH+B7A}z@zG!;z|N1IXS*V}ZEM)ENK+?&{s$Uy z&~eKOjbCBjHb5#M_{#e0>1KbAc)D<8t!|=hK@E#mu7TDE;f8RMwb$oz3r-;06O~y{ zw7isGj+`;Gwv;~(oc3z#$D=k=u7#bAdZp`_T*v$onJqzo0?R7{H(yXpsRPDR*PXP%pjc%Ui~ZOR;WCiakfg~# za9?*jbY?OESxb8rsC7$(K+yVHeaANLH?)CJYb$PrVAo380TMq}f+iV=nAzX|+V{@z*PxcmB3XAT$R98 z30#%HRS8^`z*PxcmB3XAT$R983H;AVU>7#+Mr3JSOYv&QeYrnj=b5)wm2%mA*v+ev zEmPDsVTMOO;5E?hJj=bYU^-)}wDjP4wnID5R$O-;Tl_|rTcirYd(=-WnVPN5{cg5a zv?W_}&zYi?e>Ch$>eN|^3Gs0CYo?DdE zuT}D`IeKV5@Kj>qM}YfP$xD2G9Z*g*gNMH|>yI2oy$*bdh4)rClS$xf4A4=roCUjY zW5Ei5Nl%raxgR#^k+OaPej1Dj(Y6iG-VOX&df^51uU8|#_@(NsB6|PI25fOj%=dJ*%q9bhrJ3+-ekmI5%AC(;Gp`k3Y(p*e)~xiEgE zT2Ku85~jzZ15E4aVtS#($Fja&_1%`5nX`RCiHgic`nuoUDVopaP{9WmQuBdMIMMHUpX?y9}m*|#Y zQ;<307yQ^uu_t9u;Bz+Sn+thQH=whaGHmL5mgJm}Gn;41F<4~EnUz_%X3CkBTKHU3 z&aA|yo!+O>?A3`6Jv3I5^<3s<; z!e^K=J~Ye13rWTpb2{|#XXZOrVESVOanGA?&V4B7{Ltyw&A7*MEPs6k^?4*uTb7U? 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