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https://gitee.com/bianbu-linux/linux-6.6
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ia64/PCI/ACPI: Use common interface to support PCI host bridge
Use common interface to simplify PCI host bridge implementation. Tested-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
This commit is contained in:
parent
4d6b4e69a2
commit
02715e86b2
1 changed files with 55 additions and 194 deletions
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@ -116,15 +116,12 @@ struct pci_ops pci_root_ops = {
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};
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};
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struct pci_root_info {
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struct pci_root_info {
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struct acpi_pci_root_info common;
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struct pci_controller controller;
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struct pci_controller controller;
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struct acpi_device *bridge;
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struct list_head resources;
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struct list_head io_resources;
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struct list_head io_resources;
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char name[16];
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};
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};
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static unsigned int
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static unsigned int new_space(u64 phys_base, int sparse)
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new_space (u64 phys_base, int sparse)
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{
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{
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u64 mmio_base;
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u64 mmio_base;
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int i;
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int i;
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@ -160,11 +157,11 @@ static int add_io_space(struct device *dev, struct pci_root_info *info,
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unsigned long base, min, max, base_port;
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unsigned long base, min, max, base_port;
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unsigned int sparse = 0, space_nr, len;
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unsigned int sparse = 0, space_nr, len;
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len = strlen(info->name) + 32;
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len = strlen(info->common.name) + 32;
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iospace = resource_list_create_entry(NULL, len);
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iospace = resource_list_create_entry(NULL, len);
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if (!iospace) {
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if (!iospace) {
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dev_err(dev, "PCI: No memory for %s I/O port space\n",
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dev_err(dev, "PCI: No memory for %s I/O port space\n",
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info->name);
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info->common.name);
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return -ENOMEM;
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return -ENOMEM;
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}
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}
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@ -179,7 +176,7 @@ static int add_io_space(struct device *dev, struct pci_root_info *info,
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max = res->end - entry->offset;
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max = res->end - entry->offset;
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base = __pa(io_space[space_nr].mmio_base);
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base = __pa(io_space[space_nr].mmio_base);
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base_port = IO_SPACE_BASE(space_nr);
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base_port = IO_SPACE_BASE(space_nr);
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snprintf(name, len, "%s I/O Ports %08lx-%08lx", info->name,
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snprintf(name, len, "%s I/O Ports %08lx-%08lx", info->common.name,
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base_port + min, base_port + max);
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base_port + min, base_port + max);
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/*
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/*
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@ -234,217 +231,81 @@ static bool resource_is_pcicfg_ioport(struct resource *res)
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res->start == 0xCF8 && res->end == 0xCFF;
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res->start == 0xCF8 && res->end == 0xCFF;
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}
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}
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static int
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static int pci_acpi_root_prepare_resources(struct acpi_pci_root_info *ci)
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probe_pci_root_info(struct pci_root_info *info, struct acpi_device *device,
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int busnum, int domain)
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{
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{
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int ret;
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struct device *dev = &ci->bridge->dev;
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struct list_head *list = &info->resources;
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struct pci_root_info *info;
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struct resource *res;
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struct resource_entry *entry, *tmp;
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struct resource_entry *entry, *tmp;
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int status;
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ret = acpi_dev_get_resources(device, list,
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status = acpi_pci_probe_root_resources(ci);
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acpi_dev_filter_resource_type_cb,
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if (status > 0) {
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(void *)(IORESOURCE_IO | IORESOURCE_MEM));
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info = container_of(ci, struct pci_root_info, common);
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if (ret < 0)
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resource_list_for_each_entry_safe(entry, tmp, &ci->resources) {
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dev_warn(&device->dev,
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"failed to parse _CRS method, error code %d\n", ret);
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else if (ret == 0)
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dev_dbg(&device->dev,
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"no IO and memory resources present in _CRS\n");
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else
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resource_list_for_each_entry_safe(entry, tmp, list) {
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if ((entry->res->flags & IORESOURCE_DISABLED) ||
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resource_is_pcicfg_ioport(entry->res))
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resource_list_destroy_entry(entry);
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else
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entry->res->name = info->name;
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}
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return ret;
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}
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static void validate_resources(struct device *dev, struct list_head *resources,
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unsigned long type)
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{
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LIST_HEAD(list);
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struct resource *res1, *res2, *root = NULL;
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struct resource_entry *tmp, *entry, *entry2;
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BUG_ON((type & (IORESOURCE_MEM | IORESOURCE_IO)) == 0);
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root = (type & IORESOURCE_MEM) ? &iomem_resource : &ioport_resource;
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list_splice_init(resources, &list);
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resource_list_for_each_entry_safe(entry, tmp, &list) {
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bool free = false;
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resource_size_t end;
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res1 = entry->res;
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if (!(res1->flags & type))
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goto next;
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/* Exclude non-addressable range or non-addressable portion */
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end = min(res1->end, root->end);
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if (end <= res1->start) {
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dev_info(dev, "host bridge window %pR (ignored, not CPU addressable)\n",
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res1);
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free = true;
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goto next;
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} else if (res1->end != end) {
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dev_info(dev, "host bridge window %pR ([%#llx-%#llx] ignored, not CPU addressable)\n",
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res1, (unsigned long long)end + 1,
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(unsigned long long)res1->end);
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res1->end = end;
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}
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resource_list_for_each_entry(entry2, resources) {
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res2 = entry2->res;
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if (!(res2->flags & type))
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continue;
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/*
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* I don't like throwing away windows because then
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* our resources no longer match the ACPI _CRS, but
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* the kernel resource tree doesn't allow overlaps.
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*/
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if (resource_overlaps(res1, res2)) {
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res2->start = min(res1->start, res2->start);
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res2->end = max(res1->end, res2->end);
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dev_info(dev, "host bridge window expanded to %pR; %pR ignored\n",
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res2, res1);
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free = true;
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goto next;
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}
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}
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next:
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resource_list_del(entry);
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if (free)
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resource_list_free_entry(entry);
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else
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resource_list_add_tail(entry, resources);
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}
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}
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static void add_resources(struct pci_root_info *info, struct device *dev)
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{
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struct resource_entry *entry, *tmp;
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struct resource *res, *conflict, *root = NULL;
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struct list_head *list = &info->resources;
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validate_resources(dev, list, IORESOURCE_MEM);
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validate_resources(dev, list, IORESOURCE_IO);
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resource_list_for_each_entry_safe(entry, tmp, list) {
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res = entry->res;
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res = entry->res;
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if (res->flags & IORESOURCE_MEM) {
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if (res->flags & IORESOURCE_MEM) {
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root = &iomem_resource;
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/*
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/*
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* HP's firmware has a hack to work around a Windows
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* HP's firmware has a hack to work around a
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* bug. Ignore these tiny memory ranges.
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* Windows bug. Ignore these tiny memory ranges.
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*/
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*/
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if (resource_size(res) <= 16) {
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if (resource_size(res) <= 16) {
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resource_list_destroy_entry(entry);
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resource_list_del(entry);
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continue;
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insert_resource(&iomem_resource,
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entry->res);
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resource_list_add_tail(entry,
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&info->io_resources);
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}
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}
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} else if (res->flags & IORESOURCE_IO) {
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} else if (res->flags & IORESOURCE_IO) {
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root = &ioport_resource;
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if (resource_is_pcicfg_ioport(entry->res))
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if (add_io_space(&info->bridge->dev, info, entry)) {
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resource_list_destroy_entry(entry);
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resource_list_destroy_entry(entry);
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continue;
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else if (add_io_space(dev, info, entry))
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}
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} else {
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BUG_ON(res);
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}
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conflict = insert_resource_conflict(root, res);
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if (conflict) {
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dev_info(dev,
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"ignoring host bridge window %pR (conflicts with %s %pR)\n",
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res, conflict->name, conflict);
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resource_list_destroy_entry(entry);
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resource_list_destroy_entry(entry);
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}
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}
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}
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}
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}
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}
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static void __release_pci_root_info(struct pci_root_info *info)
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return status;
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}
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static void pci_acpi_root_release_info(struct acpi_pci_root_info *ci)
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{
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{
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struct resource *res;
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struct pci_root_info *info;
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struct resource_entry *entry, *tentry;
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struct resource_entry *entry, *tmp;
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resource_list_for_each_entry_safe(entry, tentry, &info->io_resources) {
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info = container_of(ci, struct pci_root_info, common);
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resource_list_for_each_entry_safe(entry, tmp, &info->io_resources) {
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release_resource(entry->res);
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release_resource(entry->res);
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resource_list_destroy_entry(entry);
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resource_list_destroy_entry(entry);
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}
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}
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resource_list_for_each_entry_safe(entry, tentry, &info->resources) {
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res = entry->res;
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if (res->parent &&
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(res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
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release_resource(res);
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resource_list_destroy_entry(entry);
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}
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kfree(info);
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kfree(info);
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}
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}
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static void release_pci_root_info(struct pci_host_bridge *bridge)
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static struct acpi_pci_root_ops pci_acpi_root_ops = {
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{
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.pci_ops = &pci_root_ops,
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struct pci_root_info *info = bridge->release_data;
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.release_info = pci_acpi_root_release_info,
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.prepare_resources = pci_acpi_root_prepare_resources,
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__release_pci_root_info(info);
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};
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}
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struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
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struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
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{
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{
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struct acpi_device *device = root->device;
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struct acpi_device *device = root->device;
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int domain = root->segment;
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int bus = root->secondary.start;
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struct pci_root_info *info;
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struct pci_root_info *info;
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struct pci_bus *pbus;
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int ret;
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info = kzalloc(sizeof(*info), GFP_KERNEL);
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info = kzalloc(sizeof(*info), GFP_KERNEL);
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if (!info) {
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if (!info) {
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dev_err(&device->dev,
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dev_err(&device->dev,
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"pci_bus %04x:%02x: ignored (out of memory)\n",
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"pci_bus %04x:%02x: ignored (out of memory)\n",
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domain, bus);
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root->segment, (int)root->secondary.start);
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return NULL;
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return NULL;
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}
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}
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info->controller.segment = domain;
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info->controller.segment = root->segment;
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info->controller.companion = device;
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info->controller.companion = device;
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info->controller.node = acpi_get_node(device->handle);
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info->controller.node = acpi_get_node(device->handle);
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info->bridge = device;
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INIT_LIST_HEAD(&info->resources);
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INIT_LIST_HEAD(&info->io_resources);
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INIT_LIST_HEAD(&info->io_resources);
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snprintf(info->name, sizeof(info->name),
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return acpi_pci_root_create(root, &pci_acpi_root_ops,
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"PCI Bus %04x:%02x", domain, bus);
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&info->common, &info->controller);
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ret = probe_pci_root_info(info, device, bus, domain);
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if (ret <= 0) {
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kfree(info);
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return NULL;
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}
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add_resources(info, &info->bridge->dev);
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pci_add_resource(&info->resources, &root->secondary);
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/*
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* See arch/x86/pci/acpi.c.
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* The desired pci bus might already be scanned in a quirk. We
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* should handle the case here, but it appears that IA64 hasn't
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* such quirk. So we just ignore the case now.
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*/
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pbus = pci_create_root_bus(NULL, bus, &pci_root_ops,
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&info->controller, &info->resources);
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if (!pbus) {
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__release_pci_root_info(info);
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return NULL;
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}
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pci_set_host_bridge_release(to_pci_host_bridge(pbus->bridge),
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release_pci_root_info, info);
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pci_scan_child_bus(pbus);
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return pbus;
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}
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}
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int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
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int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
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