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ARM: dts: rockchip: restyle emac nodes

Browse source 
The emac_rockchip.txt file is converted to YAML.
Phy nodes are now a subnode of mdio, so restyle
the emac nodes of rk3036/rk3066/rk3188.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20220603163539.537-3-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Johan Jonker 2022-06-03 18:35:39 +02:00 • committed by Heiko Stuebner
parent d28b680a34
commit 1dabb74971
7 changed files with 52 additions and 37 deletions
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16
arch/arm/boot/dts/rk3036-evb.dts
View file

@ -15,16 +15,20 @@
}; };
&emac { &emac {
phy = <&phy0>;
phy-reset-duration = <10>; /* millisecond */
phy-reset-gpios = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>; /* PHY_RST */
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&emac_xfer>, <&emac_mdio>; pinctrl-0 = <&emac_xfer>, <&emac_mdio>;
phy = <&phy0>;
phy-reset-gpios = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>; /* PHY_RST */
phy-reset-duration = <10>; /* millisecond */
status = "okay"; status = "okay";
phy0: ethernet-phy@0 { mdio {
reg = <0>; #address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@0 {
reg = <0>;
};
}; };
}; };

16
arch/arm/boot/dts/rk3036-kylin.dts
View file

@ -80,16 +80,20 @@
}; };
&emac { &emac {
phy = <&phy0>;
phy-reset-duration = <10>; /* millisecond */
phy-reset-gpios = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>; /* PHY_RST */
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&emac_xfer>, <&emac_mdio>; pinctrl-0 = <&emac_xfer>, <&emac_mdio>;
phy = <&phy0>;
phy-reset-gpios = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>; /* PHY_RST */
phy-reset-duration = <10>; /* millisecond */
status = "okay"; status = "okay";
phy0: ethernet-phy@0 { mdio {
reg = <0>; #address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@0 {
reg = <0>;
};
}; };
}; };

2
arch/arm/boot/dts/rk3036.dtsi
View file

@ -228,8 +228,6 @@
compatible = "rockchip,rk3036-emac"; compatible = "rockchip,rk3036-emac";
reg = <0x10200000 0x4000>; reg = <0x10200000 0x4000>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
rockchip,grf = <&grf>; rockchip,grf = <&grf>;
clocks = <&cru HCLK_MAC>, <&cru SCLK_MACREF>, <&cru SCLK_MAC>; clocks = <&cru HCLK_MAC>, <&cru SCLK_MACREF>, <&cru SCLK_MAC>;
clock-names = "hclk", "macref", "macclk"; clock-names = "hclk", "macref", "macclk";

17
arch/arm/boot/dts/rk3066a-marsboard.dts
View file

@ -150,18 +150,21 @@
#include "tps65910.dtsi" #include "tps65910.dtsi"
&emac { &emac {
status = "okay";
phy = <&phy0>; phy = <&phy0>;
phy-supply = <&vcc_rmii>; phy-supply = <&vcc_rmii>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&phy_int>; pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&phy_int>;
status = "okay";
phy0: ethernet-phy@0 { mdio {
reg = <0>; #address-cells = <1>;
interrupt-parent = <&gpio1>; #size-cells = <0>;
interrupts = <RK_PD2 IRQ_TYPE_LEVEL_LOW>;
phy0: ethernet-phy@0 {
reg = <0>;
interrupt-parent = <&gpio1>;
interrupts = <RK_PD2 IRQ_TYPE_LEVEL_LOW>;
};
}; };
}; };

15
arch/arm/boot/dts/rk3066a-rayeager.dts
View file

@ -142,15 +142,20 @@
}; };
&emac { &emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&rmii_rst>;
phy = <&phy0>; phy = <&phy0>;
phy-supply = <&vcc_rmii>; phy-supply = <&vcc_rmii>;
pinctrl-names = "default";
pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&rmii_rst>;
status = "okay"; status = "okay";
phy0: ethernet-phy@0 { mdio {
reg = <0>; #address-cells = <1>;
reset-gpios = <&gpio1 RK_PD6 GPIO_ACTIVE_LOW>; #size-cells = <0>;
phy0: ethernet-phy@0 {
reg = <0>;
reset-gpios = <&gpio1 RK_PD6 GPIO_ACTIVE_LOW>;
};
}; };
}; };

21
arch/arm/boot/dts/rk3188-radxarock.dts
View file

@ -126,18 +126,21 @@
}; };
&emac { &emac {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&phy_int>;
phy = <&phy0>; phy = <&phy0>;
phy-supply = <&vcc_rmii>; phy-supply = <&vcc_rmii>;
pinctrl-names = "default";
pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&phy_int>;
status = "okay";
phy0: ethernet-phy@0 { mdio {
reg = <0>; #address-cells = <1>;
interrupt-parent = <&gpio3>; #size-cells = <0>;
interrupts = <RK_PD2 IRQ_TYPE_LEVEL_LOW>;
phy0: ethernet-phy@0 {
reg = <0>;
interrupt-parent = <&gpio3>;
interrupts = <RK_PD2 IRQ_TYPE_LEVEL_LOW>;
};
}; };
}; };

2
arch/arm/boot/dts/rk3xxx.dtsi
View file

@ -186,8 +186,6 @@
compatible = "snps,arc-emac"; compatible = "snps,arc-emac";
reg = <0x10204000 0x3c>; reg = <0x10204000 0x3c>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
rockchip,grf = <&grf>; rockchip,grf = <&grf>;