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hotplug: we'd better flush the local & l2 cache when one cpu going to die

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Change-Id: I64e4158a8669af577abf1ab5018a7bdb424941aa
This commit is contained in:
Nell 2023-09-04 13:45:34 +08:00 • committed by zhangmeng
parent 957d4d5c7e
commit 4084cdea14
4 changed files with 27 additions and 0 deletions
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3
arch/riscv/include/asm/sbi.h
View file

@ -48,6 +48,9 @@ enum sbi_ext_base_fid {
SBI_EXT_BASE_GET_MVENDORID, SBI_EXT_BASE_GET_MVENDORID,
SBI_EXT_BASE_GET_MARCHID, SBI_EXT_BASE_GET_MARCHID,
SBI_EXT_BASE_GET_MIMPID, SBI_EXT_BASE_GET_MIMPID,
#if defined(CONFIG_SOC_SPACEMIT_K1PRO) || defined(CONFIG_SOC_SPACEMIT_K1X)
SBI_EXT_BASE_FLUSH_CACHE_ALL,
#endif
}; };
enum sbi_ext_time_fid { enum sbi_ext_time_fid {

6
arch/riscv/kernel/cpu-hotplug.c
View file

@ -75,8 +75,14 @@ void __noreturn arch_cpu_idle_dead(void)
{ {
idle_task_exit(); idle_task_exit();
#if defined(CONFIG_SOC_SPACEMIT_K1PRO) || defined(CONFIG_SOC_SPACEMIT_K1X)
sbi_flush_local_dcache_all();
#endif
cpuhp_ap_report_dead(); cpuhp_ap_report_dead();
#if defined(CONFIG_SOC_SPACEMIT_K1PRO) || defined(CONFIG_SOC_SPACEMIT_K1X)
sbi_flush_local_dcache_all();
#endif
cpu_ops[smp_processor_id()]->cpu_stop(); cpu_ops[smp_processor_id()]->cpu_stop();
/* It should never reach here */ /* It should never reach here */
BUG(); BUG();

9
arch/riscv/kernel/sbi.c
View file

@ -460,6 +460,15 @@ int sbi_remote_hfence_vvma(const struct cpumask *cpu_mask,
} }
EXPORT_SYMBOL(sbi_remote_hfence_vvma); EXPORT_SYMBOL(sbi_remote_hfence_vvma);
#if defined(CONFIG_SOC_SPACEMIT_K1PRO) || defined(CONFIG_SOC_SPACEMIT_K1X)
void sbi_flush_local_dcache_all(void)
{
sbi_ecall(SBI_EXT_BASE, SBI_EXT_BASE_FLUSH_CACHE_ALL, 0,
0, 0, 0, 0, 0);
}
EXPORT_SYMBOL(sbi_flush_local_dcache_all);
#endif
/** /**
* sbi_remote_hfence_vvma_asid() - Execute HFENCE.VVMA instructions on given * sbi_remote_hfence_vvma_asid() - Execute HFENCE.VVMA instructions on given
* remote harts for current guest virtual address range belonging to a specific * remote harts for current guest virtual address range belonging to a specific

9
drivers/clocksource/timer-riscv.c
View file

@ -144,6 +144,13 @@ static int __init riscv_timer_init_common(void)
return -ENODEV; return -ENODEV;
} }
#ifdef CONFIG_SOC_SPACEMIT
if (riscv_isa_extension_available(NULL, SSTC)) {
pr_info("Timer interrupt in S-mode is available via sstc extension\n");
static_branch_enable(&riscv_sstc_available);
}
#endif
error = clocksource_register_hz(&riscv_clocksource, riscv_timebase); error = clocksource_register_hz(&riscv_clocksource, riscv_timebase);
if (error) { if (error) {
pr_err("RISCV timer registration failed [%d]\n", error); pr_err("RISCV timer registration failed [%d]\n", error);
@ -160,10 +167,12 @@ static int __init riscv_timer_init_common(void)
return error; return error;
} }
#ifndef CONFIG_SOC_SPACEMIT
if (riscv_isa_extension_available(NULL, SSTC)) { if (riscv_isa_extension_available(NULL, SSTC)) {
pr_info("Timer interrupt in S-mode is available via sstc extension\n"); pr_info("Timer interrupt in S-mode is available via sstc extension\n");
static_branch_enable(&riscv_sstc_available); static_branch_enable(&riscv_sstc_available);
} }
#endif
error = cpuhp_setup_state(CPUHP_AP_RISCV_TIMER_STARTING, error = cpuhp_setup_state(CPUHP_AP_RISCV_TIMER_STARTING,
"clockevents/riscv/timer:starting", "clockevents/riscv/timer:starting",