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ARM: nspire: Use syscon-reboot to handle restart

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Writing this bit can be handled by the DT syscon-reboot driver.
Enable that driver and remove the machine_desc version.

Signed-off-by: Andrew Davis <afd@ti.com>
Tested-by: Fabian Vogt <fabian@ritter-vogt.de>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Fabian Vogt <fabian@ritter-vogt.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Andrew Davis 2023-08-02 10:33:32 -05:00 • committed by Arnd Bergmann
parent d69ba6fe66
commit 47c128c65f
3 changed files with 2 additions and 13 deletions
Download patch file Download diff file Expand all files Collapse all files

2
arch/arm/mach-nspire/Kconfig
View file

@ -9,5 +9,7 @@ config ARCH_NSPIRE
select ARM_VIC select ARM_VIC
select ARM_TIMER_SP804 select ARM_TIMER_SP804
select NSPIRE_TIMER select NSPIRE_TIMER
select POWER_RESET
select POWER_RESET_SYSCON
help help
This enables support for systems using the TI-NSPIRE CPU This enables support for systems using the TI-NSPIRE CPU

3
arch/arm/mach-nspire/mmio.h
View file

@ -5,9 +5,6 @@
* Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au> * Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au>
*/ */
#define NSPIRE_MISC_PHYS_BASE 0x900A0000
#define NSPIRE_MISC_HWRESET 0x08
#define NSPIRE_PWR_PHYS_BASE 0x900B0000 #define NSPIRE_PWR_PHYS_BASE 0x900B0000
#define NSPIRE_PWR_VIRT_BASE 0xFEEB0000 #define NSPIRE_PWR_VIRT_BASE 0xFEEB0000
#define NSPIRE_PWR_BUS_DISABLE1 0x18 #define NSPIRE_PWR_BUS_DISABLE1 0x18

10
arch/arm/mach-nspire/nspire.c
View file

@ -20,16 +20,6 @@ static const char *const nspire_dt_match[] __initconst = {
NULL, NULL,
}; };
static void nspire_restart(enum reboot_mode mode, const char *cmd)
{
void __iomem *base = ioremap(NSPIRE_MISC_PHYS_BASE, SZ_4K);
if (!base)
return;
writel(2, base + NSPIRE_MISC_HWRESET);
}
DT_MACHINE_START(NSPIRE, "TI-NSPIRE") DT_MACHINE_START(NSPIRE, "TI-NSPIRE")
.dt_compat = nspire_dt_match, .dt_compat = nspire_dt_match,
.restart = nspire_restart,
MACHINE_END MACHINE_END