mirror of
https://gitee.com/bianbu-linux/linux-6.6
synced 2025-04-24 14:07:52 -04:00
powerpc updates for 4.17
Notable changes:
- Support for 4PB user address space on 64-bit, opt-in via mmap().
- Removal of POWER4 support, which was accidentally broken in 2016 and no one
noticed, and blocked use of some modern instructions.
- Workarounds so that the hypervisor can enable Transactional Memory on Power9.
- A series to disable the DAWR (Data Address Watchpoint Register) on Power9.
- More information displayed in the meltdown/spectre_v1/v2 sysfs files.
- A vpermxor (Power8 Altivec) implementation for the raid6 Q Syndrome.
- A big series to make the allocation of our pacas (per cpu area), kernel page
tables, and per-cpu stacks NUMA aware when using the Radix MMU on Power9.
And as usual many fixes, reworks and cleanups.
Thanks to:
Aaro Koskinen, Alexandre Belloni, Alexey Kardashevskiy, Alistair Popple, Andy
Shevchenko, Aneesh Kumar K.V, Anshuman Khandual, Balbir Singh, Benjamin
Herrenschmidt, Christophe Leroy, Christophe Lombard, Cyril Bur, Daniel Axtens,
Dave Young, Finn Thain, Frederic Barrat, Gustavo Romero, Horia Geantă,
Jonathan Neuschäfer, Kees Cook, Larry Finger, Laurent Dufour, Laurent Vivier,
Logan Gunthorpe, Madhavan Srinivasan, Mark Greer, Mark Hairgrove, Markus
Elfring, Mathieu Malaterre, Matt Brown, Matt Evans, Mauricio Faria de
Oliveira, Michael Neuling, Naveen N. Rao, Nicholas Piggin, Paul Mackerras,
Philippe Bergheaud, Ram Pai, Rob Herring, Sam Bobroff, Segher Boessenkool,
Simon Guo, Simon Horman, Stewart Smith, Sukadev Bhattiprolu, Suraj Jitindar
Singh, Thiago Jung Bauermann, Vaibhav Jain, Vaidyanathan Srinivasan, Vasant
Hegde, Wei Yongjun.
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Merge tag 'powerpc-4.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
Pull powerpc updates from Michael Ellerman:
"Notable changes:
- Support for 4PB user address space on 64-bit, opt-in via mmap().
- Removal of POWER4 support, which was accidentally broken in 2016
and no one noticed, and blocked use of some modern instructions.
- Workarounds so that the hypervisor can enable Transactional Memory
on Power9.
- A series to disable the DAWR (Data Address Watchpoint Register) on
Power9.
- More information displayed in the meltdown/spectre_v1/v2 sysfs
files.
- A vpermxor (Power8 Altivec) implementation for the raid6 Q
Syndrome.
- A big series to make the allocation of our pacas (per cpu area),
kernel page tables, and per-cpu stacks NUMA aware when using the
Radix MMU on Power9.
And as usual many fixes, reworks and cleanups.
Thanks to: Aaro Koskinen, Alexandre Belloni, Alexey Kardashevskiy,
Alistair Popple, Andy Shevchenko, Aneesh Kumar K.V, Anshuman Khandual,
Balbir Singh, Benjamin Herrenschmidt, Christophe Leroy, Christophe
Lombard, Cyril Bur, Daniel Axtens, Dave Young, Finn Thain, Frederic
Barrat, Gustavo Romero, Horia Geantă, Jonathan Neuschäfer, Kees Cook,
Larry Finger, Laurent Dufour, Laurent Vivier, Logan Gunthorpe,
Madhavan Srinivasan, Mark Greer, Mark Hairgrove, Markus Elfring,
Mathieu Malaterre, Matt Brown, Matt Evans, Mauricio Faria de Oliveira,
Michael Neuling, Naveen N. Rao, Nicholas Piggin, Paul Mackerras,
Philippe Bergheaud, Ram Pai, Rob Herring, Sam Bobroff, Segher
Boessenkool, Simon Guo, Simon Horman, Stewart Smith, Sukadev
Bhattiprolu, Suraj Jitindar Singh, Thiago Jung Bauermann, Vaibhav
Jain, Vaidyanathan Srinivasan, Vasant Hegde, Wei Yongjun"
* tag 'powerpc-4.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (207 commits)
powerpc/64s/idle: Fix restore of AMOR on POWER9 after deep sleep
powerpc/64s: Fix POWER9 DD2.2 and above in cputable features
powerpc/64s: Fix pkey support in dt_cpu_ftrs, add CPU_FTR_PKEY bit
powerpc/64s: Fix dt_cpu_ftrs to have restore_cpu clear unwanted LPCR bits
Revert "powerpc/64s/idle: POWER9 ESL=0 stop avoid save/restore overhead"
powerpc: iomap.c: introduce io{read|write}64_{lo_hi|hi_lo}
powerpc: io.h: move iomap.h include so that it can use readq/writeq defs
cxl: Fix possible deadlock when processing page faults from cxllib
powerpc/hw_breakpoint: Only disable hw breakpoint if cpu supports it
powerpc/mm/radix: Update command line parsing for disable_radix
powerpc/mm/radix: Parse disable_radix commandline correctly.
powerpc/mm/hugetlb: initialize the pagetable cache correctly for hugetlb
powerpc/mm/radix: Update pte fragment count from 16 to 256 on radix
powerpc/mm/keys: Update documentation and remove unnecessary check
powerpc/64s/idle: POWER9 ESL=0 stop avoid save/restore overhead
powerpc/64s/idle: Consolidate power9_offline_stop()/power9_idle_stop()
powerpc/powernv: Always stop secondaries before reboot/shutdown
powerpc: hard disable irqs in smp_send_stop loop
powerpc: use NMI IPI for smp_send_stop
powerpc/powernv: Fix SMT4 forcing idle code
...
This commit is contained in:
Linus Torvalds
commit
49a695ba72
275 changed files with 4647 additions and 2432 deletions
1
lib/raid6/.gitignore
vendored
1
lib/raid6/.gitignore
vendored
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@ -4,3 +4,4 @@ int*.c
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tables.c
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neon?.c
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s390vx?.c
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vpermxor*.c
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@ -5,7 +5,8 @@ raid6_pq-y += algos.o recov.o tables.o int1.o int2.o int4.o \
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int8.o int16.o int32.o
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raid6_pq-$(CONFIG_X86) += recov_ssse3.o recov_avx2.o mmx.o sse1.o sse2.o avx2.o avx512.o recov_avx512.o
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raid6_pq-$(CONFIG_ALTIVEC) += altivec1.o altivec2.o altivec4.o altivec8.o
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raid6_pq-$(CONFIG_ALTIVEC) += altivec1.o altivec2.o altivec4.o altivec8.o \
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vpermxor1.o vpermxor2.o vpermxor4.o vpermxor8.o
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raid6_pq-$(CONFIG_KERNEL_MODE_NEON) += neon.o neon1.o neon2.o neon4.o neon8.o recov_neon.o recov_neon_inner.o
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raid6_pq-$(CONFIG_S390) += s390vx8.o recov_s390xc.o
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@ -90,6 +91,30 @@ $(obj)/altivec8.c: UNROLL := 8
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$(obj)/altivec8.c: $(src)/altivec.uc $(src)/unroll.awk FORCE
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$(call if_changed,unroll)
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CFLAGS_vpermxor1.o += $(altivec_flags)
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targets += vpermxor1.c
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$(obj)/vpermxor1.c: UNROLL := 1
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$(obj)/vpermxor1.c: $(src)/vpermxor.uc $(src)/unroll.awk FORCE
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$(call if_changed,unroll)
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CFLAGS_vpermxor2.o += $(altivec_flags)
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targets += vpermxor2.c
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$(obj)/vpermxor2.c: UNROLL := 2
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$(obj)/vpermxor2.c: $(src)/vpermxor.uc $(src)/unroll.awk FORCE
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$(call if_changed,unroll)
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CFLAGS_vpermxor4.o += $(altivec_flags)
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targets += vpermxor4.c
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$(obj)/vpermxor4.c: UNROLL := 4
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$(obj)/vpermxor4.c: $(src)/vpermxor.uc $(src)/unroll.awk FORCE
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$(call if_changed,unroll)
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CFLAGS_vpermxor8.o += $(altivec_flags)
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targets += vpermxor8.c
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$(obj)/vpermxor8.c: UNROLL := 8
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$(obj)/vpermxor8.c: $(src)/vpermxor.uc $(src)/unroll.awk FORCE
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$(call if_changed,unroll)
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CFLAGS_neon1.o += $(NEON_FLAGS)
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targets += neon1.c
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$(obj)/neon1.c: UNROLL := 1
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@ -74,6 +74,10 @@ const struct raid6_calls * const raid6_algos[] = {
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&raid6_altivec2,
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&raid6_altivec4,
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&raid6_altivec8,
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&raid6_vpermxor1,
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&raid6_vpermxor2,
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&raid6_vpermxor4,
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&raid6_vpermxor8,
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#endif
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#if defined(CONFIG_S390)
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&raid6_s390vx8,
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@ -24,10 +24,13 @@
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#include <linux/raid/pq.h>
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#ifdef CONFIG_ALTIVEC
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#include <altivec.h>
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#ifdef __KERNEL__
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# include <asm/cputable.h>
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# include <asm/switch_to.h>
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#endif /* __KERNEL__ */
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/*
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* This is the C data type to use. We use a vector of
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@ -45,10 +45,12 @@ else ifeq ($(HAS_NEON),yes)
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CFLAGS += -DCONFIG_KERNEL_MODE_NEON=1
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else
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HAS_ALTIVEC := $(shell printf '\#include <altivec.h>\nvector int a;\n' |\
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gcc -c -x c - >&/dev/null && \
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rm ./-.o && echo yes)
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gcc -c -x c - >/dev/null && rm ./-.o && echo yes)
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ifeq ($(HAS_ALTIVEC),yes)
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OBJS += altivec1.o altivec2.o altivec4.o altivec8.o
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CFLAGS += -I../../../arch/powerpc/include
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CFLAGS += -DCONFIG_ALTIVEC
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OBJS += altivec1.o altivec2.o altivec4.o altivec8.o \
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vpermxor1.o vpermxor2.o vpermxor4.o vpermxor8.o
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endif
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endif
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@ -95,6 +97,18 @@ altivec4.c: altivec.uc ../unroll.awk
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altivec8.c: altivec.uc ../unroll.awk
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$(AWK) ../unroll.awk -vN=8 < altivec.uc > $@
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vpermxor1.c: vpermxor.uc ../unroll.awk
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$(AWK) ../unroll.awk -vN=1 < vpermxor.uc > $@
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vpermxor2.c: vpermxor.uc ../unroll.awk
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$(AWK) ../unroll.awk -vN=2 < vpermxor.uc > $@
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vpermxor4.c: vpermxor.uc ../unroll.awk
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$(AWK) ../unroll.awk -vN=4 < vpermxor.uc > $@
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vpermxor8.c: vpermxor.uc ../unroll.awk
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$(AWK) ../unroll.awk -vN=8 < vpermxor.uc > $@
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int1.c: int.uc ../unroll.awk
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$(AWK) ../unroll.awk -vN=1 < int.uc > $@
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@ -117,7 +131,7 @@ tables.c: mktables
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./mktables > tables.c
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clean:
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rm -f *.o *.a mktables mktables.c *.uc int*.c altivec*.c neon*.c tables.c raid6test
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rm -f *.o *.a mktables mktables.c *.uc int*.c altivec*.c vpermxor*.c neon*.c tables.c raid6test
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spotless: clean
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rm -f *~
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105
lib/raid6/vpermxor.uc
Normal file
105
lib/raid6/vpermxor.uc
Normal file
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@ -0,0 +1,105 @@
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/*
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* Copyright 2017, Matt Brown, IBM Corp.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* vpermxor$#.c
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*
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* Based on H. Peter Anvin's paper - The mathematics of RAID-6
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*
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* $#-way unrolled portable integer math RAID-6 instruction set
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* This file is postprocessed using unroll.awk
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*
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* vpermxor$#.c makes use of the vpermxor instruction to optimise the RAID6 Q
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* syndrome calculations.
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* This can be run on systems which have both Altivec and vpermxor instruction.
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*
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* This instruction was introduced in POWER8 - ISA v2.07.
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*/
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#include <linux/raid/pq.h>
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#ifdef CONFIG_ALTIVEC
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#include <altivec.h>
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#ifdef __KERNEL__
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#include <asm/cputable.h>
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#include <asm/ppc-opcode.h>
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#include <asm/switch_to.h>
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#endif
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typedef vector unsigned char unative_t;
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#define NSIZE sizeof(unative_t)
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static const vector unsigned char gf_low = {0x1e, 0x1c, 0x1a, 0x18, 0x16, 0x14,
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0x12, 0x10, 0x0e, 0x0c, 0x0a, 0x08,
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0x06, 0x04, 0x02,0x00};
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static const vector unsigned char gf_high = {0xfd, 0xdd, 0xbd, 0x9d, 0x7d, 0x5d,
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0x3d, 0x1d, 0xe0, 0xc0, 0xa0, 0x80,
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0x60, 0x40, 0x20, 0x00};
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static void noinline raid6_vpermxor$#_gen_syndrome_real(int disks, size_t bytes,
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void **ptrs)
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{
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u8 **dptr = (u8 **)ptrs;
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u8 *p, *q;
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int d, z, z0;
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unative_t wp$$, wq$$, wd$$;
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z0 = disks - 3; /* Highest data disk */
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p = dptr[z0+1]; /* XOR parity */
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q = dptr[z0+2]; /* RS syndrome */
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for (d = 0; d < bytes; d += NSIZE*$#) {
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wp$$ = wq$$ = *(unative_t *)&dptr[z0][d+$$*NSIZE];
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for (z = z0-1; z>=0; z--) {
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wd$$ = *(unative_t *)&dptr[z][d+$$*NSIZE];
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/* P syndrome */
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wp$$ = vec_xor(wp$$, wd$$);
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/* Q syndrome */
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asm(VPERMXOR(%0,%1,%2,%3):"=v"(wq$$):"v"(gf_high), "v"(gf_low), "v"(wq$$));
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wq$$ = vec_xor(wq$$, wd$$);
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}
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*(unative_t *)&p[d+NSIZE*$$] = wp$$;
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*(unative_t *)&q[d+NSIZE*$$] = wq$$;
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}
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}
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static void raid6_vpermxor$#_gen_syndrome(int disks, size_t bytes, void **ptrs)
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{
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preempt_disable();
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enable_kernel_altivec();
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raid6_vpermxor$#_gen_syndrome_real(disks, bytes, ptrs);
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disable_kernel_altivec();
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preempt_enable();
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}
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int raid6_have_altivec_vpermxor(void);
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#if $# == 1
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int raid6_have_altivec_vpermxor(void)
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{
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/* Check if arch has both altivec and the vpermxor instructions */
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# ifdef __KERNEL__
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return (cpu_has_feature(CPU_FTR_ALTIVEC_COMP) &&
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cpu_has_feature(CPU_FTR_ARCH_207S));
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# else
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return 1;
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#endif
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}
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#endif
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const struct raid6_calls raid6_vpermxor$# = {
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raid6_vpermxor$#_gen_syndrome,
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NULL,
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raid6_have_altivec_vpermxor,
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"vpermxor$#",
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0
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};
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#endif
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Reference in a new issue