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drm/amdgpu/vcn: add unified queue ib test
- add unified queue headers - add unified queue ib tests Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Ruijing Dong <ruijing.dong@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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parent
c435f61d0e
commit
4ed49c954e
2 changed files with 100 additions and 3 deletions
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@ -329,6 +329,18 @@ int amdgpu_vcn_sw_fini(struct amdgpu_device *adev)
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return 0;
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}
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/* from vcn4 and above, only unified queue is used */
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bool amdgpu_vcn_using_unified_queue(struct amdgpu_ring *ring)
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{
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struct amdgpu_device *adev = ring->adev;
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bool ret = false;
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if (adev->ip_versions[UVD_HWIP][0] >= IP_VERSION(4, 0, 0))
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ret = true;
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return ret;
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}
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bool amdgpu_vcn_is_disabled_vcn(struct amdgpu_device *adev, enum vcn_ring_type type, uint32_t vcn_instance)
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{
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bool ret = false;
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@ -718,19 +730,55 @@ error:
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return r;
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}
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static uint32_t * amdgpu_vcn_unified_ring_ib_header(struct amdgpu_ib *ib,
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uint32_t ib_pack_in_dw, bool enc)
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{
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uint32_t *ib_checksum;
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ib->ptr[ib->length_dw++] = 0x00000010; /* single queue checksum */
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ib->ptr[ib->length_dw++] = 0x30000002;
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ib_checksum = &ib->ptr[ib->length_dw++];
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ib->ptr[ib->length_dw++] = ib_pack_in_dw;
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ib->ptr[ib->length_dw++] = 0x00000010; /* engine info */
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ib->ptr[ib->length_dw++] = 0x30000001;
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ib->ptr[ib->length_dw++] = enc ? 0x2 : 0x3;
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ib->ptr[ib->length_dw++] = ib_pack_in_dw * sizeof(uint32_t);
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return ib_checksum;
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}
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static void amdgpu_vcn_unified_ring_ib_checksum(uint32_t **ib_checksum,
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uint32_t ib_pack_in_dw)
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{
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uint32_t i;
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uint32_t checksum = 0;
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for (i = 0; i < ib_pack_in_dw; i++)
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checksum += *(*ib_checksum + 2 + i);
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**ib_checksum = checksum;
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}
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static int amdgpu_vcn_dec_sw_send_msg(struct amdgpu_ring *ring,
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struct amdgpu_ib *ib_msg,
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struct dma_fence **fence)
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{
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struct amdgpu_vcn_decode_buffer *decode_buffer = NULL;
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const unsigned int ib_size_dw = 64;
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unsigned int ib_size_dw = 64;
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struct amdgpu_device *adev = ring->adev;
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struct dma_fence *f = NULL;
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struct amdgpu_job *job;
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struct amdgpu_ib *ib;
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uint64_t addr = AMDGPU_GPU_PAGE_ALIGN(ib_msg->gpu_addr);
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bool sq = amdgpu_vcn_using_unified_queue(ring);
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uint32_t *ib_checksum;
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uint32_t ib_pack_in_dw;
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int i, r;
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if (sq)
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ib_size_dw += 8;
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r = amdgpu_job_alloc_with_ib(adev, ib_size_dw * 4,
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AMDGPU_IB_POOL_DIRECT, &job);
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if (r)
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@ -739,6 +787,13 @@ static int amdgpu_vcn_dec_sw_send_msg(struct amdgpu_ring *ring,
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ib = &job->ibs[0];
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ib->length_dw = 0;
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/* single queue headers */
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if (sq) {
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ib_pack_in_dw = sizeof(struct amdgpu_vcn_decode_buffer) / sizeof(uint32_t)
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+ 4 + 2; /* engine info + decoding ib in dw */
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ib_checksum = amdgpu_vcn_unified_ring_ib_header(ib, ib_pack_in_dw, false);
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}
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ib->ptr[ib->length_dw++] = sizeof(struct amdgpu_vcn_decode_buffer) + 8;
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ib->ptr[ib->length_dw++] = cpu_to_le32(AMDGPU_VCN_IB_FLAG_DECODE_BUFFER);
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decode_buffer = (struct amdgpu_vcn_decode_buffer *)&(ib->ptr[ib->length_dw]);
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@ -752,6 +807,9 @@ static int amdgpu_vcn_dec_sw_send_msg(struct amdgpu_ring *ring,
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for (i = ib->length_dw; i < ib_size_dw; ++i)
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ib->ptr[i] = 0x0;
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if (sq)
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amdgpu_vcn_unified_ring_ib_checksum(&ib_checksum, ib_pack_in_dw);
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r = amdgpu_job_submit_direct(job, ring, &f);
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if (r)
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goto err_free;
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@ -838,13 +896,18 @@ static int amdgpu_vcn_enc_get_create_msg(struct amdgpu_ring *ring, uint32_t hand
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struct amdgpu_ib *ib_msg,
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struct dma_fence **fence)
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{
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const unsigned ib_size_dw = 16;
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unsigned ib_size_dw = 16;
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struct amdgpu_job *job;
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struct amdgpu_ib *ib;
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struct dma_fence *f = NULL;
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uint32_t *ib_checksum = NULL;
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uint64_t addr;
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bool sq = amdgpu_vcn_using_unified_queue(ring);
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int i, r;
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if (sq)
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ib_size_dw += 8;
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r = amdgpu_job_alloc_with_ib(ring->adev, ib_size_dw * 4,
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AMDGPU_IB_POOL_DIRECT, &job);
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if (r)
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@ -854,6 +917,10 @@ static int amdgpu_vcn_enc_get_create_msg(struct amdgpu_ring *ring, uint32_t hand
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addr = AMDGPU_GPU_PAGE_ALIGN(ib_msg->gpu_addr);
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ib->length_dw = 0;
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if (sq)
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ib_checksum = amdgpu_vcn_unified_ring_ib_header(ib, 0x11, true);
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ib->ptr[ib->length_dw++] = 0x00000018;
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ib->ptr[ib->length_dw++] = 0x00000001; /* session info */
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ib->ptr[ib->length_dw++] = handle;
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@ -873,6 +940,9 @@ static int amdgpu_vcn_enc_get_create_msg(struct amdgpu_ring *ring, uint32_t hand
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for (i = ib->length_dw; i < ib_size_dw; ++i)
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ib->ptr[i] = 0x0;
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if (sq)
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amdgpu_vcn_unified_ring_ib_checksum(&ib_checksum, 0x11);
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r = amdgpu_job_submit_direct(job, ring, &f);
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if (r)
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goto err;
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@ -892,13 +962,18 @@ static int amdgpu_vcn_enc_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han
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struct amdgpu_ib *ib_msg,
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struct dma_fence **fence)
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{
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const unsigned ib_size_dw = 16;
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unsigned ib_size_dw = 16;
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struct amdgpu_job *job;
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struct amdgpu_ib *ib;
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struct dma_fence *f = NULL;
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uint32_t *ib_checksum = NULL;
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uint64_t addr;
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bool sq = amdgpu_vcn_using_unified_queue(ring);
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int i, r;
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if (sq)
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ib_size_dw += 8;
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r = amdgpu_job_alloc_with_ib(ring->adev, ib_size_dw * 4,
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AMDGPU_IB_POOL_DIRECT, &job);
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if (r)
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@ -908,6 +983,10 @@ static int amdgpu_vcn_enc_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han
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addr = AMDGPU_GPU_PAGE_ALIGN(ib_msg->gpu_addr);
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ib->length_dw = 0;
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if (sq)
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ib_checksum = amdgpu_vcn_unified_ring_ib_header(ib, 0x11, true);
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ib->ptr[ib->length_dw++] = 0x00000018;
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ib->ptr[ib->length_dw++] = 0x00000001;
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ib->ptr[ib->length_dw++] = handle;
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@ -927,6 +1006,9 @@ static int amdgpu_vcn_enc_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han
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for (i = ib->length_dw; i < ib_size_dw; ++i)
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ib->ptr[i] = 0x0;
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if (sq)
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amdgpu_vcn_unified_ring_ib_checksum(&ib_checksum, 0x11);
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r = amdgpu_job_submit_direct(job, ring, &f);
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if (r)
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goto err;
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@ -977,6 +1059,20 @@ error:
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return r;
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}
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int amdgpu_vcn_unified_ring_test_ib(struct amdgpu_ring *ring, long timeout)
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{
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long r;
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r = amdgpu_vcn_enc_ring_test_ib(ring, timeout);
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if (r)
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goto error;
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r = amdgpu_vcn_dec_sw_ring_test_ib(ring, timeout);
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error:
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return r;
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}
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enum amdgpu_ring_priority_level amdgpu_vcn_get_enc_ring_prio(int ring)
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{
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switch(ring) {
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@ -364,6 +364,7 @@ int amdgpu_vcn_dec_ring_test_ring(struct amdgpu_ring *ring);
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int amdgpu_vcn_dec_ring_test_ib(struct amdgpu_ring *ring, long timeout);
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int amdgpu_vcn_dec_sw_ring_test_ring(struct amdgpu_ring *ring);
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int amdgpu_vcn_dec_sw_ring_test_ib(struct amdgpu_ring *ring, long timeout);
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int amdgpu_vcn_unified_ring_test_ib(struct amdgpu_ring *ring, long timeout);
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int amdgpu_vcn_enc_ring_test_ring(struct amdgpu_ring *ring);
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int amdgpu_vcn_enc_ring_test_ib(struct amdgpu_ring *ring, long timeout);
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