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perf: Add ability to sample machine state on interrupt
Enable capture of interrupted machine state for each sample. Registers to sample are passed per event in the sample_regs_intr bitmask. To sample interrupt machine state, the PERF_SAMPLE_INTR_REGS must be passed in sample_type. The list of available registers is arch dependent and provided by asm/perf_regs.h Registers are laid out as u64 in the order of the bit order of sample_intr_regs. This patch also adds a new ABI version PERF_ATTR_SIZE_VER4 because we extend the perf_event_attr struct with a new u64 field. Reviewed-by: Jiri Olsa <jolsa@redhat.com> Signed-off-by: Stephane Eranian <eranian@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: cebbert.lkml@gmail.com Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: linux-api@vger.kernel.org Link: http://lkml.kernel.org/r/1411559322-16548-2-git-send-email-eranian@google.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
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3 changed files with 63 additions and 5 deletions
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@ -137,8 +137,9 @@ enum perf_event_sample_format {
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PERF_SAMPLE_DATA_SRC = 1U << 15,
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PERF_SAMPLE_IDENTIFIER = 1U << 16,
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PERF_SAMPLE_TRANSACTION = 1U << 17,
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PERF_SAMPLE_REGS_INTR = 1U << 18,
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PERF_SAMPLE_MAX = 1U << 18, /* non-ABI */
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PERF_SAMPLE_MAX = 1U << 19, /* non-ABI */
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};
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/*
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@ -238,6 +239,7 @@ enum perf_event_read_format {
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#define PERF_ATTR_SIZE_VER2 80 /* add: branch_sample_type */
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#define PERF_ATTR_SIZE_VER3 96 /* add: sample_regs_user */
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/* add: sample_stack_user */
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#define PERF_ATTR_SIZE_VER4 104 /* add: sample_regs_intr */
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/*
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* Hardware event_id to monitor via a performance monitoring event:
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@ -334,6 +336,15 @@ struct perf_event_attr {
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/* Align to u64. */
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__u32 __reserved_2;
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/*
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* Defines set of regs to dump for each sample
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* state captured on:
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* - precise = 0: PMU interrupt
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* - precise > 0: sampled instruction
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*
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* See asm/perf_regs.h for details.
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*/
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__u64 sample_regs_intr;
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};
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#define perf_flags(attr) (*(&(attr)->read_format + 1))
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@ -686,6 +697,8 @@ enum perf_event_type {
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* { u64 weight; } && PERF_SAMPLE_WEIGHT
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* { u64 data_src; } && PERF_SAMPLE_DATA_SRC
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* { u64 transaction; } && PERF_SAMPLE_TRANSACTION
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* { u64 abi; # enum perf_sample_regs_abi
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* u64 regs[weight(mask)]; } && PERF_SAMPLE_REGS_INTR
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* };
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*/
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PERF_RECORD_SAMPLE = 9,
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