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arm64: dts: mt8195: Add dp-intf nodes

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Dp-intfs provide the pixel data to edptx and dptx. To support edptx
and dptx, we need to add dp-intf0 and dp-intf1 nodes.

Dp-intf0 is for edptx and dp-intf1 is for dptx.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221110063716.25677-2-rex-bc.chen@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
Bo-Chen Chen 2022-11-10 14:37:13 +08:00 • committed by Matthias Brugger
parent 5f535cc583
commit 6c2503b585
1 changed files with 23 additions and 0 deletions
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23
arch/arm64/boot/dts/mediatek/mt8195.dtsi
View file

@ -2244,6 +2244,17 @@
mediatek,gce-client-reg = <&gce0 SUBSYS_1c01XXXX 0x4000 0x1000>;
};
dp_intf0: dp-intf@1c015000 {
compatible = "mediatek,mt8195-dp-intf";
reg = <0 0x1c015000 0 0x1000>;
interrupts = <GIC_SPI 657 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&vdosys0 CLK_VDO0_DP_INTF0>,
<&vdosys0 CLK_VDO0_DP_INTF0_DP_INTF>,
<&apmixedsys CLK_APMIXED_TVDPLL1>;
clock-names = "engine", "pixel", "pll";
status = "disabled";
};
mutex: mutex@1c016000 {
compatible = "mediatek,mt8195-disp-mutex";
reg = <0 0x1c016000 0 0x1000>;
@ -2332,5 +2343,17 @@
clock-names = "apb", "smi", "gals";
power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;
};
dp_intf1: dp-intf@1c113000 {
compatible = "mediatek,mt8195-dp-intf";
reg = <0 0x1c113000 0 0x1000>;
interrupts = <GIC_SPI 513 IRQ_TYPE_LEVEL_HIGH 0>;
power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;
clocks = <&vdosys1 CLK_VDO1_DP_INTF0_MM>,
<&vdosys1 CLK_VDO1_DPINTF>,
<&apmixedsys CLK_APMIXED_TVDPLL2>;
clock-names = "engine", "pixel", "pll";
status = "disabled";
};
};
};