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ARM: dts: imx6qdl-wandboard: Add OV5645 camera support

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imx6qdl-wandboard can be connected to a OV5645 camera via
MIPI CSI port. Add support for it.

PAD_GPIO_6 has been originally used for the Ethernet FEC
ERR006687 workaround, but it needs to be used to provide the
camera sensor clock, so adjust it accordingly.

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Ezequiel Garcia 2019-07-22 10:45:45 -03:00 • committed by Shawn Guo
parent df7126cc42
commit 8ad2d1dcce
1 changed files with 69 additions and 4 deletions
Download patch file Download diff file Expand all files Collapse all files

73
arch/arm/boot/dts/imx6qdl-wandboard.dtsi
View file

@ -33,6 +33,30 @@
spdif-out; spdif-out;
}; };
reg_1p5v: regulator-1p5v {
compatible = "regulator-fixed";
regulator-name = "1P5V";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
};
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "1P8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
reg_2p8v: regulator-2p8v {
compatible = "regulator-fixed";
regulator-name = "2P8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-always-on;
};
reg_2p5v: regulator-2p5v { reg_2p5v: regulator-2p5v {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "2P5V"; regulator-name = "2P5V";
@ -94,6 +118,29 @@
VDDIO-supply = <&reg_3p3v>; VDDIO-supply = <&reg_3p3v>;
lrclk-strength = <3>; lrclk-strength = <3>;
}; };
camera@3c {
compatible = "ovti,ov5645";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ov5645>;
reg = <0x3c>;
clocks = <&clks IMX6QDL_CLK_CKO2>;
clock-names = "xclk";
clock-frequency = <24000000>;
vdddo-supply = <&reg_1p8v>;
vdda-supply = <&reg_2p8v>;
vddd-supply = <&reg_1p5v>;
enable-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;
port {
ov5645_to_mipi_csi2: endpoint {
remote-endpoint = <&mipi_csi2_in>;
clock-lanes = <0>;
data-lanes = <1 2>;
};
};
};
}; };
&iomuxc { &iomuxc {
@ -128,7 +175,6 @@
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
>; >;
}; };
@ -152,6 +198,14 @@
>; >;
}; };
pinctrl_ov5645: ov5645grp {
fsl,pins = <
MX6QDL_PAD_GPIO_3__CCM_CLKO2 0x000b0
MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1b0b0
MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0
>;
};
pinctrl_spdif: spdifgrp { pinctrl_spdif: spdifgrp {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1b0b0 MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1b0b0
@ -226,12 +280,23 @@
pinctrl-0 = <&pinctrl_enet>; pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii-id"; phy-mode = "rgmii-id";
phy-reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>; phy-reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
<&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
fsl,err006687-workaround-present;
status = "okay"; status = "okay";
}; };
&mipi_csi {
status = "okay";
port@0 {
reg = <0>;
mipi_csi2_in: endpoint {
remote-endpoint = <&ov5645_to_mipi_csi2>;
clock-lanes = <0>;
data-lanes = <1 2>;
};
};
};
&spdif { &spdif {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spdif>; pinctrl-0 = <&pinctrl_spdif>;