mirror of
https://gitee.com/bianbu-linux/linux-6.6
synced 2025-04-24 14:07:52 -04:00
SoC fixes for 6.5, part 1
There are three small fixes that came up sincie the past week: - an incorrect bit offset in ixp4xx bus driver - a riscv randconfig regression in the thead platform I merged - whitespace fixes for some dts files -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSl1R4ACgkQYKtH/8kJ Uie0Sw//XWCdg4Baaz/sbgsqw7zREqKdwvj9T1xIlmp5VBfFrSqMA25oSA/G4r4u LqhLiOE79L8pk0UbBWio7ja0htVBQmWq0NFflYEkjSB+1bfYfHaB0zTP6lmMPwBH DNzDuJunmttaFuofiFTNsxwRB7hcehWYGqKYnwM+LlGXXcS4qq2ktvAz9gludbZX +zxEdwxWyJcw7vbRcYGaJM2QsQxnIweqqtHUidnfOw/qnuz4BMgOk96erD0LHQw2 VcTKPU/mEGjaHNWvuQQwb+GzU9X5RWzOcRKUL6bNdWp4mjZQ6WmUIn4Wyz4Z640B zETkVmpEmxpRIbDeIal10MqQQNgRXERMGa9+8EJ3QDQ2zFyV0oRSOmn01IqFoX90 xDfgSi/IMG6VRWt0soqSGPc4rtlP7sy/4hskKUAyOZDwmkFUYfUVumosBrRUxGqX f4UTjh6fWTqwiatVPxs2Df02AMDPLpn7umRa2K1JPuNNJ2CpKK9KBcaT5MmtGZV0 ZyZhejIaENCWGwPk0E//y/KbnDCLrk8ngLeEvVweOQrpPWhpNp3TintFa0OYpB/m tS3ufUHGwz+7qg400FPkd47fn/j9VOeEEczOzUPFhLn/ZtUOsP1BczXcVZGHXjfF Im5o8fYnWmw8SKwogcX0OCO3AHQPqmTb+EeaCHjpU15DlT7QDX0= =cc9Z -----END PGP SIGNATURE----- Merge tag 'soc-fixes-6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull SoC fixes from Arnd Bergmann: "There are three small fixes that came up sincie the past week: - an incorrect bit offset in ixp4xx bus driver - a riscv randconfig regression in the thead platform I merged - whitespace fixes for some dts files" * tag 'soc-fixes-6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: bus: ixp4xx: fix IXP4XX_EXP_T1_MASK ARM: dts: st: add missing space before { RISC-V: make ARCH_THEAD preclude XIP_KERNEL
This commit is contained in:
commit
9f57c13f7e
13 changed files with 24 additions and 23 deletions
|
@ -43,6 +43,7 @@ config ARCH_SUNXI
|
|||
|
||||
config ARCH_THEAD
|
||||
bool "T-HEAD RISC-V SoCs"
|
||||
depends on MMU && !XIP_KERNEL
|
||||
select ERRATA_THEAD
|
||||
help
|
||||
This enables support for the RISC-V based T-HEAD SoCs.
|
||||
|
|
|
@ -33,7 +33,7 @@
|
|||
#define IXP4XX_EXP_TIMING_STRIDE 0x04
|
||||
#define IXP4XX_EXP_CS_EN BIT(31)
|
||||
#define IXP456_EXP_PAR_EN BIT(30) /* Only on IXP45x and IXP46x */
|
||||
#define IXP4XX_EXP_T1_MASK GENMASK(28, 27)
|
||||
#define IXP4XX_EXP_T1_MASK GENMASK(29, 28)
|
||||
#define IXP4XX_EXP_T1_SHIFT 28
|
||||
#define IXP4XX_EXP_T2_MASK GENMASK(27, 26)
|
||||
#define IXP4XX_EXP_T2_SHIFT 26
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue