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reset: add rcpu can reset

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Change-Id: I1beed0cc71dd0b206535bc5c7b7eb7bd53d557c6
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“weijinmei” 2024-04-25 09:14:09 +08:00 • committed by zhangmeng
parent 7bdfd230fa
commit c46567ffd6
3 changed files with 7 additions and 4 deletions
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2
arch/riscv/boot/dts/spacemit/k1-x.dtsi
View file

@ -610,7 +610,7 @@
<0x0 0xd8440000 0x0 0x98>, <0x0 0xd8440000 0x0 0x98>,
<0x0 0xc0000000 0x0 0x4280>, <0x0 0xc0000000 0x0 0x4280>,
<0x0 0xf0610000 0x0 0x20>, <0x0 0xf0610000 0x0 0x20>,
<0x0 0xc0882000 0x0 0x50>; <0x0 0xc0880000 0x0 0x2050>;
reg-names = "mpmu", "apmu", "apbc", "apbs", "ciu", "dciu", "ddrc", "apbc2", "rcpu"; reg-names = "mpmu", "apmu", "apbc", "apbs", "ciu", "dciu", "ddrc", "apbc2", "rcpu";
#reset-cells = <1>; #reset-cells = <1>;
status = "okay"; status = "okay";

4
drivers/reset/reset-spacemit-k1x.c
View file

@ -128,7 +128,8 @@
/* end of APBC2 register offset */ /* end of APBC2 register offset */
/* RCPU register offset */ /* RCPU register offset */
#define RCPU_HDMI_CLK_RST 0x44 #define RCPU_HDMI_CLK_RST 0x2044
#define RCPU_CAN_CLK_RST 0x4c
/* end of RCPU register offset */ /* end of RCPU register offset */
enum spacemit_reset_base_type{ enum spacemit_reset_base_type{
@ -283,6 +284,7 @@ static const struct spacemit_reset_signal
[RESET_SEC_GPIO] = { APBC2_GPIO_CLK_RST, BIT(2), 0, BIT(2), RST_BASE_TYPE_APBC2 }, [RESET_SEC_GPIO] = { APBC2_GPIO_CLK_RST, BIT(2), 0, BIT(2), RST_BASE_TYPE_APBC2 },
//RCPU //RCPU
[RESET_RCPU_HDMIAUDIO] = { RCPU_HDMI_CLK_RST, BIT(0), BIT(0), 0, RST_BASE_TYPE_RCPU }, [RESET_RCPU_HDMIAUDIO] = { RCPU_HDMI_CLK_RST, BIT(0), BIT(0), 0, RST_BASE_TYPE_RCPU },
[RESET_RCPU_CAN] = { RCPU_CAN_CLK_RST, BIT(0), BIT(0), 0, RST_BASE_TYPE_RCPU },
}; };
static struct spacemit_reset *to_spacemit_reset( static struct spacemit_reset *to_spacemit_reset(

5
include/dt-bindings/reset/spacemit-k1x-reset.h
View file

@ -112,8 +112,9 @@
#define RESET_SEC_KPC 99 #define RESET_SEC_KPC 99
#define RESET_SEC_GPIO 100 #define RESET_SEC_GPIO 100
#define RESET_RCPU_HDMIAUDIO 101 #define RESET_RCPU_HDMIAUDIO 101
#define RESET_RCPU_CAN 102
#define RESET_NUMBER 102 #define RESET_NUMBER 103
#endif /* __DT_BINDINGS_RESET_SAPCEMIT_K1X_H__ */ #endif /* __DT_BINDINGS_RESET_SAPCEMIT_K1X_H__ */