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x86/entry: Convert SWAPGS to swapgs and remove the definition of SWAPGS

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XENPV doesn't use swapgs_restore_regs_and_return_to_usermode(),
error_entry() and the code between entry_SYSENTER_compat() and
entry_SYSENTER_compat_after_hwframe.

Change the PV-compatible SWAPGS to the ASM instruction swapgs in these
places.

Also remove the definition of SWAPGS since no more users.

Signed-off-by: Lai Jiangshan <jiangshan.ljs@antgroup.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Juergen Gross <jgross@suse.com>
Link: https://lore.kernel.org/r/20220503032107.680190-7-jiangshanlai@gmail.com
This commit is contained in:
Lai Jiangshan 2022-05-03 11:21:07 +08:00 • committed by Borislav Petkov
parent 64cbd0acb5
commit c89191ce67
3 changed files with 4 additions and 12 deletions
Download patch file Download diff file Expand all files Collapse all files

6
arch/x86/entry/entry_64.S
View file

@ -1019,7 +1019,7 @@ SYM_CODE_START_LOCAL(error_entry)
* We entered from user mode or we're pretending to have entered * We entered from user mode or we're pretending to have entered
* from user mode due to an IRET fault. * from user mode due to an IRET fault.
*/ */
SWAPGS swapgs
FENCE_SWAPGS_USER_ENTRY FENCE_SWAPGS_USER_ENTRY
/* We have user CR3. Change to kernel CR3. */ /* We have user CR3. Change to kernel CR3. */
SWITCH_TO_KERNEL_CR3 scratch_reg=%rax SWITCH_TO_KERNEL_CR3 scratch_reg=%rax
@ -1051,7 +1051,7 @@ SYM_CODE_START_LOCAL(error_entry)
* gsbase and proceed. We'll fix up the exception and land in * gsbase and proceed. We'll fix up the exception and land in
* .Lgs_change's error handler with kernel gsbase. * .Lgs_change's error handler with kernel gsbase.
*/ */
SWAPGS swapgs
/* /*
* Issue an LFENCE to prevent GS speculation, regardless of whether it is a * Issue an LFENCE to prevent GS speculation, regardless of whether it is a
@ -1072,7 +1072,7 @@ SYM_CODE_START_LOCAL(error_entry)
* We came from an IRET to user mode, so we have user * We came from an IRET to user mode, so we have user
* gsbase and CR3. Switch to kernel gsbase and CR3: * gsbase and CR3. Switch to kernel gsbase and CR3:
*/ */
SWAPGS swapgs
FENCE_SWAPGS_USER_ENTRY FENCE_SWAPGS_USER_ENTRY
SWITCH_TO_KERNEL_CR3 scratch_reg=%rax SWITCH_TO_KERNEL_CR3 scratch_reg=%rax

2
arch/x86/entry/entry_64_compat.S
View file

@ -50,7 +50,7 @@ SYM_CODE_START(entry_SYSENTER_compat)
UNWIND_HINT_EMPTY UNWIND_HINT_EMPTY
ENDBR ENDBR
/* Interrupts are off on entry. */ /* Interrupts are off on entry. */
SWAPGS swapgs
pushq %rax pushq %rax
SWITCH_TO_KERNEL_CR3 scratch_reg=%rax SWITCH_TO_KERNEL_CR3 scratch_reg=%rax

8
arch/x86/include/asm/irqflags.h
View file

@ -137,14 +137,6 @@ static __always_inline void arch_local_irq_restore(unsigned long flags)
if (!arch_irqs_disabled_flags(flags)) if (!arch_irqs_disabled_flags(flags))
arch_local_irq_enable(); arch_local_irq_enable();
} }
#else
#ifdef CONFIG_X86_64
#ifdef CONFIG_XEN_PV
#define SWAPGS ALTERNATIVE "swapgs", "", X86_FEATURE_XENPV
#else
#define SWAPGS swapgs
#endif
#endif
#endif /* !__ASSEMBLY__ */ #endif /* !__ASSEMBLY__ */
#endif #endif