Wyatt Wood 3ca402375a drm/amd/display: Refactor and add visual confirm for HW Flip Queue ... [Why] Visual confirm will indicate if driver is programming the surface address. Refactor is required because much of the visual confirm logic is buried deep in the mpcc files. In addition, visual confirm is not updated during fast updates. [How] In order to have visual confirm for driver flips, visual confirm needs to be updated on every frame, including fast updates. Add a new hw sequencer interface update_visual_confirm_color, and a new mpc function pointer set_bg_color. v2: drop unused variable (Alex) Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Stylon Wang <stylon.wang@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2021-05-19 22:39:36 -04:00
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hw	drm/amd/display: Refactor and add visual confirm for HW Flip Queue	2021-05-19 22:39:36 -04:00
bw_fixed.h	drm/amd/display: explicit uint64_t casting	2018-11-05 14:20:50 -05:00
clock_source.h	drm/amd/display: Synchronize displays with different timings	2021-02-22 18:05:48 -05:00
compressor.h	drm/amd/display: fbc state could not reach while enable fbc	2018-11-30 12:02:35 -05:00
core_status.h	drm/amd/display: fail instead of div by zero/bugcheck	2020-11-02 15:30:47 -05:00
core_types.h	drm/amd/display: Add dynamic link encoder selection.	2021-04-09 16:48:38 -04:00
custom_float.h	drm/amd/display: Enable regamma 25 segments and use double buffer.	2017-09-26 17:14:18 -04:00
dc_link_ddc.h	drm/amd/display: Support for DMUB AUX	2021-03-02 14:05:41 -05:00
dc_link_dp.h	drm/amd/display: determine dp link encoding format from link settings	2021-05-19 22:39:04 -04:00
dce_calcs.h	drm/amdgpu/display: remove VEGAM config option	2018-05-18 16:08:18 -05:00
dcn_calc_math.h	drm/amd/display: fixup DML dependencies	2020-01-16 14:16:48 -05:00
dcn_calcs.h	drm/amd/display: make clk mgr soc specific	2019-05-31 10:39:29 -05:00
hw_sequencer.h	drm/amd/display: Refactor and add visual confirm for HW Flip Queue	2021-05-19 22:39:36 -04:00
hw_sequencer_private.h	drm/amd/display: move panel power seq to new panel struct	2020-04-22 18:11:48 -04:00
link_enc_cfg.h	drm/amd/display: Update setting of DP training parameters.	2021-05-10 18:09:53 -04:00
link_hwss.h	drm/amd/display: correct eDP T9 delay	2020-11-02 15:31:10 -05:00
reg_helper.h	drm/amd/display: Indirect reg read macro with shift and mask	2020-01-16 14:13:53 -05:00
resource.h	drm/amd/display: Update link encoder object creation	2021-03-02 14:05:52 -05:00
vm_helper.h	drm/amd/display: move vmid determination logic to a module	2019-06-22 09:34:14 -05:00