Dmitry Baryshkov 36c5dde5fd drm/msm/dsi: stop passing src_pll_id to the phy_enable call ... Phy driver already knows the source PLL id basing on the set usecase and the current PLL id. Stop passing it to the phy_enable call. As a reminder, dsi manager will always use DSI 0 as a clock master in a slave mode, so PLL 0 is always a clocksource for DSI 0 and it is always a clocksource for DSI 1 too unless DSI 1 is used in the standalone mode. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Stephen Boyd <swboyd@chromium.org> # on sc7180 lazor Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Link: https://lore.kernel.org/r/20210331105735.3690009-25-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>		2021-04-07 11:05:47 -07:00
..
phy	drm/msm/dsi: stop passing src_pll_id to the phy_enable call	2021-04-07 11:05:47 -07:00
dsi.c	drm/msm/dpu: ensure device suspend happens during PM sleep	2020-07-30 13:44:52 -07:00
dsi.h	drm/msm/dsi: stop passing src_pll_id to the phy_enable call	2021-04-07 11:05:47 -07:00
dsi.xml.h	drm/msm/dsi: add support for 7nm DSI PHY/PLL	2020-09-12 09:59:58 -07:00
dsi_cfg.c	drm/msm/dsi: Uncomment core_mmss clock for MSM8996	2021-04-07 11:05:44 -07:00
dsi_cfg.h	drm/msm/dsi: add DSI config for sm8150 and sm8250	2020-09-12 09:59:58 -07:00
dsi_host.c	drm/msm/dsi: push provided clocks handling into a generic code	2021-04-07 11:05:45 -07:00
dsi_manager.c	drm/msm/dsi: stop passing src_pll_id to the phy_enable call	2021-04-07 11:05:47 -07:00
mmss_cc.xml.h	drm/msm: sync generated headers	2020-07-31 06:46:16 -07:00
sfpb.xml.h	drm/msm: sync generated headers	2020-07-31 06:46:16 -07:00