Hersen Wu 245524d9b8 drm/amd/display: dp debugfs allow link rate lane count greater than dp rx reported caps ... [Why] when hw team does phy parameters tuning, there is need to force dp link rate or lane count grater than the values from dp receiver to check dp tx. current debufs limit link rate, lane count no more than rx caps. [How] remove force settings less than rx caps check v2: Fix typo in title Signed-off-by: Hersen Wu <hersenxs.wu@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2018-07-13 14:51:53 -05:00
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drm	drm/amd/display: dp debugfs allow link rate lane count greater than dp rx reported caps	2018-07-13 14:51:53 -05:00
host1x	drm for v4.18-rc1	2018-06-06 08:16:33 -07:00
ipu-v3	gpu: ipu-v3: prg: avoid possible array underflow	2018-03-15 17:52:08 +01:00
vga	docs: Fix some broken references	2018-06-15 18:10:01 -03:00
Makefile