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https://gitee.com/bianbu-linux/linux-6.6
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bfd042321a
Extend MRP to support LC mode(link check) for the interconnect port. This applies only to the interconnect ring. Opposite to RC mode(ring check) the LC mode is using CFM frames to detect when the link goes up or down and based on that the userspace will need to react. One advantage of the LC mode over RC mode is that there will be fewer frames in the normal rings. Because RC mode generates InTest on all ports while LC mode sends CFM frame only on the interconnect port. All 4 nodes part of the interconnect ring needs to have the same mode. And it is not possible to have running LC and RC mode at the same time on a node. Whenever the MIM starts it needs to detect the status of the other 3 nodes in the interconnect ring so it would send a frame called InLinkStatus, on which the clients needs to reply with their link status. This patch adds InLinkStatus frame type and extends existing rules on how to forward this frame. Acked-by: Nikolay Aleksandrov <nikolay@nvidia.com> Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Link: https://lore.kernel.org/r/20201124082525.273820-1-horatiu.vultur@microchip.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
160 lines
2.9 KiB
C
160 lines
2.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
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#ifndef _UAPI_LINUX_MRP_BRIDGE_H_
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#define _UAPI_LINUX_MRP_BRIDGE_H_
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#include <linux/types.h>
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#include <linux/if_ether.h>
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#define MRP_MAX_FRAME_LENGTH 200
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#define MRP_DEFAULT_PRIO 0x8000
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#define MRP_DOMAIN_UUID_LENGTH 16
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#define MRP_VERSION 1
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#define MRP_FRAME_PRIO 7
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#define MRP_OUI_LENGTH 3
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#define MRP_MANUFACTURE_DATA_LENGTH 2
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enum br_mrp_ring_role_type {
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BR_MRP_RING_ROLE_DISABLED,
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BR_MRP_RING_ROLE_MRC,
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BR_MRP_RING_ROLE_MRM,
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BR_MRP_RING_ROLE_MRA,
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};
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enum br_mrp_in_role_type {
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BR_MRP_IN_ROLE_DISABLED,
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BR_MRP_IN_ROLE_MIC,
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BR_MRP_IN_ROLE_MIM,
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};
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enum br_mrp_ring_state_type {
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BR_MRP_RING_STATE_OPEN,
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BR_MRP_RING_STATE_CLOSED,
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};
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enum br_mrp_in_state_type {
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BR_MRP_IN_STATE_OPEN,
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BR_MRP_IN_STATE_CLOSED,
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};
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enum br_mrp_port_state_type {
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BR_MRP_PORT_STATE_DISABLED,
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BR_MRP_PORT_STATE_BLOCKED,
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BR_MRP_PORT_STATE_FORWARDING,
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BR_MRP_PORT_STATE_NOT_CONNECTED,
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};
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enum br_mrp_port_role_type {
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BR_MRP_PORT_ROLE_PRIMARY,
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BR_MRP_PORT_ROLE_SECONDARY,
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BR_MRP_PORT_ROLE_INTER,
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};
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enum br_mrp_tlv_header_type {
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BR_MRP_TLV_HEADER_END = 0x0,
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BR_MRP_TLV_HEADER_COMMON = 0x1,
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BR_MRP_TLV_HEADER_RING_TEST = 0x2,
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BR_MRP_TLV_HEADER_RING_TOPO = 0x3,
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BR_MRP_TLV_HEADER_RING_LINK_DOWN = 0x4,
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BR_MRP_TLV_HEADER_RING_LINK_UP = 0x5,
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BR_MRP_TLV_HEADER_IN_TEST = 0x6,
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BR_MRP_TLV_HEADER_IN_TOPO = 0x7,
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BR_MRP_TLV_HEADER_IN_LINK_DOWN = 0x8,
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BR_MRP_TLV_HEADER_IN_LINK_UP = 0x9,
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BR_MRP_TLV_HEADER_IN_LINK_STATUS = 0xa,
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BR_MRP_TLV_HEADER_OPTION = 0x7f,
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};
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enum br_mrp_sub_tlv_header_type {
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BR_MRP_SUB_TLV_HEADER_TEST_MGR_NACK = 0x1,
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BR_MRP_SUB_TLV_HEADER_TEST_PROPAGATE = 0x2,
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BR_MRP_SUB_TLV_HEADER_TEST_AUTO_MGR = 0x3,
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};
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struct br_mrp_tlv_hdr {
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__u8 type;
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__u8 length;
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};
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struct br_mrp_sub_tlv_hdr {
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__u8 type;
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__u8 length;
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};
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struct br_mrp_end_hdr {
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struct br_mrp_tlv_hdr hdr;
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};
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struct br_mrp_common_hdr {
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__be16 seq_id;
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__u8 domain[MRP_DOMAIN_UUID_LENGTH];
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};
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struct br_mrp_ring_test_hdr {
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__be16 prio;
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__u8 sa[ETH_ALEN];
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__be16 port_role;
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__be16 state;
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__be16 transitions;
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__be32 timestamp;
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};
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struct br_mrp_ring_topo_hdr {
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__be16 prio;
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__u8 sa[ETH_ALEN];
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__be16 interval;
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};
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struct br_mrp_ring_link_hdr {
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__u8 sa[ETH_ALEN];
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__be16 port_role;
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__be16 interval;
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__be16 blocked;
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};
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struct br_mrp_sub_opt_hdr {
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__u8 type;
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__u8 manufacture_data[MRP_MANUFACTURE_DATA_LENGTH];
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};
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struct br_mrp_test_mgr_nack_hdr {
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__be16 prio;
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__u8 sa[ETH_ALEN];
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__be16 other_prio;
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__u8 other_sa[ETH_ALEN];
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};
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struct br_mrp_test_prop_hdr {
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__be16 prio;
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__u8 sa[ETH_ALEN];
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__be16 other_prio;
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__u8 other_sa[ETH_ALEN];
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};
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struct br_mrp_oui_hdr {
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__u8 oui[MRP_OUI_LENGTH];
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};
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struct br_mrp_in_test_hdr {
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__be16 id;
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__u8 sa[ETH_ALEN];
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__be16 port_role;
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__be16 state;
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__be16 transitions;
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__be32 timestamp;
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};
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struct br_mrp_in_topo_hdr {
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__u8 sa[ETH_ALEN];
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__be16 id;
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__be16 interval;
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};
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struct br_mrp_in_link_hdr {
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__u8 sa[ETH_ALEN];
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__be16 port_role;
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__be16 id;
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__be16 interval;
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};
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#endif
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