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f98a3dccfc
parisc, ia64 and powerpc32 are the only remaining architectures that
provide custom arch_{spin,read,write}_lock_flags() functions, which are
meant to re-enable interrupts while waiting for a spinlock.
However, none of these can actually run into this codepath, because
it is only called on architectures without CONFIG_GENERIC_LOCKBREAK,
or when CONFIG_DEBUG_LOCK_ALLOC is set without CONFIG_LOCKDEP, and none
of those combinations are possible on the three architectures.
Going back in the git history, it appears that arch/mn10300 may have
been able to run into this code path, but there is a good chance that
it never worked. On the architectures that still exist, it was
already impossible to hit back in 2008 after the introduction of
CONFIG_GENERIC_LOCKBREAK, and possibly earlier.
As this is all dead code, just remove it and the helper functions built
around it. For arch/ia64, the inline asm could be cleaned up, but
it seems safer to leave it untouched.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Helge Deller <deller@gmx.de> # parisc
Link: https://lore.kernel.org/r/20211022120058.1031690-1-arnd@kernel.org
27 lines
649 B
C
27 lines
649 B
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* OpenRISC Linux
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*
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* Linux architectural port borrowing liberally from similar works of
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* others. All original copyrights apply as per the original source
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* declaration.
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*
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* OpenRISC implementation:
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* Copyright (C) 2003 Matjaz Breskvar <phoenix@bsemi.com>
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* Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
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* et al.
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*/
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#ifndef __ASM_OPENRISC_SPINLOCK_H
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#define __ASM_OPENRISC_SPINLOCK_H
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#include <asm/qspinlock.h>
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#include <asm/qrwlock.h>
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#define arch_spin_relax(lock) cpu_relax()
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#define arch_read_relax(lock) cpu_relax()
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#define arch_write_relax(lock) cpu_relax()
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#endif
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