Jaehyun Chung e0f7ff99c9 drm/amd/display: Mask DPCD field to avoid reading unsupported field value ... [Why] DSC will be disabled if DPCD 0006F[6:3] is set to a non-zero value because bits 6:3 are not currently supported. When 6:3 is populated, an unsupported INCREMENT OF bits_per_pixel value is read (DPCD 0006F[2:0]) [How] Mask the INCREMENT OF bits_per_pixel field so that values in the unsupported field are ignored. Signed-off-by: Jaehyun Chung <jaehyun.chung@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2020-08-17 14:09:06 -04:00
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dc_dsc.c	drm/amd/display: Mask DPCD field to avoid reading unsupported field value	2020-08-17 14:09:06 -04:00
dscc_types.h	drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_0 and DSC_SUPPORTED	2019-11-13 15:29:44 -05:00
Makefile	drm/amd/display: add DCN support for aarch64	2020-08-10 17:26:53 -04:00
qp_tables.h	drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_0 and DSC_SUPPORTED	2019-11-13 15:29:44 -05:00
rc_calc.c	drm/amd/display: Use u16 for drm_bpp in DSC calculations	2020-07-01 01:59:20 -04:00
rc_calc.h	drm/amd/display: Rework dsc to isolate FPU operations	2020-07-01 01:59:20 -04:00
rc_calc_dpi.c	drm/amd/display: Rework dsc to isolate FPU operations	2020-07-01 01:59:20 -04:00