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bianbu-linux-6.6/drivers/gpu/drm/amd/include/asic_reg/gc
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Stanley.Yang 3f975d0f71 drm/amdgpu: update athub interrupt harvesting handle 
GCEA/MMHUB EA error should not result to DF freeze, this is
fixed in next generation, but for some reasons the GCEA/MMHUB
EA error will result to DF freeze in previous generation,
diver should avoid to indicate GCEA/MMHUB EA error as hw fatal
error in kernel message by read GCEA/MMHUB err status registers.

Changed from V1:
    make query_ras_error_status function more general
    make read mmhub er status register more friendly

Changed from V2:
    move ras error status query function into do_recovery workqueue

Changed from V3:
    remove useless code from V2, print GCEA error status
    instance number

Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-09-22 17:37:38 -04:00
..
gc_9_0_default.h drm/amdgpu: remove some old gc 9.x registers 2017-12-13 17:28:08 -05:00
gc_9_0_offset.h drm/amd/amdgpu: Fix SQ_DEBUG_STS_GLOBAL* registers 2020-07-01 01:59:21 -04:00
gc_9_0_sh_mask.h drm/amd/amdgpu: Add SQ_DEBUG_STS_GLOBAL* registers/bits 2020-07-01 01:59:19 -04:00
gc_9_1_offset.h drm/amd/amdgpu: Fix SQ_DEBUG_STS_GLOBAL* registers 2020-07-01 01:59:21 -04:00
gc_9_1_sh_mask.h drm/amd/amdgpu: Add SQ_DEBUG_STS_GLOBAL* registers/bits 2020-07-01 01:59:19 -04:00
gc_9_2_1_offset.h drm/amd/amdgpu: Fix SQ_DEBUG_STS_GLOBAL* registers 2020-07-01 01:59:21 -04:00
gc_9_2_1_sh_mask.h drm/amd/amdgpu: Add SQ_DEBUG_STS_GLOBAL* registers/bits 2020-07-01 01:59:19 -04:00
gc_9_4_1_offset.h drm/amdgpu: update athub interrupt harvesting handle 2020-09-22 17:37:38 -04:00
gc_9_4_1_sh_mask.h drm/amdgpu: add EDC counter registers of gc for Arcturus 2020-01-22 16:36:22 -05:00
gc_10_1_0_default.h drm/amdgpu: add GC 10.1 register headers (v4) 2019-06-20 15:54:35 -05:00
gc_10_1_0_offset.h drm/amd/amdgpu: Fix offset for SQ_DEBUG_STS_GLOBAL on gfx10 (v2) 2020-07-01 01:59:22 -04:00
gc_10_1_0_sh_mask.h drm/amd/amdgpu: Add SQ_DEBUG_STS_GLOBAL* registers/bits 2020-07-01 01:59:19 -04:00
gc_10_3_0_default.h drm/amdgpu: add the GC 10.3 VRS registers 2020-09-17 18:00:50 -04:00
gc_10_3_0_offset.h drm/amdgpu: add the GC 10.3 VRS registers 2020-09-17 18:00:50 -04:00
gc_10_3_0_sh_mask.h drm/amdgpu: add the GC 10.3 VRS registers 2020-09-17 18:00:50 -04:00