mirror of
https://gitee.com/bianbu-linux/linux-6.6
synced 2025-07-24 01:54:03 -04:00
255b4658c8
1, We assume arch/loongarch/include/asm/smp.h be included in include/ linux/smp.h is valid and the reverse inclusion isn't. So remove the <linux/smp.h> in arch/loongarch/include/asm/smp.h. 2, arch/loongarch/include/asm/smp.h is only needed when CONFIG_SMP, and setup.c include it only because it need plat_smp_setup(). So, reorganize setup.c & smp.h, and then remove <asm/smp.h> in setup.c. 3, Fix cacheinfo.c and percpu.h build error by adding the missing header files when !CONFIG_SMP. 4, Fix acpi.c build error by adding CONFIG_SMP guards. 5, Move irq_stat definition from smp.c to irq.c and fix its declaration. 6, Select CONFIG_SMP for CONFIG_NUMA, similar as other architectures do. Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
123 lines
3 KiB
C
123 lines
3 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* LoongArch cacheinfo support
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*
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* Copyright (C) 2020-2022 Loongson Technology Corporation Limited
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*/
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#include <asm/cpu-info.h>
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#include <linux/cacheinfo.h>
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/* Populates leaf and increments to next leaf */
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#define populate_cache(cache, leaf, c_level, c_type) \
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do { \
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leaf->type = c_type; \
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leaf->level = c_level; \
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leaf->coherency_line_size = c->cache.linesz; \
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leaf->number_of_sets = c->cache.sets; \
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leaf->ways_of_associativity = c->cache.ways; \
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leaf->size = c->cache.linesz * c->cache.sets * \
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c->cache.ways; \
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leaf++; \
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} while (0)
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int init_cache_level(unsigned int cpu)
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{
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struct cpuinfo_loongarch *c = ¤t_cpu_data;
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struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
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int levels = 0, leaves = 0;
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/*
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* If Dcache is not set, we assume the cache structures
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* are not properly initialized.
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*/
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if (c->dcache.waysize)
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levels += 1;
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else
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return -ENOENT;
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leaves += (c->icache.waysize) ? 2 : 1;
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if (c->vcache.waysize) {
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levels++;
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leaves++;
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}
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if (c->scache.waysize) {
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levels++;
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leaves++;
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}
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if (c->tcache.waysize) {
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levels++;
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leaves++;
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}
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this_cpu_ci->num_levels = levels;
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this_cpu_ci->num_leaves = leaves;
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return 0;
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}
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static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf,
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struct cacheinfo *sib_leaf)
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{
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return !((this_leaf->level == 1) || (this_leaf->level == 2));
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}
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static void cache_cpumap_setup(unsigned int cpu)
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{
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struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
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struct cacheinfo *this_leaf, *sib_leaf;
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unsigned int index;
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for (index = 0; index < this_cpu_ci->num_leaves; index++) {
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unsigned int i;
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this_leaf = this_cpu_ci->info_list + index;
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/* skip if shared_cpu_map is already populated */
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if (!cpumask_empty(&this_leaf->shared_cpu_map))
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continue;
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cpumask_set_cpu(cpu, &this_leaf->shared_cpu_map);
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for_each_online_cpu(i) {
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struct cpu_cacheinfo *sib_cpu_ci = get_cpu_cacheinfo(i);
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if (i == cpu || !sib_cpu_ci->info_list)
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continue;/* skip if itself or no cacheinfo */
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sib_leaf = sib_cpu_ci->info_list + index;
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if (cache_leaves_are_shared(this_leaf, sib_leaf)) {
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cpumask_set_cpu(cpu, &sib_leaf->shared_cpu_map);
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cpumask_set_cpu(i, &this_leaf->shared_cpu_map);
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}
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}
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}
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}
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int populate_cache_leaves(unsigned int cpu)
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{
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int level = 1;
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struct cpuinfo_loongarch *c = ¤t_cpu_data;
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struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
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struct cacheinfo *this_leaf = this_cpu_ci->info_list;
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if (c->icache.waysize) {
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populate_cache(dcache, this_leaf, level, CACHE_TYPE_DATA);
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populate_cache(icache, this_leaf, level++, CACHE_TYPE_INST);
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} else {
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populate_cache(dcache, this_leaf, level++, CACHE_TYPE_UNIFIED);
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}
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if (c->vcache.waysize)
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populate_cache(vcache, this_leaf, level++, CACHE_TYPE_UNIFIED);
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if (c->scache.waysize)
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populate_cache(scache, this_leaf, level++, CACHE_TYPE_UNIFIED);
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if (c->tcache.waysize)
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populate_cache(tcache, this_leaf, level++, CACHE_TYPE_UNIFIED);
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cache_cpumap_setup(cpu);
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this_cpu_ci->cpu_map_populated = true;
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return 0;
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}
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