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https://gitee.com/bianbu-linux/linux-6.6
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c4a05cf0ed
[ Upstream commit 7a92fc8b4d20680e4c20289a670d8fca2d1f2c1b ]
The pcpu setup when using the page allocator sets up a new vmalloc
mapping very early in the boot process, so early that it cannot use the
flush_cache_vmap() function which may depend on structures not yet
initialized (for example in riscv, we currently send an IPI to flush
other cpus TLB).
But on some architectures, we must call flush_cache_vmap(): for example,
in riscv, some uarchs can cache invalid TLB entries so we need to flush
the new established mapping to avoid taking an exception.
So fix this by introducing a new function flush_cache_vmap_early() which
is called right after setting the new page table entry and before
accessing this new mapping. This new function implements a local flush
tlb on riscv and is no-op for other architectures (same as today).
Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Dennis Zhou <dennis@kernel.org>
Stable-dep-of: d9807d60c145 ("riscv: mm: execute local TLB flush after populating vmemmap")
Signed-off-by: Sasha Levin <sashal@kernel.org>
63 lines
2.1 KiB
C
63 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _SPARC_CACHEFLUSH_H
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#define _SPARC_CACHEFLUSH_H
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#include <linux/page-flags.h>
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#include <asm/cachetlb_32.h>
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#define flush_cache_all() \
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sparc32_cachetlb_ops->cache_all()
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#define flush_cache_mm(mm) \
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sparc32_cachetlb_ops->cache_mm(mm)
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#define flush_cache_dup_mm(mm) \
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sparc32_cachetlb_ops->cache_mm(mm)
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#define flush_cache_range(vma,start,end) \
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sparc32_cachetlb_ops->cache_range(vma, start, end)
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#define flush_cache_page(vma,addr,pfn) \
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sparc32_cachetlb_ops->cache_page(vma, addr)
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#define flush_icache_range(start, end) do { } while (0)
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#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
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do { \
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flush_cache_page(vma, vaddr, page_to_pfn(page));\
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memcpy(dst, src, len); \
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} while (0)
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#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
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do { \
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flush_cache_page(vma, vaddr, page_to_pfn(page));\
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memcpy(dst, src, len); \
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} while (0)
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#define __flush_page_to_ram(addr) \
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sparc32_cachetlb_ops->page_to_ram(addr)
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#define flush_sig_insns(mm,insn_addr) \
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sparc32_cachetlb_ops->sig_insns(mm, insn_addr)
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#define flush_page_for_dma(addr) \
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sparc32_cachetlb_ops->page_for_dma(addr)
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void sparc_flush_page_to_ram(struct page *page);
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void sparc_flush_folio_to_ram(struct folio *folio);
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#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
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#define flush_dcache_folio(folio) sparc_flush_folio_to_ram(folio)
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static inline void flush_dcache_page(struct page *page)
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{
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flush_dcache_folio(page_folio(page));
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}
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#define flush_dcache_mmap_lock(mapping) do { } while (0)
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#define flush_dcache_mmap_unlock(mapping) do { } while (0)
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#define flush_cache_vmap(start, end) flush_cache_all()
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#define flush_cache_vmap_early(start, end) do { } while (0)
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#define flush_cache_vunmap(start, end) flush_cache_all()
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/* When a context switch happens we must flush all user windows so that
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* the windows of the current process are flushed onto its stack. This
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* way the windows are all clean for the next process and the stack
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* frames are up to date.
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*/
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void flush_user_windows(void);
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void kill_user_windows(void);
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void flushw_all(void);
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#endif /* _SPARC_CACHEFLUSH_H */
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