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https://gitee.com/bianbu-linux/linux-6.6
synced 2025-07-24 01:54:03 -04:00
The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications. For example, the fix in
commit 5e427ec2d0
("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.
After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out. Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.
Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
are flagged as __cpuinit -- so if we remove the __cpuinit from
arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
content into no-ops as early as possible, since that will get rid
of these warnings. In any case, they are temporary and harmless.
This removes all the arch/x86 uses of the __cpuinit macros from
all C files. x86 only had the one __CPUINIT used in assembly files,
and it wasn't paired off with a .previous or a __FINIT, so we can
delete it directly w/o any corresponding additional change there.
[1] https://lkml.org/lkml/2013/5/20/589
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: x86@kernel.org
Acked-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: H. Peter Anvin <hpa@linux.intel.com>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
583 lines
16 KiB
C
583 lines
16 KiB
C
/*
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* Thermal throttle event support code (such as syslog messaging and rate
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* limiting) that was factored out from x86_64 (mce_intel.c) and i386 (p4.c).
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*
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* This allows consistent reporting of CPU thermal throttle events.
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*
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* Maintains a counter in /sys that keeps track of the number of thermal
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* events, such that the user knows how bad the thermal problem might be
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* (since the logging to syslog and mcelog is rate limited).
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*
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* Author: Dmitriy Zavin (dmitriyz@google.com)
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*
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* Credits: Adapted from Zwane Mwaikambo's original code in mce_intel.c.
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* Inspired by Ross Biro's and Al Borchers' counter code.
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*/
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#include <linux/interrupt.h>
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#include <linux/notifier.h>
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#include <linux/jiffies.h>
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#include <linux/kernel.h>
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#include <linux/percpu.h>
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#include <linux/export.h>
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/cpu.h>
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#include <asm/processor.h>
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#include <asm/apic.h>
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#include <asm/idle.h>
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#include <asm/mce.h>
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#include <asm/msr.h>
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#include <asm/trace/irq_vectors.h>
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/* How long to wait between reporting thermal events */
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#define CHECK_INTERVAL (300 * HZ)
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#define THERMAL_THROTTLING_EVENT 0
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#define POWER_LIMIT_EVENT 1
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/*
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* Current thermal event state:
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*/
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struct _thermal_state {
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bool new_event;
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int event;
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u64 next_check;
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unsigned long count;
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unsigned long last_count;
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};
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struct thermal_state {
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struct _thermal_state core_throttle;
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struct _thermal_state core_power_limit;
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struct _thermal_state package_throttle;
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struct _thermal_state package_power_limit;
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struct _thermal_state core_thresh0;
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struct _thermal_state core_thresh1;
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struct _thermal_state pkg_thresh0;
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struct _thermal_state pkg_thresh1;
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};
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/* Callback to handle core threshold interrupts */
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int (*platform_thermal_notify)(__u64 msr_val);
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EXPORT_SYMBOL(platform_thermal_notify);
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/* Callback to handle core package threshold_interrupts */
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int (*platform_thermal_package_notify)(__u64 msr_val);
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EXPORT_SYMBOL_GPL(platform_thermal_package_notify);
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/* Callback support of rate control, return true, if
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* callback has rate control */
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bool (*platform_thermal_package_rate_control)(void);
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EXPORT_SYMBOL_GPL(platform_thermal_package_rate_control);
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static DEFINE_PER_CPU(struct thermal_state, thermal_state);
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static atomic_t therm_throt_en = ATOMIC_INIT(0);
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static u32 lvtthmr_init __read_mostly;
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#ifdef CONFIG_SYSFS
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#define define_therm_throt_device_one_ro(_name) \
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static DEVICE_ATTR(_name, 0444, \
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therm_throt_device_show_##_name, \
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NULL) \
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#define define_therm_throt_device_show_func(event, name) \
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\
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static ssize_t therm_throt_device_show_##event##_##name( \
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struct device *dev, \
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struct device_attribute *attr, \
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char *buf) \
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{ \
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unsigned int cpu = dev->id; \
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ssize_t ret; \
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\
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preempt_disable(); /* CPU hotplug */ \
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if (cpu_online(cpu)) { \
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ret = sprintf(buf, "%lu\n", \
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per_cpu(thermal_state, cpu).event.name); \
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} else \
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ret = 0; \
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preempt_enable(); \
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\
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return ret; \
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}
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define_therm_throt_device_show_func(core_throttle, count);
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define_therm_throt_device_one_ro(core_throttle_count);
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define_therm_throt_device_show_func(core_power_limit, count);
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define_therm_throt_device_one_ro(core_power_limit_count);
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define_therm_throt_device_show_func(package_throttle, count);
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define_therm_throt_device_one_ro(package_throttle_count);
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define_therm_throt_device_show_func(package_power_limit, count);
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define_therm_throt_device_one_ro(package_power_limit_count);
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static struct attribute *thermal_throttle_attrs[] = {
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&dev_attr_core_throttle_count.attr,
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NULL
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};
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static struct attribute_group thermal_attr_group = {
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.attrs = thermal_throttle_attrs,
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.name = "thermal_throttle"
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};
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#endif /* CONFIG_SYSFS */
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#define CORE_LEVEL 0
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#define PACKAGE_LEVEL 1
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/***
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* therm_throt_process - Process thermal throttling event from interrupt
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* @curr: Whether the condition is current or not (boolean), since the
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* thermal interrupt normally gets called both when the thermal
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* event begins and once the event has ended.
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*
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* This function is called by the thermal interrupt after the
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* IRQ has been acknowledged.
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*
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* It will take care of rate limiting and printing messages to the syslog.
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*
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* Returns: 0 : Event should NOT be further logged, i.e. still in
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* "timeout" from previous log message.
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* 1 : Event should be logged further, and a message has been
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* printed to the syslog.
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*/
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static int therm_throt_process(bool new_event, int event, int level)
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{
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struct _thermal_state *state;
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unsigned int this_cpu = smp_processor_id();
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bool old_event;
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u64 now;
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struct thermal_state *pstate = &per_cpu(thermal_state, this_cpu);
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now = get_jiffies_64();
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if (level == CORE_LEVEL) {
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if (event == THERMAL_THROTTLING_EVENT)
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state = &pstate->core_throttle;
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else if (event == POWER_LIMIT_EVENT)
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state = &pstate->core_power_limit;
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else
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return 0;
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} else if (level == PACKAGE_LEVEL) {
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if (event == THERMAL_THROTTLING_EVENT)
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state = &pstate->package_throttle;
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else if (event == POWER_LIMIT_EVENT)
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state = &pstate->package_power_limit;
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else
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return 0;
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} else
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return 0;
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old_event = state->new_event;
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state->new_event = new_event;
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if (new_event)
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state->count++;
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if (time_before64(now, state->next_check) &&
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state->count != state->last_count)
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return 0;
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state->next_check = now + CHECK_INTERVAL;
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state->last_count = state->count;
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/* if we just entered the thermal event */
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if (new_event) {
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if (event == THERMAL_THROTTLING_EVENT)
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printk(KERN_CRIT "CPU%d: %s temperature above threshold, cpu clock throttled (total events = %lu)\n",
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this_cpu,
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level == CORE_LEVEL ? "Core" : "Package",
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state->count);
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return 1;
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}
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if (old_event) {
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if (event == THERMAL_THROTTLING_EVENT)
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printk(KERN_INFO "CPU%d: %s temperature/speed normal\n",
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this_cpu,
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level == CORE_LEVEL ? "Core" : "Package");
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return 1;
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}
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return 0;
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}
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static int thresh_event_valid(int level, int event)
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{
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struct _thermal_state *state;
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unsigned int this_cpu = smp_processor_id();
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struct thermal_state *pstate = &per_cpu(thermal_state, this_cpu);
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u64 now = get_jiffies_64();
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if (level == PACKAGE_LEVEL)
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state = (event == 0) ? &pstate->pkg_thresh0 :
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&pstate->pkg_thresh1;
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else
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state = (event == 0) ? &pstate->core_thresh0 :
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&pstate->core_thresh1;
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if (time_before64(now, state->next_check))
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return 0;
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state->next_check = now + CHECK_INTERVAL;
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return 1;
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}
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static bool int_pln_enable;
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static int __init int_pln_enable_setup(char *s)
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{
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int_pln_enable = true;
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return 1;
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}
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__setup("int_pln_enable", int_pln_enable_setup);
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#ifdef CONFIG_SYSFS
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/* Add/Remove thermal_throttle interface for CPU device: */
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static int thermal_throttle_add_dev(struct device *dev, unsigned int cpu)
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{
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int err;
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struct cpuinfo_x86 *c = &cpu_data(cpu);
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err = sysfs_create_group(&dev->kobj, &thermal_attr_group);
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if (err)
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return err;
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if (cpu_has(c, X86_FEATURE_PLN) && int_pln_enable)
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err = sysfs_add_file_to_group(&dev->kobj,
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&dev_attr_core_power_limit_count.attr,
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thermal_attr_group.name);
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if (cpu_has(c, X86_FEATURE_PTS)) {
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err = sysfs_add_file_to_group(&dev->kobj,
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&dev_attr_package_throttle_count.attr,
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thermal_attr_group.name);
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if (cpu_has(c, X86_FEATURE_PLN) && int_pln_enable)
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err = sysfs_add_file_to_group(&dev->kobj,
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&dev_attr_package_power_limit_count.attr,
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thermal_attr_group.name);
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}
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return err;
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}
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static void thermal_throttle_remove_dev(struct device *dev)
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{
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sysfs_remove_group(&dev->kobj, &thermal_attr_group);
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}
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/* Mutex protecting device creation against CPU hotplug: */
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static DEFINE_MUTEX(therm_cpu_lock);
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/* Get notified when a cpu comes on/off. Be hotplug friendly. */
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static int
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thermal_throttle_cpu_callback(struct notifier_block *nfb,
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unsigned long action,
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void *hcpu)
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{
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unsigned int cpu = (unsigned long)hcpu;
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struct device *dev;
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int err = 0;
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dev = get_cpu_device(cpu);
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switch (action) {
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case CPU_UP_PREPARE:
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case CPU_UP_PREPARE_FROZEN:
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mutex_lock(&therm_cpu_lock);
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err = thermal_throttle_add_dev(dev, cpu);
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mutex_unlock(&therm_cpu_lock);
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WARN_ON(err);
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break;
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case CPU_UP_CANCELED:
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case CPU_UP_CANCELED_FROZEN:
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case CPU_DEAD:
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case CPU_DEAD_FROZEN:
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mutex_lock(&therm_cpu_lock);
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thermal_throttle_remove_dev(dev);
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mutex_unlock(&therm_cpu_lock);
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break;
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}
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return notifier_from_errno(err);
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}
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static struct notifier_block thermal_throttle_cpu_notifier =
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{
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.notifier_call = thermal_throttle_cpu_callback,
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};
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static __init int thermal_throttle_init_device(void)
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{
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unsigned int cpu = 0;
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int err;
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if (!atomic_read(&therm_throt_en))
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return 0;
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register_hotcpu_notifier(&thermal_throttle_cpu_notifier);
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#ifdef CONFIG_HOTPLUG_CPU
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mutex_lock(&therm_cpu_lock);
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#endif
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/* connect live CPUs to sysfs */
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for_each_online_cpu(cpu) {
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err = thermal_throttle_add_dev(get_cpu_device(cpu), cpu);
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WARN_ON(err);
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}
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#ifdef CONFIG_HOTPLUG_CPU
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mutex_unlock(&therm_cpu_lock);
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#endif
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return 0;
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}
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device_initcall(thermal_throttle_init_device);
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#endif /* CONFIG_SYSFS */
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static void notify_package_thresholds(__u64 msr_val)
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{
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bool notify_thres_0 = false;
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bool notify_thres_1 = false;
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if (!platform_thermal_package_notify)
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return;
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/* lower threshold check */
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if (msr_val & THERM_LOG_THRESHOLD0)
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notify_thres_0 = true;
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/* higher threshold check */
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if (msr_val & THERM_LOG_THRESHOLD1)
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notify_thres_1 = true;
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if (!notify_thres_0 && !notify_thres_1)
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return;
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if (platform_thermal_package_rate_control &&
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platform_thermal_package_rate_control()) {
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/* Rate control is implemented in callback */
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platform_thermal_package_notify(msr_val);
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return;
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}
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/* lower threshold reached */
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if (notify_thres_0 && thresh_event_valid(PACKAGE_LEVEL, 0))
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platform_thermal_package_notify(msr_val);
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/* higher threshold reached */
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if (notify_thres_1 && thresh_event_valid(PACKAGE_LEVEL, 1))
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platform_thermal_package_notify(msr_val);
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}
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static void notify_thresholds(__u64 msr_val)
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{
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/* check whether the interrupt handler is defined;
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* otherwise simply return
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*/
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if (!platform_thermal_notify)
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return;
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/* lower threshold reached */
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if ((msr_val & THERM_LOG_THRESHOLD0) &&
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thresh_event_valid(CORE_LEVEL, 0))
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platform_thermal_notify(msr_val);
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/* higher threshold reached */
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if ((msr_val & THERM_LOG_THRESHOLD1) &&
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thresh_event_valid(CORE_LEVEL, 1))
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platform_thermal_notify(msr_val);
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}
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/* Thermal transition interrupt handler */
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static void intel_thermal_interrupt(void)
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{
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__u64 msr_val;
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rdmsrl(MSR_IA32_THERM_STATUS, msr_val);
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/* Check for violation of core thermal thresholds*/
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notify_thresholds(msr_val);
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if (therm_throt_process(msr_val & THERM_STATUS_PROCHOT,
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THERMAL_THROTTLING_EVENT,
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CORE_LEVEL) != 0)
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mce_log_therm_throt_event(msr_val);
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if (this_cpu_has(X86_FEATURE_PLN) && int_pln_enable)
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therm_throt_process(msr_val & THERM_STATUS_POWER_LIMIT,
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POWER_LIMIT_EVENT,
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CORE_LEVEL);
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if (this_cpu_has(X86_FEATURE_PTS)) {
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rdmsrl(MSR_IA32_PACKAGE_THERM_STATUS, msr_val);
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/* check violations of package thermal thresholds */
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notify_package_thresholds(msr_val);
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therm_throt_process(msr_val & PACKAGE_THERM_STATUS_PROCHOT,
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THERMAL_THROTTLING_EVENT,
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PACKAGE_LEVEL);
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if (this_cpu_has(X86_FEATURE_PLN) && int_pln_enable)
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therm_throt_process(msr_val &
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PACKAGE_THERM_STATUS_POWER_LIMIT,
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POWER_LIMIT_EVENT,
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PACKAGE_LEVEL);
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}
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}
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static void unexpected_thermal_interrupt(void)
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{
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printk(KERN_ERR "CPU%d: Unexpected LVT thermal interrupt!\n",
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smp_processor_id());
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}
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static void (*smp_thermal_vector)(void) = unexpected_thermal_interrupt;
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static inline void __smp_thermal_interrupt(void)
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{
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inc_irq_stat(irq_thermal_count);
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smp_thermal_vector();
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}
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asmlinkage void smp_thermal_interrupt(struct pt_regs *regs)
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{
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entering_irq();
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__smp_thermal_interrupt();
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exiting_ack_irq();
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}
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|
asmlinkage void smp_trace_thermal_interrupt(struct pt_regs *regs)
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{
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entering_irq();
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trace_thermal_apic_entry(THERMAL_APIC_VECTOR);
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__smp_thermal_interrupt();
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trace_thermal_apic_exit(THERMAL_APIC_VECTOR);
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exiting_ack_irq();
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}
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|
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/* Thermal monitoring depends on APIC, ACPI and clock modulation */
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|
static int intel_thermal_supported(struct cpuinfo_x86 *c)
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|
{
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if (!cpu_has_apic)
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return 0;
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|
if (!cpu_has(c, X86_FEATURE_ACPI) || !cpu_has(c, X86_FEATURE_ACC))
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return 0;
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return 1;
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|
}
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|
|
|
void __init mcheck_intel_therm_init(void)
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|
{
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|
/*
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|
* This function is only called on boot CPU. Save the init thermal
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|
* LVT value on BSP and use that value to restore APs' thermal LVT
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|
* entry BIOS programmed later
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|
*/
|
|
if (intel_thermal_supported(&boot_cpu_data))
|
|
lvtthmr_init = apic_read(APIC_LVTTHMR);
|
|
}
|
|
|
|
void intel_init_thermal(struct cpuinfo_x86 *c)
|
|
{
|
|
unsigned int cpu = smp_processor_id();
|
|
int tm2 = 0;
|
|
u32 l, h;
|
|
|
|
if (!intel_thermal_supported(c))
|
|
return;
|
|
|
|
/*
|
|
* First check if its enabled already, in which case there might
|
|
* be some SMM goo which handles it, so we can't even put a handler
|
|
* since it might be delivered via SMI already:
|
|
*/
|
|
rdmsr(MSR_IA32_MISC_ENABLE, l, h);
|
|
|
|
h = lvtthmr_init;
|
|
/*
|
|
* The initial value of thermal LVT entries on all APs always reads
|
|
* 0x10000 because APs are woken up by BSP issuing INIT-SIPI-SIPI
|
|
* sequence to them and LVT registers are reset to 0s except for
|
|
* the mask bits which are set to 1s when APs receive INIT IPI.
|
|
* If BIOS takes over the thermal interrupt and sets its interrupt
|
|
* delivery mode to SMI (not fixed), it restores the value that the
|
|
* BIOS has programmed on AP based on BSP's info we saved since BIOS
|
|
* is always setting the same value for all threads/cores.
|
|
*/
|
|
if ((h & APIC_DM_FIXED_MASK) != APIC_DM_FIXED)
|
|
apic_write(APIC_LVTTHMR, lvtthmr_init);
|
|
|
|
|
|
if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) {
|
|
printk(KERN_DEBUG
|
|
"CPU%d: Thermal monitoring handled by SMI\n", cpu);
|
|
return;
|
|
}
|
|
|
|
/* Check whether a vector already exists */
|
|
if (h & APIC_VECTOR_MASK) {
|
|
printk(KERN_DEBUG
|
|
"CPU%d: Thermal LVT vector (%#x) already installed\n",
|
|
cpu, (h & APIC_VECTOR_MASK));
|
|
return;
|
|
}
|
|
|
|
/* early Pentium M models use different method for enabling TM2 */
|
|
if (cpu_has(c, X86_FEATURE_TM2)) {
|
|
if (c->x86 == 6 && (c->x86_model == 9 || c->x86_model == 13)) {
|
|
rdmsr(MSR_THERM2_CTL, l, h);
|
|
if (l & MSR_THERM2_CTL_TM_SELECT)
|
|
tm2 = 1;
|
|
} else if (l & MSR_IA32_MISC_ENABLE_TM2)
|
|
tm2 = 1;
|
|
}
|
|
|
|
/* We'll mask the thermal vector in the lapic till we're ready: */
|
|
h = THERMAL_APIC_VECTOR | APIC_DM_FIXED | APIC_LVT_MASKED;
|
|
apic_write(APIC_LVTTHMR, h);
|
|
|
|
rdmsr(MSR_IA32_THERM_INTERRUPT, l, h);
|
|
if (cpu_has(c, X86_FEATURE_PLN) && !int_pln_enable)
|
|
wrmsr(MSR_IA32_THERM_INTERRUPT,
|
|
(l | (THERM_INT_LOW_ENABLE
|
|
| THERM_INT_HIGH_ENABLE)) & ~THERM_INT_PLN_ENABLE, h);
|
|
else if (cpu_has(c, X86_FEATURE_PLN) && int_pln_enable)
|
|
wrmsr(MSR_IA32_THERM_INTERRUPT,
|
|
l | (THERM_INT_LOW_ENABLE
|
|
| THERM_INT_HIGH_ENABLE | THERM_INT_PLN_ENABLE), h);
|
|
else
|
|
wrmsr(MSR_IA32_THERM_INTERRUPT,
|
|
l | (THERM_INT_LOW_ENABLE | THERM_INT_HIGH_ENABLE), h);
|
|
|
|
if (cpu_has(c, X86_FEATURE_PTS)) {
|
|
rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
|
|
if (cpu_has(c, X86_FEATURE_PLN) && !int_pln_enable)
|
|
wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
|
|
(l | (PACKAGE_THERM_INT_LOW_ENABLE
|
|
| PACKAGE_THERM_INT_HIGH_ENABLE))
|
|
& ~PACKAGE_THERM_INT_PLN_ENABLE, h);
|
|
else if (cpu_has(c, X86_FEATURE_PLN) && int_pln_enable)
|
|
wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
|
|
l | (PACKAGE_THERM_INT_LOW_ENABLE
|
|
| PACKAGE_THERM_INT_HIGH_ENABLE
|
|
| PACKAGE_THERM_INT_PLN_ENABLE), h);
|
|
else
|
|
wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
|
|
l | (PACKAGE_THERM_INT_LOW_ENABLE
|
|
| PACKAGE_THERM_INT_HIGH_ENABLE), h);
|
|
}
|
|
|
|
smp_thermal_vector = intel_thermal_interrupt;
|
|
|
|
rdmsr(MSR_IA32_MISC_ENABLE, l, h);
|
|
wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h);
|
|
|
|
/* Unmask the thermal vector: */
|
|
l = apic_read(APIC_LVTTHMR);
|
|
apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);
|
|
|
|
printk_once(KERN_INFO "CPU0: Thermal monitoring enabled (%s)\n",
|
|
tm2 ? "TM2" : "TM1");
|
|
|
|
/* enable thermal throttle processing */
|
|
atomic_set(&therm_throt_en, 1);
|
|
}
|