Lad Prabhakar 50b30655b2 cache: ax45mp_cache: Align end size to cache boundary in ax45mp_dma_cache_wback() ... [ Upstream commit 9bd405c48b0ac4de087c0c4440fd79597201b8a7 ] Align the end size to cache boundary size in ax45mp_dma_cache_wback() callback likewise done in ax45mp_dma_cache_inv() callback. Additionally return early in case of start == end. Fixes: d34599bcd2 ("cache: Add L2 cache management for Andes AX45MP RISC-V core") Reported-by: Pavel Machek <pavel@denx.de> Link: https://lore.kernel.org/cip-dev/ZYsdKDiw7G+kxQ3m@duo.ucw.cz/ Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Sasha Levin <sashal@kernel.org>		2024-03-01 13:35:08 +01:00
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ax45mp_cache.c	cache: ax45mp_cache: Align end size to cache boundary in ax45mp_dma_cache_wback()	2024-03-01 13:35:08 +01:00
Kconfig	riscv: RISCV_NONSTANDARD_CACHE_OPS shouldn't depend on RISCV_DMA_NONCOHERENT	2023-10-26 09:42:37 +02:00
Makefile