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Initial commit of 2023.02.9

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James Deng 2024-03-01 16:31:33 +08:00
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package/alsamixergui/0001-misc-fixes.patch Sob
package/am33x-cm3/S93-am335x-pm-firmware-load Variables
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package/dhcp/S80dhcp-server Shellcheck Variables
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package/mii-diag/0001-strchr.patch Sob
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package/poco/0001-Fix-optional-JSON-support-for-MySQL-3753.patch Sob
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package/xl2tp/xl2tpd TrailingSpace

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# SPDX-License-Identifier: GPL-2.0
#
# clang-format configuration file. Intended for clang-format >= 4.
#
# For more information, see:
#
# Documentation/process/clang-format.rst
# https://clang.llvm.org/docs/ClangFormat.html
# https://clang.llvm.org/docs/ClangFormatStyleOptions.html
#
# Buildroot: imported from Linux 5.15.6, with minimal modifications.
# Please note, this is not enforced at the moment. Intended
# as an aid when working with in-tree C files, like
# makedevs.c
#
---
AccessModifierOffset: -4
AlignAfterOpenBracket: Align
AlignConsecutiveAssignments: false
AlignConsecutiveDeclarations: false
#AlignEscapedNewlines: Left # Unknown to clang-format-4.0
AlignOperands: true
AlignTrailingComments: false
AllowAllParametersOfDeclarationOnNextLine: false
AllowShortBlocksOnASingleLine: false
AllowShortCaseLabelsOnASingleLine: false
AllowShortFunctionsOnASingleLine: None
AllowShortIfStatementsOnASingleLine: false
AllowShortLoopsOnASingleLine: false
AlwaysBreakAfterDefinitionReturnType: None
AlwaysBreakAfterReturnType: None
AlwaysBreakBeforeMultilineStrings: false
AlwaysBreakTemplateDeclarations: false
BinPackArguments: true
BinPackParameters: true
BraceWrapping:
AfterClass: false
AfterControlStatement: false
AfterEnum: false
AfterFunction: true
AfterNamespace: true
AfterObjCDeclaration: false
AfterStruct: false
AfterUnion: false
#AfterExternBlock: false # Unknown to clang-format-5.0
BeforeCatch: false
BeforeElse: false
IndentBraces: false
#SplitEmptyFunction: true # Unknown to clang-format-4.0
#SplitEmptyRecord: true # Unknown to clang-format-4.0
#SplitEmptyNamespace: true # Unknown to clang-format-4.0
BreakBeforeBinaryOperators: None
BreakBeforeBraces: Custom
#BreakBeforeInheritanceComma: false # Unknown to clang-format-4.0
BreakBeforeTernaryOperators: false
BreakConstructorInitializersBeforeComma: false
#BreakConstructorInitializers: BeforeComma # Unknown to clang-format-4.0
BreakAfterJavaFieldAnnotations: false
BreakStringLiterals: false
ColumnLimit: 132 # Specially for Buildroot
CommentPragmas: '^ IWYU pragma:'
#CompactNamespaces: false # Unknown to clang-format-4.0
ConstructorInitializerAllOnOneLineOrOnePerLine: false
ConstructorInitializerIndentWidth: 8
ContinuationIndentWidth: 8
Cpp11BracedListStyle: false
DerivePointerAlignment: false
DisableFormat: false
ExperimentalAutoDetectBinPacking: false
#FixNamespaceComments: false # Unknown to clang-format-4.0
# Taken from:
# git grep -h '^#define [^[:space:]]*for_each[^[:space:]]*(' include/ \
# | sed "s,^#define \([^[:space:]]*for_each[^[:space:]]*\)(.*$, - '\1'," \
# | sort | uniq
ForEachMacros:
- 'apei_estatus_for_each_section'
- 'ata_for_each_dev'
- 'ata_for_each_link'
- '__ata_qc_for_each'
- 'ata_qc_for_each'
- 'ata_qc_for_each_raw'
- 'ata_qc_for_each_with_internal'
- 'ax25_for_each'
- 'ax25_uid_for_each'
- '__bio_for_each_bvec'
- 'bio_for_each_bvec'
- 'bio_for_each_bvec_all'
- 'bio_for_each_integrity_vec'
- '__bio_for_each_segment'
- 'bio_for_each_segment'
- 'bio_for_each_segment_all'
- 'bio_list_for_each'
- 'bip_for_each_vec'
- 'bitmap_for_each_clear_region'
- 'bitmap_for_each_set_region'
- 'blkg_for_each_descendant_post'
- 'blkg_for_each_descendant_pre'
- 'blk_queue_for_each_rl'
- 'bond_for_each_slave'
- 'bond_for_each_slave_rcu'
- 'bpf_for_each_spilled_reg'
- 'btree_for_each_safe128'
- 'btree_for_each_safe32'
- 'btree_for_each_safe64'
- 'btree_for_each_safel'
- 'card_for_each_dev'
- 'cgroup_taskset_for_each'
- 'cgroup_taskset_for_each_leader'
- 'cpufreq_for_each_entry'
- 'cpufreq_for_each_entry_idx'
- 'cpufreq_for_each_valid_entry'
- 'cpufreq_for_each_valid_entry_idx'
- 'css_for_each_child'
- 'css_for_each_descendant_post'
- 'css_for_each_descendant_pre'
- 'device_for_each_child_node'
- 'displayid_iter_for_each'
- 'dma_fence_chain_for_each'
- 'do_for_each_ftrace_op'
- 'drm_atomic_crtc_for_each_plane'
- 'drm_atomic_crtc_state_for_each_plane'
- 'drm_atomic_crtc_state_for_each_plane_state'
- 'drm_atomic_for_each_plane_damage'
- 'drm_client_for_each_connector_iter'
- 'drm_client_for_each_modeset'
- 'drm_connector_for_each_possible_encoder'
- 'drm_for_each_bridge_in_chain'
- 'drm_for_each_connector_iter'
- 'drm_for_each_crtc'
- 'drm_for_each_crtc_reverse'
- 'drm_for_each_encoder'
- 'drm_for_each_encoder_mask'
- 'drm_for_each_fb'
- 'drm_for_each_legacy_plane'
- 'drm_for_each_plane'
- 'drm_for_each_plane_mask'
- 'drm_for_each_privobj'
- 'drm_mm_for_each_hole'
- 'drm_mm_for_each_node'
- 'drm_mm_for_each_node_in_range'
- 'drm_mm_for_each_node_safe'
- 'flow_action_for_each'
- 'for_each_acpi_dev_match'
- 'for_each_active_dev_scope'
- 'for_each_active_drhd_unit'
- 'for_each_active_iommu'
- 'for_each_aggr_pgid'
- 'for_each_available_child_of_node'
- 'for_each_bio'
- 'for_each_board_func_rsrc'
- 'for_each_bvec'
- 'for_each_card_auxs'
- 'for_each_card_auxs_safe'
- 'for_each_card_components'
- 'for_each_card_dapms'
- 'for_each_card_pre_auxs'
- 'for_each_card_prelinks'
- 'for_each_card_rtds'
- 'for_each_card_rtds_safe'
- 'for_each_card_widgets'
- 'for_each_card_widgets_safe'
- 'for_each_cgroup_storage_type'
- 'for_each_child_of_node'
- 'for_each_clear_bit'
- 'for_each_clear_bit_from'
- 'for_each_cmsghdr'
- 'for_each_compatible_node'
- 'for_each_component_dais'
- 'for_each_component_dais_safe'
- 'for_each_comp_order'
- 'for_each_console'
- 'for_each_cpu'
- 'for_each_cpu_and'
- 'for_each_cpu_not'
- 'for_each_cpu_wrap'
- 'for_each_dapm_widgets'
- 'for_each_dev_addr'
- 'for_each_dev_scope'
- 'for_each_dma_cap_mask'
- 'for_each_dpcm_be'
- 'for_each_dpcm_be_rollback'
- 'for_each_dpcm_be_safe'
- 'for_each_dpcm_fe'
- 'for_each_drhd_unit'
- 'for_each_dss_dev'
- 'for_each_dtpm_table'
- 'for_each_efi_memory_desc'
- 'for_each_efi_memory_desc_in_map'
- 'for_each_element'
- 'for_each_element_extid'
- 'for_each_element_id'
- 'for_each_endpoint_of_node'
- 'for_each_evictable_lru'
- 'for_each_fib6_node_rt_rcu'
- 'for_each_fib6_walker_rt'
- 'for_each_free_mem_pfn_range_in_zone'
- 'for_each_free_mem_pfn_range_in_zone_from'
- 'for_each_free_mem_range'
- 'for_each_free_mem_range_reverse'
- 'for_each_func_rsrc'
- 'for_each_hstate'
- 'for_each_if'
- 'for_each_iommu'
- 'for_each_ip_tunnel_rcu'
- 'for_each_irq_nr'
- 'for_each_link_codecs'
- 'for_each_link_cpus'
- 'for_each_link_platforms'
- 'for_each_lru'
- 'for_each_matching_node'
- 'for_each_matching_node_and_match'
- 'for_each_member'
- 'for_each_memcg_cache_index'
- 'for_each_mem_pfn_range'
- '__for_each_mem_range'
- 'for_each_mem_range'
- '__for_each_mem_range_rev'
- 'for_each_mem_range_rev'
- 'for_each_mem_region'
- 'for_each_migratetype_order'
- 'for_each_msi_entry'
- 'for_each_msi_entry_safe'
- 'for_each_msi_vector'
- 'for_each_net'
- 'for_each_net_continue_reverse'
- 'for_each_netdev'
- 'for_each_netdev_continue'
- 'for_each_netdev_continue_rcu'
- 'for_each_netdev_continue_reverse'
- 'for_each_netdev_feature'
- 'for_each_netdev_in_bond_rcu'
- 'for_each_netdev_rcu'
- 'for_each_netdev_reverse'
- 'for_each_netdev_safe'
- 'for_each_net_rcu'
- 'for_each_new_connector_in_state'
- 'for_each_new_crtc_in_state'
- 'for_each_new_mst_mgr_in_state'
- 'for_each_new_plane_in_state'
- 'for_each_new_private_obj_in_state'
- 'for_each_node'
- 'for_each_node_by_name'
- 'for_each_node_by_type'
- 'for_each_node_mask'
- 'for_each_node_state'
- 'for_each_node_with_cpus'
- 'for_each_node_with_property'
- 'for_each_nonreserved_multicast_dest_pgid'
- 'for_each_of_allnodes'
- 'for_each_of_allnodes_from'
- 'for_each_of_cpu_node'
- 'for_each_of_pci_range'
- 'for_each_old_connector_in_state'
- 'for_each_old_crtc_in_state'
- 'for_each_old_mst_mgr_in_state'
- 'for_each_oldnew_connector_in_state'
- 'for_each_oldnew_crtc_in_state'
- 'for_each_oldnew_mst_mgr_in_state'
- 'for_each_oldnew_plane_in_state'
- 'for_each_oldnew_plane_in_state_reverse'
- 'for_each_oldnew_private_obj_in_state'
- 'for_each_old_plane_in_state'
- 'for_each_old_private_obj_in_state'
- 'for_each_online_cpu'
- 'for_each_online_node'
- 'for_each_online_pgdat'
- 'for_each_pci_bridge'
- 'for_each_pci_dev'
- 'for_each_pci_msi_entry'
- 'for_each_pcm_streams'
- 'for_each_physmem_range'
- 'for_each_populated_zone'
- 'for_each_possible_cpu'
- 'for_each_present_cpu'
- 'for_each_prime_number'
- 'for_each_prime_number_from'
- 'for_each_process'
- 'for_each_process_thread'
- 'for_each_prop_codec_conf'
- 'for_each_prop_dai_codec'
- 'for_each_prop_dai_cpu'
- 'for_each_prop_dlc_codecs'
- 'for_each_prop_dlc_cpus'
- 'for_each_prop_dlc_platforms'
- 'for_each_property_of_node'
- 'for_each_registered_fb'
- 'for_each_requested_gpio'
- 'for_each_requested_gpio_in_range'
- 'for_each_reserved_mem_range'
- 'for_each_reserved_mem_region'
- 'for_each_rtd_codec_dais'
- 'for_each_rtd_components'
- 'for_each_rtd_cpu_dais'
- 'for_each_rtd_dais'
- 'for_each_set_bit'
- 'for_each_set_bit_from'
- 'for_each_set_clump8'
- 'for_each_sg'
- 'for_each_sg_dma_page'
- 'for_each_sg_page'
- 'for_each_sgtable_dma_page'
- 'for_each_sgtable_dma_sg'
- 'for_each_sgtable_page'
- 'for_each_sgtable_sg'
- 'for_each_sibling_event'
- 'for_each_subelement'
- 'for_each_subelement_extid'
- 'for_each_subelement_id'
- '__for_each_thread'
- 'for_each_thread'
- 'for_each_unicast_dest_pgid'
- 'for_each_vsi'
- 'for_each_wakeup_source'
- 'for_each_zone'
- 'for_each_zone_zonelist'
- 'for_each_zone_zonelist_nodemask'
- 'fwnode_for_each_available_child_node'
- 'fwnode_for_each_child_node'
- 'fwnode_graph_for_each_endpoint'
- 'gadget_for_each_ep'
- 'genradix_for_each'
- 'genradix_for_each_from'
- 'hash_for_each'
- 'hash_for_each_possible'
- 'hash_for_each_possible_rcu'
- 'hash_for_each_possible_rcu_notrace'
- 'hash_for_each_possible_safe'
- 'hash_for_each_rcu'
- 'hash_for_each_safe'
- 'hctx_for_each_ctx'
- 'hlist_bl_for_each_entry'
- 'hlist_bl_for_each_entry_rcu'
- 'hlist_bl_for_each_entry_safe'
- 'hlist_for_each'
- 'hlist_for_each_entry'
- 'hlist_for_each_entry_continue'
- 'hlist_for_each_entry_continue_rcu'
- 'hlist_for_each_entry_continue_rcu_bh'
- 'hlist_for_each_entry_from'
- 'hlist_for_each_entry_from_rcu'
- 'hlist_for_each_entry_rcu'
- 'hlist_for_each_entry_rcu_bh'
- 'hlist_for_each_entry_rcu_notrace'
- 'hlist_for_each_entry_safe'
- 'hlist_for_each_entry_srcu'
- '__hlist_for_each_rcu'
- 'hlist_for_each_safe'
- 'hlist_nulls_for_each_entry'
- 'hlist_nulls_for_each_entry_from'
- 'hlist_nulls_for_each_entry_rcu'
- 'hlist_nulls_for_each_entry_safe'
- 'i3c_bus_for_each_i2cdev'
- 'i3c_bus_for_each_i3cdev'
- 'ide_host_for_each_port'
- 'ide_port_for_each_dev'
- 'ide_port_for_each_present_dev'
- 'idr_for_each_entry'
- 'idr_for_each_entry_continue'
- 'idr_for_each_entry_continue_ul'
- 'idr_for_each_entry_ul'
- 'in_dev_for_each_ifa_rcu'
- 'in_dev_for_each_ifa_rtnl'
- 'inet_bind_bucket_for_each'
- 'inet_lhash2_for_each_icsk_rcu'
- 'key_for_each'
- 'key_for_each_safe'
- 'klp_for_each_func'
- 'klp_for_each_func_safe'
- 'klp_for_each_func_static'
- 'klp_for_each_object'
- 'klp_for_each_object_safe'
- 'klp_for_each_object_static'
- 'kunit_suite_for_each_test_case'
- 'kvm_for_each_memslot'
- 'kvm_for_each_vcpu'
- 'list_for_each'
- 'list_for_each_codec'
- 'list_for_each_codec_safe'
- 'list_for_each_continue'
- 'list_for_each_entry'
- 'list_for_each_entry_continue'
- 'list_for_each_entry_continue_rcu'
- 'list_for_each_entry_continue_reverse'
- 'list_for_each_entry_from'
- 'list_for_each_entry_from_rcu'
- 'list_for_each_entry_from_reverse'
- 'list_for_each_entry_lockless'
- 'list_for_each_entry_rcu'
- 'list_for_each_entry_reverse'
- 'list_for_each_entry_safe'
- 'list_for_each_entry_safe_continue'
- 'list_for_each_entry_safe_from'
- 'list_for_each_entry_safe_reverse'
- 'list_for_each_entry_srcu'
- 'list_for_each_prev'
- 'list_for_each_prev_safe'
- 'list_for_each_safe'
- 'llist_for_each'
- 'llist_for_each_entry'
- 'llist_for_each_entry_safe'
- 'llist_for_each_safe'
- 'mci_for_each_dimm'
- 'media_device_for_each_entity'
- 'media_device_for_each_intf'
- 'media_device_for_each_link'
- 'media_device_for_each_pad'
- 'nanddev_io_for_each_page'
- 'netdev_for_each_lower_dev'
- 'netdev_for_each_lower_private'
- 'netdev_for_each_lower_private_rcu'
- 'netdev_for_each_mc_addr'
- 'netdev_for_each_uc_addr'
- 'netdev_for_each_upper_dev_rcu'
- 'netdev_hw_addr_list_for_each'
- 'nft_rule_for_each_expr'
- 'nla_for_each_attr'
- 'nla_for_each_nested'
- 'nlmsg_for_each_attr'
- 'nlmsg_for_each_msg'
- 'nr_neigh_for_each'
- 'nr_neigh_for_each_safe'
- 'nr_node_for_each'
- 'nr_node_for_each_safe'
- 'of_for_each_phandle'
- 'of_property_for_each_string'
- 'of_property_for_each_u32'
- 'pci_bus_for_each_resource'
- 'pcl_for_each_chunk'
- 'pcl_for_each_segment'
- 'pcm_for_each_format'
- 'ping_portaddr_for_each_entry'
- 'plist_for_each'
- 'plist_for_each_continue'
- 'plist_for_each_entry'
- 'plist_for_each_entry_continue'
- 'plist_for_each_entry_safe'
- 'plist_for_each_safe'
- 'pnp_for_each_card'
- 'pnp_for_each_dev'
- 'protocol_for_each_card'
- 'protocol_for_each_dev'
- 'queue_for_each_hw_ctx'
- 'radix_tree_for_each_slot'
- 'radix_tree_for_each_tagged'
- 'rb_for_each'
- 'rbtree_postorder_for_each_entry_safe'
- 'rdma_for_each_block'
- 'rdma_for_each_port'
- 'rdma_umem_for_each_dma_block'
- 'resource_list_for_each_entry'
- 'resource_list_for_each_entry_safe'
- 'rhl_for_each_entry_rcu'
- 'rhl_for_each_rcu'
- 'rht_for_each'
- 'rht_for_each_entry'
- 'rht_for_each_entry_from'
- 'rht_for_each_entry_rcu'
- 'rht_for_each_entry_rcu_from'
- 'rht_for_each_entry_safe'
- 'rht_for_each_from'
- 'rht_for_each_rcu'
- 'rht_for_each_rcu_from'
- '__rq_for_each_bio'
- 'rq_for_each_bvec'
- 'rq_for_each_segment'
- 'scsi_for_each_prot_sg'
- 'scsi_for_each_sg'
- 'sctp_for_each_hentry'
- 'sctp_skb_for_each'
- 'shdma_for_each_chan'
- '__shost_for_each_device'
- 'shost_for_each_device'
- 'sk_for_each'
- 'sk_for_each_bound'
- 'sk_for_each_entry_offset_rcu'
- 'sk_for_each_from'
- 'sk_for_each_rcu'
- 'sk_for_each_safe'
- 'sk_nulls_for_each'
- 'sk_nulls_for_each_from'
- 'sk_nulls_for_each_rcu'
- 'snd_array_for_each'
- 'snd_pcm_group_for_each_entry'
- 'snd_soc_dapm_widget_for_each_path'
- 'snd_soc_dapm_widget_for_each_path_safe'
- 'snd_soc_dapm_widget_for_each_sink_path'
- 'snd_soc_dapm_widget_for_each_source_path'
- 'tb_property_for_each'
- 'tcf_exts_for_each_action'
- 'udp_portaddr_for_each_entry'
- 'udp_portaddr_for_each_entry_rcu'
- 'usb_hub_for_each_child'
- 'v4l2_device_for_each_subdev'
- 'v4l2_m2m_for_each_dst_buf'
- 'v4l2_m2m_for_each_dst_buf_safe'
- 'v4l2_m2m_for_each_src_buf'
- 'v4l2_m2m_for_each_src_buf_safe'
- 'virtio_device_for_each_vq'
- 'while_for_each_ftrace_op'
- 'xa_for_each'
- 'xa_for_each_marked'
- 'xa_for_each_range'
- 'xa_for_each_start'
- 'xas_for_each'
- 'xas_for_each_conflict'
- 'xas_for_each_marked'
- 'xbc_array_for_each_value'
- 'xbc_for_each_key_value'
- 'xbc_node_for_each_array_value'
- 'xbc_node_for_each_child'
- 'xbc_node_for_each_key_value'
- 'zorro_for_each_dev'
#IncludeBlocks: Preserve # Unknown to clang-format-5.0
IncludeCategories:
- Regex: '.*'
Priority: 1
IncludeIsMainRegex: '(Test)?$'
IndentCaseLabels: false
#IndentPPDirectives: None # Unknown to clang-format-5.0
IndentWidth: 8
IndentWrappedFunctionNames: false
JavaScriptQuotes: Leave
JavaScriptWrapImports: true
KeepEmptyLinesAtTheStartOfBlocks: false
MacroBlockBegin: ''
MacroBlockEnd: ''
MaxEmptyLinesToKeep: 1
NamespaceIndentation: None
#ObjCBinPackProtocolList: Auto # Unknown to clang-format-5.0
ObjCBlockIndentWidth: 8
ObjCSpaceAfterProperty: true
ObjCSpaceBeforeProtocolList: true
# Taken from git's rules
#PenaltyBreakAssignment: 10 # Unknown to clang-format-4.0
PenaltyBreakBeforeFirstCallParameter: 30
PenaltyBreakComment: 10
PenaltyBreakFirstLessLess: 0
PenaltyBreakString: 10
PenaltyExcessCharacter: 100
PenaltyReturnTypeOnItsOwnLine: 60
PointerAlignment: Right
ReflowComments: false
SortIncludes: false
#SortUsingDeclarations: false # Unknown to clang-format-4.0
SpaceAfterCStyleCast: false
SpaceAfterTemplateKeyword: true
SpaceBeforeAssignmentOperators: true
#SpaceBeforeCtorInitializerColon: true # Unknown to clang-format-5.0
#SpaceBeforeInheritanceColon: true # Unknown to clang-format-5.0
SpaceBeforeParens: ControlStatements
#SpaceBeforeRangeBasedForLoopColon: true # Unknown to clang-format-5.0
SpaceInEmptyParentheses: false
SpacesBeforeTrailingComments: 1
SpacesInAngles: false
SpacesInContainerLiterals: false
SpacesInCStyleCastParentheses: false
SpacesInParentheses: false
SpacesInSquareBrackets: false
Standard: Cpp03
TabWidth: 8
UseTab: Always
...

51
.defconfig Normal file
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@ -0,0 +1,51 @@
#
# Automatically generated make config: don't edit
# Mon Feb 18 09:11:56 2008
#
BR2_HAVE_DOT_CONFIG=y
# BR2_alpha is not set
# BR2_arm is not set
# BR2_armeb is not set
# BR2_cris is not set
# BR2_ia64 is not set
BR2_i386=y
# BR2_m68k is not set
# BR2_mips is not set
# BR2_mipsel is not set
# BR2_nios2 is not set
# BR2_powerpc is not set
# BR2_sh is not set
# BR2_sparc is not set
# BR2_sparc64 is not set
# BR2_x86_64 is not set
# BR2_x86_i486 is not set
# BR2_x86_i586 is not set
BR2_x86_i686=y
# BR2_x86_pentiumpro is not set
# BR2_x86_pentium_mmx is not set
# BR2_x86_pentium_m is not set
# BR2_x86_pentium2 is not set
# BR2_x86_pentium3 is not set
# BR2_x86_pentium4 is not set
# BR2_x86_prescott is not set
# BR2_x86_nocona is not set
# BR2_x86_core2 is not set
# BR2_x86_k6 is not set
# BR2_x86_k6_2 is not set
# BR2_x86_athlon is not set
# BR2_x86_athlon_4 is not set
# BR2_x86_opteron is not set
# BR2_x86_opteron_sse3 is not set
# BR2_x86_barcelona is not set
# BR2_x86_geode is not set
# BR2_x86_c3 is not set
# BR2_x86_winchip_c6 is not set
# BR2_x86_winchip2 is not set
BR2_ARCH="i686"
BR2_ENDIAN="LITTLE"
BR2_GCC_TARGET_TUNE="i686"
BR2_GCC_TARGET_ARCH="i686"
#
# Target options
#

5
.flake8 Normal file
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@ -0,0 +1,5 @@
[flake8]
exclude=
# copied from the kernel sources
utils/diffconfig
max-line-length=132

15
.gitignore vendored Normal file
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@ -0,0 +1,15 @@
/output
/dl
/.auto.deps
/.config.cmd
/.config.old
/..config.tmp
/.config
*.depend
*.o
/*.patch
/*.diff
*.orig
*.rej
*~
*.pyc

33
.gitlab-ci.yml Normal file
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# Configuration for Gitlab-CI.
# Builds appear on https://gitlab.com/buildroot.org/buildroot/pipelines
image: $CI_REGISTRY/buildroot.org/buildroot/base:20230207.1123
stages:
- generate-gitlab-ci
- build
generate-gitlab-ci-yml:
stage: generate-gitlab-ci
script: ./support/scripts/generate-gitlab-ci-yml support/misc/gitlab-ci.yml.in > generated-gitlab-ci.yml
retry:
max: 2
when:
- runner_system_failure
- stuck_or_timeout_failure
artifacts:
when: always
paths:
- generated-gitlab-ci.yml
- br-test-pkg/*/.config
- br-test-pkg/*/missing.config
buildroot-pipeline:
stage: build
trigger:
include:
- artifact: generated-gitlab-ci.yml
job: generate-gitlab-ci-yml
strategy: depend
variables:
PARENT_PIPELINE_ID: $CI_PIPELINE_ID

0
.shellcheckrc Normal file
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13045
CHANGES Normal file
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File diff suppressed because it is too large Load diff

355
COPYING Normal file
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@ -0,0 +1,355 @@
With the exceptions below, Buildroot is distributed under the terms of
the GNU General Public License, reproduced below; either version 2 of
the License, or (at your option) any later version.
Some files in Buildroot contain a different license statement. Those
files are licensed under the license contained in the file itself.
Buildroot also bundles patch files, which are applied to the sources
of the various packages. Those patches are not covered by the license
of Buildroot. Instead, they are covered by the license of the software
to which the patches are applied. When said software is available
under multiple licenses, the Buildroot patches are only provided under
the publicly accessible licenses.
-----------------------------------------------------------------
GNU GENERAL PUBLIC LICENSE
Version 2, June 1991
Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
Everyone is permitted to copy and distribute verbatim copies
of this license document, but changing it is not allowed.
Preamble
The licenses for most software are designed to take away your
freedom to share and change it. By contrast, the GNU General Public
License is intended to guarantee your freedom to share and change free
software--to make sure the software is free for all its users. This
General Public License applies to most of the Free Software
Foundation's software and to any other program whose authors commit to
using it. (Some other Free Software Foundation software is covered by
the GNU Lesser General Public License instead.) You can apply it to
your programs, too.
When we speak of free software, we are referring to freedom, not
price. Our General Public Licenses are designed to make sure that you
have the freedom to distribute copies of free software (and charge for
this service if you wish), that you receive source code or can get it
if you want it, that you can change the software or use pieces of it
in new free programs; and that you know you can do these things.
To protect your rights, we need to make restrictions that forbid
anyone to deny you these rights or to ask you to surrender the rights.
These restrictions translate to certain responsibilities for you if you
distribute copies of the software, or if you modify it.
For example, if you distribute copies of such a program, whether
gratis or for a fee, you must give the recipients all the rights that
you have. You must make sure that they, too, receive or can get the
source code. And you must show them these terms so they know their
rights.
We protect your rights with two steps: (1) copyright the software, and
(2) offer you this license which gives you legal permission to copy,
distribute and/or modify the software.
Also, for each author's protection and ours, we want to make certain
that everyone understands that there is no warranty for this free
software. If the software is modified by someone else and passed on, we
want its recipients to know that what they have is not the original, so
that any problems introduced by others will not reflect on the original
authors' reputations.
Finally, any free program is threatened constantly by software
patents. We wish to avoid the danger that redistributors of a free
program will individually obtain patent licenses, in effect making the
program proprietary. To prevent this, we have made it clear that any
patent must be licensed for everyone's free use or not licensed at all.
The precise terms and conditions for copying, distribution and
modification follow.
GNU GENERAL PUBLIC LICENSE
TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
0. This License applies to any program or other work which contains
a notice placed by the copyright holder saying it may be distributed
under the terms of this General Public License. The "Program", below,
refers to any such program or work, and a "work based on the Program"
means either the Program or any derivative work under copyright law:
that is to say, a work containing the Program or a portion of it,
either verbatim or with modifications and/or translated into another
language. (Hereinafter, translation is included without limitation in
the term "modification".) Each licensee is addressed as "you".
Activities other than copying, distribution and modification are not
covered by this License; they are outside its scope. The act of
running the Program is not restricted, and the output from the Program
is covered only if its contents constitute a work based on the
Program (independent of having been made by running the Program).
Whether that is true depends on what the Program does.
1. You may copy and distribute verbatim copies of the Program's
source code as you receive it, in any medium, provided that you
conspicuously and appropriately publish on each copy an appropriate
copyright notice and disclaimer of warranty; keep intact all the
notices that refer to this License and to the absence of any warranty;
and give any other recipients of the Program a copy of this License
along with the Program.
You may charge a fee for the physical act of transferring a copy, and
you may at your option offer warranty protection in exchange for a fee.
2. You may modify your copy or copies of the Program or any portion
of it, thus forming a work based on the Program, and copy and
distribute such modifications or work under the terms of Section 1
above, provided that you also meet all of these conditions:
a) You must cause the modified files to carry prominent notices
stating that you changed the files and the date of any change.
b) You must cause any work that you distribute or publish, that in
whole or in part contains or is derived from the Program or any
part thereof, to be licensed as a whole at no charge to all third
parties under the terms of this License.
c) If the modified program normally reads commands interactively
when run, you must cause it, when started running for such
interactive use in the most ordinary way, to print or display an
announcement including an appropriate copyright notice and a
notice that there is no warranty (or else, saying that you provide
a warranty) and that users may redistribute the program under
these conditions, and telling the user how to view a copy of this
License. (Exception: if the Program itself is interactive but
does not normally print such an announcement, your work based on
the Program is not required to print an announcement.)
These requirements apply to the modified work as a whole. If
identifiable sections of that work are not derived from the Program,
and can be reasonably considered independent and separate works in
themselves, then this License, and its terms, do not apply to those
sections when you distribute them as separate works. But when you
distribute the same sections as part of a whole which is a work based
on the Program, the distribution of the whole must be on the terms of
this License, whose permissions for other licensees extend to the
entire whole, and thus to each and every part regardless of who wrote it.
Thus, it is not the intent of this section to claim rights or contest
your rights to work written entirely by you; rather, the intent is to
exercise the right to control the distribution of derivative or
collective works based on the Program.
In addition, mere aggregation of another work not based on the Program
with the Program (or with a work based on the Program) on a volume of
a storage or distribution medium does not bring the other work under
the scope of this License.
3. You may copy and distribute the Program (or a work based on it,
under Section 2) in object code or executable form under the terms of
Sections 1 and 2 above provided that you also do one of the following:
a) Accompany it with the complete corresponding machine-readable
source code, which must be distributed under the terms of Sections
1 and 2 above on a medium customarily used for software interchange; or,
b) Accompany it with a written offer, valid for at least three
years, to give any third party, for a charge no more than your
cost of physically performing source distribution, a complete
machine-readable copy of the corresponding source code, to be
distributed under the terms of Sections 1 and 2 above on a medium
customarily used for software interchange; or,
c) Accompany it with the information you received as to the offer
to distribute corresponding source code. (This alternative is
allowed only for noncommercial distribution and only if you
received the program in object code or executable form with such
an offer, in accord with Subsection b above.)
The source code for a work means the preferred form of the work for
making modifications to it. For an executable work, complete source
code means all the source code for all modules it contains, plus any
associated interface definition files, plus the scripts used to
control compilation and installation of the executable. However, as a
special exception, the source code distributed need not include
anything that is normally distributed (in either source or binary
form) with the major components (compiler, kernel, and so on) of the
operating system on which the executable runs, unless that component
itself accompanies the executable.
If distribution of executable or object code is made by offering
access to copy from a designated place, then offering equivalent
access to copy the source code from the same place counts as
distribution of the source code, even though third parties are not
compelled to copy the source along with the object code.
4. You may not copy, modify, sublicense, or distribute the Program
except as expressly provided under this License. Any attempt
otherwise to copy, modify, sublicense or distribute the Program is
void, and will automatically terminate your rights under this License.
However, parties who have received copies, or rights, from you under
this License will not have their licenses terminated so long as such
parties remain in full compliance.
5. You are not required to accept this License, since you have not
signed it. However, nothing else grants you permission to modify or
distribute the Program or its derivative works. These actions are
prohibited by law if you do not accept this License. Therefore, by
modifying or distributing the Program (or any work based on the
Program), you indicate your acceptance of this License to do so, and
all its terms and conditions for copying, distributing or modifying
the Program or works based on it.
6. Each time you redistribute the Program (or any work based on the
Program), the recipient automatically receives a license from the
original licensor to copy, distribute or modify the Program subject to
these terms and conditions. You may not impose any further
restrictions on the recipients' exercise of the rights granted herein.
You are not responsible for enforcing compliance by third parties to
this License.
7. If, as a consequence of a court judgment or allegation of patent
infringement or for any other reason (not limited to patent issues),
conditions are imposed on you (whether by court order, agreement or
otherwise) that contradict the conditions of this License, they do not
excuse you from the conditions of this License. If you cannot
distribute so as to satisfy simultaneously your obligations under this
License and any other pertinent obligations, then as a consequence you
may not distribute the Program at all. For example, if a patent
license would not permit royalty-free redistribution of the Program by
all those who receive copies directly or indirectly through you, then
the only way you could satisfy both it and this License would be to
refrain entirely from distribution of the Program.
If any portion of this section is held invalid or unenforceable under
any particular circumstance, the balance of the section is intended to
apply and the section as a whole is intended to apply in other
circumstances.
It is not the purpose of this section to induce you to infringe any
patents or other property right claims or to contest validity of any
such claims; this section has the sole purpose of protecting the
integrity of the free software distribution system, which is
implemented by public license practices. Many people have made
generous contributions to the wide range of software distributed
through that system in reliance on consistent application of that
system; it is up to the author/donor to decide if he or she is willing
to distribute software through any other system and a licensee cannot
impose that choice.
This section is intended to make thoroughly clear what is believed to
be a consequence of the rest of this License.
8. If the distribution and/or use of the Program is restricted in
certain countries either by patents or by copyrighted interfaces, the
original copyright holder who places the Program under this License
may add an explicit geographical distribution limitation excluding
those countries, so that distribution is permitted only in or among
countries not thus excluded. In such case, this License incorporates
the limitation as if written in the body of this License.
9. The Free Software Foundation may publish revised and/or new versions
of the General Public License from time to time. Such new versions will
be similar in spirit to the present version, but may differ in detail to
address new problems or concerns.
Each version is given a distinguishing version number. If the Program
specifies a version number of this License which applies to it and "any
later version", you have the option of following the terms and conditions
either of that version or of any later version published by the Free
Software Foundation. If the Program does not specify a version number of
this License, you may choose any version ever published by the Free Software
Foundation.
10. If you wish to incorporate parts of the Program into other free
programs whose distribution conditions are different, write to the author
to ask for permission. For software which is copyrighted by the Free
Software Foundation, write to the Free Software Foundation; we sometimes
make exceptions for this. Our decision will be guided by the two goals
of preserving the free status of all derivatives of our free software and
of promoting the sharing and reuse of software generally.
NO WARRANTY
11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN
OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS
TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE
PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
REPAIR OR CORRECTION.
12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
POSSIBILITY OF SUCH DAMAGES.
END OF TERMS AND CONDITIONS
How to Apply These Terms to Your New Programs
If you develop a new program, and you want it to be of the greatest
possible use to the public, the best way to achieve this is to make it
free software which everyone can redistribute and change under these terms.
To do so, attach the following notices to the program. It is safest
to attach them to the start of each source file to most effectively
convey the exclusion of warranty; and each file should have at least
the "copyright" line and a pointer to where the full notice is found.
<one line to give the program's name and a brief idea of what it does.>
Copyright (C) <year> <name of author>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License along
with this program; if not, write to the Free Software Foundation, Inc.,
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
Also add information on how to contact you by electronic and paper mail.
If the program is interactive, make it output a short notice like this
when it starts in an interactive mode:
Gnomovision version 69, Copyright (C) year name of author
Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
This is free software, and you are welcome to redistribute it
under certain conditions; type `show c' for details.
The hypothetical commands `show w' and `show c' should show the appropriate
parts of the General Public License. Of course, the commands you use may
be called something other than `show w' and `show c'; they could even be
mouse-clicks or menu items--whatever suits your program.
You should also get your employer (if you work as a programmer) or your
school, if any, to sign a "copyright disclaimer" for the program, if
necessary. Here is a sample; alter the names:
Yoyodyne, Inc., hereby disclaims all copyright interest in the program
`Gnomovision' (which makes passes at compilers) written by James Hacker.
<signature of Ty Coon>, 1 April 1989
Ty Coon, President of Vice
This General Public License does not permit incorporating your program into
proprietary programs. If your program is a subroutine library, you may
consider it more useful to permit linking proprietary applications with the
library. If this is what you want to do, use the GNU Lesser General
Public License instead of this License.

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#
mainmenu "Buildroot $BR2_VERSION Configuration"
config BR2_HAVE_DOT_CONFIG
bool
default y
config BR2_VERSION
string
option env="BR2_VERSION_FULL"
config BR2_HOSTARCH
string
option env="HOSTARCH"
config BR2_BASE_DIR
string
option env="BASE_DIR"
# br2-external paths definitions
source "$BR2_BASE_DIR/.br2-external.in.paths"
# Hidden config symbols for packages to check system gcc version
config BR2_HOST_GCC_VERSION
string
option env="HOST_GCC_VERSION"
config BR2_HOST_GCC_AT_LEAST_4_9
bool
default y if BR2_HOST_GCC_VERSION = "4 9"
config BR2_HOST_GCC_AT_LEAST_5
bool
default y if BR2_HOST_GCC_VERSION = "5"
select BR2_HOST_GCC_AT_LEAST_4_9
config BR2_HOST_GCC_AT_LEAST_6
bool
default y if BR2_HOST_GCC_VERSION = "6"
select BR2_HOST_GCC_AT_LEAST_5
config BR2_HOST_GCC_AT_LEAST_7
bool
default y if BR2_HOST_GCC_VERSION = "7"
select BR2_HOST_GCC_AT_LEAST_6
config BR2_HOST_GCC_AT_LEAST_8
bool
default y if BR2_HOST_GCC_VERSION = "8"
select BR2_HOST_GCC_AT_LEAST_7
config BR2_HOST_GCC_AT_LEAST_9
bool
default y if BR2_HOST_GCC_VERSION = "9"
select BR2_HOST_GCC_AT_LEAST_8
# When adding new entries above, be sure to update
# the HOSTCC_MAX_VERSION variable in the Makefile.
# Hidden boolean selected by packages in need of Java in order to build
# (example: kodi)
config BR2_NEEDS_HOST_JAVA
bool
# Hidden boolean selected by pre-built packages for x86, when they
# need to run on x86-64 machines (example: pre-built external
# toolchains, binary tools, etc.).
config BR2_HOSTARCH_NEEDS_IA32_LIBS
bool
# Hidden boolean selected by packages that need to build 32 bits
# binaries with the host compiler, even on 64 bits build machines (e.g
# bootloaders).
config BR2_HOSTARCH_NEEDS_IA32_COMPILER
bool
# Hidden boolean selected by packages that need the host to have an
# UTF8 locale.
config BR2_NEEDS_HOST_UTF8_LOCALE
bool
# Hidden boolean selected by packages that need the host to have
# support for building gcc plugins
config BR2_NEEDS_HOST_GCC_PLUGIN_SUPPORT
bool
source "arch/Config.in"
source "toolchain/Config.in"
menu "Build options"
menu "Commands"
config BR2_WGET
string "Wget command"
default "wget --passive-ftp -nd -t 3"
config BR2_SVN
string "Subversion (svn) command"
default "svn --non-interactive"
config BR2_BZR
string "Bazaar (bzr) command"
default "bzr"
config BR2_GIT
string "Git command"
default "git"
config BR2_CVS
string "CVS command"
default "cvs"
config BR2_LOCALFILES
string "Local files retrieval command"
default "cp"
config BR2_SCP
string "Secure copy (scp) command"
default "scp"
config BR2_SFTP
string "Secure file transfer (sftp) command"
default "sftp"
config BR2_HG
string "Mercurial (hg) command"
default "hg"
config BR2_ZCAT
string "zcat command"
default "gzip -d -c"
help
Command to be used to extract a gzip'ed file to stdout. zcat
is identical to gunzip -c except that the former may not be
available on your system.
Default is "gzip -d -c"
Other possible values include "gunzip -c" or "zcat".
config BR2_BZCAT
string "bzcat command"
default "bzcat"
help
Command to be used to extract a bzip2'ed file to stdout.
bzcat is identical to bunzip2 -c except that the former may
not be available on your system.
Default is "bzcat"
Other possible values include "bunzip2 -c" or "bzip2 -d -c".
config BR2_XZCAT
string "xzcat command"
default "xzcat"
help
Command to be used to extract a xz'ed file to stdout.
Default is "xzcat"
config BR2_LZCAT
string "lzcat command"
default "lzip -d -c"
help
Command to be used to extract a lzip'ed file to stdout.
Default is "lzip -d -c"
config BR2_TAR_OPTIONS
string "Tar options"
default ""
help
Options to pass to tar when extracting the sources.
E.g. " -v --exclude='*.svn*'" to exclude all .svn internal
files and to be verbose.
endmenu
config BR2_DEFCONFIG_FROM_ENV
string
option env="BR2_DEFCONFIG"
config BR2_DEFCONFIG
string "Location to save buildroot config"
default BR2_DEFCONFIG_FROM_ENV if BR2_DEFCONFIG_FROM_ENV != ""
default "$(CONFIG_DIR)/defconfig"
help
When running 'make savedefconfig', the defconfig file will be
saved in this location.
config BR2_DL_DIR
string "Download dir"
default "$(TOPDIR)/dl"
help
Directory to store all the source files that we need to fetch.
If the Linux shell environment has defined the BR2_DL_DIR
environment variable, then this overrides this configuration
item.
The directory is organized with a subdirectory for each
package. Each package has its own $(LIBFOO_DL_DIR) variable
that can be used to find the correct path.
The default is $(TOPDIR)/dl
config BR2_HOST_DIR
string "Host dir"
default "$(BASE_DIR)/host"
help
Directory to store all the binary files that are built for the
host. This includes the cross compilation toolchain when
building the internal buildroot toolchain.
The default is $(BASE_DIR)/host
menu "Mirrors and Download locations"
config BR2_PRIMARY_SITE
string "Primary download site"
default ""
help
Primary site to download from. If this option is set then
buildroot will try to download package source first from this
site and try the default if the file is not found.
Valid URIs are:
- URIs recognized by $(WGET)
- local URIs of the form file://absolutepath
- scp URIs of the form scp://[user@]host:path.
config BR2_PRIMARY_SITE_ONLY
bool "Only allow downloads from primary download site"
depends on BR2_PRIMARY_SITE != ""
help
If this option is enabled, downloads will only be attempted
from the primary download site. Other locations, like the
package's official download location or the backup download
site, will not be considered. Therefore, if the package is not
present on the primary site, the download fails.
This is useful for project developers who want to ensure that
the project can be built even if the upstream tarball
locations disappear.
if !BR2_PRIMARY_SITE_ONLY
config BR2_BACKUP_SITE
string "Backup download site"
default "https://sources.buildroot.net"
help
Backup site to download from. If this option is set then
buildroot will fall back to download package sources from here
if the normal location fails.
config BR2_KERNEL_MIRROR
string "Kernel.org mirror"
default "https://cdn.kernel.org/pub"
help
kernel.org is mirrored on a number of servers around the
world. The following allows you to select your preferred
mirror. By default, a CDN is used, which automatically
redirects to a mirror geographically close to you.
Have a look on the kernel.org site for a list of mirrors, then
enter the URL to the base directory. Examples:
http://www.XX.kernel.org/pub (XX = country code)
http://mirror.aarnet.edu.au/pub/ftp.kernel.org
config BR2_GNU_MIRROR
string "GNU Software mirror"
default "http://ftpmirror.gnu.org"
help
GNU has multiple software mirrors scattered around the
world. The following allows you to select your preferred
mirror. By default, a generic address is used, which
automatically selects an up-to-date and local mirror.
Have a look on the gnu.org site for a list of mirrors, then
enter the URL to the base directory. Examples:
http://ftp.gnu.org/pub/gnu
http://mirror.aarnet.edu.au/pub/gnu
config BR2_LUAROCKS_MIRROR
string "LuaRocks mirror"
default "http://rocks.moonscript.org"
help
LuaRocks repository.
See http://luarocks.org
config BR2_CPAN_MIRROR
string "CPAN mirror (Perl packages)"
default "https://cpan.metacpan.org"
help
CPAN (Comprehensive Perl Archive Network) is a repository of
Perl packages. It has multiple software mirrors scattered
around the world. This option allows you to select a mirror.
The list of mirrors is available at:
http://mirrors.cpan.org/ (tabular)
http://mirrors.cpan.org/map.html (clickable world map)
endif
endmenu
config BR2_JLEVEL
int "Number of jobs to run simultaneously (0 for auto)"
default "0"
help
Number of jobs to run simultaneously. If 0, determine
automatically according to number of CPUs on the host system.
config BR2_CCACHE
bool "Enable compiler cache"
help
This option will enable the use of ccache, a compiler cache.
It will cache the result of previous builds to speed up future
builds. By default, the cache is stored in
$HOME/.buildroot-ccache.
Note that Buildroot does not try to invalidate the cache
contents when the compiler changes in an incompatible way.
Therefore, if you make a change to the compiler version and/or
configuration, you are responsible for purging the ccache
cache by removing the $HOME/.buildroot-ccache directory.
if BR2_CCACHE
config BR2_CCACHE_DIR
string "Compiler cache location"
default "$(HOME)/.buildroot-ccache"
help
Where ccache should store cached files.
If the Linux shell environment has defined the BR2_CCACHE_DIR
environment variable, then this overrides this configuration
item.
config BR2_CCACHE_INITIAL_SETUP
string "Compiler cache initial setup"
help
Initial ccache settings to apply, such as --max-files or
--max-size.
For example, if your project is known to require more space
than the default max cache size, then you might want to
increase the cache size to a suitable amount using the -M
(--max-size) option.
The string you specify here is passed verbatim to ccache.
Refer to ccache documentation for more details.
These initial settings are applied after ccache has been
compiled.
config BR2_CCACHE_USE_BASEDIR
bool "Use relative paths"
default y
help
Allow ccache to convert absolute paths within the output
directory into relative paths.
During the build, many -I include directives are given with an
absolute path. These absolute paths end up in the hashes that
are computed by ccache. Therefore, when you build from a
different directory, the hash will be different and the cached
object will not be used.
To improve cache performance, set this option to y. This
allows ccache to rewrite absolute paths within the output
directory into relative paths. Note that only paths within the
output directory will be rewritten; therefore, if you change
BR2_HOST_DIR to point outside the output directory and
subsequently move it to a different location, this will lead
to cache misses.
This option has as a result that the debug information in the
object files also has only relative paths. Therefore, make
sure you cd to the build directory before starting gdb. See
the section "COMPILING IN DIFFERENT DIRECTORIES" in the ccache
manual for more information.
endif
config BR2_ENABLE_DEBUG
bool "build packages with debugging symbols"
help
Build packages with debugging symbols enabled. All libraries
and binaries in the 'staging' directory will have debugging
symbols, which allows remote debugging even if libraries and
binaries are stripped on the target. Whether libraries and
binaries are stripped on the target is controlled by the
BR2_STRIP_* options below.
if BR2_ENABLE_DEBUG
choice
prompt "gcc debug level"
default BR2_DEBUG_2
help
Set the debug level for gcc
config BR2_DEBUG_1
bool "debug level 1"
help
Debug level 1 produces minimal information, enough for making
backtraces in parts of the program that you don't plan to
debug. This includes descriptions of functions and external
variables, but no information about local variables and no
line numbers.
config BR2_DEBUG_2
bool "debug level 2"
help
The default gcc debug level is 2
config BR2_DEBUG_3
bool "debug level 3"
help
Level 3 includes extra information, such as all the macro
definitions present in the program. Some debuggers support
macro expansion when you use -g3.
endchoice
endif
config BR2_ENABLE_RUNTIME_DEBUG
bool "build packages with runtime debugging info"
help
Some packages may have runtime assertions, extra traces, and
similar runtime elements that can help debugging. However,
these elements may negatively influence performance so should
normally not be enabled on production systems.
Enable this option to enable such runtime debugging.
Note: disabling this option is not a guarantee that all
packages effectively removed these runtime debugging elements.
config BR2_STRIP_strip
bool "strip target binaries"
default y
depends on BR2_BINFMT_ELF
help
Binaries and libraries in the target filesystem will be
stripped using the normal 'strip' command. This allows to save
space, mainly by removing debugging symbols. Debugging symbols
on the target are needed for native debugging, but not when
remote debugging is used.
config BR2_STRIP_EXCLUDE_FILES
string "executables that should not be stripped"
default ""
depends on BR2_STRIP_strip
help
You may specify a space-separated list of binaries and
libraries here that should not be stripped on the target.
config BR2_STRIP_EXCLUDE_DIRS
string "directories that should be skipped when stripping"
default ""
depends on BR2_STRIP_strip
help
You may specify a space-separated list of directories that
should be skipped when stripping. Binaries and libraries in
these directories will not be touched. The directories should
be specified relative to the target directory, without leading
slash.
choice
prompt "gcc optimization level"
default BR2_OPTIMIZE_S
help
Set the optimization level for gcc
config BR2_OPTIMIZE_0
bool "optimization level 0"
help
Do not optimize.
config BR2_OPTIMIZE_1
bool "optimization level 1"
help
Optimize. Optimizing compilation takes somewhat more time, and
a lot more memory for a large function. With -O, the compiler
tries to reduce code size and execution time, without
performing any optimizations that take a great deal of
compilation time. -O turns on the following optimization
flags: -fdefer-pop -fdelayed-branch -fguess-branch-probability
-fcprop-registers -floop-optimize -fif-conversion
-fif-conversion2 -ftree-ccp -ftree-dce -ftree-dominator-opts
-ftree-dse -ftree-ter -ftree-lrs -ftree-sra -ftree-copyrename
-ftree-fre -ftree-ch -funit-at-a-time -fmerge-constants. -O
also turns on -fomit-frame-pointer on machines where doing so
does not interfere with debugging.
config BR2_OPTIMIZE_2
bool "optimization level 2"
help
Optimize even more. GCC performs nearly all supported
optimizations that do not involve a space-speed tradeoff. The
compiler does not perform loop unrolling or function inlining
when you specify -O2. As compared to -O, this option increases
both compilation time and the performance of the generated
code. -O2 turns on all optimization flags specified by -O. It
also turns on the following optimization flags:
-fthread-jumps -fcrossjumping -foptimize-sibling-calls
-fcse-follow-jumps -fcse-skip-blocks -fgcse -fgcse-lm
-fexpensive-optimizations -fstrength-reduce
-frerun-cse-after-loop -frerun-loop-opt -fcaller-saves
-fpeephole2 -fschedule-insns -fschedule-insns2
-fsched-interblock -fsched-spec -fregmove -fstrict-aliasing
-fdelete-null-pointer-checks -freorder-blocks
-freorder-functions -falign-functions -falign-jumps
-falign-loops -falign-labels -ftree-vrp -ftree-pre. Please
note the warning under -fgcse about invoking -O2 on programs
that use computed gotos.
config BR2_OPTIMIZE_3
bool "optimization level 3"
help
Optimize yet more. -O3 turns on all optimizations specified by
-O2 and also turns on the -finline-functions, -funswitch-loops
and -fgcse-after-reload options.
config BR2_OPTIMIZE_G
bool "optimize for debugging"
depends on BR2_TOOLCHAIN_GCC_AT_LEAST_4_8
help
Optimize for debugging. This enables optimizations that do not
interfere with debugging. It should be the optimization level
of choice for the standard edit-compile-debug cycle, offering
a reasonable level of optimization while maintaining fast
compilation and a good debugging experience.
config BR2_OPTIMIZE_S
bool "optimize for size"
help
Optimize for size. -Os enables all -O2 optimizations that do
not typically increase code size. It also performs further
optimizations designed to reduce code size. -Os disables the
following optimization flags: -falign-functions -falign-jumps
-falign-loops -falign-labels -freorder-blocks
-freorder-blocks-and-partition -fprefetch-loop-arrays
-ftree-vect-loop-version
This is the default.
config BR2_OPTIMIZE_FAST
bool "optimize for fast (may break packages!)"
depends on BR2_TOOLCHAIN_GCC_AT_LEAST_4_6
help
Optimize for fast. Disregard strict standards
compliance. -Ofast enables all -O3 optimizations. It also
enables optimizations that are not valid for all
standard-compliant programs, so be careful, as it may break
some packages. It turns on -ffast-math and the
Fortran-specific -fstack-arrays, unless -fmax-stack-var-size
is specified, and -fno-protect-parens.
endchoice
config BR2_ENABLE_LTO
bool "build packages with link-time optimisation"
help
Enable the link-time optimisation (LTO) option when building
packages. Link-time optimisation re-runs optimisations at
link time, which allows the compiler to do interprocedural
analysis across compilation units and thus come with better
results: smaller size and better performance.
Note that this analysis is limited to statically linked
object files and libraries.
This option may significantly increase build times,
sometimes 5 times longer, with only limited gains.
At this time, this option only enables LTO in packages that
have an explicit configuration option for it. Other packages
always enable LTO, but most packages never enable LTO.
config BR2_GOOGLE_BREAKPAD_ENABLE
bool "Enable google-breakpad support"
depends on BR2_INSTALL_LIBSTDCPP
depends on BR2_TOOLCHAIN_GCC_AT_LEAST_4_8 # C++11
depends on BR2_USE_WCHAR
depends on BR2_TOOLCHAIN_HAS_THREADS
depends on BR2_TOOLCHAIN_USES_GLIBC
depends on BR2_PACKAGE_GOOGLE_BREAKPAD_ARCH_SUPPORTS
depends on BR2_PACKAGE_HOST_GOOGLE_BREAKPAD_ARCH_SUPPORTS
select BR2_PACKAGE_GOOGLE_BREAKPAD
help
This option will enable the use of google breakpad, a library
and tool suite that allows you to distribute an application to
users with compiler-provided debugging information removed,
record crashes in compact "minidump" files, send them back to
your server and produce C and C++ stack traces from these
minidumps. Breakpad can also write minidumps on request for
programs that have not crashed.
if BR2_GOOGLE_BREAKPAD_ENABLE
config BR2_GOOGLE_BREAKPAD_INCLUDE_FILES
string "List of executables and libraries to extract symbols from"
default ""
help
You may specify a space-separated list of binaries and
libraries with full paths relative to $(TARGET_DIR) of which
debug symbols will be dumped for further use with google
breakpad.
A directory structure that can be used by minidump-stackwalk
will be created at:
$(STAGING_DIR)/usr/share/google-breakpad-symbols
endif
choice
bool "libraries"
default BR2_SHARED_LIBS if BR2_BINFMT_SUPPORTS_SHARED
default BR2_STATIC_LIBS if !BR2_BINFMT_SUPPORTS_SHARED
help
Select the type of libraries you want to use on the target.
The default is to build dynamic libraries and use those on the
target filesystem, except when the architecture and/or the
selected binary format does not support shared libraries.
config BR2_STATIC_LIBS
bool "static only"
depends on !BR2_TOOLCHAIN_USES_GLIBC
help
Build and use only static libraries. No shared libraries will
be installed on the target. This potentially increases your
code size and should only be used if you know what you are
doing. Note that some packages may not be available when this
option is enabled, due to their need for dynamic library
support.
comment "static only needs a toolchain w/ uclibc or musl"
depends on BR2_TOOLCHAIN_USES_GLIBC
config BR2_SHARED_LIBS
bool "shared only"
depends on BR2_BINFMT_SUPPORTS_SHARED
help
Build and use only shared libraries. This is the recommended
solution as it saves space and build time.
config BR2_SHARED_STATIC_LIBS
bool "both static and shared"
depends on BR2_BINFMT_SUPPORTS_SHARED
help
Build both shared and static libraries, but link executables
dynamically. While building both shared and static libraries
take more time and more disk space, having static libraries
may be useful to link some of the applications statically.
endchoice
config BR2_PACKAGE_OVERRIDE_FILE
string "location of a package override file"
default "$(CONFIG_DIR)/local.mk"
help
A package override file is a short makefile that contains
variable definitions of the form <pkg>_OVERRIDE_SRCDIR, which
allows to tell Buildroot to use an existing directory as the
source directory for a particular package. See the Buildroot
documentation for more details on this feature.
config BR2_GLOBAL_PATCH_DIR
string "global patch and hash directories"
help
You may specify a space separated list of one or more
directories containing global package patches and/or hashes.
For a specific version <packageversion> of a specific package
<packagename>, patches are looked up as follows:
First, the default Buildroot patch set for the package is
applied from the package's directory in Buildroot.
Then for every directory - <global-patch-dir> - that exists in
BR2_GLOBAL_PATCH_DIR, if the directory
<global-patch-dir>/<packagename>/<packageversion>/ exists,
then all *.patch files in this directory will be applied.
Otherwise, if the directory <global-patch-dir>/<packagename>
exists, then all *.patch files in the directory will be
applied.
The hash files are looked up similarly to the patches.
menu "Advanced"
config BR2_FORCE_HOST_BUILD
bool "Force the building of host dependencies"
help
Build all available host dependencies, even if they are
already installed on the system.
This option can be used to ensure that the download cache of
source archives for packages remain consistent between
different build hosts.
This option will increase build time.
config BR2_DOWNLOAD_FORCE_CHECK_HASHES
bool "Force all downloads to have a valid hash"
help
Say 'y' here to enforce downloads to have at least one valid
hash (and of course, that all hashes be valid).
By default, Buildroot checks hashes of all packages
downloaded, except those for which a custom version is
used.
With this option turned on, Buildroot will check hashes of
all packages, including those that use a custom version. In
order to provide hashes for such packages, place additional
hash files in BR2_GLOBAL_PATCH_DIR directories.
config BR2_REPRODUCIBLE
bool "Make the build reproducible (experimental)"
# SOURCE_DATE_EPOCH support in toolchain-wrapper requires GCC 4.4
depends on BR2_TOOLCHAIN_GCC_AT_LEAST_4_4
help
This option will remove all sources of non-reproducibility
from the build process. For a given Buildroot configuration,
this allows to generate exactly identical binaries from one
build to the other, including on different machines.
The current implementation is restricted to builds with the
same output directory. Many (absolute) paths are recorded in
intermediary files, and it is very likely that some of these
paths leak into the target rootfs. If you build with the
same O=... path, however, the result is identical.
This is labeled as an experimental feature, as not all
packages behave properly to ensure reproducibility.
config BR2_PER_PACKAGE_DIRECTORIES
bool "Use per-package directories (experimental)"
help
This option will change the build process of Buildroot
package to use per-package target and host directories.
This is useful for two related purposes:
- Cleanly isolate the build of each package, so that a
given package only "sees" the dependencies it has
explicitly expressed, and not other packages that may
have by chance been built before.
- Enable top-level parallel build.
This is labeled as an experimental feature, as not all
packages behave properly with per-package directories.
endmenu
comment "Security Hardening Options"
config BR2_PIC_PIE_ARCH_SUPPORTS
bool
default y
# Microblaze glibc toolchains don't work with PIC/PIE enabled
depends on !BR2_microblaze
# Nios2 toolchains produce non working binaries with -fPIC
depends on !BR2_nios2
config BR2_PIC_PIE
bool "Build code with PIC/PIE"
default y
depends on BR2_PIC_PIE_ARCH_SUPPORTS
depends on BR2_SHARED_LIBS
depends on BR2_TOOLCHAIN_SUPPORTS_PIE
help
Generate Position-Independent Code (PIC) and link
Position-Independent Executables (PIE).
comment "PIC/PIE needs a toolchain w/ PIE"
depends on BR2_PIC_PIE_ARCH_SUPPORTS
depends on BR2_SHARED_LIBS
depends on !BR2_TOOLCHAIN_SUPPORTS_PIE
choice
bool "Stack Smashing Protection"
default BR2_SSP_ALL if BR2_ENABLE_SSP # legacy
default BR2_SSP_STRONG if BR2_TOOLCHAIN_HAS_SSP_STRONG
default BR2_SSP_REGULAR
depends on BR2_TOOLCHAIN_HAS_SSP
help
Enable stack smashing protection support using GCC's
-fstack-protector option family.
See
http://www.linuxfromscratch.org/hints/downloads/files/ssp.txt
for details.
Note that this requires the toolchain to have SSP support.
This is always the case for glibc and eglibc toolchain, but is
optional in uClibc toolchains.
config BR2_SSP_NONE
bool "None"
help
Disable stack-smashing protection.
config BR2_SSP_REGULAR
bool "-fstack-protector"
help
Emit extra code to check for buffer overflows, such as stack
smashing attacks. This is done by adding a guard variable to
functions with vulnerable objects. This includes functions
that call alloca, and functions with buffers larger than 8
bytes. The guards are initialized when a function is entered
and then checked when the function exits. If a guard check
fails, an error message is printed and the program exits.
config BR2_SSP_STRONG
bool "-fstack-protector-strong"
depends on BR2_TOOLCHAIN_HAS_SSP_STRONG
help
Like -fstack-protector but includes additional functions to be
protected - those that have local array definitions, or have
references to local frame addresses.
-fstack-protector-strong officially appeared in gcc 4.9, but
some vendors have backported -fstack-protector-strong to older
versions of gcc.
config BR2_SSP_ALL
bool "-fstack-protector-all"
help
Like -fstack-protector except that all functions are
protected. This option might have a significant performance
impact on the compiled binaries.
endchoice
config BR2_SSP_OPTION
string
default "-fstack-protector" if BR2_SSP_REGULAR
default "-fstack-protector-strong" if BR2_SSP_STRONG
default "-fstack-protector-all" if BR2_SSP_ALL
comment "Stack Smashing Protection needs a toolchain w/ SSP"
depends on !BR2_TOOLCHAIN_HAS_SSP
choice
bool "RELRO Protection"
default BR2_RELRO_FULL if BR2_TOOLCHAIN_SUPPORTS_PIE
default BR2_RELRO_PARTIAL
depends on BR2_SHARED_LIBS
help
Enable a link-time protection know as RELRO (RELocation Read
Only) which helps to protect from certain type of exploitation
techniques altering the content of some ELF sections.
config BR2_RELRO_NONE
bool "None"
help
Disables Relocation link-time protections.
config BR2_RELRO_PARTIAL
bool "Partial"
help
This option makes the dynamic section not writeable after
initialization (with almost no performance penalty).
config BR2_RELRO_FULL
bool "Full"
depends on BR2_PIC_PIE_ARCH_SUPPORTS
depends on BR2_TOOLCHAIN_SUPPORTS_PIE
select BR2_PIC_PIE
help
This option includes the partial configuration, but also marks
the GOT as read-only at the cost of initialization time during
program loading, i.e every time an executable is started.
comment "RELRO Full needs a toolchain w/ PIE"
depends on BR2_PIC_PIE_ARCH_SUPPORTS
depends on !BR2_TOOLCHAIN_SUPPORTS_PIE
endchoice
comment "RELocation Read Only (RELRO) needs shared libraries"
depends on !BR2_SHARED_LIBS
config BR2_FORTIFY_SOURCE_ARCH_SUPPORTS
bool
default y
# Microblaze glibc toolchains don't work with Fortify Source enabled
depends on !BR2_microblaze
choice
bool "Buffer-overflow Detection (FORTIFY_SOURCE)"
default BR2_FORTIFY_SOURCE_1
depends on BR2_FORTIFY_SOURCE_ARCH_SUPPORTS
depends on BR2_TOOLCHAIN_USES_GLIBC
depends on !BR2_OPTIMIZE_0
help
Enable the _FORTIFY_SOURCE macro which introduces additional
checks to detect buffer-overflows in the following standard
library functions: memcpy, mempcpy, memmove, memset, strcpy,
stpcpy, strncpy, strcat, strncat, sprintf, vsprintf, snprintf,
vsnprintf, gets.
NOTE: This feature requires an optimization level of s/1/2/3/g
Support for this feature has been present since GCC 4.x.
config BR2_FORTIFY_SOURCE_NONE
bool "None"
help
Disables additional checks to detect buffer-overflows.
config BR2_FORTIFY_SOURCE_1
bool "Conservative"
# gcc bug https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61164
depends on !BR2_TOOLCHAIN_BUILDROOT || BR2_TOOLCHAIN_GCC_AT_LEAST_6
help
This option sets _FORTIFY_SOURCE to 1 and only introduces
checks that shouldn't change the behavior of conforming
programs. Adds checks at compile-time only.
config BR2_FORTIFY_SOURCE_2
bool "Aggressive"
# gcc bug https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61164
depends on !BR2_TOOLCHAIN_BUILDROOT || BR2_TOOLCHAIN_GCC_AT_LEAST_6
help
This option sets _FORTIFY_SOURCES to 2 and some more
checking is added, but some conforming programs might fail.
Also adds checks at run-time (detected buffer overflow
terminates the program)
config BR2_FORTIFY_SOURCE_3
bool "Extended"
depends on BR2_TOOLCHAIN_GCC_AT_LEAST_12
help
This option sets _FORTIFY_SOURCES to 3 and even more
checking is added compared to level 2. Extends checks at
run-time that can introduce an additional performance
overhead.
endchoice
comment "Fortify Source needs a glibc toolchain and optimization"
depends on BR2_FORTIFY_SOURCE_ARCH_SUPPORTS
depends on (!BR2_TOOLCHAIN_USES_GLIBC || BR2_OPTIMIZE_0)
endmenu
source "system/Config.in"
source "linux/Config.in"
source "package/Config.in"
source "fs/Config.in"
source "boot/Config.in"
source "package/Config.in.host"
source "Config.in.legacy"
# br2-external menus definitions
source "$BR2_BASE_DIR/.br2-external.in.menus"

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#
# Makefile.legacy - support for backward compatibility
#
# This file contains placeholders to detect backward-compatibility problems.
# When a buildroot "API" feature is being deprecated, a rule should be added
# here that issues an error when the old feature is used.
ifeq ($(BR2_LEGACY),y)
$(error "You have legacy configuration in your .config! Please check your configuration.")
endif
#
# Legacy options from 2014.02
#
# The BUILDROOT_DL_DIR environment variable was renamed by BR2_DL_DIR. We
# want to detect someone using the old variable, _except_ if also the new
# variable was set. By the time we get here, however, we no longer have
# access to the BR2_DL_DIR environment variable (because it has been overridden
# by the .config inclusion). However, the environment variable (if defined) was
# saved in DL_DIR, so we can use that.
ifneq ($(BUILDROOT_DL_DIR),)
ifneq ($(BUILDROOT_DL_DIR),$(DL_DIR))
$(error "The BUILDROOT_DL_DIR environment variable was renamed to BR2_DL_DIR.")
endif
endif
# If a script is using the deprecated BUILDROOT_CONFIG, make sure it fails.
# Add some directories in front just in case someone used dirname on it.
BUILDROOT_CONFIG_FAKE = /tmp/deprecated/The-BUILDROOT_CONFIG-environment-variable-was-renamed-to-BR2_CONFIG
# Similar to above for BUILDROOT_CONFIG, but here we have no .config equivalent.
ifneq ($(BUILDROOT_CONFIG),)
ifneq ($(BUILDROOT_CONFIG),$(BR2_CONFIG))
ifneq ($(BUILDROOT_CONFIG),$(BUILDROOT_CONFIG_FAKE))
$(error "The BUILDROOT_CONFIG environment variable was renamed to BR2_CONFIG.")
endif
endif
endif
BUILDROOT_CONFIG = $(BUILDROOT_CONFIG_FAKE)
export BUILDROOT_CONFIG
#
# Legacy options from 2012.08
#
host-pkg-config:
@$(call MESSAGE,host-pkg-config is replaced by host-pkgconf)
@$(call MESSAGE,please update your .mk files)
@false
.PHONY: host-pkg-config
#
# Legacy options from 2012.05
#
GENTARGETS = $$(error The GENTARGETS macro no longer exists; use $$$$(eval $$$$(generic-package)) or $$$$(eval $$$$(host-generic-package)))
AUTOTARGETS = $$(error The AUTOTARGETS macro no longer exists; use $$$$(eval $$$$(autotools-package)) or $$$$(eval $$$$(host-autotools-package)))
CMAKETARGETS = $$(error The CMAKETARGETS macro no longer exists; use $$$$(eval $$$$(cmake-package)) or $$$$(eval $$$$(host-cmake-package)))

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Buildroot is a simple, efficient and easy-to-use tool to generate embedded
Linux systems through cross-compilation.
The documentation can be found in docs/manual. You can generate a text
document with 'make manual-text' and read output/docs/manual/manual.text.
Online documentation can be found at http://buildroot.org/docs.html
To build and use the buildroot stuff, do the following:
1) run 'make menuconfig'
2) select the target architecture and the packages you wish to compile
3) run 'make'
4) wait while it compiles
5) find the kernel, bootloader, root filesystem, etc. in output/images
You do not need to be root to build or run buildroot. Have fun!
Buildroot comes with a basic configuration for a number of boards. Run
'make list-defconfigs' to view the list of provided configurations.
Please feed suggestions, bug reports, insults, and bribes back to the
buildroot mailing list: buildroot@buildroot.org
You can also find us on #buildroot on OFTC IRC.
If you would like to contribute patches, please read
https://buildroot.org/manual.html#submitting-patches

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menu "Target options"
config BR2_ARCH_IS_64
bool
config BR2_KERNEL_64_USERLAND_32
bool
config BR2_SOFT_FLOAT
bool
config BR2_USE_MMU
bool
choice
prompt "Target Architecture"
default BR2_i386
help
Select the target architecture family to build for.
config BR2_arcle
bool "ARC (little endian)"
select BR2_USE_MMU
help
Synopsys' DesignWare ARC Processor Cores are a family of
32-bit CPUs that can be used from deeply embedded to high
performance host applications. Little endian.
config BR2_arceb
bool "ARC (big endian)"
select BR2_USE_MMU
help
Synopsys' DesignWare ARC Processor Cores are a family of
32-bit CPUs that can be used from deeply embedded to high
performance host applications. Big endian.
config BR2_arm
bool "ARM (little endian)"
# MMU support is set by the subarchitecture file, arch/Config.in.arm
help
ARM is a 32-bit reduced instruction set computer (RISC)
instruction set architecture (ISA) developed by ARM Holdings.
Little endian.
http://www.arm.com/
http://en.wikipedia.org/wiki/ARM
config BR2_armeb
bool "ARM (big endian)"
select BR2_USE_MMU
help
ARM is a 32-bit reduced instruction set computer (RISC)
instruction set architecture (ISA) developed by ARM Holdings.
Big endian.
http://www.arm.com/
http://en.wikipedia.org/wiki/ARM
config BR2_aarch64
bool "AArch64 (little endian)"
select BR2_ARCH_IS_64
help
Aarch64 is a 64-bit architecture developed by ARM Holdings.
http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
http://en.wikipedia.org/wiki/ARM
config BR2_aarch64_be
bool "AArch64 (big endian)"
select BR2_ARCH_IS_64
help
Aarch64 is a 64-bit architecture developed by ARM Holdings.
http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
http://en.wikipedia.org/wiki/ARM
config BR2_i386
bool "i386"
select BR2_USE_MMU
help
Intel i386 architecture compatible microprocessor
http://en.wikipedia.org/wiki/I386
config BR2_m68k
bool "m68k"
# MMU support is set by the subarchitecture file, arch/Config.in.m68k
help
Motorola 68000 family microprocessor
http://en.wikipedia.org/wiki/M68k
config BR2_microblazeel
bool "Microblaze AXI (little endian)"
select BR2_USE_MMU
help
Soft processor core designed for Xilinx FPGAs from Xilinx. AXI
bus based architecture (little endian)
http://www.xilinx.com
http://en.wikipedia.org/wiki/Microblaze
config BR2_microblazebe
bool "Microblaze non-AXI (big endian)"
select BR2_USE_MMU
help
Soft processor core designed for Xilinx FPGAs from Xilinx. PLB
bus based architecture (non-AXI, big endian)
http://www.xilinx.com
http://en.wikipedia.org/wiki/Microblaze
config BR2_mips
bool "MIPS (big endian)"
select BR2_USE_MMU
help
MIPS is a RISC microprocessor from MIPS Technologies. Big
endian.
http://www.mips.com/
http://en.wikipedia.org/wiki/MIPS_Technologies
config BR2_mipsel
bool "MIPS (little endian)"
select BR2_USE_MMU
help
MIPS is a RISC microprocessor from MIPS Technologies. Little
endian.
http://www.mips.com/
http://en.wikipedia.org/wiki/MIPS_Technologies
config BR2_mips64
bool "MIPS64 (big endian)"
select BR2_ARCH_IS_64
select BR2_USE_MMU
help
MIPS is a RISC microprocessor from MIPS Technologies. Big
endian.
http://www.mips.com/
http://en.wikipedia.org/wiki/MIPS_Technologies
config BR2_mips64el
bool "MIPS64 (little endian)"
select BR2_ARCH_IS_64
select BR2_USE_MMU
help
MIPS is a RISC microprocessor from MIPS Technologies. Little
endian.
http://www.mips.com/
http://en.wikipedia.org/wiki/MIPS_Technologies
config BR2_nios2
bool "Nios II"
select BR2_USE_MMU
help
Nios II is a soft core processor from Altera Corporation.
http://www.altera.com/
http://en.wikipedia.org/wiki/Nios_II
config BR2_or1k
bool "OpenRISC"
select BR2_USE_MMU
help
OpenRISC is a free and open processor for embedded system.
http://openrisc.io
config BR2_powerpc
bool "PowerPC"
select BR2_USE_MMU
help
PowerPC is a RISC architecture created by Apple-IBM-Motorola
alliance. Big endian.
http://www.power.org/
http://en.wikipedia.org/wiki/Powerpc
config BR2_powerpc64
bool "PowerPC64 (big endian)"
select BR2_ARCH_IS_64
select BR2_USE_MMU
help
PowerPC is a RISC architecture created by Apple-IBM-Motorola
alliance. Big endian.
http://www.power.org/
http://en.wikipedia.org/wiki/Powerpc
config BR2_powerpc64le
bool "PowerPC64 (little endian)"
select BR2_ARCH_IS_64
select BR2_USE_MMU
help
PowerPC is a RISC architecture created by Apple-IBM-Motorola
alliance. Little endian.
http://www.power.org/
http://en.wikipedia.org/wiki/Powerpc
config BR2_riscv
bool "RISCV"
select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
help
RISC-V is an open, free Instruction Set Architecture created
by the UC Berkeley Architecture Research group and supported
and promoted by RISC-V Foundation.
https://riscv.org/
https://en.wikipedia.org/wiki/RISC-V
config BR2_s390x
bool "s390x"
select BR2_ARCH_IS_64
select BR2_USE_MMU
help
s390x is a big-endian architecture made by IBM.
http://www.ibm.com/
http://en.wikipedia.org/wiki/IBM_System/390
config BR2_sh
bool "SuperH"
select BR2_USE_MMU
help
SuperH (or SH) is a 32-bit reduced instruction set computer
(RISC) instruction set architecture (ISA) developed by
Hitachi.
http://www.hitachi.com/
http://en.wikipedia.org/wiki/SuperH
config BR2_sparc
bool "SPARC"
select BR2_USE_MMU
help
SPARC (from Scalable Processor Architecture) is a RISC
instruction set architecture (ISA) developed by Sun
Microsystems.
http://www.oracle.com/sun
http://en.wikipedia.org/wiki/Sparc
config BR2_sparc64
bool "SPARC64"
select BR2_ARCH_IS_64
select BR2_USE_MMU
help
SPARC (from Scalable Processor Architecture) is a RISC
instruction set architecture (ISA) developed by Sun
Microsystems.
http://www.oracle.com/sun
http://en.wikipedia.org/wiki/Sparc
config BR2_x86_64
bool "x86_64"
select BR2_ARCH_IS_64
select BR2_USE_MMU
help
x86-64 is an extension of the x86 instruction set (Intel i386
architecture compatible microprocessor).
http://en.wikipedia.org/wiki/X86_64
config BR2_xtensa
bool "Xtensa"
# MMU support is set by the subarchitecture file, arch/Config.in.xtensa
help
Xtensa is a Tensilica processor IP architecture.
http://en.wikipedia.org/wiki/Xtensa
http://www.tensilica.com/
endchoice
# For some architectures or specific cores, our internal toolchain
# backend is not suitable (like, missing support in upstream gcc, or
# no ChipCo fork exists...)
config BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
bool
config BR2_ARCH_HAS_TOOLCHAIN_BUILDROOT
bool
default y if !BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
# The following symbols are selected by the individual
# Config.in.$ARCH files
config BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
bool
config BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
bool
select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
config BR2_ARCH_NEEDS_GCC_AT_LEAST_5
bool
select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
config BR2_ARCH_NEEDS_GCC_AT_LEAST_6
bool
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
config BR2_ARCH_NEEDS_GCC_AT_LEAST_7
bool
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
config BR2_ARCH_NEEDS_GCC_AT_LEAST_8
bool
select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
config BR2_ARCH_NEEDS_GCC_AT_LEAST_9
bool
select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
config BR2_ARCH_NEEDS_GCC_AT_LEAST_10
bool
select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
config BR2_ARCH_NEEDS_GCC_AT_LEAST_11
bool
select BR2_ARCH_NEEDS_GCC_AT_LEAST_10
config BR2_ARCH_NEEDS_GCC_AT_LEAST_12
bool
select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
# The following string values are defined by the individual
# Config.in.$ARCH files
config BR2_ARCH
string
config BR2_NORMALIZED_ARCH
string
config BR2_ENDIAN
string
config BR2_GCC_TARGET_ARCH
string
config BR2_GCC_TARGET_ABI
string
config BR2_GCC_TARGET_NAN
string
config BR2_GCC_TARGET_FP32_MODE
string
config BR2_GCC_TARGET_CPU
string
# The value of this option will be passed as --with-fpu=<value> when
# building gcc (internal backend) or -mfpu=<value> in the toolchain
# wrapper (external toolchain)
config BR2_GCC_TARGET_FPU
string
# The value of this option will be passed as --with-float=<value> when
# building gcc (internal backend) or -mfloat-abi=<value> in the toolchain
# wrapper (external toolchain)
config BR2_GCC_TARGET_FLOAT_ABI
string
# The value of this option will be passed as --with-mode=<value> when
# building gcc (internal backend) or -m<value> in the toolchain
# wrapper (external toolchain)
config BR2_GCC_TARGET_MODE
string
# Must be selected by binary formats that support shared libraries.
config BR2_BINFMT_SUPPORTS_SHARED
bool
# Must match the name of the architecture from readelf point of view,
# i.e the "Machine:" field of readelf output. See get_machine_name()
# in binutils/readelf.c for the list of possible values.
config BR2_READELF_ARCH_NAME
string
if BR2_arcle || BR2_arceb
source "arch/Config.in.arc"
endif
if BR2_arm || BR2_armeb || BR2_aarch64 || BR2_aarch64_be
source "arch/Config.in.arm"
endif
if BR2_m68k
source "arch/Config.in.m68k"
endif
if BR2_microblazeel || BR2_microblazebe
source "arch/Config.in.microblaze"
endif
if BR2_mips || BR2_mips64 || BR2_mipsel || BR2_mips64el
source "arch/Config.in.mips"
endif
if BR2_nios2
source "arch/Config.in.nios2"
endif
if BR2_or1k
source "arch/Config.in.or1k"
endif
if BR2_powerpc || BR2_powerpc64 || BR2_powerpc64le
source "arch/Config.in.powerpc"
endif
if BR2_riscv
source "arch/Config.in.riscv"
endif
if BR2_s390x
source "arch/Config.in.s390x"
endif
if BR2_sh
source "arch/Config.in.sh"
endif
if BR2_sparc || BR2_sparc64
source "arch/Config.in.sparc"
endif
if BR2_i386 || BR2_x86_64
source "arch/Config.in.x86"
endif
if BR2_xtensa
source "arch/Config.in.xtensa"
endif
# Set up target binary format
choice
prompt "Target Binary Format"
default BR2_BINFMT_ELF if BR2_USE_MMU
default BR2_BINFMT_FLAT
config BR2_BINFMT_ELF
bool "ELF"
depends on BR2_USE_MMU
select BR2_BINFMT_SUPPORTS_SHARED
help
ELF (Executable and Linkable Format) is a format for libraries
and executables used across different architectures and
operating systems.
config BR2_BINFMT_FLAT
bool "FLAT"
depends on !BR2_USE_MMU
help
FLAT binary is a relatively simple and lightweight executable
format based on the original a.out format. It is widely used
in environment where no MMU is available.
endchoice
# Set up flat binary type
choice
prompt "FLAT Binary type"
default BR2_BINFMT_FLAT_ONE
depends on BR2_BINFMT_FLAT
config BR2_BINFMT_FLAT_ONE
bool "One memory region"
help
All segments are linked into one memory region.
config BR2_BINFMT_FLAT_SHARED
bool "Shared binary"
depends on BR2_m68k
# Even though this really generates shared binaries, there is no libdl
# and dlopen() cannot be used. So packages that require shared
# libraries cannot be built. Therefore, we don't select
# BR2_BINFMT_SUPPORTS_SHARED and therefore force BR2_STATIC_LIBS.
# Although this adds -static to the compilation, that's not a problem
# because the -mid-shared-library option overrides it.
help
Allow to load and link indiviual FLAT binaries at run time.
endchoice
endmenu # Target options

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choice
prompt "Target CPU"
default BR2_arc770d
depends on BR2_arc
help
Specific CPU to use
config BR2_arc750d
bool "ARC 750D"
config BR2_arc770d
bool "ARC 770D"
config BR2_archs38
bool "ARC HS38"
help
Generic ARC HS capable of running Linux, i.e. with MMU,
caches and 32-bit multiplier. Also it corresponds to the
default configuration in older GNU toolchain versions.
config BR2_archs38_64mpy
bool "ARC HS38 with 64-bit mpy"
help
Fully featured ARC HS capable of running Linux, i.e. with
MMU, caches and 64-bit multiplier.
If you're not sure which version of ARC HS core you build
for use this one.
config BR2_archs38_full
bool "ARC HS38 with Quad MAC & FPU"
help
Fully featured ARC HS with additional support for
- Dual- and quad multiply and MC oprations
- Double-precision FPU
It corresponds to "hs38_slc_full" ARC HS template in
ARChitect.
config BR2_archs4x_rel31
bool "ARC HS48 rel 31"
help
Build for HS48 release 3.1
config BR2_archs4x
bool "ARC HS48"
help
Latest release of HS48 processor
- Dual and Quad multiply and MAC operations
- Double-precision FPU
endchoice
# Choice of atomic instructions presence
config BR2_ARC_ATOMIC_EXT
bool "Atomic extension (LLOCK/SCOND instructions)"
default y if BR2_arc770d
default y if BR2_archs38 || BR2_archs38_64mpy || BR2_archs38_full
default y if BR2_archs4x_rel31 || BR2_archs4x
config BR2_ARCH
default "arc" if BR2_arcle
default "arceb" if BR2_arceb
config BR2_NORMALIZED_ARCH
default "arc"
config BR2_arc
bool
default y if BR2_arcle || BR2_arceb
config BR2_ENDIAN
default "LITTLE" if BR2_arcle
default "BIG" if BR2_arceb
config BR2_GCC_TARGET_CPU
default "arc700" if BR2_arc750d
default "arc700" if BR2_arc770d
default "archs" if BR2_archs38
default "hs38" if BR2_archs38_64mpy
default "hs38_linux" if BR2_archs38_full
default "hs4x_rel31" if BR2_archs4x_rel31
default "hs4x" if BR2_archs4x
config BR2_READELF_ARCH_NAME
default "ARCompact" if BR2_arc750d || BR2_arc770d
default "ARCv2" if BR2_archs38 || BR2_archs38_64mpy || BR2_archs38_full
default "ARCv2" if BR2_archs4x_rel31 || BR2_archs4x
choice
prompt "MMU Page Size"
default BR2_ARC_PAGE_SIZE_8K
help
MMU starting from version 3 (found in ARC 770) and now
version 4 (found in ARC HS38) allows the selection of the
page size during ASIC design creation.
The following options are available for MMU v3 and v4: 4kB,
8kB and 16 kB.
The default is 8 kB (that really matches the only page size
in MMU v2). It is important to build a toolchain with page
size matching the hardware configuration. Otherwise
user-space applications will fail at runtime.
config BR2_ARC_PAGE_SIZE_4K
bool "4KB"
depends on !BR2_arc750d
config BR2_ARC_PAGE_SIZE_8K
bool "8KB"
help
This is the one and only option available for MMUv2 and
default value for MMU v3 and v4.
config BR2_ARC_PAGE_SIZE_16K
bool "16KB"
depends on !BR2_arc750d
endchoice
config BR2_ARC_PAGE_SIZE
string
default "4K" if BR2_ARC_PAGE_SIZE_4K
default "8K" if BR2_ARC_PAGE_SIZE_8K
default "16K" if BR2_ARC_PAGE_SIZE_16K
# vim: ft=kconfig
# -*- mode:kconfig; -*-

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arch/Config.in.arm Normal file
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# arm cpu features
config BR2_ARM_CPU_HAS_NEON
bool
# for some cores, NEON support is optional
config BR2_ARM_CPU_MAYBE_HAS_NEON
bool
# For some cores, the FPU is optional
config BR2_ARM_CPU_MAYBE_HAS_FPU
bool
config BR2_ARM_CPU_HAS_FPU
bool
# for some cores, VFPv2 is optional
config BR2_ARM_CPU_MAYBE_HAS_VFPV2
bool
select BR2_ARM_CPU_MAYBE_HAS_FPU
config BR2_ARM_CPU_HAS_VFPV2
bool
select BR2_ARM_CPU_HAS_FPU
# for some cores, VFPv3 is optional
config BR2_ARM_CPU_MAYBE_HAS_VFPV3
bool
select BR2_ARM_CPU_MAYBE_HAS_VFPV2
config BR2_ARM_CPU_HAS_VFPV3
bool
select BR2_ARM_CPU_HAS_VFPV2
# for some cores, VFPv4 is optional
config BR2_ARM_CPU_MAYBE_HAS_VFPV4
bool
select BR2_ARM_CPU_MAYBE_HAS_VFPV3
config BR2_ARM_CPU_HAS_VFPV4
bool
select BR2_ARM_CPU_HAS_VFPV3
# FPv4 is always optional
config BR2_ARM_CPU_MAYBE_HAS_FPV4
bool
select BR2_ARM_CPU_MAYBE_HAS_FPU
config BR2_ARM_CPU_HAS_FPV4
bool
select BR2_ARM_CPU_HAS_FPU
# FPv5 is always optional
config BR2_ARM_CPU_MAYBE_HAS_FPV5
bool
select BR2_ARM_CPU_MAYBE_HAS_FPV4
config BR2_ARM_CPU_HAS_FPV5
bool
select BR2_ARM_CPU_HAS_FPV4
config BR2_ARM_CPU_HAS_FP_ARMV8
bool
select BR2_ARM_CPU_HAS_VFPV4
config BR2_ARM_CPU_HAS_ARM
bool
config BR2_ARM_CPU_HAS_THUMB
bool
config BR2_ARM_CPU_HAS_THUMB2
bool
config BR2_ARM_CPU_ARMV4
bool
select BR2_USE_MMU
config BR2_ARM_CPU_ARMV5
bool
select BR2_USE_MMU
config BR2_ARM_CPU_ARMV6
bool
select BR2_USE_MMU
config BR2_ARM_CPU_ARMV7A
bool
select BR2_USE_MMU
config BR2_ARM_CPU_ARMV7M
bool
config BR2_ARM_CPU_ARMV8A
bool
select BR2_USE_MMU
choice
prompt "Target Architecture Variant"
default BR2_cortex_a53 if BR2_ARCH_IS_64
default BR2_arm926t
help
Specific CPU variant to use
if !BR2_ARCH_IS_64
comment "armv4 cores"
config BR2_arm920t
bool "arm920t"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV4
config BR2_arm922t
bool "arm922t"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV4
config BR2_fa526
bool "fa526/626"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_ARMV4
config BR2_strongarm
bool "strongarm sa110/sa1100"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_ARMV4
comment "armv5 cores"
config BR2_arm926t
bool "arm926t"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_MAYBE_HAS_VFPV2
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV5
config BR2_xscale
bool "xscale"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV5
comment "armv6 cores"
config BR2_arm1136j_s
bool "arm1136j-s"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV6
config BR2_arm1136jf_s
bool "arm1136jf-s"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_VFPV2
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV6
config BR2_arm1176jz_s
bool "arm1176jz-s"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV6
config BR2_arm1176jzf_s
bool "arm1176jzf-s"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_VFPV2
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV6
config BR2_arm11mpcore
bool "mpcore"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_MAYBE_HAS_VFPV2
select BR2_ARM_CPU_HAS_THUMB
select BR2_ARM_CPU_ARMV6
comment "armv7a cores"
config BR2_cortex_a5
bool "cortex-A5"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_MAYBE_HAS_NEON
select BR2_ARM_CPU_MAYBE_HAS_VFPV4
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
config BR2_cortex_a7
bool "cortex-A7"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_NEON
select BR2_ARM_CPU_HAS_VFPV4
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
config BR2_cortex_a8
bool "cortex-A8"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_NEON
select BR2_ARM_CPU_HAS_VFPV3
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
config BR2_cortex_a9
bool "cortex-A9"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_MAYBE_HAS_NEON
select BR2_ARM_CPU_MAYBE_HAS_VFPV3
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
config BR2_cortex_a12
bool "cortex-A12"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_NEON
select BR2_ARM_CPU_HAS_VFPV4
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
config BR2_cortex_a15
bool "cortex-A15"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_NEON
select BR2_ARM_CPU_HAS_VFPV4
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
config BR2_cortex_a15_a7
bool "cortex-A15/A7 big.LITTLE"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_NEON
select BR2_ARM_CPU_HAS_VFPV4
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
config BR2_cortex_a17
bool "cortex-A17"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_NEON
select BR2_ARM_CPU_HAS_VFPV4
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
config BR2_cortex_a17_a7
bool "cortex-A17/A7 big.LITTLE"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_NEON
select BR2_ARM_CPU_HAS_VFPV4
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
config BR2_pj4
bool "pj4"
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_VFPV3
select BR2_ARM_CPU_ARMV7A
# Cortex-M cores are only supported for little endian configurations
if BR2_arm
comment "armv7m cores"
config BR2_cortex_m3
bool "cortex-M3"
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_ARMV7M
config BR2_cortex_m4
bool "cortex-M4"
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_MAYBE_HAS_FPV4
select BR2_ARM_CPU_ARMV7M
config BR2_cortex_m7
bool "cortex-M7"
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_MAYBE_HAS_FPV5
select BR2_ARM_CPU_ARMV7M
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
endif # BR2_arm
endif # !BR2_ARCH_IS_64
comment "armv8 cores"
config BR2_cortex_a32
bool "cortex-A32"
depends on !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_ARM
select BR2_ARM_CPU_HAS_NEON
select BR2_ARM_CPU_HAS_THUMB2
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
config BR2_cortex_a35
bool "cortex-A35"
select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
config BR2_cortex_a53
bool "cortex-A53"
select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
config BR2_cortex_a57
bool "cortex-A57"
select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
config BR2_cortex_a57_a53
bool "cortex-A57/A53 big.LITTLE"
select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
config BR2_cortex_a72
bool "cortex-A72"
select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
config BR2_cortex_a72_a53
bool "cortex-A72/A53 big.LITTLE"
select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
config BR2_cortex_a73
bool "cortex-A73"
select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
config BR2_cortex_a73_a35
bool "cortex-A73/A35 big.LITTLE"
select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
config BR2_cortex_a73_a53
bool "cortex-A73/A53 big.LITTLE"
select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
config BR2_emag
bool "emag"
depends on BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
config BR2_exynos_m1
bool "exynos-m1"
select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
config BR2_falkor
bool "falkor"
depends on BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
config BR2_phecda
bool "phecda"
depends on BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
config BR2_qdf24xx
bool "qdf24xx"
depends on BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
config BR2_thunderx
bool "thunderx (aka octeontx)"
depends on BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
config BR2_thunderxt81
bool "thunderxt81 (aka octeontx81)"
depends on BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
config BR2_thunderxt83
bool "thunderxt83 (aka octeontx83)"
depends on BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
config BR2_thunderxt88
bool "thunderxt88"
depends on BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
config BR2_thunderxt88p1
bool "thunderxt88p1"
depends on BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
config BR2_xgene1
bool "xgene1"
select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
comment "armv8.1a cores"
config BR2_thunderx2t99
bool "thunderx2t99"
depends on BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
config BR2_thunderx2t99p1
bool "thunderx2t99p1"
depends on BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
config BR2_vulcan
bool "vulcan"
depends on BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
comment "armv8.2a cores"
config BR2_cortex_a55
bool "cortex-A55"
depends on BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
config BR2_cortex_a75
bool "cortex-A75"
depends on BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
config BR2_cortex_a75_a55
bool "cortex-A75/A55 big.LITTLE"
depends on BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
config BR2_cortex_a76
bool "cortex-A76"
select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
config BR2_cortex_a76_a55
bool "cortex-A76/A55 big.LITTLE"
select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
config BR2_neoverse_n1
bool "neoverse-N1 (aka ares)"
select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
config BR2_tsv110
bool "tsv110"
depends on BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
comment "armv8.4a cores"
config BR2_saphira
bool "saphira"
depends on BR2_ARCH_IS_64
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
endchoice
config BR2_ARM_ENABLE_NEON
bool "Enable NEON SIMD extension support"
depends on BR2_ARM_CPU_MAYBE_HAS_NEON
select BR2_ARM_CPU_HAS_NEON
help
For some CPU cores, the NEON SIMD extension is optional.
Select this option if you are certain your particular
implementation has NEON support and you want to use it.
config BR2_ARM_ENABLE_VFP
bool "Enable VFP extension support"
depends on BR2_ARM_CPU_MAYBE_HAS_FPU
select BR2_ARM_CPU_HAS_FPV5 if BR2_ARM_CPU_MAYBE_HAS_FPV5
select BR2_ARM_CPU_HAS_FPV4 if BR2_ARM_CPU_MAYBE_HAS_FPV4
select BR2_ARM_CPU_HAS_VFPV4 if BR2_ARM_CPU_MAYBE_HAS_VFPV4
select BR2_ARM_CPU_HAS_VFPV3 if BR2_ARM_CPU_MAYBE_HAS_VFPV3
select BR2_ARM_CPU_HAS_VFPV2 if BR2_ARM_CPU_MAYBE_HAS_VFPV2
help
For some CPU cores, the VFP extension is optional. Select
this option if you are certain your particular
implementation has VFP support and you want to use it.
choice
prompt "Target ABI"
default BR2_ARM_EABIHF if BR2_ARM_CPU_HAS_FPU
default BR2_ARM_EABI
depends on BR2_arm || BR2_armeb
help
Application Binary Interface to use. The Application Binary
Interface describes the calling conventions (how arguments
are passed to functions, how the return value is passed, how
system calls are made, etc.).
config BR2_ARM_EABI
bool "EABI"
help
The EABI is currently the standard ARM ABI, which is used in
most projects. It supports both the 'soft' floating point
model (in which floating point instructions are emulated in
software) and the 'softfp' floating point model (in which
floating point instructions are executed using an hardware
floating point unit, but floating point arguments to
functions are passed in integer registers).
The 'softfp' floating point model is link-compatible with
the 'soft' floating point model, i.e you can link a library
built 'soft' with some other code built 'softfp'.
However, passing the floating point arguments in integer
registers is a bit inefficient, so if your ARM processor has
a floating point unit, and you don't have pre-compiled
'soft' or 'softfp' code, using the EABIhf ABI will provide
better floating point performances.
If your processor does not have a floating point unit, then
you must use this ABI.
config BR2_ARM_EABIHF
bool "EABIhf"
depends on BR2_ARM_CPU_HAS_FPU
help
The EABIhf is an extension of EABI which supports the 'hard'
floating point model. This model uses the floating point
unit to execute floating point instructions, and passes
floating point arguments in floating point registers.
It is more efficient than EABI for floating point related
workload. However, it does not allow to link against code
that has been pre-built for the 'soft' or 'softfp' floating
point models.
If your processor has a floating point unit, and you don't
depend on existing pre-compiled code, this option is most
likely the best choice.
endchoice
choice
prompt "Floating point strategy"
default BR2_ARM_FPU_FP_ARMV8 if BR2_ARM_CPU_HAS_FP_ARMV8
default BR2_ARM_FPU_FPV5D16 if BR2_ARM_CPU_HAS_FPV5
default BR2_ARM_FPU_FPV4D16 if BR2_ARM_CPU_HAS_FPV4
default BR2_ARM_FPU_VFPV4D16 if BR2_ARM_CPU_HAS_VFPV4
default BR2_ARM_FPU_VFPV3D16 if BR2_ARM_CPU_HAS_VFPV3
default BR2_ARM_FPU_VFPV2 if BR2_ARM_CPU_HAS_VFPV2
default BR2_ARM_SOFT_FLOAT if !BR2_ARM_CPU_HAS_FPU
config BR2_ARM_SOFT_FLOAT
bool "Soft float"
depends on BR2_ARM_EABI
select BR2_SOFT_FLOAT
help
This option allows to use software emulated floating
point. It should be used for ARM cores that do not include a
Vector Floating Point unit, such as ARMv5 cores (ARM926 for
example) or certain ARMv6 cores.
config BR2_ARM_FPU_VFPV2
bool "VFPv2"
depends on BR2_ARM_CPU_HAS_VFPV2
help
This option allows to use the VFPv2 floating point unit, as
available in some ARMv5 processors (ARM926EJ-S) and some
ARMv6 processors (ARM1136JF-S, ARM1176JZF-S and ARM11
MPCore).
Note that this option is also safe to use for newer cores
such as Cortex-A, because the VFPv3 and VFPv4 units are
backward compatible with VFPv2.
config BR2_ARM_FPU_VFPV3
bool "VFPv3"
depends on BR2_ARM_CPU_HAS_VFPV3
help
This option allows to use the VFPv3 floating point unit, as
available in some ARMv7 processors (Cortex-A{8, 9}). This
option requires a VFPv3 unit that has 32 double-precision
registers, which is not necessarily the case in all SOCs
based on Cortex-A{8, 9}. If you're unsure, use VFPv3-D16
instead, which is guaranteed to work on all Cortex-A{8, 9}.
Note that this option is also safe to use for newer cores
that have a VFPv4 unit, because VFPv4 is backward compatible
with VFPv3. They must of course also have 32
double-precision registers.
config BR2_ARM_FPU_VFPV3D16
bool "VFPv3-D16"
depends on BR2_ARM_CPU_HAS_VFPV3
help
This option allows to use the VFPv3 floating point unit, as
available in some ARMv7 processors (Cortex-A{8, 9}). This
option requires a VFPv3 unit that has 16 double-precision
registers, which is generally the case in all SOCs based on
Cortex-A{8, 9}, even though VFPv3 is technically optional on
Cortex-A9. This is the safest option for those cores.
Note that this option is also safe to use for newer cores
such that have a VFPv4 unit, because the VFPv4 is backward
compatible with VFPv3.
config BR2_ARM_FPU_VFPV4
bool "VFPv4"
depends on BR2_ARM_CPU_HAS_VFPV4
help
This option allows to use the VFPv4 floating point unit, as
available in some ARMv7 processors (Cortex-A{5, 7, 12,
15}). This option requires a VFPv4 unit that has 32
double-precision registers, which is not necessarily the
case in all SOCs based on Cortex-A{5, 7, 12, 15}. If you're
unsure, you should probably use VFPv4-D16 instead.
Note that if you want binary code that works on all ARMv7
cores, including the earlier Cortex-A{8, 9}, you should
instead select VFPv3.
config BR2_ARM_FPU_VFPV4D16
bool "VFPv4-D16"
depends on BR2_ARM_CPU_HAS_VFPV4
help
This option allows to use the VFPv4 floating point unit, as
available in some ARMv7 processors (Cortex-A{5, 7, 12,
15}). This option requires a VFPv4 unit that has 16
double-precision registers, which is always available on
Cortex-A12 and Cortex-A15, but optional on Cortex-A5 and
Cortex-A7.
Note that if you want binary code that works on all ARMv7
cores, including the earlier Cortex-A{8, 9}, you should
instead select VFPv3-D16.
config BR2_ARM_FPU_NEON
bool "NEON"
depends on BR2_ARM_CPU_HAS_NEON
help
This option allows to use the NEON SIMD unit, as available
in some ARMv7 processors, as a floating-point unit. It
should however be noted that using NEON for floating point
operations doesn't provide a complete compatibility with the
IEEE 754.
config BR2_ARM_FPU_NEON_VFPV4
bool "NEON/VFPv4"
depends on BR2_ARM_CPU_HAS_VFPV4
depends on BR2_ARM_CPU_HAS_NEON
help
This option allows to use both the VFPv4 and the NEON SIMD
units for floating point operations. Note that some ARMv7
cores do not necessarily have VFPv4 and/or NEON support, for
example on Cortex-A5 and Cortex-A7, support for VFPv4 and
NEON is optional.
config BR2_ARM_FPU_FPV4D16
bool "FPv4-D16"
depends on BR2_ARM_CPU_HAS_FPV4
help
This option allows to use the FPv4-SP (single precision)
floating point unit, as available in some ARMv7m processors
(Cortex-M4).
config BR2_ARM_FPU_FPV5D16
bool "FPv5-D16"
depends on BR2_ARM_CPU_HAS_FPV5
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
help
This option allows to use the FPv5-SP (single precision)
floating point unit, as available in some ARMv7m processors
(Cortex-M7).
Note that if you want binary code that works on the earlier
Cortex-M4, you should instead select FPv4-D16.
config BR2_ARM_FPU_FPV5DPD16
bool "FPv5-DP-D16"
depends on BR2_ARM_CPU_HAS_FPV5
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
help
This option allows to use the FPv5-DP (double precision)
floating point unit, as available in some ARMv7m processors
(Cortex-M7).
Note that if you want binary code that works on the earlier
Cortex-M4, you should instead select FPv4-D16.
config BR2_ARM_FPU_FP_ARMV8
bool "FP-ARMv8"
depends on BR2_ARM_CPU_HAS_FP_ARMV8
help
This option allows to use the ARMv8 floating point unit.
config BR2_ARM_FPU_NEON_FP_ARMV8
bool "NEON/FP-ARMv8"
depends on BR2_ARM_CPU_HAS_FP_ARMV8
depends on BR2_ARM_CPU_HAS_NEON
help
This option allows to use both the ARMv8 floating point unit
and the NEON SIMD unit for floating point operations.
endchoice
choice
prompt "ARM instruction set"
depends on BR2_arm || BR2_armeb
config BR2_ARM_INSTRUCTIONS_ARM
bool "ARM"
depends on BR2_ARM_CPU_HAS_ARM
help
This option instructs the compiler to generate regular ARM
instructions, that are all 32 bits wide.
config BR2_ARM_INSTRUCTIONS_THUMB
bool "Thumb"
depends on BR2_ARM_CPU_HAS_THUMB
# Thumb-1 and VFP are not compatible
depends on BR2_ARM_SOFT_FLOAT
help
This option instructions the compiler to generate Thumb
instructions, which allows to mix 16 bits instructions and
32 bits instructions. This generally provides a much smaller
compiled binary size.
comment "Thumb1 is not compatible with VFP"
depends on BR2_ARM_CPU_HAS_THUMB
depends on !BR2_ARM_SOFT_FLOAT
config BR2_ARM_INSTRUCTIONS_THUMB2
bool "Thumb2"
depends on BR2_ARM_CPU_HAS_THUMB2
help
This option instructions the compiler to generate Thumb2
instructions, which allows to mix 16 bits instructions and
32 bits instructions. This generally provides a much smaller
compiled binary size.
endchoice
choice
prompt "MMU Page Size"
default BR2_ARM64_PAGE_SIZE_4K
depends on BR2_aarch64 || BR2_aarch64_be
help
The default is 4KB, and you should probably keep this unless
you know what you are doing. In particular, the kernel
configuration must match this choice. If your kernel is
built by Buildroot, the kernel configuration is
automatically adjusted, but not if you built your kernel
outside of Buildroot.
config BR2_ARM64_PAGE_SIZE_4K
bool "4KB"
config BR2_ARM64_PAGE_SIZE_64K
bool "64KB"
endchoice
config BR2_ARM64_PAGE_SIZE
string
default "4K" if BR2_ARM64_PAGE_SIZE_4K
default "64K" if BR2_ARM64_PAGE_SIZE_64K
config BR2_ARCH
default "arm" if BR2_arm
default "armeb" if BR2_armeb
default "aarch64" if BR2_aarch64
default "aarch64_be" if BR2_aarch64_be
config BR2_NORMALIZED_ARCH
default "arm" if BR2_arm || BR2_armeb
default "arm64" if BR2_aarch64 || BR2_aarch64_be
config BR2_ENDIAN
default "LITTLE" if (BR2_arm || BR2_aarch64)
default "BIG" if (BR2_armeb || BR2_aarch64_be)
config BR2_GCC_TARGET_CPU
# armv4
default "arm920t" if BR2_arm920t
default "arm922t" if BR2_arm922t
default "fa526" if BR2_fa526
default "strongarm" if BR2_strongarm
# armv5
default "arm926ej-s" if BR2_arm926t
default "xscale" if BR2_xscale
# armv6
default "arm1136j-s" if BR2_arm1136j_s
default "arm1136jf-s" if BR2_arm1136jf_s
default "arm1176jz-s" if BR2_arm1176jz_s
default "arm1176jzf-s" if BR2_arm1176jzf_s
default "mpcore" if BR2_arm11mpcore && BR2_ARM_CPU_HAS_VFPV2
default "mpcorenovfp" if BR2_arm11mpcore
# armv7a
default "cortex-a5" if BR2_cortex_a5
default "cortex-a7" if BR2_cortex_a7
default "cortex-a8" if BR2_cortex_a8
default "cortex-a9" if BR2_cortex_a9
default "cortex-a12" if BR2_cortex_a12
default "cortex-a15" if BR2_cortex_a15
default "cortex-a15.cortex-a7" if BR2_cortex_a15_a7
default "cortex-a17" if BR2_cortex_a17
default "cortex-a17.cortex-a7" if BR2_cortex_a17_a7
default "marvell-pj4" if BR2_pj4
# armv7m
default "cortex-m3" if BR2_cortex_m3
default "cortex-m4" if BR2_cortex_m4
default "cortex-m7" if BR2_cortex_m7
# armv8a
default "cortex-a32" if BR2_cortex_a32
default "cortex-a35" if BR2_cortex_a35
default "cortex-a53" if BR2_cortex_a53
default "cortex-a57" if BR2_cortex_a57
default "cortex-a57.cortex-a53" if BR2_cortex_a57_a53
default "cortex-a72" if BR2_cortex_a72
default "cortex-a72.cortex-a53" if BR2_cortex_a72_a53
default "cortex-a73" if BR2_cortex_a73
default "cortex-a73.cortex-a35" if BR2_cortex_a73_a35
default "cortex-a73.cortex-a53" if BR2_cortex_a73_a53
default "emag" if BR2_emag
default "exynos-m1" if BR2_exynos_m1
default "falkor" if BR2_falkor
default "phecda" if BR2_phecda
default "qdf24xx" if BR2_qdf24xx
default "thunderx" if BR2_thunderx && !BR2_TOOLCHAIN_GCC_AT_LEAST_9
default "octeontx" if BR2_thunderx && BR2_TOOLCHAIN_GCC_AT_LEAST_9
default "thunderxt81" if BR2_thunderxt81 && !BR2_TOOLCHAIN_GCC_AT_LEAST_9
default "octeontx81" if BR2_thunderxt81 && BR2_TOOLCHAIN_GCC_AT_LEAST_9
default "thunderxt83" if BR2_thunderxt83 && !BR2_TOOLCHAIN_GCC_AT_LEAST_9
default "octeontx83" if BR2_thunderxt83 && BR2_TOOLCHAIN_GCC_AT_LEAST_9
default "thunderxt88" if BR2_thunderxt88
default "thunderxt88p1" if BR2_thunderxt88p1
default "xgene1" if BR2_xgene1
# armv8.1a
default "thunderx2t99" if BR2_thunderx2t99
default "thunderx2t99p1" if BR2_thunderx2t99p1
default "vulcan" if BR2_vulcan
# armv8.2a
default "cortex-a55" if BR2_cortex_a55
default "cortex-a75" if BR2_cortex_a75
default "cortex-a75.cortex-a55" if BR2_cortex_a75_a55
default "cortex-a76" if BR2_cortex_a76
default "cortex-a76.cortex-a55" if BR2_cortex_a76_a55
default "neoverse-n1" if BR2_neoverse_n1
default "tsv110" if BR2_tsv110
# armv8.4a
default "saphira" if BR2_saphira
config BR2_GCC_TARGET_ABI
default "aapcs-linux" if BR2_arm || BR2_armeb
default "lp64" if BR2_aarch64 || BR2_aarch64_be
config BR2_GCC_TARGET_FPU
default "vfp" if BR2_ARM_FPU_VFPV2
default "vfpv3" if BR2_ARM_FPU_VFPV3
default "vfpv3-d16" if BR2_ARM_FPU_VFPV3D16
default "vfpv4" if BR2_ARM_FPU_VFPV4
default "vfpv4-d16" if BR2_ARM_FPU_VFPV4D16
default "neon" if BR2_ARM_FPU_NEON
default "neon-vfpv4" if BR2_ARM_FPU_NEON_VFPV4
default "fpv4-sp-d16" if BR2_ARM_FPU_FPV4D16
default "fpv5-sp-d16" if BR2_ARM_FPU_FPV5D16
default "fpv5-d16" if BR2_ARM_FPU_FPV5DPD16
default "fp-armv8" if BR2_ARM_FPU_FP_ARMV8
default "neon-fp-armv8" if BR2_ARM_FPU_NEON_FP_ARMV8
depends on BR2_arm || BR2_armeb
config BR2_GCC_TARGET_FLOAT_ABI
default "soft" if BR2_ARM_SOFT_FLOAT
default "softfp" if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABI
default "hard" if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABIHF
config BR2_GCC_TARGET_MODE
default "arm" if BR2_ARM_INSTRUCTIONS_ARM
default "thumb" if BR2_ARM_INSTRUCTIONS_THUMB || BR2_ARM_INSTRUCTIONS_THUMB2
config BR2_READELF_ARCH_NAME
default "ARM" if BR2_arm || BR2_armeb
default "AArch64" if BR2_aarch64 || BR2_aarch64_be
# vim: ft=kconfig
# -*- mode:kconfig; -*-

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config BR2_ARCH
default "m68k" if BR2_m68k
config BR2_NORMALIZED_ARCH
default "m68k"
config BR2_ENDIAN
default "BIG"
# symbols used to distinguish between m68k and coldfire
# for gcc multilib
config BR2_m68k_m68k
bool
config BR2_m68k_cf
bool
# coldfire variants will be added later
choice
prompt "Target CPU"
default BR2_m68k_68040
depends on BR2_m68k
help
Specific CPU variant to use
config BR2_m68k_68040
bool "68040"
select BR2_m68k_m68k
select BR2_USE_MMU
config BR2_m68k_cf5208
bool "5208"
select BR2_m68k_cf
select BR2_SOFT_FLOAT
endchoice
config BR2_GCC_TARGET_CPU
default "68040" if BR2_m68k_68040
default "5208" if BR2_m68k_cf5208
config BR2_READELF_ARCH_NAME
default "MC68000"
# vim: ft=kconfig
# -*- mode:kconfig; -*-

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config BR2_ARCH
default "microblazeel" if BR2_microblazeel
default "microblaze" if BR2_microblazebe
config BR2_NORMALIZED_ARCH
default "microblaze"
config BR2_ENDIAN
default "LITTLE" if BR2_microblazeel
default "BIG" if BR2_microblazebe
config BR2_READELF_ARCH_NAME
default "Xilinx MicroBlaze"
config BR2_microblaze
bool
default y if BR2_microblazeel || BR2_microblazebe
# vim: ft=kconfig
# -*- mode:kconfig; -*-

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# mips default CPU ISAs
config BR2_MIPS_CPU_MIPS32
bool
select BR2_MIPS_NAN_LEGACY
config BR2_MIPS_CPU_MIPS32R2
bool
select BR2_MIPS_NAN_LEGACY
config BR2_MIPS_CPU_MIPS32R3
bool
select BR2_MIPS_NAN_LEGACY
config BR2_MIPS_CPU_MIPS32R5
bool
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
config BR2_MIPS_CPU_MIPS32R6
bool
select BR2_MIPS_NAN_2008
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
config BR2_MIPS_CPU_MIPS64
bool
select BR2_MIPS_NAN_LEGACY
config BR2_MIPS_CPU_MIPS64R2
bool
select BR2_MIPS_NAN_LEGACY
config BR2_MIPS_CPU_MIPS64R3
bool
select BR2_MIPS_NAN_LEGACY
config BR2_MIPS_CPU_MIPS64R5
bool
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
config BR2_MIPS_CPU_MIPS64R6
bool
select BR2_MIPS_NAN_2008
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
choice
prompt "Target Architecture Variant"
default BR2_mips_32 if BR2_mips || BR2_mipsel
default BR2_mips_64 if BR2_mips64 || BR2_mips64el
depends on BR2_mips || BR2_mipsel || BR2_mips64 || BR2_mips64el
help
Specific CPU variant to use
64bit capable: 64, 64r2, 64r3, 64r5, 64r6
non-64bit capable: 32, 32r2, 32r3, 32r5, 32r6
config BR2_mips_32
bool "Generic MIPS32"
depends on !BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS32
config BR2_mips_32r2
bool "Generic MIPS32R2"
depends on !BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS32R2
config BR2_mips_32r3
bool "Generic MIPS32R3"
depends on !BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS32R3
config BR2_mips_32r5
bool "Generic MIPS32R5"
depends on !BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS32R5
config BR2_mips_32r6
bool "Generic MIPS32R6"
depends on !BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS32R6
config BR2_mips_interaptiv
bool "interAptiv"
depends on !BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS32R2
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
config BR2_mips_m5150
bool "M5150"
depends on !BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS32R5
select BR2_MIPS_NAN_2008
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
config BR2_mips_m6250
bool "M6250"
depends on !BR2_ARCH_IS_64
select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
select BR2_MIPS_CPU_MIPS32R6
config BR2_mips_p5600
bool "P5600"
depends on !BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS32R5
select BR2_MIPS_NAN_2008
config BR2_mips_xburst
bool "XBurst"
depends on !BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS32R2
help
The Ingenic XBurst is a MIPS32R2 microprocessor. It has a
bug in the FPU that can generate incorrect results in
certain cases. The problem shows up when you have several
fused madd instructions in sequence with dependant
operands. This requires the -mno-fused-madd compiler option
to be used in order to prevent emitting these instructions.
See http://www.ingenic.com/en/?xburst.html
config BR2_mips_64
bool "Generic MIPS64"
depends on BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS64
config BR2_mips_64r2
bool "Generic MIPS64R2"
depends on BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS64R2
config BR2_mips_64r3
bool "Generic MIPS64R3"
depends on BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS64R3
config BR2_mips_64r5
bool "Generic MIPS64R5"
depends on BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS64R5
config BR2_mips_64r6
bool "Generic MIPS64R6"
depends on BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS64R6
config BR2_mips_i6400
bool "I6400"
depends on BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS64R6
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
config BR2_mips_octeon2
bool "Octeon II"
depends on BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS64R2
help
Marvell (formerly Cavium Networks) Octeon II CN60XX
processors.
config BR2_mips_octeon3
bool "Octeon III"
depends on BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS64R3
help
Marvell (formerly Cavium Networks) Octeon III CN7XXX
processors.
config BR2_mips_p6600
bool "P6600"
depends on BR2_ARCH_IS_64
select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
select BR2_MIPS_CPU_MIPS64R6
endchoice
choice
prompt "Target ABI"
default BR2_MIPS_NABI32
depends on BR2_mips64 || BR2_mips64el
help
Application Binary Interface to use
config BR2_MIPS_NABI32
bool "n32"
depends on BR2_ARCH_IS_64
select BR2_KERNEL_64_USERLAND_32
config BR2_MIPS_NABI64
bool "n64"
depends on BR2_ARCH_IS_64
endchoice
config BR2_MIPS_SOFT_FLOAT
bool "Use soft-float"
default y
depends on !BR2_mips_octeon3 # hard-float only
select BR2_SOFT_FLOAT
help
If your target CPU does not have a Floating Point Unit (FPU)
or a kernel FPU emulator, but you still wish to support
floating point functions, then everything will need to be
compiled with soft floating point support (-msoft-float).
choice
prompt "FP mode"
default BR2_MIPS_FP32_MODE_XX
depends on !BR2_ARCH_IS_64 && !BR2_MIPS_SOFT_FLOAT
help
MIPS32 supports different FP modes (32,xx,64). Information
about FP modes can be found here:
https://sourceware.org/binutils/docs/as/MIPS-Options.html
https://dmz-portal.imgtec.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking#5._Generating_modeless_code
config BR2_MIPS_FP32_MODE_32
bool "32"
depends on !BR2_MIPS_CPU_MIPS32R6
config BR2_MIPS_FP32_MODE_XX
bool "xx"
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
config BR2_MIPS_FP32_MODE_64
bool "64"
depends on !BR2_MIPS_CPU_MIPS32
endchoice
config BR2_GCC_TARGET_FP32_MODE
default "32" if BR2_MIPS_FP32_MODE_32
default "xx" if BR2_MIPS_FP32_MODE_XX
default "64" if BR2_MIPS_FP32_MODE_64
config BR2_MIPS_NAN_LEGACY
bool
config BR2_MIPS_NAN_2008
bool
select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
choice
prompt "Target NaN"
default BR2_MIPS_ENABLE_NAN_2008
depends on BR2_mips_32r5 || BR2_mips_64r5
help
MIPS supports two different NaN encodings, legacy and 2008.
Information about MIPS NaN encodings can be found here:
https://sourceware.org/binutils/docs/as/MIPS-NaN-Encodings.html
config BR2_MIPS_ENABLE_NAN_LEGACY
bool "legacy"
select BR2_MIPS_NAN_LEGACY
config BR2_MIPS_ENABLE_NAN_2008
bool "2008"
depends on !BR2_MIPS_SOFT_FLOAT
select BR2_MIPS_NAN_2008
endchoice
config BR2_GCC_TARGET_NAN
default "legacy" if BR2_MIPS_NAN_LEGACY
default "2008" if BR2_MIPS_NAN_2008
config BR2_ARCH
default "mips" if BR2_mips
default "mipsel" if BR2_mipsel
default "mips64" if BR2_mips64
default "mips64el" if BR2_mips64el
config BR2_NORMALIZED_ARCH
default "mips"
config BR2_ENDIAN
default "LITTLE" if BR2_mipsel || BR2_mips64el
default "BIG" if BR2_mips || BR2_mips64
config BR2_GCC_TARGET_ARCH
default "mips32" if BR2_mips_32
default "mips32r2" if BR2_mips_32r2
default "mips32r3" if BR2_mips_32r3
default "mips32r5" if BR2_mips_32r5
default "mips32r6" if BR2_mips_32r6
default "interaptiv" if BR2_mips_interaptiv
default "m5101" if BR2_mips_m5150
default "m6201" if BR2_mips_m6250
default "p5600" if BR2_mips_p5600
default "mips32r2" if BR2_mips_xburst
default "mips64" if BR2_mips_64
default "mips64r2" if BR2_mips_64r2
default "mips64r3" if BR2_mips_64r3
default "mips64r5" if BR2_mips_64r5
default "mips64r6" if BR2_mips_64r6
default "i6400" if BR2_mips_i6400
default "octeon2" if BR2_mips_octeon2
default "octeon3" if BR2_mips_octeon3
default "p6600" if BR2_mips_p6600
config BR2_MIPS_OABI32
bool
default y if BR2_mips || BR2_mipsel
config BR2_GCC_TARGET_ABI
default "32" if BR2_MIPS_OABI32
default "n32" if BR2_MIPS_NABI32
default "64" if BR2_MIPS_NABI64
config BR2_READELF_ARCH_NAME
default "MIPS R3000"
# vim: ft=kconfig
# -*- mode:kconfig; -*-

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config BR2_ARCH
default "nios2"
config BR2_NORMALIZED_ARCH
default "nios2"
config BR2_ENDIAN
default "LITTLE"
config BR2_READELF_ARCH_NAME
default "Altera Nios II"
# vim: ft=kconfig
# -*- mode:kconfig; -*-

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config BR2_ARCH
default "or1k"
config BR2_NORMALIZED_ARCH
default "openrisc"
config BR2_ENDIAN
default "BIG"
config BR2_READELF_ARCH_NAME
default "OpenRISC 1000"
# vim: ft=kconfig
# -*- mode:kconfig; -*-

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config BR2_POWERPC_CPU_HAS_ALTIVEC
bool
config BR2_POWERPC_CPU_HAS_VSX
bool
select BR2_POWERPC_CPU_HAS_ALTIVEC
config BR2_POWERPC_CPU_HAS_SPE
bool
choice
prompt "Target Architecture Variant"
default BR2_generic_powerpc
help
Specific CPU variant to use
config BR2_generic_powerpc
bool "generic"
# No C library supports this variant on ppc64le
depends on BR2_powerpc || BR2_powerpc64
config BR2_powerpc_401
bool "401"
depends on BR2_powerpc
config BR2_powerpc_403
bool "403"
depends on BR2_powerpc
config BR2_powerpc_405
bool "405"
depends on BR2_powerpc
config BR2_powerpc_405fp
bool "405 with FPU"
depends on BR2_powerpc
config BR2_powerpc_440
bool "440"
depends on BR2_powerpc
config BR2_powerpc_440fp
bool "440 with FPU"
depends on BR2_powerpc
config BR2_powerpc_464
bool "464"
depends on BR2_powerpc
config BR2_powerpc_464fp
bool "464 with FPU"
depends on BR2_powerpc
config BR2_powerpc_476
bool "476"
depends on BR2_powerpc
config BR2_powerpc_476fp
bool "476 with FPU"
depends on BR2_powerpc
config BR2_powerpc_505
bool "505"
depends on BR2_powerpc
config BR2_powerpc_602
bool "602"
depends on BR2_powerpc
config BR2_powerpc_603
bool "603"
depends on BR2_powerpc
config BR2_powerpc_603e
bool "603e"
depends on BR2_powerpc
config BR2_powerpc_604
bool "604"
depends on BR2_powerpc
config BR2_powerpc_604e
bool "604e"
depends on BR2_powerpc
config BR2_powerpc_620
bool "620"
depends on BR2_powerpc || BR2_powerpc64
config BR2_powerpc_630
bool "630"
depends on BR2_powerpc || BR2_powerpc64
config BR2_powerpc_740
bool "740"
depends on BR2_powerpc
config BR2_powerpc_7400
bool "7400"
depends on BR2_powerpc
select BR2_POWERPC_CPU_HAS_ALTIVEC
config BR2_powerpc_7450
bool "7450"
depends on BR2_powerpc
select BR2_POWERPC_CPU_HAS_ALTIVEC
config BR2_powerpc_750
bool "750"
depends on BR2_powerpc
config BR2_powerpc_821
bool "821"
depends on BR2_powerpc
config BR2_powerpc_823
bool "823"
depends on BR2_powerpc
config BR2_powerpc_860
bool "860"
depends on BR2_powerpc
config BR2_powerpc_970
bool "970"
depends on BR2_powerpc || BR2_powerpc64
select BR2_POWERPC_CPU_HAS_ALTIVEC
config BR2_powerpc_8540
bool "8540 / e500v1"
depends on BR2_powerpc
select BR2_POWERPC_CPU_HAS_SPE
config BR2_powerpc_8548
bool "8548 / e500v2"
depends on BR2_powerpc
select BR2_POWERPC_CPU_HAS_SPE
config BR2_powerpc_e300c2
bool "e300c2"
depends on BR2_powerpc
config BR2_powerpc_e300c3
bool "e300c3"
depends on BR2_powerpc
config BR2_powerpc_e500mc
bool "e500mc"
depends on BR2_powerpc
config BR2_powerpc_e5500
bool "e5500"
depends on BR2_powerpc || BR2_powerpc64
config BR2_powerpc_e6500
bool "e6500"
depends on BR2_powerpc || BR2_powerpc64
select BR2_POWERPC_CPU_HAS_ALTIVEC
config BR2_powerpc_power4
bool "power4"
depends on BR2_powerpc || BR2_powerpc64
config BR2_powerpc_power5
bool "power5"
depends on BR2_powerpc || BR2_powerpc64
config BR2_powerpc_power6
bool "power6"
depends on BR2_powerpc || BR2_powerpc64
select BR2_POWERPC_CPU_HAS_ALTIVEC
config BR2_powerpc_power7
bool "power7"
depends on BR2_powerpc || BR2_powerpc64
select BR2_POWERPC_CPU_HAS_VSX
config BR2_powerpc_power8
bool "power8"
select BR2_POWERPC_CPU_HAS_VSX
config BR2_powerpc_power9
bool "power9"
select BR2_POWERPC_CPU_HAS_ALTIVEC
select BR2_POWERPC_CPU_HAS_VSX
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
endchoice
choice
prompt "Target ABI"
default BR2_powerpc_SPE if BR2_POWERPC_CPU_HAS_SPE
default BR2_powerpc_CLASSIC
help
Application Binary Interface to use
config BR2_powerpc_CLASSIC
bool "Classic"
depends on !BR2_POWERPC_CPU_HAS_SPE
config BR2_powerpc_SPE
bool "SPE"
depends on BR2_POWERPC_CPU_HAS_SPE
endchoice
config BR2_POWERPC_SOFT_FLOAT
bool "Use soft-float"
select BR2_SOFT_FLOAT
help
If your target CPU does not have a Floating Point Unit (FPU)
or a kernel FPU emulator, but you still wish to support
floating point functions, then everything will need to be
compiled with soft floating point support (-msoft-float).
config BR2_ARCH
default "powerpc" if BR2_powerpc
default "powerpc64" if BR2_powerpc64
default "powerpc64le" if BR2_powerpc64le
config BR2_NORMALIZED_ARCH
default "powerpc"
config BR2_ENDIAN
default "BIG" if BR2_powerpc || BR2_powerpc64
default "LITTLE" if BR2_powerpc64le
config BR2_GCC_TARGET_CPU
default "401" if BR2_powerpc_401
default "403" if BR2_powerpc_403
default "405" if BR2_powerpc_405
default "405fp" if BR2_powerpc_405fp
default "440" if BR2_powerpc_440
default "440fp" if BR2_powerpc_440fp
default "464" if BR2_powerpc_464
default "464fp" if BR2_powerpc_464fp
default "476" if BR2_powerpc_476
default "476fp" if BR2_powerpc_476fp
default "505" if BR2_powerpc_505
default "602" if BR2_powerpc_602
default "603" if BR2_powerpc_603
default "603e" if BR2_powerpc_603e
default "604" if BR2_powerpc_604
default "604e" if BR2_powerpc_604e
default "620" if BR2_powerpc_620
default "630" if BR2_powerpc_630
default "740" if BR2_powerpc_740
default "7400" if BR2_powerpc_7400
default "7450" if BR2_powerpc_7450
default "750" if BR2_powerpc_750
default "821" if BR2_powerpc_821
default "823" if BR2_powerpc_823
default "860" if BR2_powerpc_860
default "970" if BR2_powerpc_970
default "8540" if BR2_powerpc_8540
default "8548" if BR2_powerpc_8548
default "e300c2" if BR2_powerpc_e300c2
default "e300c3" if BR2_powerpc_e300c3
default "e500mc" if BR2_powerpc_e500mc
default "e5500" if BR2_powerpc_e5500
default "e6500" if BR2_powerpc_e6500
default "power4" if BR2_powerpc_power4
default "power5" if BR2_powerpc_power5
default "power6" if BR2_powerpc_power6
default "power7" if BR2_powerpc_power7
default "power8" if BR2_powerpc_power8
default "power9" if BR2_powerpc_power9
config BR2_READELF_ARCH_NAME
default "PowerPC" if BR2_powerpc
default "PowerPC64" if BR2_powerpc64 || BR2_powerpc64le
# vim: ft=kconfig
# -*- mode:kconfig; -*-

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# RISC-V CPU ISA extensions.
config BR2_RISCV_ISA_RVI
bool
config BR2_RISCV_ISA_RVM
bool
config BR2_RISCV_ISA_RVA
bool
config BR2_RISCV_ISA_RVF
bool
config BR2_RISCV_ISA_RVD
bool
config BR2_RISCV_ISA_RVC
bool
choice
prompt "Target Architecture Variant"
default BR2_riscv_g
config BR2_riscv_g
bool "General purpose (G)"
select BR2_RISCV_ISA_RVI
select BR2_RISCV_ISA_RVM
select BR2_RISCV_ISA_RVA
select BR2_RISCV_ISA_RVF
select BR2_RISCV_ISA_RVD
help
General purpose (G) is equivalent to IMAFD.
config BR2_riscv_custom
bool "Custom architecture"
select BR2_RISCV_ISA_RVI
select BR2_RISCV_ISA_CUSTOM_RVA
endchoice
if BR2_riscv_custom
comment "Instruction Set Extensions"
config BR2_RISCV_ISA_CUSTOM_RVM
bool "Integer Multiplication and Division (M)"
select BR2_RISCV_ISA_RVM
config BR2_RISCV_ISA_CUSTOM_RVA
bool "Atomic Instructions (A)"
select BR2_RISCV_ISA_RVA
config BR2_RISCV_ISA_CUSTOM_RVF
bool "Single-precision Floating-point (F)"
select BR2_RISCV_ISA_RVF
config BR2_RISCV_ISA_CUSTOM_RVD
bool "Double-precision Floating-point (D)"
depends on BR2_RISCV_ISA_RVF
select BR2_RISCV_ISA_RVD
config BR2_RISCV_ISA_CUSTOM_RVC
bool "Compressed Instructions (C)"
select BR2_RISCV_ISA_RVC
endif
choice
prompt "Target Architecture Size"
default BR2_RISCV_64
config BR2_RISCV_32
bool "32-bit"
select BR2_USE_MMU
config BR2_RISCV_64
bool "64-bit"
select BR2_ARCH_IS_64
endchoice
config BR2_RISCV_USE_MMU
bool "MMU support"
default y
depends on BR2_RISCV_64
select BR2_USE_MMU
help
Enable this option if your RISC-V core has a MMU (Memory
Management Unit).
choice
prompt "Target ABI"
default BR2_RISCV_ABI_ILP32D if !BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVD
default BR2_RISCV_ABI_ILP32F if !BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVF
default BR2_RISCV_ABI_ILP32 if !BR2_ARCH_IS_64
default BR2_RISCV_ABI_LP64D if BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVD
default BR2_RISCV_ABI_LP64F if BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVF
default BR2_RISCV_ABI_LP64 if BR2_ARCH_IS_64
config BR2_RISCV_ABI_ILP32
bool "ilp32"
depends on !BR2_ARCH_IS_64
config BR2_RISCV_ABI_ILP32F
bool "ilp32f"
depends on !BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVF
config BR2_RISCV_ABI_ILP32D
bool "ilp32d"
depends on !BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVD
config BR2_RISCV_ABI_LP64
bool "lp64"
depends on BR2_ARCH_IS_64
config BR2_RISCV_ABI_LP64F
bool "lp64f"
depends on BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVF
depends on BR2_USE_MMU
config BR2_RISCV_ABI_LP64D
bool "lp64d"
depends on BR2_ARCH_IS_64 && BR2_RISCV_ISA_RVD
endchoice
config BR2_ARCH
default "riscv32" if !BR2_ARCH_IS_64
default "riscv64" if BR2_ARCH_IS_64
config BR2_NORMALIZED_ARCH
default "riscv"
config BR2_ENDIAN
default "LITTLE"
config BR2_GCC_TARGET_ABI
default "ilp32" if BR2_RISCV_ABI_ILP32
default "ilp32f" if BR2_RISCV_ABI_ILP32F
default "ilp32d" if BR2_RISCV_ABI_ILP32D
default "lp64" if BR2_RISCV_ABI_LP64
default "lp64f" if BR2_RISCV_ABI_LP64F
default "lp64d" if BR2_RISCV_ABI_LP64D
config BR2_READELF_ARCH_NAME
default "RISC-V"
# vim: ft=kconfig
# -*- mode:kconfig; -*-

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choice
prompt "Target Architecture Variant"
help
Specific CPU variant to use
config BR2_s390x_z13
bool "z13"
config BR2_s390x_z14
bool "z14"
config BR2_s390x_z15
bool "z15"
endchoice
config BR2_ARCH
default "s390x" if BR2_s390x
config BR2_NORMALIZED_ARCH
default "s390"
config BR2_ENDIAN
default "BIG"
config BR2_GCC_TARGET_ARCH
default "arch11" if BR2_s390x_z13
default "arch12" if BR2_s390x_z14
default "arch13" if BR2_s390x_z15
config BR2_READELF_ARCH_NAME
default "IBM S/390" if BR2_s390x

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choice
prompt "Target Architecture Variant"
default BR2_sh4
depends on BR2_sh
help
Specific CPU variant to use
config BR2_sh4
bool "sh4 (SH4 little endian)"
config BR2_sh4eb
bool "sh4eb (SH4 big endian)"
config BR2_sh4a
bool "sh4a (SH4A little endian)"
config BR2_sh4aeb
bool "sh4aeb (SH4A big endian)"
endchoice
config BR2_ARCH
default "sh4" if BR2_sh4
default "sh4eb" if BR2_sh4eb
default "sh4a" if BR2_sh4a
default "sh4aeb" if BR2_sh4aeb
config BR2_NORMALIZED_ARCH
default "sh"
config BR2_ENDIAN
default "LITTLE" if BR2_sh4 || BR2_sh4a
default "BIG" if BR2_sh4eb || BR2_sh4aeb
config BR2_READELF_ARCH_NAME
default "Renesas / SuperH SH"
# vim: ft=kconfig
# -*- mode:kconfig; -*-

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choice
prompt "Target Architecture Variant"
default BR2_sparc_v8 if BR2_sparc
default BR2_sparc_v9 if BR2_sparc64
depends on BR2_sparc || BR2_sparc64
help
Specific CPU variant to use
config BR2_sparc_v8
bool "v8"
depends on BR2_sparc
config BR2_sparc_leon3
bool "leon3"
depends on BR2_sparc
config BR2_sparc_v9
bool "v9"
depends on BR2_sparc64
endchoice
config BR2_ARCH
default "sparc" if BR2_sparc
default "sparc64" if BR2_sparc64
config BR2_NORMALIZED_ARCH
default "sparc" if BR2_sparc
default "sparc64" if BR2_sparc64
config BR2_ENDIAN
default "BIG"
config BR2_GCC_TARGET_CPU
default "leon3" if BR2_sparc_leon3
default "v8" if BR2_sparc_v8
default "ultrasparc" if BR2_sparc_v9
config BR2_READELF_ARCH_NAME
default "Sparc" if BR2_sparc
default "Sparc v9" if BR2_sparc64
# vim: ft=kconfig
# -*- mode:kconfig; -*-

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# i386/x86_64 cpu features
config BR2_X86_CPU_HAS_MMX
bool
config BR2_X86_CPU_HAS_3DNOW
bool
config BR2_X86_CPU_HAS_SSE
bool
config BR2_X86_CPU_HAS_SSE2
bool
config BR2_X86_CPU_HAS_SSE3
bool
config BR2_X86_CPU_HAS_SSSE3
bool
config BR2_X86_CPU_HAS_SSE4
bool
config BR2_X86_CPU_HAS_SSE42
bool
config BR2_X86_CPU_HAS_AVX
bool
config BR2_X86_CPU_HAS_AVX2
bool
config BR2_X86_CPU_HAS_AVX512
bool
# This list of CPU architecture variant is (loosely) ordered according
# to the gcc documentation at
# https://gcc.gnu.org/onlinedocs/gcc-11.2.0/gcc/x86-Options.html
choice
prompt "Target Architecture Variant"
default BR2_x86_i586 if BR2_i386
depends on BR2_i386 || BR2_x86_64
help
Specific CPU variant to use
config BR2_x86_i486
bool "i486"
depends on !BR2_x86_64
config BR2_x86_i586
bool "i586"
depends on !BR2_x86_64
config BR2_x86_x1000
bool "x1000"
depends on !BR2_x86_64
help
The Intel X1000 is a Pentium class microprocessor in the
Quark (sub-Atom) Product Line. The X1000 has a bug on the
lock prefix requiring that prefix must be stripped at build
time.
See https://en.wikipedia.org/wiki/Intel_Quark
config BR2_x86_i686
bool "i686"
depends on !BR2_x86_64
config BR2_x86_pentiumpro
bool "pentium pro"
depends on !BR2_x86_64
config BR2_x86_pentium_mmx
bool "pentium MMX"
depends on !BR2_x86_64
select BR2_X86_CPU_HAS_MMX
config BR2_x86_pentium_m
bool "pentium mobile"
depends on !BR2_x86_64
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
config BR2_x86_pentium2
bool "pentium2"
depends on !BR2_x86_64
select BR2_X86_CPU_HAS_MMX
config BR2_x86_pentium3
bool "pentium3"
depends on !BR2_x86_64
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
config BR2_x86_pentium4
bool "pentium4"
depends on !BR2_x86_64
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
config BR2_x86_prescott
bool "prescott"
depends on !BR2_x86_64
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
config BR2_x86_x86_64
bool "x86-64"
depends on BR2_x86_64
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
help
This option corresponds to -march=x86-64, documented as a
"Generic CPU with 64-bit extensions" by the GCC
documentation. It is a 64-bit CPU with MMX, SSE and SSE2
support.
config BR2_x86_x86_64_v2
bool "x86-64-v2"
depends on BR2_x86_64
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
select BR2_X86_CPU_HAS_SSE4
select BR2_X86_CPU_HAS_SSE42
select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
help
This option corresponds to the x86-64-v2 micro-architecture
level, as defined by the x86-64 psABI document, see
https://gitlab.com/x86-psABIs/x86-64-ABI/-/blob/master/x86-64-ABI/low-level-sys-info.tex.
It is close to the Nehalem CPU architecture, and is
applicable for CPUs that support CMPXCHG16B, LAHF-SAHF,
POPCNT, SSE3, SSE4.1, SSE4.2, SSSE3.
config BR2_x86_x86_64_v3
bool "x86-64-v3"
depends on BR2_x86_64
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
select BR2_X86_CPU_HAS_SSE4
select BR2_X86_CPU_HAS_SSE42
select BR2_X86_CPU_HAS_AVX
select BR2_X86_CPU_HAS_AVX2
select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
help
This option corresponds to the x86-64-v3 micro-architecture
level, as defined by the x86-64 psABI document, see
https://gitlab.com/x86-psABIs/x86-64-ABI/-/blob/master/x86-64-ABI/low-level-sys-info.tex.
It is close to the Haswell CPU architecture, and is
applicable for CPUs that support all of x86-64-v2 plus AVX,
AVX2, BMI1, BMI2, F16C, FMA, LZCNT, MOVBE, XSAVE.
config BR2_x86_x86_64_v4
bool "x86-64-v4"
depends on BR2_x86_64
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
select BR2_X86_CPU_HAS_SSE4
select BR2_X86_CPU_HAS_SSE42
select BR2_X86_CPU_HAS_AVX
select BR2_X86_CPU_HAS_AVX2
select BR2_X86_CPU_HAS_AVX512
select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
help
This option corresponds to the x86-64-v4 micro-architecture
level, as defined by the x86-64 psABI document, see
https://gitlab.com/x86-psABIs/x86-64-ABI/-/blob/master/x86-64-ABI/low-level-sys-info.tex.
It is applicable for CPUs that support all of x86-64-v3 plus
AVX512F, AVX512BW, AVX512CD, AVX512DQ, AVX512VL.
config BR2_x86_nocona
bool "nocona"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
config BR2_x86_core2
bool "core2"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
config BR2_x86_corei7
bool "corei7"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
select BR2_X86_CPU_HAS_SSE4
select BR2_X86_CPU_HAS_SSE42
help
This option is deprecated. Since gcc 4.9, the gcc option
"nehalem" is preferred. Use BR2_x86_nehalem instead.
config BR2_x86_nehalem
bool "nehalem"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
select BR2_X86_CPU_HAS_SSE4
select BR2_X86_CPU_HAS_SSE42
select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
config BR2_x86_westmere
bool "westmere"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
select BR2_X86_CPU_HAS_SSE4
select BR2_X86_CPU_HAS_SSE42
select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
config BR2_x86_corei7_avx
bool "corei7-avx"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
select BR2_X86_CPU_HAS_SSE4
select BR2_X86_CPU_HAS_SSE42
select BR2_X86_CPU_HAS_AVX
help
This option is deprecated. Since gcc 4.9, the gcc option
"sandybridge" is preferred. Use BR2_x86_sandybridge instead.
config BR2_x86_sandybridge
bool "sandybridge"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
select BR2_X86_CPU_HAS_SSE4
select BR2_X86_CPU_HAS_SSE42
select BR2_X86_CPU_HAS_AVX
select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
config BR2_x86_core_avx2
bool "core-avx2"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
select BR2_X86_CPU_HAS_SSE4
select BR2_X86_CPU_HAS_SSE42
select BR2_X86_CPU_HAS_AVX
select BR2_X86_CPU_HAS_AVX2
help
This option is deprecated. Since gcc 4.9, the gcc option
"haswell" is preferred. Use BR2_x86_haswell instead.
config BR2_x86_haswell
bool "haswell"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
select BR2_X86_CPU_HAS_SSE4
select BR2_X86_CPU_HAS_SSE42
select BR2_X86_CPU_HAS_AVX
select BR2_X86_CPU_HAS_AVX2
select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
config BR2_x86_broadwell
bool "broadwell"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
select BR2_X86_CPU_HAS_SSE4
select BR2_X86_CPU_HAS_SSE42
select BR2_X86_CPU_HAS_AVX
select BR2_X86_CPU_HAS_AVX2
select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
config BR2_x86_skylake
bool "skylake"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
select BR2_X86_CPU_HAS_SSE4
select BR2_X86_CPU_HAS_SSE42
select BR2_X86_CPU_HAS_AVX
select BR2_X86_CPU_HAS_AVX2
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
config BR2_x86_atom
bool "atom"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
help
This option is deprecated. Since gcc 4.9, the gcc option
"bonnell" is preferred. Use BR2_x86_bonnell instead.
config BR2_x86_bonnell
bool "bonnell"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
config BR2_x86_silvermont
bool "silvermont"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
select BR2_X86_CPU_HAS_SSE4
select BR2_X86_CPU_HAS_SSE42
select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
config BR2_x86_goldmont
bool "goldmont"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
select BR2_X86_CPU_HAS_SSE4
select BR2_X86_CPU_HAS_SSE42
select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
config BR2_x86_goldmont_plus
bool "goldmont-plus"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
select BR2_X86_CPU_HAS_SSE4
select BR2_X86_CPU_HAS_SSE42
select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
config BR2_x86_tremont
bool "tremont"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
select BR2_X86_CPU_HAS_SSE4
select BR2_X86_CPU_HAS_SSE42
select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
config BR2_x86_skylake_avx512
bool "skylake-avx512"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
select BR2_X86_CPU_HAS_SSE4
select BR2_X86_CPU_HAS_SSE42
select BR2_X86_CPU_HAS_AVX
select BR2_X86_CPU_HAS_AVX2
select BR2_X86_CPU_HAS_AVX512
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
config BR2_x86_cannonlake
bool "cannonlake"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
select BR2_X86_CPU_HAS_SSE4
select BR2_X86_CPU_HAS_SSE42
select BR2_X86_CPU_HAS_AVX
select BR2_X86_CPU_HAS_AVX2
select BR2_X86_CPU_HAS_AVX512
select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
config BR2_x86_icelake_client
bool "icelake-client"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
select BR2_X86_CPU_HAS_SSE4
select BR2_X86_CPU_HAS_SSE42
select BR2_X86_CPU_HAS_AVX
select BR2_X86_CPU_HAS_AVX2
select BR2_X86_CPU_HAS_AVX512
select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
config BR2_x86_icelake_server
bool "icelake-server"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
select BR2_X86_CPU_HAS_SSE4
select BR2_X86_CPU_HAS_SSE42
select BR2_X86_CPU_HAS_AVX
select BR2_X86_CPU_HAS_AVX2
select BR2_X86_CPU_HAS_AVX512
select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
config BR2_x86_cascadelake
bool "cascadelake"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
select BR2_X86_CPU_HAS_SSE4
select BR2_X86_CPU_HAS_SSE42
select BR2_X86_CPU_HAS_AVX
select BR2_X86_CPU_HAS_AVX2
select BR2_X86_CPU_HAS_AVX512
select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
config BR2_x86_cooperlake
bool "cooperlake"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
select BR2_X86_CPU_HAS_SSE4
select BR2_X86_CPU_HAS_SSE42
select BR2_X86_CPU_HAS_AVX
select BR2_X86_CPU_HAS_AVX2
select BR2_X86_CPU_HAS_AVX512
select BR2_ARCH_NEEDS_GCC_AT_LEAST_10
config BR2_x86_tigerlake
bool "tigerlake"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
select BR2_X86_CPU_HAS_SSE4
select BR2_X86_CPU_HAS_SSE42
select BR2_X86_CPU_HAS_AVX
select BR2_X86_CPU_HAS_AVX2
select BR2_X86_CPU_HAS_AVX512
select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
config BR2_x86_sapphirerapids
bool "sapphirerapids"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
select BR2_X86_CPU_HAS_SSE4
select BR2_X86_CPU_HAS_SSE42
select BR2_X86_CPU_HAS_AVX
select BR2_X86_CPU_HAS_AVX2
select BR2_X86_CPU_HAS_AVX512
select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
config BR2_x86_alderlake
bool "alderlake"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
select BR2_X86_CPU_HAS_SSE4
select BR2_X86_CPU_HAS_SSE42
select BR2_X86_CPU_HAS_AVX
select BR2_X86_CPU_HAS_AVX2
select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
config BR2_x86_rocketlake
bool "rocketlake"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
select BR2_X86_CPU_HAS_SSE4
select BR2_X86_CPU_HAS_SSE42
select BR2_X86_CPU_HAS_AVX
select BR2_X86_CPU_HAS_AVX2
select BR2_X86_CPU_HAS_AVX512
select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
config BR2_x86_k6
bool "k6"
depends on !BR2_x86_64
select BR2_X86_CPU_HAS_MMX
config BR2_x86_k6_2
bool "k6-2"
depends on !BR2_x86_64
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_3DNOW
config BR2_x86_athlon
bool "athlon"
depends on !BR2_x86_64
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_3DNOW
config BR2_x86_athlon_4
bool "athlon-4"
depends on !BR2_x86_64
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_3DNOW
config BR2_x86_opteron
bool "opteron"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
config BR2_x86_opteron_sse3
bool "opteron w/ SSE3"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
config BR2_x86_barcelona
bool "barcelona"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
config BR2_x86_jaguar
bool "jaguar"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
select BR2_X86_CPU_HAS_SSE4
select BR2_X86_CPU_HAS_SSE42
config BR2_x86_steamroller
bool "steamroller"
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
select BR2_X86_CPU_HAS_SSE2
select BR2_X86_CPU_HAS_SSE3
select BR2_X86_CPU_HAS_SSSE3
select BR2_X86_CPU_HAS_SSE4
select BR2_X86_CPU_HAS_SSE42
config BR2_x86_geode
bool "geode"
# Don't include MMX support because there several variant of geode
# processor, some with MMX support, some without.
# See: http://en.wikipedia.org/wiki/Geode_%28processor%29
depends on !BR2_x86_64
config BR2_x86_c3
bool "Via/Cyrix C3 (Samuel/Ezra cores)"
depends on !BR2_x86_64
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_3DNOW
config BR2_x86_c32
bool "Via C3-2 (Nehemiah cores)"
depends on !BR2_x86_64
select BR2_X86_CPU_HAS_MMX
select BR2_X86_CPU_HAS_SSE
config BR2_x86_winchip_c6
bool "IDT Winchip C6"
depends on !BR2_x86_64
select BR2_X86_CPU_HAS_MMX
config BR2_x86_winchip2
bool "IDT Winchip 2"
depends on !BR2_x86_64
select BR2_X86_CPU_HAS_MMX
endchoice
config BR2_ARCH
default "i486" if BR2_x86_i486
default "i586" if BR2_x86_i586
default "i586" if BR2_x86_x1000
default "i586" if BR2_x86_pentium_mmx
default "i586" if BR2_x86_geode
default "i586" if BR2_x86_c3
default "i686" if BR2_x86_c32
default "i586" if BR2_x86_winchip_c6
default "i586" if BR2_x86_winchip2
# We use the property of Kconfig that the first match of a
# list of default will be chosen. So the following entry will
# not match for all BR2_i386=y configurations, but only the
# ones that didn't match any of the previous cases (i486,
# i586).
default "i686" if BR2_i386
default "x86_64" if BR2_x86_64
config BR2_NORMALIZED_ARCH
default "i386" if !BR2_x86_64
default "x86_64" if BR2_x86_64
config BR2_ENDIAN
default "LITTLE"
config BR2_GCC_TARGET_ARCH
default "i486" if BR2_x86_i486
default "i586" if BR2_x86_i586
default "i586" if BR2_x86_x1000
default "pentium-mmx" if BR2_x86_pentium_mmx
default "i686" if BR2_x86_i686
default "pentiumpro" if BR2_x86_pentiumpro
default "pentium-m" if BR2_x86_pentium_m
default "pentium2" if BR2_x86_pentium2
default "pentium3" if BR2_x86_pentium3
default "pentium4" if BR2_x86_pentium4
default "prescott" if BR2_x86_prescott
default "x86-64" if BR2_x86_x86_64
default "x86-64-v2" if BR2_x86_x86_64_v2
default "x86-64-v3" if BR2_x86_x86_64_v3
default "x86-64-v4" if BR2_x86_x86_64_v4
default "nocona" if BR2_x86_nocona
default "core2" if BR2_x86_core2
default "corei7" if BR2_x86_corei7
default "nehalem" if BR2_x86_nehalem
default "corei7-avx" if BR2_x86_corei7_avx
default "sandybridge" if BR2_x86_sandybridge
default "core-avx2" if BR2_x86_core_avx2
default "haswell" if BR2_x86_haswell
default "broadwell" if BR2_x86_broadwell
default "skylake" if BR2_x86_skylake
default "atom" if BR2_x86_atom
default "bonnell" if BR2_x86_bonnell
default "westmere" if BR2_x86_westmere
default "silvermont" if BR2_x86_silvermont
default "goldmont" if BR2_x86_goldmont
default "goldmont-plus" if BR2_x86_goldmont_plus
default "tremont" if BR2_x86_tremont
default "skylake-avx512" if BR2_x86_skylake_avx512
default "cannonlake" if BR2_x86_cannonlake
default "icelake-client" if BR2_x86_icelake_client
default "icelake-server" if BR2_x86_icelake_server
default "cascadelake" if BR2_x86_cascadelake
default "cooperlake" if BR2_x86_cooperlake
default "tigerlake" if BR2_x86_tigerlake
default "sapphirerapids" if BR2_x86_sapphirerapids
default "alderlake" if BR2_x86_alderlake
default "rocketlake" if BR2_x86_rocketlake
default "k8" if BR2_x86_opteron
default "k8-sse3" if BR2_x86_opteron_sse3
default "barcelona" if BR2_x86_barcelona
default "btver2" if BR2_x86_jaguar
default "bdver3" if BR2_x86_steamroller
default "k6" if BR2_x86_k6
default "k6-2" if BR2_x86_k6_2
default "athlon" if BR2_x86_athlon
default "athlon-4" if BR2_x86_athlon_4
default "winchip-c6" if BR2_x86_winchip_c6
default "winchip2" if BR2_x86_winchip2
default "c3" if BR2_x86_c3
default "c3-2" if BR2_x86_c32
default "geode" if BR2_x86_geode
config BR2_READELF_ARCH_NAME
default "Intel 80386" if BR2_i386
default "Advanced Micro Devices X86-64" if BR2_x86_64
# vim: ft=kconfig
# -*- mode:kconfig; -*-

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choice
prompt "Target Architecture Variant"
default BR2_xtensa_fsf
depends on BR2_xtensa
config BR2_XTENSA_CUSTOM
bool "Custom Xtensa processor configuration"
config BR2_xtensa_fsf
bool "fsf - Default configuration"
select BR2_USE_MMU
endchoice
config BR2_XTENSA_OVERLAY_FILE
string "Overlay file for custom configuration"
depends on BR2_XTENSA_CUSTOM
help
Enter the path to the overlay tarball for a custom processor
configuration.
These overlay files are tar packages with updated
configuration files for various toolchain packages and Xtensa
processor configurations. They are provided by the processor
vendor or directly from Tensilica.
The path can be either absolute, or relative to the top
directory of buildroot.
choice
prompt "Target Architecture Endianness"
default BR2_XTENSA_LITTLE_ENDIAN
depends on BR2_XTENSA_CUSTOM
config BR2_XTENSA_LITTLE_ENDIAN
bool "Little endian"
config BR2_XTENSA_BIG_ENDIAN
bool "Big endian"
endchoice
config BR2_XTENSA_USE_MMU
bool "MMU support"
default y
depends on BR2_XTENSA_CUSTOM
select BR2_USE_MMU
help
Enable this option if your Xtensa core has a MMU (Memory
Management Unit).
config BR2_ENDIAN
default "LITTLE" if BR2_XTENSA_LITTLE_ENDIAN
default "BIG" if BR2_xtensa_fsf || BR2_XTENSA_BIG_ENDIAN
config BR2_ARCH
default "xtensa" if BR2_xtensa
config BR2_NORMALIZED_ARCH
default "xtensa"
config BR2_READELF_ARCH_NAME
default "Tensilica Xtensa Processor"
# vim: ft=kconfig
# -*- mode:kconfig; -*-

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################################################################################
#
# Architecture-specific definitions
#
################################################################################
# Allow GCC target configuration settings to be optionally
# overwritten by architecture specific makefiles.
# Makefiles must use the GCC_TARGET_* variables below instead
# of the BR2_GCC_TARGET_* versions.
GCC_TARGET_ARCH := $(call qstrip,$(BR2_GCC_TARGET_ARCH))
GCC_TARGET_ABI := $(call qstrip,$(BR2_GCC_TARGET_ABI))
GCC_TARGET_NAN := $(call qstrip,$(BR2_GCC_TARGET_NAN))
GCC_TARGET_FP32_MODE := $(call qstrip,$(BR2_GCC_TARGET_FP32_MODE))
GCC_TARGET_CPU := $(call qstrip,$(BR2_GCC_TARGET_CPU))
GCC_TARGET_FPU := $(call qstrip,$(BR2_GCC_TARGET_FPU))
GCC_TARGET_FLOAT_ABI := $(call qstrip,$(BR2_GCC_TARGET_FLOAT_ABI))
GCC_TARGET_MODE := $(call qstrip,$(BR2_GCC_TARGET_MODE))
# Explicitly set LD's "max-page-size" instead of relying on some defaults
ifeq ($(BR2_ARC_PAGE_SIZE_4K)$(BR2_ARM64_PAGE_SIZE_4K),y)
ARCH_TOOLCHAIN_WRAPPER_OPTS += -Wl,-z,max-page-size=4096 -Wl,-z,common-page-size=4096
else ifeq ($(BR2_ARC_PAGE_SIZE_8K),y)
ARCH_TOOLCHAIN_WRAPPER_OPTS += -Wl,-z,max-page-size=8192 -Wl,-z,common-page-size=8192
else ifeq ($(BR2_ARC_PAGE_SIZE_16K),y)
ARCH_TOOLCHAIN_WRAPPER_OPTS += -Wl,-z,max-page-size=16384 -Wl,-z,common-page-size=16384
else ifeq ($(BR2_ARM64_PAGE_SIZE_64K),y)
ARCH_TOOLCHAIN_WRAPPER_OPTS += -Wl,-z,max-page-size=65536 -Wl,-z,common-page-size=65536
endif
# Include any architecture specific makefiles.
-include $(sort $(wildcard arch/arch.mk.*))

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ifeq ($(BR2_arc),y)
# -matomic is always required when the ARC core has the atomic extensions
ifeq ($(BR2_ARC_ATOMIC_EXT),y)
ARCH_TOOLCHAIN_WRAPPER_OPTS += -matomic
endif
endif

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#
# Configure the GCC_TARGET_ARCH variable and append the
# appropriate RISC-V ISA extensions.
#
ifeq ($(BR2_riscv),y)
ifeq ($(BR2_RISCV_64),y)
GCC_TARGET_ARCH := rv64i
else
GCC_TARGET_ARCH := rv32i
endif
ifeq ($(BR2_RISCV_ISA_RVM),y)
GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)m
endif
ifeq ($(BR2_RISCV_ISA_RVA),y)
GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)a
endif
ifeq ($(BR2_RISCV_ISA_RVF),y)
GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)f
endif
ifeq ($(BR2_RISCV_ISA_RVD),y)
GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)d
endif
ifeq ($(BR2_RISCV_ISA_RVC),y)
GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)c
endif
# Starting from gcc 12.x, csr and fence instructions have been
# separated from the base I instruction set, and special -march
# suffixes are needed to enable their support. In Buildroot, we assume
# all RISC-V cores that support Linux implement those instructions, so
# we unconditionally enable those extensions.
ifeq ($(BR2_TOOLCHAIN_GCC_AT_LEAST_12),y)
GCC_TARGET_ARCH := $(GCC_TARGET_ARCH)_zicsr_zifencei
endif
endif

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BR_ARCH_XTENSA_OVERLAY_FILE = $(call qstrip,$(BR2_XTENSA_OVERLAY_FILE))
ifeq ($(BR_BUILDING)$(BR2_XTENSA_CUSTOM)$(BR2_TOOLCHAIN_BUILDROOT):$(BR_ARCH_XTENSA_OVERLAY_FILE),yyy:)
$(error No xtensa overlay file provided. Check your BR2_XTENSA_OVERLAY_FILE setting)
endif
################################################################################
# This variable can be used by packages that need to extract the overlay.
#
# ARCH_XTENSA_OVERLAY_FILE is the path to the overlay tarball; empty if not
# using any overlay
#
# Example:
# ifneq ($(ARCH_XTENSA_OVERLAY_FILE),)
# tar xf $(ARCH_XTENSA_OVERLAY_FILE) -C $(@D) --strip-components=1 gcc
# endif
################################################################################
ifneq ($(filter http://% https://% ftp://% scp://%,$(BR_ARCH_XTENSA_OVERLAY_FILE)),)
ARCH_XTENSA_OVERLAY_URL = $(BR_ARCH_XTENSA_OVERLAY_FILE)
ARCH_XTENSA_OVERLAY_FILE = $($(PKG)_DL_DIR)/$(notdir $(BR_ARCH_XTENSA_OVERLAY_FILE))
# Do not check that file, we can't know its hash
BR_NO_CHECK_HASH_FOR += $(notdir $(ARCH_XTENSA_OVERLAY_URL))
else
ARCH_XTENSA_OVERLAY_FILE = $(BR_ARCH_XTENSA_OVERLAY_FILE)
endif
################################################################################
# arch-xtensa-overlay-extract -- extract an extensa overlay
#
# argument 1 is the path in which to extract
# argument 2 is the component to extract, one of: gcc, binutils, gdb, linux,
# u-boot
#
# Example:
# $(call arch-xtensa-overlay-extract,/path/to/overlay.tar,$(@D),gcc)
################################################################################
define arch-xtensa-overlay-extract
$(call suitable-extractor,$(ARCH_XTENSA_OVERLAY_FILE)) \
$(ARCH_XTENSA_OVERLAY_FILE) | \
$(TAR) --strip-components=1 -C $(1) $(TAR_OPTIONS) - $(2)
endef

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image efi-part.vfat {
vfat {
file EFI {
image = "efi-part/EFI"
}
file Image {
image = "Image"
}
}
size = 64M
}
image disk.img {
hdimage {
partition-table-type = "gpt"
}
partition boot {
image = "efi-part.vfat"
partition-type-uuid = U
offset = 32K
bootable = true
}
partition root {
partition-type-uuid = b921b045-1df0-41c3-af44-4c6f280d3fae
image = "rootfs.ext2"
}
}

6
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set default="0"
set timeout="5"
menuentry "Buildroot" {
linux /Image root=PARTLABEL=root rootwait
}

5
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#!/bin/sh
BOARD_DIR="$(dirname $0)"
cp -f ${BOARD_DIR}/grub.cfg ${BINARIES_DIR}/efi-part/EFI/BOOT/grub.cfg

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The aarch64_efi_defconfig allows to build a minimal Linux system that
can boot on all AArch64 servers providing an EFI firmware.
This includes all Arm EBBR[1] compliant systems, and all Arm SystemReady[2]
compliant systems for example.
Building and booting
====================
$ make aarch64_efi_defconfig
$ make
The file output/images/disk.img is a complete disk image that can be
booted, it includes the grub2 bootloader, Linux kernel and root
filesystem.
Testing under Qemu
==================
This image can also be tested using Qemu:
qemu-system-aarch64 \
-M virt \
-cpu cortex-a57 \
-m 512 \
-nographic \
-bios </path/to/QEMU_EFI.fd> \
-drive file=output/images/disk.img,if=none,format=raw,id=hd0 \
-device virtio-blk-device,drive=hd0 \
-netdev user,id=eth0 \
-device virtio-net-device,netdev=eth0
Note that </path/to/QEMU_EFI.fd> needs to point to a valid aarch64 UEFI
firmware image for qemu.
It may be provided by your distribution as a edk2-aarch64 or AAVMF
package, in path such as /usr/share/edk2/aarch64/QEMU_EFI.fd .
U-Boot based qemu firmware
==========================
A qemu firmware with support for UEFI based on U-Boot can be built following
the instructions in [3], with qemu_arm64_defconfig.
This should give you a nor_flash.bin, which you can use with qemu as an
alternative to QEMU_EFI.fd. You will also need to change the machine
specification to "-M virt,secure=on" on qemu command line, to enable TrustZone
support, and you will need to increase the memory with "-m 1024".
[1]: https://github.com/ARM-software/ebbr
[2]: https://developer.arm.com/architectures/system-architectures/arm-systemready
[3]: https://github.com/glikely/u-boot-tfa-build

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/*
* acme-acqua.dts - Device Tree file for Acqua A5 Board
*
* Copyright (C) 2014 Atmel,
* 2014 Nicolas Ferre <nicolas.ferre@atmel.com>
*
* 2022 Sergio Tanzilli <tanzilli@acmesystems.it>
*
* Licensed under GPLv2 or later.
*/
/dts-v1/;
#include "sama5d31.dtsi"
/ {
model = "Acme Systems Acqua SOM";
compatible = "acme,acqua", "atmel,sama5d3", "atmel,sama5";
chosen {
stdout-path = "serial0:115200n8";
bootargs = "mem=256M console=ttyS0,115200 root=/dev/mmcblk0p2 rootfstype=ext4 rw rootwait net.ifnames=0";
};
memory {
reg = <0x20000000 0x10000000>;
};
clocks {
slow_xtal {
clock-frequency = <32768>;
};
main_xtal {
clock-frequency = <12000000>;
};
};
ahb {
apb {
hlcdc: hlcdc@f0030000 {
status = "disabled";
hlcdc-display-controller {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888_alt>;
port@0 {
hlcdc_panel_output: endpoint@0 {
remote-endpoint = <&panel_input>;
};
};
};
};
/* MicroSD mounted on the SOM */
mmc0: mmc@f0000000 {
pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
status = "okay";
slot@0 {
reg = <0>;
bus-width = <4>;
};
};
/* Optional MicroSD to mount on the carrier board */
mmc1: mmc@f8000000 {
pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>;
status = "disabled";
slot@0 {
reg = <0>;
bus-width = <4>;
cd-gpios = <&pioE 1 GPIO_ACTIVE_LOW>;
};
};
spi0: spi@f0004000 {
cs-gpios = <&pioD 13 0>, <0>, <0>, <&pioD 16 0>;
status = "disabled";
};
can0: can@f000c000 {
status = "disabled";
};
tcb0: timer@f0010000 {
timer0: timer@0 {
compatible = "atmel,tcb-timer";
reg = <0>;
};
timer1: timer@1 {
compatible = "atmel,tcb-timer";
reg = <1>;
};
};
i2c0: i2c@f0014000 {
pinctrl-0 = <&pinctrl_i2c0_pu>;
status = "disabled";
};
i2c1: i2c@f0018000 {
status = "disabled";
};
macb1: ethernet@f802c000 {
compatible = "atmel,sama5d3-macb", "cdns,at91sam9260-macb", "cdns,macb";
status = "okay";
phy-mode = "rmii";
#address-cells = <1>;
#size-cells = <0>;
nvmem-cells = <&eth0_addr>;
nvmem-cell-names = "mac-address";
phy0: ethernet-phy@1 {
interrupt-parent = <&pioE>;
interrupts = <30 IRQ_TYPE_EDGE_FALLING>;
reg = <1>;
};
/*ethernet-phy@1 {
reg = <0x1>;
};*/
};
/* Bit banging internal I2C to manage the AT24MAC402 chip */
i2c3@ {
compatible = "i2c-gpio";
sda-gpios = <&pioE 1 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
scl-gpios = <&pioE 2 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3_gpio>;
i2c-gpio,delay-us = <4>; /* ~178 kHz */
#address-cells = <1>;
#size-cells = <0>;
/* EEPROM contains the eth0 MAC address */
eeprom@58 {
compatible = "atmel,24mac402";
pagesize = <256>;
read-only;
reg = <0x58>;
#address-cells = <1>;
#size-cells = <1>;
eth0_addr: eth-mac-addr@9A {
reg = <0x0 0x06>;
};
};
};
pwm0: pwm@f002c000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_pwmh0_0 &pinctrl_pwm0_pwmh1_0>;
status = "disabled";
};
usart0: serial@f001c000 {
status = "okay";
};
usart1: serial@f0020000 {
pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
status = "disabled";
};
uart0: serial@f0024000 {
status = "disabled";
};
spi1: spi@f8008000 {
cs-gpios = <&pioC 25 0>;
status = "disabled";
};
adc0: adc@f8018000 {
atmel,adc-vref = <3300>;
atmel,adc-channels-used = <0xfe>;
pinctrl-0 = <
&pinctrl_adc0_adtrg
&pinctrl_adc0_ad1
&pinctrl_adc0_ad2
&pinctrl_adc0_ad3
&pinctrl_adc0_ad4
&pinctrl_adc0_ad5
&pinctrl_adc0_ad6
&pinctrl_adc0_ad7
>;
status = "disabled";
};
i2c2: i2c@f801c000 {
dmas = <0>, <0>; /* Do not use DMA for i2c2 */
pinctrl-0 = <&pinctrl_i2c2_pu>;
status = "disabled";
};
dbgu: serial@ffffee00 {
status = "okay";
};
pinctrl@fffff200 {
atmel,mux-mask = <
/* A B C */
0xffffffff 0xc0fc0000 0xc0ff0000 /* pioA */
0xffffffff 0x0ff8ffff 0x00000000 /* pioB */
0xffffffff 0xbc00f1ff 0x7c00fc00 /* pioC */
0xffffffff 0xc001c0e0 0x0001c1e0 /* pioD */
0xfffffff9 0xbf9f8000 0x18000000 /* pioE */
/* 0xffffffff 0xb8000000 0x18000000 */ /* pioE */
>;
board {
pinctrl_i2c0_pu: i2c0_pu {
atmel,pins =
<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
<AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
};
pinctrl_i2c2_pu: i2c2_pu {
atmel,pins =
<AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
<AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
};
pinctrl_i2c3_gpio: i2c3-gpio {
atmel,pins =
<AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
AT91_PIOE 2 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
};
pinctrl_key_gpio: key_gpio_0 {
atmel,pins =
<AT91_PIOE 29 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
};
pinctrl_mmc0_cd: mmc0_cd {
atmel,pins =
<AT91_PIOE 0 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
};
pinctrl_mmc1_cd: mmc1_cd {
atmel,pins =
<AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
};
pinctrl_usba_vbus: usba_vbus {
atmel,pins =
<AT91_PIOE 9 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PE9, conflicts with A9 */
};
pinctrl_gpio_leds: gpio_leds_default {
atmel,pins =
<AT91_PIOE 3 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
AT91_PIOE 4 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
AT91_PIOE 5 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
AT91_PIOE 6 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
};
};
};
};
usb0: gadget@500000 {
status = "disabled";
};
usb1: ohci@600000 {
status = "okay";
};
usb2: ehci@700000 {
status = "okay";
};
};
panel: panel {
/* compatible = "acme,43inch", "simple-panel"; */
compatible = "acme,50inch", "simple-panel";
/* compatible = "acme,70inch", "simple-panel"; */
status = "disable";
port@0 {
panel_input: endpoint@0 {
remote-endpoint = <&hlcdc_panel_output>;
};
};
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0 {
label = "led0";
gpios = <&pioE 3 GPIO_ACTIVE_LOW>;
default-state = "off";
};
led1 {
label = "led1";
gpios = <&pioE 4 GPIO_ACTIVE_LOW>;
default-state = "off";
};
led2 {
label = "led2";
gpios = <&pioE 5 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";
};
led3 {
label = "led3";
gpios = <&pioE 6 GPIO_ACTIVE_LOW>;
linux,default-trigger = "mmc0";
default-state = "off";
};
};
};

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# Minimal SD card image for the Acme Systems Acqua A5
image boot.vfat {
vfat {
files = {
"boot.bin",
"zImage",
"at91-sama5d3_acqua.dtb"
}
}
size = 16M
}
image sdcard.img {
hdimage {
}
partition boot {
partition-type = 0xC
bootable = "true"
image = "boot.vfat"
}
partition rootfs {
partition-type = 0x83
image = "rootfs.ext4"
}
}

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board/acmesystems/acqua-a5/readme.txt Normal file
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Acme Systems Acqua A5
Intro
=====
The Acqua A5 is a system on module based on the Microchip SAMA5D31 SoC:
https://www.acmesystems.it/acqua
The files here support configurations that build a microSD image for a
minimal system that can be accessed through the serial console. You will
need an USB-to-serial interface in order to access that console from
your computer:
https://www.acmesystems.it/DPI
How to build the image
======================
If you have an Acqua module with 256 MiB of RAM, type:
$ make acmesystems_acqua_a5_256mb_defconfig
If you have the 512 MiB version, type instead:
$ make acmesystems_acqua_a5_512mb_defconfig
You can optionally tweak the configuration and add packages by typing:
$ make menuconfig
Then, proceed with the build:
$ make
How to write the microSD card
=============================
The system image is the file "sdcard.img" in the "output/images"
directory. Write it to the card by invoking:
$ sudo dd if=output/images/sdcard.img of=/dev/sdX bs=1M
where `sdX' is the block device representing the microSD card.

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# Minimal SD card image for the Acmesystems Aria G25
image boot.vfat {
vfat {
file zImage {
image = "zImage"
}
file at91-ariag25.dtb {
image = "at91-ariag25.dtb"
}
file boot.bin {
image = "at91sam9x5_aria-sdcardboot-linux-zimage-dt-3.10.3.bin"
}
}
size = 16M
}
image sdcard.img {
hdimage {
}
partition boot {
partition-type = 0xC
bootable = "true"
image = "boot.vfat"
}
partition rootfs {
partition-type = 0x83
image = "rootfs.ext4"
size = 512M
}
}

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Acme Systems Aria G25
Build instructions
==================
To build an image for the Aria G25 choose the configuration
corresponding to the Aria variant.
For 128MB RAM variant type:
$ make acmesystems_aria_g25_128mb_defconfig
else for 256MB RAM variant type:
$ make acmesystems_aria_g25_256mb_defconfig
To customize the configuration choosed type:
$ make menuconfig
When you are ready to start building Buildroot type:
$ make
How to write the microSD card
=============================
Once the build process is finished you will have an image called
"sdcard.img" in the output/images/ directory.
Write the bootable SD card image "sdcard.img" onto an SD card with
"dd" command:
$ sudo dd if=output/images/sdcard.img of=/dev/sdX
Assuming your Aria G25 baseboard has a MicroSD socket, for example
with the Terra baseboard, insert the microSD card into the baseboard
slot and power it.
To get the kernel log messages you can use a DPI cable
(http://www.acmesystems.it/DPI)
You can find additional informations, tutorials and a very
comprehensive documentation on http://www.acmesystems.it/aria.

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# Minimal SD card image for the Acmesystems Arietta G25
image boot.vfat {
vfat {
file zImage {
image = "zImage"
}
file acme-arietta.dtb {
image = "at91-ariettag25.dtb"
}
file boot.bin {
image = "at91sam9x5_arietta-sdcardboot-linux-zimage-dt-3.10.3.bin"
}
}
size = 16M
}
image sdcard.img {
hdimage {
}
partition boot {
partition-type = 0xC
bootable = "true"
image = "boot.vfat"
}
partition rootfs {
partition-type = 0x83
image = "rootfs.ext4"
size = 512M
}
}

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Acme Systems Arietta G25
Intro
=====
This default configuration will allow you to start experimenting with the
buildroot environment for the Arietta G25. With the current configuration
it will bring-up the board, and allow access through the serial console.
You can find additional informations, tutorials and a very comprehensive
documentation on http://www.acmesystems.it/arietta.
Build instructions
==================
To build an image for the Arietta G25 choose the configuration
corresponding to the Arietta variant.
For 128MB RAM variant type:
$ make acmesystems_arietta_g25_128mb_defconfig
else for 256MB RAM variant type:
$ make acmesystems_arietta_g25_256mb_defconfig
To customize the configuration chosen type:
$ make menuconfig
When you are ready to start building Buildroot type:
$ make
How to write the microSD card
=============================
Once the build process is finished you will have an image called "sdcard.img"
in the output/images/ directory.
Copy the bootable "sdcard.img" onto an SD card with "dd":
$ sudo dd if=output/images/sdcard.img of=/dev/sdX
Insert the microSD card into the Arietta slot and power it.
The image just built is fairly basic and the only output
you will get is on serial console, please consider to use a DPI
cable (http://www.acmesystems.it/DPI)

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linux_load_address=0x100000
linux_dtb_load_address=0x100
linux_dtb=socfpga_cyclone5_socrates.dtb
linux_load=mmc rescan; fatload mmc 0:1 ${linux_load_address} zImage; fatload mmc 0:1 ${linux_dtb_load_address} ${linux_dtb}
bootargs=console=ttyS0,115200 root=/dev/mmcblk0p3 ro rootwait
source_env=fatload mmc 0:1 0x2000000 boot.scr; source 0x2000000
bootcmd=run linux_load; bootz ${linux_load_address} - ${linux_dtb_load_address}
bootdelay=1

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image boot.vfat {
vfat {
files = {
"zImage",
"socfpga_cyclone5_socrates.dtb"
}
}
size = 8M
}
image uboot.img {
hdimage {
partition-table = "no"
}
partition spl {
in-partition-table = "no"
image = "u-boot-spl.bin.crc"
offset = 0
size = 64K
}
partition uboot-full {
in-partition-table = "no"
image = "u-boot.img"
offset = 256K
}
size = 1M
}
image sdcard.img {
hdimage {
}
partition uboot-env {
in-partition-table = "no"
image = "uboot-env.bin"
offset = 17K # 512 * 34 -> just after gpt
}
partition boot {
partition-type = 0xc
bootable = "true"
image = "boot.vfat"
}
partition uboot {
partition-type = 0xa2
image = "uboot.img"
}
partition rootfs {
partition-type = 0x83
image = "rootfs.ext2"
size = 500M
}
}

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EBV SoCrates Evaluation Board
Intro
=====
More information about this board can be found here:
https://rocketboards.org/foswiki/Documentation/EBVSoCratesEvaluationBoard
Build
=====
First, load socrates config for buildroot
make socrates_cyclone5_defconfig
Build everything
make
Following files will be generated in output/images
.
├── boot.vfat
├── rootfs.ext2
├── rootfs.ext4 -> rootfs.ext2
├── rootfs.tar
├── sdcard.img
├── socfpga_cyclone5_socrates.dtb
├── u-boot-spl.bin
├── u-boot-spl.bin.crc
├── u-boot.bin
├── u-boot.img
├── uboot-env.bin
├── uboot.img
└── zImage
Creating bootable SD card
=========================
Simply invoke
dd if=output/images/sdcard.img of=/dev/sdX
Where X is your SD card device (not partition)
Booting
=======
Pins 6:8 on P18 selector is used to determine boot device. To boot socrates from
sdcard set these pins to value 0x5 (101b). Remaining pins are used to determine
how to configure FPGA and are not associated with booting into Linux kernel.

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label Vyasa linux-next
kernel /boot/uImage
devicetree /boot/rk3288-vyasa.dtb
append console=ttyS2,115200n8 root=/dev/mmcblk0p1 rootwait

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image sdcard.img {
hdimage {
}
partition u-boot-tpl-spl-dtb {
in-partition-table = "no"
image = "u-boot-tpl-spl-dtb.img"
offset = 32K
}
partition u-boot-dtb {
in-partition-table = "no"
image = "u-boot-dtb.img"
offset = 8M
size = 30M # falcon mode: args @ 16M args, uImage @ 17M
}
partition rootfs {
partition-type = 0x83
image = "rootfs.ext4"
}
}

3
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# Currently mainline kernel exhibits issues when running rockchip gmac
# on the board, so enable it as loadable module and insert it later
CONFIG_DWMAC_ROCKCHIP=m

9
board/amarula/vyasa/post-build.sh Executable file
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#!/bin/sh
MKIMAGE=$HOST_DIR/bin/mkimage
BOARD_DIR="$(dirname $0)"
$MKIMAGE -n rk3288 -T rksd -d $BINARIES_DIR/u-boot-tpl.bin $BINARIES_DIR/u-boot-tpl.img
cat $BINARIES_DIR/u-boot-tpl.img $BINARIES_DIR/u-boot-spl-dtb.bin > $BINARIES_DIR/u-boot-tpl-spl-dtb.img
install -m 0644 -D $BOARD_DIR/extlinux.conf $TARGET_DIR/boot/extlinux/extlinux.conf

31
board/amarula/vyasa/readme.txt Normal file
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Vyasa RK3288
============
Vyasa is RK3288 based Single board computer with fully supported opensource software.
https://openedev.amarulasolutions.com/display/ODWIKI/Vyasa+RK3288
How to build it
===============
$ make amarula_vyasa_rk3288_defconfig
Then you can edit the build options using
$ make menuconfig
Compile all and build rootfs image:
$ make
Prepare your SDCard
===================
Buildroot generates a ready-to-use SD card image that you can flash directly to
the card. The image will be in output/images/sdcard.img.
You can write this image directly to an SD card device (i.e. /dev/xxx):
$ sudo dd if=output/images/sdcard.img of=/dev/xxx
$ sudo sync
Finally, you can insert the SD card to the Vyasa RK3288 board, close J4 and boot it.

26
board/andes/ae350/genimage_sdcard.cfg Normal file
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image boot.vfat {
vfat {
files = {
"u-boot-spl.bin",
"u-boot.itb",
"ae350_ax45mp.dtb",
}
}
size = 2M
}
image sdcard.img {
hdimage {
}
partition boot {
partition-type = 0xC
image = "boot.vfat"
}
partition rootfs {
partition-type = 0x83
bootable = true
image = "rootfs.ext4"
}
}

38
board/andes/ae350/patches/uboot/0001-mmc-ftsdc010_mci-Support-DTS-of-ftsdc010-driver-for-.patch Normal file
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From 16aad5594e08550295ea3c12c1c9ed6f64774748 Mon Sep 17 00:00:00 2001
From: Rick Chen <rick@andestech.com>
Date: Tue, 29 Mar 2022 13:41:10 +0800
Subject: [PATCH] mmc: ftsdc010_mci: Support DTS of ftsdc010 driver for
generic dma
The ftsdc010 driver has been implemented for generic dma in Linux
kernel. And its compatible is andestech,atfsdc010g to distinguish
the legacy andestech,atfsdc010 which is not for generic dma.
Althought the ftsdc010_mci driver in U-Boot does not use dma, but
it still can work well with the mmc node for generic dma. So add
the compatible string to support it.
Signed-off-by: Rick Chen <rick@andestech.com>
Upstream-Status: Pending
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
---
drivers/mmc/ftsdc010_mci.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mmc/ftsdc010_mci.c b/drivers/mmc/ftsdc010_mci.c
index 570d54cf9d..65b1d447a8 100644
--- a/drivers/mmc/ftsdc010_mci.c
+++ b/drivers/mmc/ftsdc010_mci.c
@@ -460,6 +460,7 @@ int ftsdc010_mmc_bind(struct udevice *dev)
static const struct udevice_id ftsdc010_mmc_ids[] = {
{ .compatible = "andestech,atfsdc010" },
+ { .compatible = "andestech,atfsdc010g" },
{ }
};
--
2.34.1

42
board/andes/ae350/patches/uboot/0002-spl-Align-device-tree-blob-address-at-8-byte-boundar.patch Normal file
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From 933ad8a59f7fd9b2088badc3e97167d750a40b5a Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Mon, 12 Jul 2021 11:52:31 +0800
Subject: [PATCH] spl: Align device tree blob address at 8-byte boundary
Since libfdt v1.6.1, a new requirement on the device tree address via:
commit 5e735860c478 ("libfdt: Check for 8-byte address alignment in fdt_ro_probe_()")
must be met that the device tree must be loaded in to memory at an
8-byte aligned address.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This patch was imported from U-boot patchwork:
https://patchwork.ozlabs.org/project/uboot/patch/20210712035231.26475-1-bmeng.cn@gmail.com/
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
---
common/spl/spl_fit.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index a35be529..a76ad14a 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -382,6 +382,12 @@ static int spl_fit_append_fdt(struct spl_image_info *spl_image,
*/
image_info.load_addr = spl_image->load_addr + spl_image->size;
+ /*
+ * Since libfdt v1.6.1, the device tree must be loaded in to memory
+ * at an 8-byte aligned address.
+ */
+ image_info.load_addr = roundup(image_info.load_addr, 8);
+
/* Figure out which device tree the board wants to use */
node = spl_fit_get_image_node(ctx, FIT_FDT_PROP, index++);
if (node < 0) {
--
2.34.1

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board/andes/ae350/post-build.sh Executable file
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#!/bin/sh
cp $BINARIES_DIR/Image $TARGET_DIR/boot
cp $BINARIES_DIR/ae350_ax45mp.dtb $TARGET_DIR/boot

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Intro
=====
Andestech AE350 Platform
The AE350 prototype demonstrates the AE350 platform on the FPGA.
How to build it
===============
Configure Buildroot
-------------------
$ make andes_ae350_45_defconfig
If you want to customize your configuration:
$ make menuconfig
Build everything
----------------
Note: you will need to access to the network, since Buildroot will
download the packages' sources.
$ make
Result of the build
-------------------
After building, you should obtain the following files:
output/images/
|-- ae350_ax45mp.dtb
|-- boot.vfat
|-- fw_dynamic.bin
|-- fw_dynamic.elf
|-- Image
|-- rootfs.ext2
|-- rootfs.ext4 -> rootfs.ext2
|-- sdcard.img
|-- u-boot-spl.bin
`-- u-boot.itb
Copy the sdcard.img to a SD card with "dd":
$ sudo dd if=sdcard.img of=/dev/sdX bs=4096
$ sudo sync
Your SD card partition should be:
Disk /dev/sdb: 14.48 GiB, 15552479232 bytes, 30375936 sectors
Disk model: Multi-Card
Units: sectors of 1 * 512 = 512 bytes
Sector size (logical/physical): 512 bytes / 512 bytes
I/O size (minimum/optimal): 512 bytes / 512 bytes
Disklabel type: dos
Disk identifier: 0x00000000
Device Boot Start End Sectors Size Id Type
/dev/sdb1 1 4096 4096 2M c W95 FAT32 (LBA)
/dev/sdb2 * 4097 126976 122880 60M 83 Linux
Insert SD card and reset the board, it should boot Linux from mmc.

4
board/andes/ae350/rootfs_overlay/boot/extlinux/extlinux.conf Normal file
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label linux
kernel /boot/Image
fdt /boot/ae350_ax45mp.dtb
append earlycon=sbi root=/dev/mmcblk0p2 rootwait

7
board/andes/ae350/uboot.config.fragment Normal file
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CONFIG_SPL_FS_FAT=y
CONFIG_SPL_MMC=y
# CONFIG_SPL_RAM_SUPPORT is not set
CONFIG_SPL_OPENSBI_LOAD_ADDR=0x0
CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y

4
board/arcturus/aarch64-ucls1012a/post-build.sh Executable file
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#!/bin/sh
mkdir -p ${TARGET_DIR}/lib/firmware
cp -f ${BUILD_DIR}/linux-custom/br2-ucls1012a.its ${BINARIES_DIR}/

6
board/arcturus/aarch64-ucls1012a/post-image.sh Executable file
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#!/bin/sh
MKIMAGE=${HOST_DIR}/usr/bin/mkimage
MKIMAGE_IN=${BINARIES_DIR}/br2-ucls1012a.its
MKIMAGE_OUT=${BINARIES_DIR}/part0-000000.itb
${MKIMAGE} -f ${MKIMAGE_IN} ${MKIMAGE_OUT}

74
board/arcturus/aarch64-ucls1012a/readme.txt Normal file
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Arcturus uCLS1012A SoM
======================
This tutorial describes how to use the predefined Buildroot
configuration for the Arcturus uCLS101A SoM platform.
Additional information about the uCLS1012A System on Module can be found at
https://www.arcturusnetworks.com/products/ucls1012a
and product support for registered users at
https://www.arcturusnetworks.com/support
Building
--------
Return to the top directory <buildrootdir> and execute the following commands.
make arcturus_ucls1012a_defconfig
make
Result of the build
-------------------
After building, you should obtain this tree:
output/images/
+-- arc-ucls1012a.dtb
+-- Image.gz
+-- part0-000000.itb
+-- rootfs.cpio
+-- rootfs.cpio.gz
+-- rootfs.tar
+-- u-boot.bin
+-- br2-ucls1012a.its
Flashing
--------
You'll need to program the image created by buildroot into the SPI NOR flash.
1. Reboot your module and via the serial console press <escape> to enter the B$
u-boot shell.
From the shell you will need to update four environment variables replacing the
IPv4 IP Address with ones that will work with your network and tftp server.
B$ setenv ipaddr 192.168.1.81
B$ setenv serverip 192.168.1.80
B$ setenv gatewayip 192.168.1.1
B$ setenv netmask 255.255.255.0
B$ saveenv
2. Enable tftp server to serve the <buildrootdir>/output/images/ folder.
3. Program the new U-Boot binary (optional)
If you don't feel confident upgrading your bootloader then don't do it,
it's unnecessary most of the time.
B$ tftp u-boot.bin
B$ run program_uboot
4. Program the ITB image (includes Kernel, DTB and Ramdisk)
B$ tftp part0-000000.itb
B$ run iprogram
5. Booting your new system
Reboot your system by reset command
B$ reset
or
B$ run bootcmd
Good Luck !

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Arcturus uCP1020 SoM
====================
This tutorial describes how to use the predefined Buildroot
configuration for the Arcturus uCP1020 SoM platform.
Additional information about this module can be found at
<www.arcturusnetworks.com/products/ucp1020>
Building
--------
make arcturus_ucp1020_defconfig
make
Result of the build
-------------------
After building, you should obtain this tree:
output/images/
+-- rootfs.jffs2
+-- rootfs.tar
+-- u-boot.bin
+-- ucp1020.dtb
+-- uImage
Flashing
--------
You'll need to program the files created by buildroot into the NOR flash.
1. Program the new U-Boot binary (optional)
If you don't feel confident upgrading your bootloader then don't do it,
it's unnecessary most of the time.
B$ tftp u-boot.bin
B$ protect off 0xeff80000 +$filesize
B$ erase 0xeff80000 +$filesize
B$ cp.b $loadaddr 0xeff80000 $filesize
B$ protect on 0xeff80000 +$filesize
2. Program the kernel
B$ tftp uImage
B$ erase 0xec140000 +$filesize
B$ cp.b $loadaddr 0xec140000 $filesize
3. Program the DTB
B$ tftp ucp1020.dtb
B$ erase 0xec100000 +$filesize
B$ cp.b $loadaddr 0xec100000 $filesize
4. Program the jffs2 root filesystem
B$ tftp rootfs.jffs2
B$ erase 0xec800000 0xee8fffff
B$ cp.b $loadaddr 0xec800000 $filesize
5. Booting your new system
B$ setenv norboot 'setenv bootargs root=/dev/mtdblock1 rootfstype=jffs2 console=$consoledev,$baudrate;bootm 0xec140000 - 0xec100000'
If you want to set this boot option as default:
B$ setenv bootcmd 'run norboot'
B$ saveenv
...or for a single boot:
B$ run norboot
Good Luck !

20
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This is the support for the ARM Foundation v8 machine emulated by the
ARM software simulator of the AArch64 architecture.
First, one has to download the AArch64 software simulator from:
https://silver.arm.com/download/download.tm?pv=4807186
Then, use the arm_foundationv8_defconfig configuration to build your
Buildroot system.
Finally, boot your system with:
${LOCATION_OF_FOUNDATIONV8_SIMULATOR}/models/Linux64_GCC-6.4/Foundation_Platform \
--image output/images/linux-system.axf \
--block-device output/images/rootfs.ext2 \
--network=nat \
--cores 4
You can get network access from within the simulated environment
by requesting an IP address using DHCP (run the command 'udhcpc').

216
board/armadeus/apf27/linux-4.12.config Normal file
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# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_CGROUPS=y
CONFIG_EMBEDDED=y
# CONFIG_COMPAT_BRK is not set
CONFIG_SLAB=y
CONFIG_PROFILING=y
CONFIG_OPROFILE=m
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_MXC=y
CONFIG_MACH_IMX27_DT=y
CONFIG_PREEMPT=y
CONFIG_AEABI=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_PM_DEBUG=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_DIAG is not set
CONFIG_CAN=m
CONFIG_CAN_VCAN=m
CONFIG_CAN_MCP251X=m
CONFIG_BT=m
CONFIG_BT_RFCOMM=m
CONFIG_BT_RFCOMM_TTY=y
CONFIG_BT_BNEP=m
CONFIG_BT_HIDP=m
CONFIG_BT_HCIBTUSB=m
CONFIG_BT_HCIUART=m
CONFIG_BT_HCIUART_H4=y
CONFIG_BT_HCIUART_BCSP=y
CONFIG_CFG80211=m
CONFIG_MAC80211=m
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_GEOMETRY=y
# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
# CONFIG_MTD_CFI_I2 is not set
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_MXC=y
CONFIG_MTD_UBI=y
CONFIG_EEPROM_AT24=y
CONFIG_EEPROM_AT25=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_NETDEVICES=y
# CONFIG_NET_VENDOR_BROADCOM is not set
# CONFIG_NET_VENDOR_CIRRUS is not set
# CONFIG_NET_VENDOR_FARADAY is not set
# CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_MICROCHIP is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SMSC is not set
# CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_SMSC_PHY=y
CONFIG_LIBERTAS=m
CONFIG_LIBERTAS_SDIO=m
CONFIG_RT2X00=m
CONFIG_RT2500USB=m
CONFIG_RT73USB=m
CONFIG_RT2800USB=m
CONFIG_RTL8187=m
CONFIG_RTL8192CU=m
CONFIG_ZD1211RW=m
CONFIG_INPUT_JOYDEV=y
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=y
CONFIG_KEYBOARD_IMX=m
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_JOYSTICK=y
CONFIG_INPUT_TOUCHSCREEN=y
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_IMX=y
CONFIG_SERIAL_IMX_CONSOLE=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_IMX=y
CONFIG_SPI=y
CONFIG_SPI_IMX=y
CONFIG_SPI_SPIDEV=m
CONFIG_GPIO_SYSFS=y
CONFIG_W1=y
CONFIG_W1_MASTER_MXC=y
CONFIG_W1_SLAVE_THERM=y
CONFIG_WATCHDOG=y
CONFIG_IMX2_WDT=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_MEDIA_SUPPORT=m
CONFIG_MEDIA_CAMERA_SUPPORT=y
CONFIG_MEDIA_USB_SUPPORT=y
CONFIG_USB_VIDEO_CLASS=m
CONFIG_USB_PWC=m
CONFIG_V4L_PLATFORM_DRIVERS=y
CONFIG_SOC_CAMERA=m
# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
CONFIG_FB=y
# CONFIG_FB_MX3 is not set
CONFIG_BACKLIGHT_LCD_SUPPORT=y
# CONFIG_LCD_CLASS_DEVICE is not set
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
CONFIG_SOUND=m
CONFIG_SND=m
CONFIG_SND_MIXER_OSS=m
CONFIG_SND_PCM_OSS=m
# CONFIG_SND_DRIVERS is not set
# CONFIG_SND_ARM is not set
# CONFIG_SND_SPI is not set
# CONFIG_SND_USB is not set
CONFIG_SND_SOC=m
CONFIG_SND_IMX_SOC=m
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_MXC=y
CONFIG_USB_ACM=y
CONFIG_USB_PRINTER=y
CONFIG_USB_STORAGE=y
CONFIG_USB_CHIPIDEA=y
CONFIG_USB_CHIPIDEA_HOST=y
CONFIG_USB_SERIAL=y
CONFIG_USB_SERIAL_FTDI_SIO=y
CONFIG_USB_SERIAL_PL2303=y
CONFIG_USB_ULPI=y
CONFIG_USB_GADGET=y
CONFIG_USB_ETH=m
CONFIG_USB_GADGETFS=m
CONFIG_USB_MASS_STORAGE=m
CONFIG_USB_G_HID=m
CONFIG_MMC=y
CONFIG_MMC_MXC=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_ONESHOT=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_BACKLIGHT=y
CONFIG_LEDS_TRIGGER_CPU=y
CONFIG_LEDS_TRIGGER_GPIO=y
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_LEDS_TRIGGER_TRANSIENT=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_DS1374=y
CONFIG_RTC_DRV_MXC=m
CONFIG_DMADEVICES=y
CONFIG_IMX_DMA=y
CONFIG_IMX_SDMA=y
# CONFIG_IOMMU_SUPPORT is not set
CONFIG_IIO=y
CONFIG_MAX1027=y
CONFIG_MAX5821=y
CONFIG_PWM=y
CONFIG_PWM_IMX=y
CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_POSIX_ACL=y
CONFIG_EXT3_FS_SECURITY=y
# CONFIG_DNOTIFY is not set
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
# CONFIG_PROC_PAGE_MONITOR is not set
CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_UBIFS_FS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_ISO8859_15=m
CONFIG_PRINTK_TIME=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_FS=y
# CONFIG_SCHED_DEBUG is not set
# CONFIG_DEBUG_PREEMPT is not set
# CONFIG_FTRACE is not set
CONFIG_DEBUG_LL=y
CONFIG_EARLY_PRINTK=y
CONFIG_FONTS=y
CONFIG_FONT_8x8=y

278
board/armadeus/apf51/linux-4.4.config Normal file
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@ -0,0 +1,278 @@
CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_EMBEDDED=y
# CONFIG_COMPAT_BRK is not set
CONFIG_SLAB=y
CONFIG_PROFILING=y
CONFIG_OPROFILE=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_PARTITION_ADVANCED=y
CONFIG_BSD_DISKLABEL=y
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_MXC=y
CONFIG_MXC_IRQ_PRIOR=y
CONFIG_SOC_IMX51=y
CONFIG_ARM_THUMBEE=y
CONFIG_PREEMPT=y
CONFIG_AEABI=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_STAT_DETAILS=y
CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
CONFIG_CPU_FREQ_IMX=y
CONFIG_CPU_IDLE=y
CONFIG_VFP=y
CONFIG_NEON=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
# CONFIG_SUSPEND is not set
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_INET_DIAG is not set
CONFIG_IPV6=y
CONFIG_CAN=m
CONFIG_CAN_RAW=m
CONFIG_CAN_BCM=m
CONFIG_CAN_VCAN=m
CONFIG_CAN_MCP251X=m
CONFIG_BT=m
CONFIG_BT_L2CAP=y
CONFIG_BT_SCO=y
CONFIG_BT_RFCOMM=m
CONFIG_BT_RFCOMM_TTY=y
CONFIG_BT_BNEP=m
CONFIG_BT_HIDP=m
CONFIG_BT_HCIBTUSB=m
CONFIG_BT_HCIUART=m
CONFIG_BT_HCIUART_H4=y
CONFIG_BT_HCIUART_BCSP=y
CONFIG_CFG80211=m
CONFIG_MAC80211=m
CONFIG_MAC80211_RC_PID=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_FW_LOADER=m
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_MXC=y
CONFIG_MTD_UBI=y
CONFIG_MISC_DEVICES=y
CONFIG_EEPROM_AT24=y
CONFIG_EEPROM_AT25=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_CHR_DEV_ST=y
CONFIG_BLK_DEV_SR=y
CONFIG_CHR_DEV_SG=y
CONFIG_CHR_DEV_SCH=y
CONFIG_SCSI_MULTI_LUN=y
CONFIG_SCSI_LOGGING=y
CONFIG_SCSI_SCAN_ASYNC=y
CONFIG_NETDEVICES=y
CONFIG_MII=y
CONFIG_SMSC_PHY=y
CONFIG_NET_ETHERNET=y
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
CONFIG_RTL8187=m
CONFIG_LIBERTAS=m
CONFIG_LIBERTAS_SDIO=m
CONFIG_RT2X00=m
CONFIG_RT73USB=m
CONFIG_ZD1211RW=m
CONFIG_INPUT_JOYDEV=y
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=m
CONFIG_KEYBOARD_IMX=m
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_WM831X=y
CONFIG_TOUCHSCREEN_MC13XXX=m
CONFIG_INPUT_MISC=y
CONFIG_INPUT_MC13783_PWRBUTTON=m
CONFIG_INPUT_UINPUT=m
CONFIG_INPUT_WM831X_ON=y
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_8250=m
CONFIG_SERIAL_IMX=y
CONFIG_SERIAL_IMX_CONSOLE=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_IMX=y
CONFIG_SPI=y
CONFIG_SPI_IMX=y
CONFIG_SPI_SPIDEV=m
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_WM831X=m
CONFIG_POWER_SUPPLY=y
CONFIG_WM831X_BACKUP=m
CONFIG_WM831X_POWER=m
CONFIG_HWMON=m
CONFIG_SENSORS_AS1531=m
CONFIG_SENSORS_MC13783_ADC=m
CONFIG_SENSORS_WM831X=m
CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_NOWAYOUT=y
CONFIG_WM831X_WATCHDOG=m
CONFIG_IMX2_WDT=y
CONFIG_MFD_MC13XXX_I2C=y
CONFIG_MFD_WM831X_I2C=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_MC13892=m
CONFIG_IMX_IPUV3_CORE=y
CONFIG_DRM=y
CONFIG_MFD_IMX_IPU_V3=y
CONFIG_MEDIA_SUPPORT=m
CONFIG_VIDEO_DEV=m
# CONFIG_RC_CORE is not set
# CONFIG_MEDIA_TUNER_SIMPLE is not set
# CONFIG_MEDIA_TUNER_TDA8290 is not set
# CONFIG_MEDIA_TUNER_TDA827X is not set
# CONFIG_MEDIA_TUNER_TDA18271 is not set
# CONFIG_MEDIA_TUNER_TDA9887 is not set
# CONFIG_MEDIA_TUNER_TEA5761 is not set
# CONFIG_MEDIA_TUNER_TEA5767 is not set
# CONFIG_MEDIA_TUNER_MT20XX is not set
# CONFIG_MEDIA_TUNER_MT2060 is not set
# CONFIG_MEDIA_TUNER_MT2266 is not set
# CONFIG_MEDIA_TUNER_MT2131 is not set
# CONFIG_MEDIA_TUNER_QT1010 is not set
# CONFIG_MEDIA_TUNER_XC2028 is not set
# CONFIG_MEDIA_TUNER_XC5000 is not set
# CONFIG_MEDIA_TUNER_MXL5005S is not set
# CONFIG_MEDIA_TUNER_MXL5007T is not set
# CONFIG_MEDIA_TUNER_MC44S803 is not set
# CONFIG_MEDIA_TUNER_MAX2165 is not set
# CONFIG_MEDIA_TUNER_TDA18218 is not set
CONFIG_VIDEO_VIVI=m
CONFIG_USB_VIDEO_CLASS=m
# CONFIG_RADIO_ADAPTERS is not set
CONFIG_FB=y
CONFIG_FB_MX5=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FONTS=y
CONFIG_FONT_8x8=y
CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
CONFIG_SOUND=m
# CONFIG_SOUND_OSS_CORE_PRECLAIM is not set
CONFIG_SND=m
CONFIG_SND_MIXER_OSS=m
CONFIG_SND_PCM_OSS=m
# CONFIG_SND_DRIVERS is not set
# CONFIG_SND_ARM is not set
# CONFIG_SND_SPI is not set
# CONFIG_SND_USB is not set
CONFIG_SND_SOC=m
CONFIG_SND_IMX_SOC=m
CONFIG_SND_SOC_APF51_DEV_WM8960=m
CONFIG_USB=y
CONFIG_USB_DEBUG=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_DEVICEFS=y
# CONFIG_USB_DEVICE_CLASS is not set
CONFIG_USB_SUSPEND=y
CONFIG_USB_OTG=y
# CONFIG_USB_OTG_WHITELIST is not set
CONFIG_USB_MON=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_MXC=y
CONFIG_USB_ACM=y
CONFIG_USB_PRINTER=y
CONFIG_USB_WDM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_CHIPIDEA=y
CONFIG_USB_CHIPIDEA_UDC=y
CONFIG_USB_CHIPIDEA_HOST=y
CONFIG_USB_PHY=y
CONFIG_NOP_USB_XCEIV=y
CONFIG_USB_GPIO_VBUS=y
CONFIG_USB_ULPI=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DEBUG_FILES=y
CONFIG_USB_GADGET_DEBUG_FS=y
CONFIG_USB_ETH=m
CONFIG_USB_MASS_STORAGE=m
CONFIG_USB_G_SERIAL=m
CONFIG_USB_CDC_COMPOSITE=m
CONFIG_USB_G_MULTI=m
CONFIG_USB_G_MULTI_CDC=y
CONFIG_USB_G_HID=m
CONFIG_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_SDHCI_ESDHC_IMX=y
CONFIG_MMC_SPI=m
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_WM831X_STATUS=m
CONFIG_LEDS_MC13783=m
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_MXC=y
CONFIG_RTC_DRV_WM831X=y
CONFIG_RTC_DRV_MC13XXX=m
CONFIG_STAGING=y
CONFIG_DRM_IMX=y
CONFIG_DRM_IMX_FB_HELPER=y
CONFIG_DRM_IMX_PARALLEL_DISPLAY=y
CONFIG_DRM_IMX_TVE=y
CONFIG_DRM_IMX_IPUV3=y
CONFIG_IIO=m
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT2_FS_POSIX_ACL=y
CONFIG_EXT2_FS_SECURITY=y
CONFIG_EXT2_FS_XIP=y
CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_POSIX_ACL=y
CONFIG_EXT3_FS_SECURITY=y
CONFIG_EXT4_FS=y
CONFIG_AUTOFS4_FS=y
CONFIG_ISO9660_FS=y
CONFIG_JOLIET=y
CONFIG_ZISOFS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_UBIFS_FS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_DEBUG_FS=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
# CONFIG_CRYPTO_HW is not set

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Introduction
============
Armadeus APFxx are Systems On Module (SOM) based on Freescale/NXP i.MX
processors associated with an FPGA (except on APF28). Non volatile
data are stored in on-module NOR or NAND Flash, depending on the
model. These SOM can be used on Armadeus development boards or with
custom docking boards.
Supported platforms
===================
Buildroot currently supports the following Armadeus platforms with the
associated defconfigs:
* APF27 SOM + devt board -> armadeus_apf27_defconfig
* APF51 SOM + devt board -> armadeus_apf51_defconfig
* APF28 SOM + devt board -> armadeus_apf28_defconfig
Vanilla Linux versions are preferred to Freescale's one in these
configurations.
How to build it
===============
Configure Buildroot
-------------------
Let's say you own an APFxx SOM with it's corresponding development
board, all you have to do is:
$ make armadeus_apfxx_defconfig
where "apfxx" is the version of your SOM.
Launch build
------------
$ make
Result of the build
-------------------
When the build is finished, you will end up with:
output/images/
+-- imx**-apfxxdev.dtb [1]
+-- rootfs.tar
+-- rootfs.ubi
+-- rootfs.ubifs
+-- uImage
[1] Only if the kernel version used uses a Device Tree.
Building U-Boot is currently not supported in these configurations.
Installation
============
You will require a serial connection to the board and a TFTP server on
your Host PC. Assuming your server is configured for exporting
/tftpboot/ directory, you will have to copy the generated images to
it:
$ cp output/images/uImage /tftpboot/apfxx-linux.bin
$ cp output/images/*.dtb /tftpboot/
$ cp output/images/rootfs.ubi /tftpboot/apfxx-rootfs.ubi
where "apfxx" is the version of your SOM, as used with _defconfigs.
Then on your serial terminal, all you have to do is:
* interrupt the boot process and access U-Boot console by pressing any
key when booting,
* configure board and server IP addresses with "ipaddr" and "serverip"
environment variables,
* if you want to update kernel:
BIOS > run update_kernel
* if you want to update device tree:
BIOS > run update_dtb
* if you want to update rootfs:
BIOS > run update_rootfs
That's it !

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label stm32mp157c-dk2-buildroot
kernel /boot/zImage
devicetree /boot/stm32mp157a-dhcor-avenger96.dtb
append root=/dev/mmcblk1p4 rootwait

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Arrow Avenger96
Intro
=====
This configuration supports the Arrow Avenger96 board:
https://wiki.dh-electronics.com/index.php/Avenger96
How to build
============
$ make avenger96_defconfig
$ make
How to write the microSD card
=============================
WARNING! This will destroy all the card content. Use with care!
Once the build process is finished you will have an image called
"sdcard.img" in the output/images/ directory.
Copy the bootable "sdcard.img" onto an microSD card with "dd":
$ sudo dd if=output/images/sdcard.img of=/dev/sdX
Boot the board
==============
(1) Configure the boot switches for boot from microsd: 1-0-1
(2) Insert the microSD card in the slot
(3) Plug a serial adapter (beware: 1v8 levels!) to the low speed
expansion connector
(4) Plug in power cable
(5) The system will start, with the console on UART, but also visible
on the screen.

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#
# This config reproduces the OpenBMC flash layout defined in Linux :
#
# arch/arm/boot/dts/openbmc-flash-layout.dtsi
#
# and included by aspeed-ast2500-evb.dts
#
flash nor-32M-256 {
pebsize = 4K
numpebs = 8K
minimum-io-unit-size = 256
}
image flash.img {
flash {
}
flashtype = "nor-32M-256"
partition uboot {
image = "u-boot.bin"
size = 384K
}
partition ubootenv {
/* TODO */
offset = 384K
size = 128K
}
partition fitimage {
image = "image.itb"
offset = 512K
size = 4352K
}
partition spare {
offset = 4864K
size = 27904K
}
}

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CONFIG_KERNEL_XZ=y
CONFIG_ARCH_MULTI_V7=n
CONFIG_MACH_ASPEED_G6=n
CONFIG_SMP=n
CONFIG_EXT4_FS=n
CONFIG_DEBUG_FS=n
CONFIG_SUSPEND=n

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Aspeed AST2500 EVB
Introduction
============
The AST2500 EVB is an evaluation board for the AST2500 SoC, most
commonly used as a Server Management Processor. It includes an 800MHz
ARM11 processor with DDR3 or DDR4 SDRAM (up to 1GB), SPI flash memory
devices for BMC and host firmwares and numerous controllers to drive
the server board.
https://www.aspeedtech.com/server_ast2500/
How to build it
===============
Configure buildroot:
$ make aspeed_ast2500evb_defconfig
Compile everything and build the rootfs image:
$ make
Result of the build
===================
After building, the output/images directory contains:
output/images/
├── aspeed-ast2500-evb.dtb
├── flash.img
├── image.itb
├── rootfs.cpio
├── rootfs.cpio.xz
├── rootfs.tar
├── u-boot.bin
└── zImage
Flashing the image
==================
To update the contents of the first flash device, copy flash.img :
$ flashcp flash.img /dev/mtd0
or simply the boot loader:
$ flashcp u-boot.bin /dev/mtd1
Preparing the board
===================
* Connect a serial line to the board
* Power-up the board
Booting the board
=================
The AST2500 EVB boots from the SPI flash device directly and loads a
first bootloader (usually U-Boot). U-Boot will attempt to load a Linux
kernel from the same flash device by default but other storage could
be used.
* from U-Boot
The FIT image image.itb can be used to boot the board from U-Boot
using tftp
* with QEMU
$ qemu-system-arm -M ast2500-evb \
-drive file=output/images/flash.img,format=raw,if=mtd \
-nographic
$ qemu-system-arm -M ast2500-evb \
-kernel output/images/zImage \
-initrd output/images/rootfs.cpio \
-dtb output/images/aspeed-ast2500-evb.dtb \
-nographic

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CONFIG_BOOTCOMMAND="bootm 20080000"
CONFIG_FIT=y
CONFIG_SHA256=y

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#
# This config reproduces the OpenBMC flash layout defined in Linux :
#
# arch/arm/boot/dts/openbmc-flash-layout-64.dtsi
#
# and included by aspeed-ast2600-evb.dts
#
flash nor-64M-256 {
pebsize = 4K
numpebs = 16K
minimum-io-unit-size = 256
}
image flash.img {
flash {
}
flashtype = "nor-64M-256"
partition uboot {
image = "u-boot.bin"
size = 896K
}
partition ubootenv {
/* TODO */
offset = 896K
size = 128K
}
partition fitimage {
image = "image.itb"
offset = 1M
size = 9M
}
partition spare {
offset = 10M
size = 54M
}
}

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Aspeed AST2600 EVB
Introduction
============
The AST2600 EVB is an evaluation board for the AST2600 SoC, most
commonly used as a Server Management Processor. It includes a
Dual-core ARM Cortex A7 processor with DDR4 SDRAM (up to 2GB), SPI
flash memory devices for BMC and host firmwares and numerous
controllers to drive the server board.
https://www.aspeedtech.com/server_ast2600/
How to build it
===============
Configure buildroot:
$ make aspeed_ast2600evb_defconfig
Compile everything and build the rootfs image:
$ make
Result of the build
===================
After building, the output/images directory contains:
output/images/
├── aspeed-ast2600-evb.dtb
├── flash.img
├── image.itb
├── rootfs.cpio
├── rootfs.cpio.xz
├── rootfs.tar
├── u-boot.bin
└── zImage
Flashing the image
==================
To update the contents of the first flash device, copy flash.img :
$ flashcp flash.img /dev/mtd0
or simply the boot loader:
$ flashcp u-boot.bin /dev/mtd1
Preparing the board
===================
* Connect a serial line to the board
* Power-up the board
Booting the board
=================
The AST2600 EVB boots from the SPI flash device directly and loads a
first bootloader (usually U-Boot). U-Boot will attempt to load a Linux
kernel from the same flash device by default but other storage could
be used.
* from U-Boot
The FIT image image.itb can be used to boot the board from U-Boot
using tftp
* with QEMU
$ qemu-system-arm -M ast2600-evb \
-drive file=output/images/flash.img,format=raw,if=mtd \
-nographic
$ qemu-system-arm -M ast2600-evb \
-kernel output/images/zImage \
-initrd output/images/rootfs.cpio \
-dtb output/images/aspeed-ast2600-evb.dtb \
-nographic

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/dts-v1/;
/ {
description = "Kernel and buildroot image";
#address-cells = <1>;
images {
kernel-1 {
description = "Linux kernel";
data = /incbin/("zImage");
type = "kernel";
arch = "arm";
os = "linux";
compression = "none";
load = <0x80001000>;
entry = <0x80001000>;
hash-1 {
algo = "sha256";
};
};
fdt-1 {
description = "Flattened Device Tree blob";
data = /incbin/("%BOARD_DTB%");
type = "flat_dt";
arch = "arm";
compression = "none";
hash-1 {
algo = "sha256";
};
};
ramdisk-1 {
description = "ramdisk";
data = /incbin/("rootfs.cpio.xz");
type = "ramdisk";
arch = "arm";
os = "linux";
compression = "none";
hash-1 {
algo = "sha256";
};
};
};
configurations {
default = "conf-1";
conf-1 {
description = "Boot Linux kernel with FDT blob, ramdisk";
kernel = "kernel-1";
fdt = "fdt-1";
ramdisk = "ramdisk-1";
hash-1 {
algo = "sha256";
};
};
};
};

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#!/bin/bash
BOARD_DIR="$(dirname $0)"
mkimage=$HOST_DIR/bin/mkimage
BOARD_DT=$(sed -n \
's/^BR2_LINUX_KERNEL_INTREE_DTS_NAME="\([a-z0-9\-]*\).*"$/\1/p' \
${BR2_CONFIG})
sed -e "s/%BOARD_DTB%/${BOARD_DT}.dtb/" \
$BOARD_DIR/image.its.template > $BINARIES_DIR/image.its
(cd $BINARIES_DIR && $mkimage -f image.its image.itb)
GENIMAGE_CFG="board/aspeed/${BOARD_DT#aspeed-*}/genimage.cfg"
GENIMAGE_TMP="${BUILD_DIR}/genimage.tmp"
rm -rf "${GENIMAGE_TMP}"
genimage \
--rootpath "${TARGET_DIR}" \
--tmppath "${GENIMAGE_TMP}" \
--inputpath "${BINARIES_DIR}" \
--outputpath "${BINARIES_DIR}" \
--config "${GENIMAGE_CFG}"
rm -f $BINARIES_DIR/image.its

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label Tinker linux
kernel /boot/uImage
devicetree /boot/rk3288-tinker.dtb
append console=ttyS2,115200n8 root=/dev/mmcblk0p1 rootwait

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image sdcard.img {
hdimage {
}
partition u-boot-tpl-spl-dtb {
in-partition-table = "no"
image = "u-boot-tpl-spl-dtb.img"
offset = 32K
}
partition u-boot-dtb {
in-partition-table = "no"
image = "u-boot-dtb.img"
offset = 8M
size = 30M
}
partition rootfs {
partition-type = 0x83
image = "rootfs.ext4"
}
}

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#!/bin/sh
MKIMAGE=$HOST_DIR/bin/mkimage
BOARD_DIR="$(dirname $0)"
$MKIMAGE -n rk3288 -T rksd -d $BINARIES_DIR/u-boot-tpl.bin $BINARIES_DIR/u-boot-tpl.img
cat $BINARIES_DIR/u-boot-tpl.img $BINARIES_DIR/u-boot-spl-dtb.bin > $BINARIES_DIR/u-boot-tpl-spl-dtb.img
install -m 0644 -D $BOARD_DIR/extlinux.conf $TARGET_DIR/boot/extlinux/extlinux.conf

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Tinker RK3288
=============
Tinker Board is a Single Board Computer (SBC) in an ultra-small form
factor that offers class-leading performance while leveraging outstanding
mechanical compatibility.
Tinker link:
https://www.asus.com/in/Single-Board-Computer/Tinker-Board/
Wiki link:
https://openedev.amarulasolutions.com/display/ODWIKI/Tinker+RK3288
How to build it
===============
$ make asus_tinker_rk3288_defconfig
Then you can edit the build options using
$ make menuconfig
Compile all and build rootfs image:
$ make
Prepare your SDCard
===================
Buildroot generates a ready-to-use SD card image that you can flash directly to
the card. The image will be in output/images/sdcard.img.
You can write this image directly to an SD card device (i.e. /dev/xxx):
$ sudo dd if=output/images/sdcard.img of=/dev/xxx
$ sudo sync
Finally, you can insert the SD card to the Tinker RK3288 board and boot it.
NOTE:
USB power supply requires more than the standard 500mA USB current, so
this board must be supplied from a capable port or from an external
AC/DC adapter. Otherwise it will hang forever while loading the kernel
image.

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# Image for SD card boot on Atmel at91sam9x5ek boards
#
image boot.vfat {
vfat {
files = {
"zImage",
"at91sam9g15ek.dtb",
"at91sam9g25ek.dtb",
"at91sam9g35ek.dtb",
"at91sam9x25ek.dtb",
"at91sam9x35ek.dtb",
"boot.bin",
"u-boot.bin"
}
file uboot.env {
image = "uboot-env.bin"
}
}
size = 16M
}
image sdcard.img {
hdimage {
}
partition boot {
partition-type = 0xC
bootable = "true"
image = "boot.vfat"
offset = 1M
}
partition rootfs {
partition-type = 0x83
image = "rootfs.ext4"
size = 512M
}
}

7
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bootargs=console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait video=Unknown-1:800x480-16
bootcmd=fatload mmc 0:1 0x21000000 at91sam9g35ek.dtb; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000
bootdelay=1
ethact=gmac0
stderr=serial
stdin=serial
stdout=serial

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#!/usr/bin/env bash
BUILDIR=$1
TTY=$2
BOARD=$3
family_at91sam9260ek="at91sam9260ek"
mach_at91sam9260ek="at91sam9260-ek"
dtb_at91sam9260ek="at91sam9260ek.dtb"
family_at91sam9g45m10ek="at91sam9m10g45ek"
mach_at91sam9g45m10ek="at91sam9m10-g45-ek"
dtb_at91sam9g45m10ek="at91sam9m10g45ek.dtb"
family_at91sam9rlek="at91sam9rlek"
mach_at91sam9rlek="at91sam9rl64-ek"
dtb_at91sam9rlek="at91sam9rlek.dtb"
family_at91sam9g15ek="at91sam9x5ek"
mach_at91sam9g15ek="at91sam9g15-ek"
dtb_at91sam9g15ek="at91sam9g15ek.dtb"
family_at91sam9g20ek="at91sam9g20ek"
mach_at91sam9g20ek="at91sam9g20-ek"
dtb_at91sam9g20ek="at91sam9g20ek.dtb"
family_at91sam9g25ek="at91sam9x5ek"
mach_at91sam9g25ek="at91sam9g25-ek"
dtb_at91sam9g25ek="at91sam9g25ek.dtb"
family_at91sam9g35ek="at91sam9x5ek"
mach_at91sam9g35ek="at91sam9g35-ek"
dtb_at91sam9g35ek="at91sam9g35ek.dtb"
family_at91sam9x25ek="at91sam9x5ek"
mach_at91sam9x25ek="at91sam9x25-ek"
dtb_at91sam9x25ek="at91sam9x25ek.dtb"
family_at91sam9x35ek="at91sam9x5ek"
mach_at91sam9x35ek="at91sam9x35-ek"
dtb_at91sam9x35ek="at91sam9x35ek.dtb"
family_sama5d31ek="sama5d3xek"
mach_sama5d31ek="at91sama5d3x-ek"
dtb_sama5d31ek="sama5d31ek.dtb"
family_sama5d31ek_revc="sama5d3xek"
mach_sama5d31ek_revc="at91sama5d3x-ek"
dtb_sama5d31ek_revc="sama5d31ek_revc.dtb"
family_sama5d33ek="sama5d3xek"
mach_sama5d33ek="at91sama5d3x-ek"
dtb_sama5d33ek="sama5d33ek.dtb"
family_sama5d33ek_revc="sama5d3xek"
mach_sama5d33ek_revc="at91sama5d3x-ek"
dtb_sama5d33ek_revc="sama5d33ek_revc.dtb"
family_sama5d34ek="sama5d3xek"
mach_sama5d34ek="at91sama5d3x-ek"
dtb_sama5d34ek="sama5d34ek.dtb"
family_sama5d34ek_revc="sama5d3xek"
mach_sama5d34ek_revc="at91sama5d3x-ek"
dtb_sama5d34ek_revc="sama5d34ek_revc.dtb"
family_sama5d35ek="sama5d3xek"
mach_sama5d35ek="at91sama5d3x-ek"
dtb_sama5d35ek="sama5d35ek.dtb"
family_sama5d35ek_revc="sama5d3xek"
mach_sama5d35ek_revc="at91sama5d3x-ek"
dtb_sama5d35ek_revc="sama5d35ek_revc.dtb"
family_sama5d36ek="sama5d3xek"
mach_sama5d36ek="at91sama5d3x-ek"
dtb_sama5d36ek="sama5d36ek.dtb"
family_sama5d36ek_revc="sama5d3xek"
mach_sama5d36ek_revc="at91sama5d3x-ek"
dtb_sama5d36ek_revc="sama5d36ek_revc.dtb"
family_sama5d3_xplained="sama5d3_xplained"
mach_sama5d3_xplained="at91sama5d3x-xplained"
dtb_sama5d3_xplained="at91-sama5d3_xplained.dtb"
family_sama5d4ek="sama5d4ek"
mach_sama5d4ek="at91sama5d4x-ek"
dtb_sama5d4ek="at91-sama5d4ek.dtb"
family_sama5d4_xplained="sama5d4_xplained"
mach_sama5d4_xplained="at91sama5d4x-ek"
dtb_sama5d4_xplained="at91-sama5d4_xplained.dtb"
usage() {
cat << EOF
Usage:
$0 <builddir_path> <interface> <board>
Available boards:
at91sam9260ek
at91sam9g45m10ek
at91sam9rlek
at91sam9g15ek
at91sam9g20ek
at91sam9g25ek
at91sam9x25ek
at91sam9g35ek
at91sam9x35ek
sama5d31ek
sama5d33ek
sama5d34ek
sama5d35ek
sama5d36ek
sama5d31ek_revc (Until rev. C)
sama5d33ek_revc (Until rev. C)
sama5d34ek_revc (Until rev. C)
sama5d35ek_revc (Until rev. C)
sama5d36ek_revc (Until rev. C)
sama5d3_xplained
sama5d4ek
sama5d4_xplained
Example:
$0 ./output /dev/ttyACM0 at91sam9g45m10ek
EOF
}
F="family_$BOARD"
M="mach_$BOARD"
D="dtb_$BOARD"
if [[ $# != 3 || -z ${!F} ]]; then
usage
exit 1
fi
video_mode="video=LVDS-1:800x480-16"
if [[ $BOARD == "*pda4" ]]; then
video_mode="video=LVDS-1:480x272-16"
fi
echo "Executing: ${!F} O=$1/images $1/host/bin/sam-ba $TTY ${!M} $(dirname $0)/nandflash.tcl -- ${!F} ${!D} $video_mode"
export O=$1/images
$1/host/bin/sam-ba $TTY ${!M} $(dirname $0)/nandflash.tcl -- ${!F} ${!D} $video_mode

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# ----------------------------------------------------------------------------
# ATMEL Microcontroller
# ----------------------------------------------------------------------------
# Copyright (c) 2015, Atmel Corporation
#
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# - Redistributions of source code must retain the above copyright notice,
# this list of conditions and the disclaimer below.
#
# Atmel's name may not be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
# DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
# OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
# EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
# ----------------------------------------------------------------------------
################################################################################
# Script data
################################################################################
# DBGU address for rm9200, 9260/9g20, 9261/9g10, 9rl, 9x5
set at91_base_dbgu0 0xfffff200
# DBGU address for 9263, 9g45, sama5d3
set at91_base_dbgu1 0xffffee00
# DBGU address for sama5d4
set at91_base_dbgu2 0xfc069000
set arch_exid_offset 0x44
# arch id
set arch_id_at91sam9g20 0x019905a0
set arch_id_at91sam9g45 0x819b05a0
set arch_id_at91sam9x5 0x819a05a0
set arch_id_at91sam9n12 0x819a07a0
set arch_id_sama5d3 0x8a5c07c0
## Find out at91sam9x5 variant to load the corresponding dtb file
array set at91sam9x5_variant {
0x00000000 at91sam9g15
0x00000001 at91sam9g35
0x00000002 at91sam9x35
0x00000003 at91sam9g25
0x00000004 at91sam9x25
}
## Find out sama5d3 variant to load the corresponding dtb file
array set sama5d3_variant {
0x00444300 sama5d31
0x00414300 sama5d33
0x00414301 sama5d34
0x00584300 sama5d35
0x00004301 sama5d36
}
## Find out sama5d4 variant
array set sama5d4_variant {
0x00000001 sama5d41
0x00000002 sama5d42
0x00000003 sama5d43
0x00000004 sama5d44
}
################################################################################
# proc uboot_env: Convert u-boot variables in a string ready to be flashed
# in the region reserved for environment variables
################################################################################
proc set_uboot_env {nameOfLstOfVar} {
upvar $nameOfLstOfVar lstOfVar
# sector size is the size defined in u-boot CFG_ENV_SIZE
set sectorSize [expr 0x20000 - 5]
set strEnv [join $lstOfVar "\0"]
while {[string length $strEnv] < $sectorSize} {
append strEnv "\0"
}
# \0 between crc and strEnv is the flag value for redundant environment
set strCrc [binary format i [::vfs::crc $strEnv]]
return "$strCrc\0$strEnv"
}
################################################################################
proc find_variant_name {boardType} {
global at91_base_dbgu0
global at91_base_dbgu1
global at91_base_dbgu2
global arch_exid_offset
global at91sam9x5_variant
global sama5d3_variant
global sama5d4_variant
set socName "none"
switch $boardType {
at91sam9x5ek {
set exidAddr [expr {$at91_base_dbgu0 + $arch_exid_offset}]
set chip_variant [format "0x%08x" [read_int $exidAddr]]
foreach {key value} [array get at91sam9x5_variant] {
if {$key == $chip_variant} {
set socName "$value"
break;
}
}
}
sama5d3xek {
set exidAddr [expr {$at91_base_dbgu1 + $arch_exid_offset}]
set chip_variant [format "0x%08x" [read_int $exidAddr]]
foreach {key value} [array get sama5d3_variant] {
#puts "-I- === $chip_variant ? $key ($value) ==="
if {$key == $chip_variant} {
set socName "$value"
break;
}
}
}
sama5d3_xplained {
set exidAddr [expr {$at91_base_dbgu1 + $arch_exid_offset}]
set chip_variant [format "0x%08x" [read_int $exidAddr]]
foreach {key value} [array get sama5d3_variant] {
#puts "-I- === $chip_variant ? $key ($value) ==="
if {$key == $chip_variant} {
set socName "$value"
break;
}
}
}
sama5d4ek {
set exidAddr [expr {$at91_base_dbgu2 + $arch_exid_offset}]
set chip_variant [format "0x%08x" [read_int $exidAddr]]
foreach {key value} [array get sama5d4_variant] {
#puts "-I- === $chip_variant ? $key ($value) ==="
if {$key == $chip_variant} {
set socName "$value"
break;
}
}
}
sama5d4_xplained {
set exidAddr [expr {$at91_base_dbgu2 + $arch_exid_offset}]
set chip_variant [format "0x%08x" [read_int $exidAddr]]
foreach {key value} [array get sama5d4_variant] {
#puts "-I- === $chip_variant ? $key ($value) ==="
if {$key == $chip_variant} {
set socName "$value"
break;
}
}
}
}
return "$socName"
}
proc find_variant_ecc {boardType} {
set eccType "none"
switch $boardType {
at91sam9x5ek {
set eccType 0xc0c00405
}
at91sam9n12ek {
set eccType 0xc0c00405
}
sama5d3xek {
set eccType 0xc0902405
}
sama5d3_xplained {
set eccType 0xc0902405
}
sama5d4ek {
set eccType 0xc1e04e07
}
sama5d4_xplained {
set eccType 0xc1e04e07
}
}
puts "-I- === eccType is $eccType ==="
return $eccType
}
proc get_kernel_load_addr {boardType} {
set kernel_load_addr 0x22000000
switch $boardType {
at91sam9m10g45ek {
set kernel_load_addr 0x72000000
}
}
return $kernel_load_addr
}
proc get_dtb_load_addr {boardType} {
set dtb_load_addr 0x21000000
switch $boardType {
at91sam9m10g45ek {
set dtb_load_addr 0x71000000
}
}
return $dtb_load_addr
}
################################################################################
# Main script: Load the linux demo in NandFlash,
# Update the environment variables
################################################################################
################################################################################
# check for proper variable initialization
if {! [info exists boardFamily]} {
puts "-I- === Parsing script arguments ==="
if {! [info exists env(O)]} {
puts "-E- === Binaries path not defined ==="
exit
}
set bootstrapFile "$env(O)/at91bootstrap.bin"
set ubootFile "$env(O)/u-boot.bin"
set kernelFile "$env(O)/zImage"
set rootfsFile "$env(O)/rootfs.ubi"
set build_uboot_env "yes"
set i 1
foreach arg $::argv {
puts "argument $i is $arg"
switch $i {
4 { set boardFamily $arg }
5 { set dtbFile "$env(O)/$arg" }
6 { set videoMode $arg }
}
incr i
}
}
puts "-I- === Board Family is $boardFamily ==="
set pmeccConfig [find_variant_ecc $boardFamily]
## Now check for the needed files
if {! [file exists $bootstrapFile]} {
puts "-E- === AT91Bootstrap file not found ==="
exit
}
if {! [file exists $ubootFile]} {
puts "-E- === U-Boot file not found ==="
exit
}
if {! [file exists $kernelFile]} {
puts "-E- === Linux kernel file not found ==="
exit
}
if {! [file exists $dtbFile]} {
puts "-E- === Device Tree binary: $dtbFile file not found ==="
exit
}
if {! [file exists $rootfsFile]} {
puts "-E- === Rootfs file not found ==="
exit
}
## NandFlash Mapping
set bootStrapAddr 0x00000000
set ubootAddr 0x00040000
set ubootEnvAddr 0x000c0000
set dtbAddr 0x00180000
set kernelAddr 0x00200000
set rootfsAddr 0x00800000
## u-boot variable
set kernelLoadAddr [get_kernel_load_addr $boardFamily]
set dtbLoadAddr [get_dtb_load_addr $boardFamily]
## NandFlash Mapping
set kernelSize [format "0x%08X" [file size $kernelFile]]
set dtbSize [format "0x%08X" [file size $dtbFile]]
set bootCmd "bootcmd=nand read $dtbLoadAddr $dtbAddr $dtbSize; nand read $kernelLoadAddr $kernelAddr $kernelSize; bootz $kernelLoadAddr - $dtbLoadAddr"
set rootfsSize [format "0x%08X" [file size $rootfsFile]]
lappend u_boot_variables \
"bootdelay=1" \
"baudrate=115200" \
"stdin=serial" \
"stdout=serial" \
"stderr=serial" \
"bootargs=console=ttyS0,115200 mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw $videoMode" \
"$bootCmd"
## Additional files to load
set ubootEnvFile "ubootEnvtFileNandFlash.bin"
## Start flashing procedure ##################################################
puts "-I- === Initialize the NAND access ==="
NANDFLASH::Init
if {$pmeccConfig != "none"} {
puts "-I- === Enable PMECC OS Parameters ==="
NANDFLASH::NandHeaderValue HEADER $pmeccConfig
}
puts "-I- === Erase all the NAND flash blocs and test the erasing ==="
NANDFLASH::EraseAllNandFlash
puts "-I- === Load AT91Bootstrap in the first sector ==="
if {$pmeccConfig != "none"} {
NANDFLASH::SendBootFilePmeccCmd $bootstrapFile
} else {
NANDFLASH::sendBootFile $bootstrapFile
}
puts "-I- === Load u-boot in the next sectors ==="
send_file {NandFlash} "$ubootFile" $ubootAddr 0
if {$build_uboot_env == "yes"} {
puts "-I- === Load the u-boot environment variables ==="
set fh [open "$ubootEnvFile" w]
fconfigure $fh -translation binary
puts -nonewline $fh [set_uboot_env u_boot_variables]
close $fh
send_file {NandFlash} "$ubootEnvFile" $ubootEnvAddr 0
}
puts "-I- === Load the Kernel image and device tree database ==="
send_file {NandFlash} "$dtbFile" $dtbAddr 0
send_file {NandFlash} "$kernelFile" $kernelAddr 0
if {$pmeccConfig != "none"} {
puts "-I- === Enable trimffs ==="
NANDFLASH::NandSetTrimffs 1
}
puts "-I- === Load the linux file system ==="
send_file {NandFlash} "$rootfsFile" $rootfsAddr 0
puts "-I- === DONE. ==="

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This document explains how to set up a basic Buildroot system on
various Atmel/Microchip boards. Additional details can also be found
on the Linux4SAM website: http://www.linux4sam.org
This guide covers the following configurations:
- at91sam9g45m10ek_defconfig
- at91sam9rlek_defconfig
- at91sam9x5ek_defconfig (at91sam9g15, at91sam9g25, at91sam9x25,
at91sam9g35 and at91sam9x35)
- atmel_sama5d3xek_defconfig (sama5d31, sama5d33, sama5d34, sama5d35,
sama5d36)
- atmel_sama5d3_xplained_defconfig
- atmel_sama5d3_xplained_dev_defconfig
- atmel_sama5d3_xplained_mmc_defconfig
- atmel_sama5d3_xplained_mmc_dev_defconfig
- atmel_sama5d4_xplained_defconfig
- atmel_sama5d4_xplained_dev_defconfig
- atmel_sama5d4_xplained_mmc_defconfig
- atmel_sama5d4_xplained_mmc_dev_defconfig
- atmel_sama5d2_xplained_mmc_defconfig
- atmel_sama5d2_xplained_mmc_dev_defconfig
- microchip_sama5d27_wlsom1_ek_mmc_defconfig
- microchip_sama5d27_wlsom1_ek_mmc_dev_defconfig
- microchip_sam9x60ek_mmc_defconfig
- microchip_sam9x60ek_mmc_dev_defconfig
- microchip_sama5d2_icp_mmc_defconfig
- microchip_sama5d2_icp_mmc_dev_defconfig
- microchip_sama7g5ek_mmc_defconfig
- microchip_sama7g5ek_mmc_dev_defconfig
These configurations will use AT91Bootstrap, u-boot and a linux kernel from
the git trees maintained by Atmel.
The configurations labeled as 'dev' provide a development rootfs with tools to
tests the features of the SoC:
- ALSA tools to test audio
- FFMPEG to record video from the ISI/ISC
- I2C, SPI, CAN, etc. tools
- modetest for LCD screens, HDMI
- Wilc1000/Wilc3000 firmware for the Atmel Wireless sdio module
- SSH for convenience
- GDB/GDB server for debug
Configuring and building Buildroot
==================================
For the Xplained/Evaluation Kit boards, the Buildroot configuration is
provided to boot from an SD card. Those configurations are labeled as
'mmc'. In this case, after building Buildroot, follow the instructions
in the "Preparing the SD card" section.
For the other configurations listed above, the Buildroot configuration
assumes the system will be flashed on NAND. In this case, after
building Buildroot, follow the instructions in the "Flashing the NAND
using SAM-BA" section below.
To configure and build Buildroot, run:
make <board>_defconfig
make
Flashing the NAND using SAM-BA
==============================
Flashing the board
------------------
Connect the board:
o at91sam9g45m10ek: DBGU: J10, USB sam-ba: J14
o at91sam9rlek: DBGU: J19, USB sam-ba: J21
o at91sam9x5ek: DBGU: J11, USB sam-ba: J20
o sama5d3xek: DBGU: J14, USB sam-ba: J20
o sama5d3 Xplained: DBGU: J23, USB sam-ba: J6
o sama5d4ek: DBGU: J22 or J24, USB sam-ba: J1
o sama5d4 Xplained: DBGU: J1, USB sam-ba: J11
Start the board in RomBOOT:
o at91sam9g45m10ek:
1. open JP8, JP10 and JP12
2. start the board
3. close JP8, JP10 and JP12
o at91sam9rlek:
1. J11 on 1-2 (BMS=1), open J12 and J13
2. start the board
3. close J12 and J13
o at91sam9x5ek:
1. open JP9 and:
- Cogent: open *NCS jumper
- Embest: open SW1
- Ronetix: open J1 and J2
2. start the board
3. close JP9 and:
- Cogent: close *NCS jumper
- Embest: close SW1 (ON position)
- Ronetix: close J1 and J2
o sama5d3xek:
1. start the board
2. push BP4 and BP1
3. release BP1
4. release BP4
o sama5d3 Xplained:
1. open JP5 (NANDCS) and JP6 (SPICS)
2. start the board
3. close JP5 ans JP6
o sama5d4ek:
1. start the board
2. push BP3 and BP4
3. release BP4
4. release BP3
o sama5d4 Xplained:
1. close JP7 (BOOT_DIS)
2. start the board
3. open JP7
"RomBOOT" should appear on your console (this should be ttyUSBx or ttyACMx)
Now locate the USB sam-ba interface it should be ttyACMx, usually ttyACM0
dmesg on your machine should give:
usb 1-2.1.4: New USB device found, idVendor=03eb, idProduct=6124
usb 1-2.1.4: New USB device strings: Mfr=0, Product=0, SerialNumber=0
cdc_acm 1-2.1.4:1.0: ttyACM0: USB ACM device
Look for idVendor=03eb, idProduct=6124, this is the interface you want to use.
You can then flash the board using the provided flasher.sh script in board/atmel:
board/atmel/flasher.sh <builddir_path> <interface> <board>
For example, for an out of tree build made in
/tmp/atmel_sama5d3_xplained/ for the sama5d3 Xplained, you would use:
board/atmel/flasher.sh /tmp/atmel_sama5d3_xplained/ /dev/ttyACM0 sama5d3_xplained
Reboot, the system should boot up to the buildroot login invite.
Preparing the SD card
=====================
An image named sdcard.img is automatically generated. With this image,
you no longer have to care about the creation of the partition and
copying files to the SD card.
You need at least a 1GB SD card. All the data on the SD card will be
lost. To copy the image on the SD card:
/!\ Caution be sure to do it on the right mmcblk device /!\
dd if=output/images/sdcard.img of=/dev/mmcblk0
Insert your SD card in your Xplained/Evaluation Kit board, and
enjoy. The default U-Boot environment will load properly the kernel
and Device Tree blob from the first partition of the SD card, so
everything works automatically.
By default a 16MB FAT partition is created. It contains at91bootstrap,
u-boot, the kernel image and all dtb variants for your board. The dtb
used is the basic one:
U-Boot> print
[...]
bootcmd=fatload mmc 1:1 0x21000000 at91-sama5d2_xplained.dtb; fatload mmc 1:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000
[...]
If you want to use a variant such as the _pda7 one, you will have to
update your u-boot environment:
U-Boot> setenv bootcmd 'fatload mmc 1:1 0x21000000 at91-sama5d2_xplained_pda7.dtb; fatload mmc 1:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000'
U-Boot> save
Saving Environment to FAT...
writing uboot.env
done
A 512MB ext4 partition is also created to store the rootfs generated.
If you want to customize the size of the partitions and their content,
take a look at the the genimage.cfg file in the board directory.

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# Image for SD card boot on Atmel SAMA5D2 Xplained boards
#
image boot.vfat {
vfat {
files = {
"zImage",
"at91-sama5d27_som1_ek.dtb",
"boot.bin",
"u-boot.bin"
}
}
size = 16M
}
image sdcard.img {
hdimage {
}
partition boot {
partition-type = 0xC
bootable = "true"
image = "boot.vfat"
offset = 1M
}
partition rootfs {
partition-type = 0x83
image = "rootfs.ext4"
size = 512M
}
}

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# Image for SD card boot on Microchip SAMA5D27 WLSOM1 EK
#
image boot.vfat {
vfat {
files = {
"zImage",
"at91-sama5d27_wlsom1_ek.dtb",
"boot.bin",
"u-boot.bin"
}
}
size = 16M
}
image sdcard.img {
hdimage {
}
partition boot {
partition-type = 0xC
bootable = "true"
image = "boot.vfat"
offset = 1M
}
partition rootfs {
partition-type = 0x83
image = "rootfs.ext4"
size = 512M
}
}

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# Image for SD card boot on Atmel SAMA5D2 Xplained boards
#
image boot.vfat {
vfat {
files = {
"zImage",
"at91-sama5d2_xplained.dtb",
"boot.bin",
"u-boot.bin"
}
}
size = 16M
}
image sdcard.img {
hdimage {
}
partition boot {
partition-type = 0xC
bootable = "true"
image = "boot.vfat"
offset = 1M
}
partition rootfs {
partition-type = 0x83
image = "rootfs.ext4"
size = 512M
}
}

32
board/atmel/sama5d3_xplained_mmc/genimage.cfg Normal file
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# Image for SD card boot on Atmel SAMA5D3 Xplained boards
#
image boot.vfat {
vfat {
files = {
"zImage",
"at91-sama5d3_xplained.dtb",
"boot.bin",
"u-boot.bin"
}
}
size = 16M
}
image sdcard.img {
hdimage {
}
partition boot {
partition-type = 0xC
bootable = "true"
image = "boot.vfat"
offset = 1M
}
partition rootfs {
partition-type = 0x83
image = "rootfs.ext4"
size = 512M
}
}

32
board/atmel/sama5d4_xplained_mmc/genimage.cfg Normal file
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# Image for SD card boot on Atmel SAMA5D4 Xplained boards
#
image boot.vfat {
vfat {
files = {
"zImage",
"at91-sama5d4_xplained.dtb",
"boot.bin",
"u-boot.bin"
}
}
size = 16M
}
image sdcard.img {
hdimage {
}
partition boot {
partition-type = 0xC
bootable = "true"
image = "boot.vfat"
offset = 1M
}
partition rootfs {
partition-type = 0x83
image = "rootfs.ext4"
size = 512M
}
}

247
board/avnet/s6lx9_microboard/lx9_mmu.dts Normal file
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/*
* Device Tree Generator version: 1.3
*
* (C) Copyright 2007-2008 Xilinx, Inc.
* (C) Copyright 2007-2009 Michal Simek
*
* Michal SIMEK <monstr@monstr.eu>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
* CAUTION: This file is automatically generated by libgen.
* Version: Xilinx EDK 13.2 EDK_O.61xd
*
* XPS project directory: device-tree_bsp_230-orig
*/
/dts-v1/;
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,microblaze";
model = "testing";
MCB3_LPDDR: memory@80000000 {
device_type = "memory";
reg = < 0x80000000 0x4000000 >;
} ;
aliases {
ethernet0 = &Ethernet_MAC;
serial0 = &USB_Uart;
} ;
chosen {
bootargs = "console=ttyUL0";
linux,stdout-path = "/axi@0/serial@40600000";
} ;
cpus {
#address-cells = <1>;
#cpus = <0x1>;
#size-cells = <0>;
microblaze_0: cpu@0 {
clock-frequency = <66666667>;
compatible = "xlnx,microblaze-8.20.a";
d-cache-baseaddr = <0x80000000>;
d-cache-highaddr = <0x83ffffff>;
d-cache-line-size = <0x10>;
d-cache-size = <0x2000>;
device_type = "cpu";
i-cache-baseaddr = <0x80000000>;
i-cache-highaddr = <0x83ffffff>;
i-cache-line-size = <0x10>;
i-cache-size = <0x2000>;
model = "microblaze,8.20.a";
reg = <0>;
timebase-frequency = <66666667>;
xlnx,addr-tag-bits = <0xd>;
xlnx,allow-dcache-wr = <0x1>;
xlnx,allow-icache-wr = <0x1>;
xlnx,area-optimized = <0x0>;
xlnx,avoid-primitives = <0x0>;
xlnx,branch-target-cache-size = <0x0>;
xlnx,cache-byte-size = <0x2000>;
xlnx,d-axi = <0x1>;
xlnx,d-lmb = <0x1>;
xlnx,d-plb = <0x0>;
xlnx,data-size = <0x20>;
xlnx,dcache-addr-tag = <0xd>;
xlnx,dcache-always-used = <0x1>;
xlnx,dcache-byte-size = <0x2000>;
xlnx,dcache-data-width = <0x0>;
xlnx,dcache-force-tag-lutram = <0x0>;
xlnx,dcache-interface = <0x0>;
xlnx,dcache-line-len = <0x4>;
xlnx,dcache-use-fsl = <0x0>;
xlnx,dcache-use-writeback = <0x0>;
xlnx,dcache-victims = <0x0>;
xlnx,debug-enabled = <0x1>;
xlnx,div-zero-exception = <0x0>;
xlnx,dynamic-bus-sizing = <0x1>;
xlnx,ecc-use-ce-exception = <0x0>;
xlnx,edge-is-positive = <0x1>;
xlnx,endianness = <0x1>;
xlnx,family = "spartan6";
xlnx,fault-tolerant = <0x0>;
xlnx,fpu-exception = <0x0>;
xlnx,freq = <0x3f940ab>;
xlnx,fsl-data-size = <0x20>;
xlnx,fsl-exception = <0x0>;
xlnx,fsl-links = <0x0>;
xlnx,i-axi = <0x0>;
xlnx,i-lmb = <0x1>;
xlnx,i-plb = <0x0>;
xlnx,icache-always-used = <0x1>;
xlnx,icache-data-width = <0x0>;
xlnx,icache-force-tag-lutram = <0x0>;
xlnx,icache-interface = <0x0>;
xlnx,icache-line-len = <0x4>;
xlnx,icache-streams = <0x0>;
xlnx,icache-use-fsl = <0x0>;
xlnx,icache-victims = <0x0>;
xlnx,ill-opcode-exception = <0x0>;
xlnx,instance = "microblaze_0";
xlnx,interconnect = <0x2>;
xlnx,interconnect-m-axi-dc-aw-register = <0x0>;
xlnx,interconnect-m-axi-dc-read-issuing = <0x2>;
xlnx,interconnect-m-axi-dc-w-register = <0x0>;
xlnx,interconnect-m-axi-dc-write-issuing = <0x20>;
xlnx,interconnect-m-axi-dp-read-issuing = <0x1>;
xlnx,interconnect-m-axi-dp-write-issuing = <0x1>;
xlnx,interconnect-m-axi-ic-read-issuing = <0x2>;
xlnx,interconnect-m-axi-ip-read-issuing = <0x1>;
xlnx,interrupt-is-edge = <0x0>;
xlnx,lockstep-slave = <0x0>;
xlnx,mmu-dtlb-size = <0x1>;
xlnx,mmu-itlb-size = <0x1>;
xlnx,mmu-privileged-instr = <0x0>;
xlnx,mmu-tlb-access = <0x3>;
xlnx,mmu-zones = <0x2>;
xlnx,number-of-pc-brk = <0x1>;
xlnx,number-of-rd-addr-brk = <0x0>;
xlnx,number-of-wr-addr-brk = <0x0>;
xlnx,opcode-0x0-illegal = <0x0>;
xlnx,optimization = <0x0>;
xlnx,pvr = <0x0>;
xlnx,pvr-user1 = <0x0>;
xlnx,pvr-user2 = <0x0>;
xlnx,reset-msr = <0x0>;
xlnx,sco = <0x0>;
xlnx,stream-interconnect = <0x0>;
xlnx,unaligned-exceptions = <0x0>;
xlnx,use-barrel = <0x1>;
xlnx,use-branch-target-cache = <0x0>;
xlnx,use-dcache = <0x1>;
xlnx,use-div = <0x0>;
xlnx,use-ext-brk = <0x1>;
xlnx,use-ext-nm-brk = <0x1>;
xlnx,use-extended-fsl-instr = <0x0>;
xlnx,use-fpu = <0x0>;
xlnx,use-hw-mul = <0x1>;
xlnx,use-icache = <0x1>;
xlnx,use-interrupt = <0x1>;
xlnx,use-mmu = <0x3>;
xlnx,use-msr-instr = <0x1>;
xlnx,use-pcmp-instr = <0x0>;
xlnx,use-stack-protection = <0x0>;
} ;
} ;
axi4lite_0: axi@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,axi-interconnect-1.03.a", "simple-bus";
ranges ;
Ethernet_MAC: ethernet@40e00000 {
compatible = "xlnx,axi-ethernetlite-1.00.a", "xlnx,xps-ethernetlite-1.00.a";
device_type = "network";
interrupt-parent = <&microblaze_0_intc>;
interrupts = < 2 0 >;
local-mac-address = [ 00 0a 35 aa de 00 ];
// phy-handle = <&phy0>;
reg = < 0x40e00000 0x10000 >;
xlnx,duplex = <0x1>;
xlnx,family = "spartan6";
xlnx,include-global-buffers = <0x0>;
xlnx,include-internal-loopback = <0x0>;
xlnx,include-mdio = <0x1>;
xlnx,include-phy-constraints = <0x1>;
xlnx,interconnect-s-axi-read-acceptance = <0x1>;
xlnx,interconnect-s-axi-write-acceptance = <0x1>;
xlnx,rx-ping-pong = <0x0>;
xlnx,s-axi-aclk-period-ps = <0x3a98>;
xlnx,s-axi-id-width = <0x1>;
xlnx,s-axi-supports-narrow-burst = <0x0>;
xlnx,tx-ping-pong = <0x0>;
/*
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy0: phy@7 {
compatible = "marvell,88e1111";
device_type = "ethernet-phy";
reg = <7>;
} ;
} ;
*/
} ;
SPI_FLASH: spi@40a00000 {
compatible = "xlnx,axi-spi-1.01.a", "xlnx,xps-spi-2.00.a";
interrupt-parent = <&microblaze_0_intc>;
interrupts = < 1 2 >;
reg = < 0x40a00000 0x10000 >;
xlnx,family = "spartan6";
xlnx,fifo-exist = <0x1>;
xlnx,num-ss-bits = <0x1>;
xlnx,num-transfer-bits = <0x8>;
xlnx,sck-ratio = <0x4>;
} ;
USB_Uart: serial@40600000 {
clock-frequency = <66666667>;
compatible = "xlnx,axi-uartlite-1.02.a", "xlnx,xps-uartlite-1.00.a";
current-speed = <115200>;
device_type = "serial";
interrupt-parent = <&microblaze_0_intc>;
interrupts = < 3 0 >;
port-number = <0>;
reg = < 0x40600000 0x10000 >;
xlnx,baudrate = <0x1c200>;
xlnx,data-bits = <0x8>;
xlnx,family = "spartan6";
xlnx,odd-parity = <0x1>;
xlnx,s-axi-aclk-freq-hz = <0x3f940ab>;
xlnx,use-parity = <0x0>;
} ;
microblaze_0_intc: interrupt-controller@41200000 {
#interrupt-cells = <0x2>;
compatible = "xlnx,axi-intc-1.01.a", "xlnx,xps-intc-1.00.a";
interrupt-controller ;
reg = < 0x41200000 0x10000 >;
xlnx,kind-of-intr = <0xc>;
xlnx,num-intr-inputs = <0x4>;
} ;
system_timer: timer@41c00000 {
clock-frequency = <66666667>;
compatible = "xlnx,axi-timer-1.02.a", "xlnx,xps-timer-1.00.a";
interrupt-parent = <&microblaze_0_intc>;
interrupts = < 0 2 >;
reg = < 0x41c00000 0x10000 >;
xlnx,count-width = <0x20>;
xlnx,family = "spartan6";
xlnx,gen0-assert = <0x1>;
xlnx,gen1-assert = <0x1>;
xlnx,one-timer-only = <0x0>;
xlnx,trig0-assert = <0x1>;
xlnx,trig1-assert = <0x1>;
} ;
} ;
} ;

68
board/avnet/s6lx9_microboard/lx9_mmu_defconfig Normal file
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CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE="rootfs.cpio"
CONFIG_INITRAMFS_COMPRESSION_GZIP=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_EXPERT=y
CONFIG_KALLSYMS_ALL=y
CONFIG_KALLSYMS_EXTRA_PASS=y
# CONFIG_HOTPLUG is not set
# CONFIG_BASE_FULL is not set
# CONFIG_FUTEX is not set
# CONFIG_EPOLL is not set
# CONFIG_SIGNALFD is not set
# CONFIG_SHMEM is not set
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_OPT_LIB_ASM is not set
CONFIG_KERNEL_BASE_ADDR=0x80000000
CONFIG_XILINX_MICROBLAZE0_FAMILY="spartan6"
CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1
# CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR is not set
CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1
CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1
CONFIG_XILINX_MICROBLAZE0_HW_VER="8.20.a"
CONFIG_HZ_100=y
CONFIG_MMU=y
CONFIG_CMDLINE_BOOL=y
CONFIG_CMDLINE_FORCE=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
# CONFIG_INET_LRO is not set
# CONFIG_IPV6 is not set
CONFIG_PROC_DEVICETREE=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=8192
CONFIG_NETDEVICES=y
CONFIG_NET_ETHERNET=y
CONFIG_XILINX_EMACLITE=y
# CONFIG_INPUT is not set
# CONFIG_SERIO is not set
# CONFIG_VT is not set
CONFIG_SERIAL_UARTLITE=y
CONFIG_SERIAL_UARTLITE_CONSOLE=y
# CONFIG_HW_RANDOM is not set
# CONFIG_HWMON is not set
# CONFIG_USB_SUPPORT is not set
CONFIG_EXT2_FS=y
# CONFIG_DNOTIFY is not set
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_CIFS=y
CONFIG_CIFS_STATS=y
CONFIG_CIFS_STATS2=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DETECT_HUNG_TASK=y
CONFIG_DEBUG_SLAB=y
CONFIG_DEBUG_SPINLOCK=y
CONFIG_DEBUG_INFO=y
CONFIG_EARLY_PRINTK=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set

70
board/avnet/s6lx9_microboard/readme.txt Normal file
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This is the buildroot board support for the Avnet Spartan6 LX9 MicroBoard.
The Avnet S6LX9 Microboard is a small USB-Stick sized module containing
a Spartan6 FPGA capable of running the Microblaze softcore processor
together with RAM and FLASH memory.
The board can be bought from Avnet (avnet.com) or from Trenz Electronic
(www.trenz-electronic.de) for a low price.
To run the Linux built with buildroot you have to install the FPGA bitfile
and u-boot as described in the tutorial AvtS6LX9MicroBoard_SW302_PetaLinux
available on http://www.em.avnet.com/s6microboard
On this site also is a forum containing information on how to build your own
Microblaze processor for the Microboard.
The image file (default name is simpleImage.lx9_mmu.ub) has to be copied
to your tftp folder (often /tftpboot/) or can be programmed into the
board's SPI flash.
Sample session:
$ make s6lx9_microboard_defconfig
$ make
$ cp build/linux-<version>/arch/microblaze/boot/simpleImage.lx9_mmu.ub /tftpboot/br12.2a.ub
$ minicom
<hit the reset button on the S6LX9 Microboard>
Icache:ON
Dcache:ON
U-Boot Start:0x83f00000
SF: Got idcode 20 ba 18 10 01
*** Warning - bad CRC, using default environment
Net: Xilinx_Emaclite
MAC: 00:0a:35:00:63:37
U-BOOT for Avnet-LX9-Microboard-AXI-tiny-13.1
BOOTP broadcast 1
DHCP client bound to address 192.168.11.122
Hit any key to stop autoboot: 0
U-Boot-PetaLinux> tftp br12.2a.ub
Using Xilinx_Emaclite device
TFTP from server 192.168.11.10; our IP address is 192.168.11.122
Filename 'br12.2a.ub'.
Load address: 0x80002000
Loading: #################################################################
#################################################################
#################################################################
#################################################################
#################################################################
##############################
done
Bytes transferred = 5207724 (4f76ac hex)
U-Boot-PetaLinux> bootm
## Booting kernel from Legacy Image at 80002000 ...
Image Name: Linux-3.1.0
Image Type: MicroBlaze Linux Kernel Image (uncompressed)
Data Size: 5207660 Bytes = 5 MB
Load Address: 80000000
Entry Point: 80000000
Verifying Checksum ... OK
Loading Kernel Image ... OK
OK
## Transferring control to Linux (at address 80000000), 0x80000000 ramdisk 0x00000000, FDT 0x00000000...
Early console on uartlite at 0x40600000
..... boot log skipped
Welcome to Microblaze Buildroot
Microblaze login:

7
board/bananapi/bananapi-m2-ultra/boot.cmd Normal file
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setenv bootargs console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rootwait
mmc dev 0
fatload mmc 0 $kernel_addr_r zImage
fatload mmc 0 $fdt_addr_r sun8i-r40-bananapi-m2-ultra.dtb
bootz $kernel_addr_r - $fdt_addr_r

34
board/bananapi/bananapi-m2-ultra/genimage.cfg Normal file
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image boot.vfat {
vfat {
files = {
"zImage",
"sun8i-r40-bananapi-m2-ultra.dtb",
"boot.scr"
}
}
size = 64M
}
image sdcard.img {
hdimage {
}
partition u-boot {
in-partition-table = "no"
image = "u-boot-sunxi-with-spl.bin"
offset = 8K
size = 1016K # 1MB - 8KB
}
partition boot {
partition-type = 0xC
bootable = "true"
image = "boot.vfat"
}
partition rootfs {
partition-type = 0x83
image = "rootfs.ext4"
}
}

35
board/bananapi/bananapi-m2-ultra/readme.txt Normal file
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Intro
=====
This default configuration will allow you to start experimenting with the
buildroot environment for the Bananapi M2 ULtra. With the current
configuration it will bring-up the board, and allow access through the
serial console.
Bananapi M2 Ultra link:
http://www.banana-pi.org/m2u.html
This configuration uses U-Boot mainline and kernel mainline.
How to build
============
$ make bananapi_m2_ultra_defconfig
$ make
Note: you will need access to the internet to download the required
sources.
How to write the SD card
========================
Once the build process is finished you will have an image called "sdcard.img"
in the output/images/ directory.
Copy the bootable "sdcard.img" onto an SD card with "dd":
$ sudo dd if=output/images/sdcard.img of=/dev/sdX
$ sudo sync
Insert the micro SDcard in your Bananapi M2 Ultra and power it up. The console
is on the serial line, 115200 8N1.

7
board/bananapi/bananapi-m2-zero/boot.cmd Normal file
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setenv bootargs console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rootwait
mmc dev 0
fatload mmc 0 $kernel_addr_r zImage
fatload mmc 0 $fdt_addr_r sun8i-h2-plus-bananapi-m2-zero.dtb
bootz $kernel_addr_r - $fdt_addr_r

34
board/bananapi/bananapi-m2-zero/genimage.cfg Normal file
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image boot.vfat {
vfat {
files = {
"zImage",
"sun8i-h2-plus-bananapi-m2-zero.dtb",
"boot.scr"
}
}
size = 64M
}
image sdcard.img {
hdimage {
}
partition u-boot {
in-partition-table = "no"
image = "u-boot-sunxi-with-spl.bin"
offset = 8K
size = 1016K # 1MB - 8KB
}
partition boot {
partition-type = 0xC
bootable = "true"
image = "boot.vfat"
}
partition rootfs {
partition-type = 0x83
image = "rootfs.ext4"
}
}

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