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Update for v1.0.14

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This commit is contained in:
James Deng 2024-08-31 14:23:34 +08:00
parent 91ab28da0f
commit 939bccfdae
55 changed files with 1975 additions and 118 deletions
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16
arch/riscv/dts/k1-x.dtsi
View file

@ -529,6 +529,16 @@
status = "disabled";
};
pwm1: pwm@d401a400 {
compatible = "spacemit,k1x-pwm";
reg = <0x0 0xd401a000 0x0 0x10>;
#pwm-cells = <2>;
clocks = <&ccu CLK_PWM0>;
resets = <&reset RESET_PWM0>;
k1x,pwm-disable-fd = <1>;
status = "disabled";
};
pwm14: pwm@d4021800 {
compatible = "spacemit,k1x-pwm";
reg = <0x0 0xd4021800 0x0 0x10>;
@ -539,6 +549,12 @@
status = "disabled";
};
backlight: backlight {
compatible = "pwm-backlight";
brightness-levels = <0 4 8 16 32 64 100 128 255>;
status = "disabled";
};
pcie0_rc: pcie@ca000000 {
compatible = "k1x,dwc-pcie";
reg = <0x0 0xca000000 0x0 0x00001000>, /* dbi */

14
arch/riscv/dts/k1-x_MINI-PC.dts
View file

@ -240,6 +240,18 @@
status = "okay";
};
&pwm14 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm14_1>;
status = "disabled";
};
&backlight {
pwms = <&pwm14 0 2000>;
default-brightness-level = <8>;
status = "disabled";
};
&mipi_dsi {
status = "disabled";
};
@ -247,7 +259,7 @@
&panel {
dcp-gpios = <&gpio 82 0>;
dcn-gpios = <&gpio 83 0>;
bl-gpios = <&gpio 44 0>;
backlight = <&backlight>;
reset-gpios = <&gpio 81 0>;
status = "disabled";
};

14
arch/riscv/dts/k1-x_MUSE-Book.dts
View file

@ -195,6 +195,18 @@
};
};
&pwm14 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm14_1>;
status = "okay";
};
&backlight {
pwms = <&pwm14 0 2000>;
default-brightness-level = <7>;
status = "okay";
};
&mipi_dsi {
bit-clk = <933000000>;
pix-clk = <142000000>;
@ -214,7 +226,7 @@
&panel {
force-attached = "lt8911ext_edp_1080p";
bl-gpios = <&gpio 44 0>;
backlight = <&backlight>;
status = "okay";
};

14
arch/riscv/dts/k1-x_MUSE-Card.dts
View file

@ -258,6 +258,18 @@
status = "okay";
};
&pwm14 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm14_1>;
status = "disabled";
};
&backlight {
pwms = <&pwm14 0 2000>;
default-brightness-level = <6>;
status = "disabled";
};
&mipi_dsi {
status = "disabled";
};
@ -265,7 +277,7 @@
&panel {
dcp-gpios = <&gpio 40 0>;
dcn-gpios = <&gpio 83 0>;
bl-gpios = <&gpio 44 0>;
backlight = <&backlight>;
reset-gpios = <&gpio 41 0>;
status = "disabled";
};

34
arch/riscv/dts/k1-x_MUSE-Paper-mini-4g.dts
View file

@ -235,3 +235,37 @@
regulator-off-in-suspend;
};
};
&dpu {
status = "okay";
};
&pwm14 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm14_1>;
status = "okay";
};
&backlight {
pwms = <&pwm14 0 2000>;
default-brightness-level = <6>;
status = "okay";
};
&mipi_dsi {
bit-clk = <614400000>;
pix-clk = <76800000>;
status = "okay";
};
&panel {
force-attached = "jd9365dah3";
dcp-gpios = <&gpio 34 0>;
dcn-gpios = <&gpio 42 0>;
avee-gpios = <&gpio 35 0>;
avdd-gpios = <&gpio 36 0>;
backlight = <&backlight>;
enable-gpios = <&gpio 31 0>;
reset-gpios = <&gpio 30 0>;
status = "okay";
};

70
arch/riscv/dts/k1-x_MUSE-Paper.dts
View file

@ -12,6 +12,9 @@
aliases {
efuse_power = &ldo_31;
battery = &cw2015;
charger = &sgm41515;
charger-2 = &secsgm41515;
};
memory@0 {
@ -35,7 +38,6 @@
vbus-gpios = <&gpio 79 0>; /* gpio_79 for usb3 pwren */
status = "disabled";
};
};
&cpus {
@ -74,8 +76,27 @@
};
&i2c4 {
clock-frequency = <400000>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c4_2>;
status = "okay";
cw2015: cw2015@62 {
compatible = "spacemit,cw2015";
reg = <0x62>;
cellwise,battery-profile = /bits/ 8 <
0x17 0x67 0x73 0x69 0x68 0x65 0x64 0x55
0x75 0x60 0x4A 0x57 0x57 0x4E 0x42 0x3A
0x30 0x28 0x23 0x1E 0x23 0x35 0x46 0x4D
0x14 0x86 0x06 0x66 0x25 0x45 0x51 0x63
0x72 0x69 0x66 0x6B 0x3F 0x1B 0x78 0x39
0x0A 0x2F 0x1A 0x46 0x88 0x94 0x9B 0x12
0x3B 0x5F 0x9A 0xB6 0x80 0x57 0x7F 0xCB
0x2F 0x00 0x64 0xA5 0xB5 0xC1 0x46 0xAE
>;
status = "okay";
};
};
&i2c5 {
@ -85,13 +106,40 @@
};
&i2c6 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c6_0>;
status = "okay";
secsgm41515: sgm41515-2 {
compatible = "spacemit,sgm41515";
reg = <0x1a>;
ch-en-gpios = <&gpio 46 0>;
nqon-gpios = <&gpio 43 0>;
sgm41515-ichrg-uA = <1000000>;
sgm41515-vchrg-uV = <4350000>;
sgm41515-cur-input-uA = <2000000>;
status = "okay";
};
};
&i2c7 {
status = "disabled";
};
&i2c8 {
sgm41515: sgm41515 {
compatible = "spacemit,sgm41515";
reg = <0x1a>;
ch-en-gpios = <&gpio 117 0>;
nqon-gpios = <&gpio 115 0>;
sgm41515-ichrg-uA = <1000000>;
sgm41515-vchrg-uV = <4350000>;
sgm41515-cur-input-uA = <2000000>;
status = "okay";
};
};
&pinctrl {
pinctrl-single,gpio-range = <
&range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4)
@ -240,6 +288,18 @@
};
};
&pwm14 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm14_1>;
status = "okay";
};
&backlight {
pwms = <&pwm14 0 2000>;
default-brightness-level = <4>;
status = "okay";
};
&mipi_dsi {
status = "okay";
};
@ -250,7 +310,7 @@
dcn-gpios = <&gpio 42 0>;
avee-gpios = <&gpio 35 0>;
avdd-gpios = <&gpio 36 0>;
bl-gpios = <&gpio 44 0>;
backlight = <&backlight>;
enable-gpios = <&gpio 31 0>;
reset-gpios = <&gpio 30 0>;
status = "okay";

14
arch/riscv/dts/k1-x_MUSE-Pi.dts
View file

@ -273,6 +273,18 @@
status = "okay";
};
&pwm14 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm14_1>;
status = "disabled";
};
&backlight {
pwms = <&pwm14 0 2000>;
default-brightness-level = <6>;
status = "disabled";
};
&mipi_dsi {
status = "disabled";
};
@ -280,7 +292,7 @@
&panel {
dcp-gpios = <&gpio 82 0>;
dcn-gpios = <&gpio 83 0>;
bl-gpios = <&gpio 44 0>;
backlight = <&backlight>;
reset-gpios = <&gpio 81 0>;
status = "disabled";
};

14
arch/riscv/dts/k1-x_deb1.dts
View file

@ -259,6 +259,18 @@
status = "okay";
};
&pwm14 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm14_1>;
status = "disabled";
};
&backlight {
pwms = <&pwm14 0 2000>;
default-brightness-level = <6>;
status = "disabled";
};
&mipi_dsi {
status = "disabled";
};
@ -266,7 +278,7 @@
&panel {
dcp-gpios = <&gpio 82 0>;
dcn-gpios = <&gpio 83 0>;
bl-gpios = <&gpio 44 0>;
backlight = <&backlight>;
reset-gpios = <&gpio 81 0>;
status = "disabled";
};

14
arch/riscv/dts/k1-x_deb2.dts
View file

@ -256,6 +256,18 @@
status = "okay";
};
&pwm14 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm14_1>;
status = "disabled";
};
&backlight {
pwms = <&pwm14 0 2000>;
default-brightness-level = <6>;
status = "disabled";
};
&mipi_dsi {
status = "disabled";
};
@ -263,7 +275,7 @@
&panel {
dcp-gpios = <&gpio 82 0>;
dcn-gpios = <&gpio 83 0>;
bl-gpios = <&gpio 44 0>;
backlight = <&backlight>;
reset-gpios = <&gpio 81 0>;
status = "disabled";
};

12
arch/riscv/dts/k1-x_evb.dts
View file

@ -236,6 +236,18 @@
};
};
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1_2>;
status = "disabled";
};
&backlight {
pwms = <&pwm1 0 2000>;
default-brightness-level = <6>;
status = "disabled";
};
&mipi_dsi {
status = "disabled";
};

14
arch/riscv/dts/k1-x_kx312.dts
View file

@ -200,6 +200,18 @@
};
};
&pwm14 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm14_1>;
status = "okay";
};
&backlight {
pwms = <&pwm14 0 2000>;
default-brightness-level = <7>;
status = "okay";
};
&mipi_dsi {
bit-clk = <933000000>;
pix-clk = <142000000>;
@ -219,7 +231,7 @@
&panel {
force-attached = "lt8911ext_edp_1080p";
bl-gpios = <&gpio 44 0>;
backlight = <&backlight>;
status = "okay";
};

14
arch/riscv/dts/k1-x_lpi3a.dts
View file

@ -259,6 +259,18 @@
status = "okay";
};
&pwm14 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm14_1>;
status = "disabled";
};
&backlight {
pwms = <&pwm14 0 2000>;
default-brightness-level = <6>;
status = "disabled";
};
&mipi_dsi {
status = "disabled";
};
@ -266,7 +278,7 @@
&panel {
dcp-gpios = <&gpio 82 0>;
dcn-gpios = <&gpio 83 0>;
bl-gpios = <&gpio 44 0>;
backlight = <&backlight>;
reset-gpios = <&gpio 81 0>;
status = "disabled";
};

14
arch/riscv/dts/k1-x_milkv-jupiter.dts
View file

@ -259,6 +259,18 @@
status = "okay";
};
&pwm14 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm14_1>;
status = "disabled";
};
&backlight {
pwms = <&pwm14 0 2000>;
default-brightness-level = <8>;
status = "disabled";
};
&mipi_dsi {
status = "disabled";
};
@ -266,7 +278,7 @@
&panel {
dcp-gpios = <&gpio 82 0>;
dcn-gpios = <&gpio 83 0>;
bl-gpios = <&gpio 44 0>;
backlight = <&backlight>;
reset-gpios = <&gpio 81 0>;
status = "disabled";
};

14
arch/riscv/dts/m1-x_milkv-jupiter.dts
View file

@ -259,6 +259,18 @@
status = "okay";
};
&pwm14 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm14_1>;
status = "disabled";
};
&backlight {
pwms = <&pwm14 0 2000>;
default-brightness-level = <8>;
status = "disabled";
};
&mipi_dsi {
status = "disabled";
};
@ -266,7 +278,7 @@
&panel {
dcp-gpios = <&gpio 82 0>;
dcn-gpios = <&gpio 83 0>;
bl-gpios = <&gpio 44 0>;
backlight = <&backlight>;
reset-gpios = <&gpio 81 0>;
status = "disabled";
};

2
board/spacemit/k1-x/k1-x.env
View file

@ -65,7 +65,7 @@ phy_link_time=10000
netdev=eth0
// Common boot args
commonargs=setenv bootargs earlycon=${earlycon} earlyprintk quiet splash plymouth.ignore-serial-consoles console=${console} loglevel=${loglevel} clk_ignore_unused swiotlb=65536 rdinit=${init} workqueue.default_affinity_scope=${workqueue.default_affinity_scope}
commonargs=setenv bootargs earlycon=${earlycon} earlyprintk quiet splash plymouth.ignore-serial-consoles plymouth.prefer-fbcon console=${console} loglevel=${loglevel} clk_ignore_unused swiotlb=65536 rdinit=${init} workqueue.default_affinity_scope=${workqueue.default_affinity_scope}
//detect product_name from env and select dtb file to load
dtb_env=if test -n "${product_name}"; then \

45
board/spacemit/k1-x/k1x-i2c-eeprom.c
View file

@ -7,6 +7,7 @@
#include <asm/global_data.h>
#include <stdlib.h>
#include <linux/delay.h>
#include <tlv_eeprom.h>
DECLARE_GLOBAL_DATA_PTR;
@ -23,6 +24,11 @@ DECLARE_GLOBAL_DATA_PTR;
#define I2C_PIN_CONFIG(x) ((x) | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
#define READ_I2C_LINE_LEN (16)
int _read_from_i2c(int chip, u32 addr, u32 size, uchar *buf);
bool _is_valid_tlvinfo_header(struct tlvinfo_header *hdr);
static __section(".data") uint8_t tlv_data[256];
char *spacemit_i2c_eeprom[] = {
"atmel,24c02",
};
@ -47,24 +53,33 @@ const struct eeprom_config eeprom_info[] = {
{6, 0x50, MUX_MODE2, 0xd401e228, 0xd401e22c},
};
int spacemit_eeprom_read(uint8_t chip, uint8_t *buffer, uint8_t id)
static void init_tlv_data(uint8_t chip, uint8_t *buffer, uint32_t size)
{
uint32_t offset;
struct tlvinfo_header *hdr = (struct tlvinfo_header*)buffer;
offset = sizeof(struct tlvinfo_header);
_read_from_i2c(chip, 0, offset, buffer);
if (!_is_valid_tlvinfo_header(hdr) || ((be16_to_cpu(hdr->totallen) + offset) > size)) {
memset(buffer, 0, size);
return;
}
_read_from_i2c(chip, offset, be16_to_cpu(hdr->totallen), buffer + offset);
}
int spacemit_eeprom_read(uint8_t *buffer, uint8_t id)
{
struct tlv_eeprom tlv;
int ret;
uint8_t buf[1] = {0};
uint8_t len[1] = {0};
uint16_t i = 0;
uint8_t j;
uint32_t i;
tlv.type = 0;
tlv.length = 0;
for (i = 11; i <= 256; i = i + tlv.length + 2) {
ret = i2c_read(chip, i, 1, buf, 1);
tlv.type = *buf;
ret = i2c_read(chip, i + 1, 1, len, 1);
tlv.length = *len;
for (i = sizeof(struct tlvinfo_header); i < sizeof(tlv_data);
i = i + tlv.length + 2) {
tlv.type = tlv_data[i];
tlv.length = tlv_data[i + 1];
if (tlv.length == 0) {
pr_err("Error: wrong tlv length\n");
@ -72,10 +87,7 @@ int spacemit_eeprom_read(uint8_t chip, uint8_t *buffer, uint8_t id)
}
if (tlv.type == id) {
for(j = 0; j < tlv.length; j++) {
ret = i2c_read(chip, i + 2 + j, 1, (char *)buffer, 1);
buffer++;
}
memcpy(buffer, &tlv_data[i + 2], tlv.length);
return 0;
}
}
@ -119,6 +131,7 @@ int k1x_eeprom_init(void)
}
else {
pr_info("find eeprom in bus %d, address %d\n", bus, saddr);
init_tlv_data(saddr, tlv_data, sizeof(tlv_data));
return saddr;
}
}

2
board/spacemit/k1-x/k1x-tlvinfo.c
View file

@ -38,7 +38,7 @@ static bool had_read_tlvinfo = false;
* to the allowed maximum (2048-11)
*
*/
static bool _is_valid_tlvinfo_header(struct tlvinfo_header *hdr)
bool _is_valid_tlvinfo_header(struct tlvinfo_header *hdr)
{
return ((strcmp(hdr->signature, TLV_INFO_ID_STRING) == 0) &&
(hdr->version == TLV_INFO_VERSION) &&

34
board/spacemit/k1-x/spl.c
View file

@ -80,13 +80,13 @@
extern int __data_start[], __data_end[];
extern int k1x_eeprom_init(void);
extern int spacemit_eeprom_read(uint8_t chip, uint8_t *buffer, uint8_t id);
extern int spacemit_eeprom_read(uint8_t *buffer, uint8_t id);
extern bool get_mac_address(uint64_t *mac_addr);
extern void update_ddr_info(void);
extern enum board_boot_mode get_boot_storage(void);
extern int spl_mtd_read(struct mtd_info *mtd, ulong sector, ulong count, void *buf);
char *product_name;
extern u32 ddr_cs_num;
extern u32 ddr_cs_num, ddr_datarate;;
extern const char *ddr_type;
int timer_init(void)
@ -636,11 +636,8 @@ static void spl_load_env(void)
bool get_mac_address(uint64_t *mac_addr)
{
int eeprom_addr;
eeprom_addr = k1x_eeprom_init();
if ((eeprom_addr >= 0) && (NULL != mac_addr) && (0 == spacemit_eeprom_read(
eeprom_addr, (uint8_t*)mac_addr, TLV_CODE_MAC_BASE))) {
if ((k1x_eeprom_init() >= 0) && (NULL != mac_addr) &&
(0 == spacemit_eeprom_read((uint8_t*)mac_addr, TLV_CODE_MAC_BASE))) {
pr_info("Get mac address %llx from eeprom\n", *mac_addr);
return true;
}
@ -651,12 +648,10 @@ bool get_mac_address(uint64_t *mac_addr)
char *get_product_name(void)
{
char *name = NULL;
int eeprom_addr;
eeprom_addr = k1x_eeprom_init();
name = calloc(1, 64);
if ((eeprom_addr >= 0) && (NULL != name) && (0 == spacemit_eeprom_read(
eeprom_addr, name, TLV_CODE_PRODUCT_NAME))) {
if ((k1x_eeprom_init() >= 0) && (NULL != name) &&
(0 == spacemit_eeprom_read(name, TLV_CODE_PRODUCT_NAME))) {
pr_info("Get product name from eeprom %s\n", name);
return name;
}
@ -670,26 +665,33 @@ char *get_product_name(void)
void update_ddr_info(void)
{
int eeprom_addr;
uint8_t *info;
eeprom_addr = k1x_eeprom_init();
if (eeprom_addr < 0)
if (k1x_eeprom_init() < 0)
return;
// read ddr type from eeprom
info = malloc(32);
memset(info, 0, 32);
if (0 == spacemit_eeprom_read(eeprom_addr, info, TLV_CODE_DDR_TYPE))
if (0 == spacemit_eeprom_read(info, TLV_CODE_DDR_TYPE))
ddr_type = info;
else
free(info);
// if fail to get ddr cs number from eeprom, update it from dts node
if (0 == spacemit_eeprom_read(eeprom_addr, (uint8_t*)&ddr_cs_num, TLV_CODE_DDR_CSNUM))
if (0 == spacemit_eeprom_read((uint8_t*)&ddr_cs_num, TLV_CODE_DDR_CSNUM))
pr_info("Get ddr cs num %d from eeprom\n", ddr_cs_num);
else
ddr_cs_num = 0;
// if fail to get ddr cs number from eeprom, update it from dts node
if (0 == spacemit_eeprom_read((uint8_t*)&ddr_datarate, TLV_CODE_DDR_DATARATE)) {
// convert it from big endian to little endian
ddr_datarate = be16_to_cpu(ddr_datarate);
pr_info("Get ddr datarate %d from eeprom\n", ddr_datarate);
}
else
ddr_datarate = 0;
}
void spl_board_init(void)

7
cmd/Kconfig
View file

@ -943,6 +943,13 @@ config CMD_BCB
https://android.googlesource.com/platform/bootable/recovery
- Inspect/dump the contents of the BCB fields
config CMD_BATTERY
bool "battery - information about batteries"
depends on DM_BATTERY
default y
help
Provides access to information regarding batteries present on the system.
config CMD_BIND
bool "bind/unbind - Bind or unbind a device to/from a driver"
depends on DM

1
cmd/Makefile
View file

@ -23,6 +23,7 @@ obj-$(CONFIG_CMD_BOOTDEV) += bootdev.o
obj-$(CONFIG_CMD_BOOTFLOW) += bootflow.o
obj-$(CONFIG_CMD_BOOTMETH) += bootmeth.o
obj-$(CONFIG_CMD_SOURCE) += source.o
obj-$(CONFIG_CMD_BATTERY) += battery.o
obj-$(CONFIG_CMD_BCB) += bcb.o
obj-$(CONFIG_CMD_BDI) += bdinfo.o
obj-$(CONFIG_CMD_BIND) += bind.o

119
cmd/battery.c Normal file
View file

@ -0,0 +1,119 @@
/*
* Copyright (C) 2018 Simon Shields <simon@lineageos.org>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <command.h>
#include <errno.h>
#include <dm.h>
#include <dm/uclass-internal.h>
#include <power/battery.h>
static struct udevice *currdev;
#define LIMIT_DEV 32
#define LIMIT_PARENT 20
static const char *bat_states[] = {
[BAT_STATE_UNUSED] = "Unknown",
[BAT_STATE_NOT_PRESENT] = "Not present",
[BAT_STATE_NEED_CHARGING] = "Need charging",
[BAT_STATE_NORMAL] = "Present",
};
static int failure(int ret)
{
printf("Error: %d (%s)\n", ret, errno_str(ret));
return CMD_RET_FAILURE;
}
static int do_dev(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
int ret = -ENODEV;
char *name;
unsigned int uV = 0;
switch (argc) {
case 2:
name = argv[1];
ret = battery_get(name, &currdev);
if (ret) {
printf("Can't get battery: %s!\n", name);
return failure(ret);
}
case 1:
if (!currdev) {
printf("Battery device is not set!\n\n");
return CMD_RET_USAGE;
}
printf("dev: %d @ %s\n", currdev->seq_, currdev->name);
ret = battery_get_voltage(currdev, &uV);
if (ret)
printf("failed to get voltage: %d\n", ret);
printf("voltage: %u uV, charge state: %d%%\n", uV, battery_get_soc(currdev));
ret = battery_get_status(currdev);
if (ret < 0)
printf("failed to get battery status: %d\n", ret);
else
printf("battery status: %s\n", bat_states[ret]);
}
return CMD_RET_SUCCESS;
}
static int do_list(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[])
{
struct udevice *dev;
int ret;
printf("| %-*.*s| %-*.*s| %s @ %s\n",
LIMIT_DEV, LIMIT_DEV, "Name",
LIMIT_PARENT, LIMIT_PARENT, "Parent name",
"Parent uclass", "seq");
for (ret = uclass_first_device(UCLASS_BATTERY, &dev); dev;
ret = uclass_next_device(&dev)) {
if (ret)
continue;
printf("| %-*.*s| %-*.*s| %s @ %d\n",
LIMIT_DEV, LIMIT_DEV, dev->name,
LIMIT_PARENT, LIMIT_PARENT, dev->parent->name,
dev_get_uclass_name(dev->parent), dev->parent->seq_);
}
if (ret)
return CMD_RET_FAILURE;
return CMD_RET_SUCCESS;
}
static struct cmd_tbl subcmd[] = {
U_BOOT_CMD_MKENT(dev, 2, 1, do_dev, "", ""),
U_BOOT_CMD_MKENT(list, 1, 1, do_list, "", ""),
};
static int do_battery(struct cmd_tbl *cmdtp, int flag, int argc,
char * const argv[])
{
struct cmd_tbl *cmd;
argc--;
argv++;
cmd = find_cmd_tbl(argv[0], subcmd, ARRAY_SIZE(subcmd));
if (cmd == NULL || argc > cmd->maxargs)
return CMD_RET_USAGE;
return cmd->cmd(cmdtp, flag, argc, argv);
}
U_BOOT_CMD(battery, CONFIG_SYS_MAXARGS, 1, do_battery,
"Battery subsystem",
"list - list battery devices\n"
"dev [name] - show or [set] operating battery device\n"
);

18
cmd/efidebug.c
View file

@ -660,25 +660,15 @@ static void print_memory_attributes(u64 attributes)
static int do_efi_show_memmap(struct cmd_tbl *cmdtp, int flag,
int argc, char *const argv[])
{
struct efi_mem_desc *memmap = NULL, *map;
efi_uintn_t map_size = 0;
struct efi_mem_desc *memmap, *map;
efi_uintn_t map_size;
const char *type;
int i;
efi_status_t ret;
ret = efi_get_memory_map(&map_size, memmap, NULL, NULL, NULL);
if (ret == EFI_BUFFER_TOO_SMALL) {
map_size += sizeof(struct efi_mem_desc); /* for my own */
ret = efi_allocate_pool(EFI_LOADER_DATA, map_size,
(void *)&memmap);
if (ret != EFI_SUCCESS)
return CMD_RET_FAILURE;
ret = efi_get_memory_map(&map_size, memmap, NULL, NULL, NULL);
}
if (ret != EFI_SUCCESS) {
efi_free_pool(memmap);
ret = efi_get_memory_map_alloc(&map_size, &memmap);
if (ret != EFI_SUCCESS)
return CMD_RET_FAILURE;
}
printf("Type Start%.*s End%.*s Attributes\n",
EFI_PHYS_ADDR_WIDTH - 5, spc, EFI_PHYS_ADDR_WIDTH - 3, spc);

2
cmd/tlv_eeprom.c
View file

@ -321,6 +321,7 @@ static void decode_tlv(struct tlvinfo_tlv *tlv)
sprintf(value, "%u", tlv->value[0]);
break;
case TLV_CODE_MAC_SIZE:
case TLV_CODE_DDR_DATARATE:
sprintf(value, "%u", (tlv->value[0] << 8) | tlv->value[1]);
break;
case TLV_CODE_VENDOR_EXT:
@ -645,6 +646,7 @@ static bool tlvinfo_add_tlv(u8 *eeprom, int tcode, char *strval)
new_tlv_len = 1;
break;
case TLV_CODE_MAC_SIZE:
case TLV_CODE_DDR_DATARATE:
value = simple_strtoul(strval, NULL, 0);
if (value >= 65536) {
printf("ERROR: MAC Size must be 65535 or less. Value supplied: %u",

9
configs/k1_defconfig
View file

@ -118,8 +118,8 @@ CONFIG_JFFS2_PART_SIZE=0x100000
CONFIG_CMD_MTDPARTS=y
CONFIG_CMD_MTDPARTS_SPREAD=y
CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES=y
CONFIG_MTDIDS_DEFAULT="nor0=spi-nor"
CONFIG_MTDPARTS_DEFAULT="spi-nor:64K@0(bootinfo),64K@64K(private),256K@128K(fsbl),64K@384K(env),192K@448K(opensbi),-@640K(uboot)"
CONFIG_MTDIDS_DEFAULT="nor0=d420c000.spi-0"
CONFIG_MTDPARTS_DEFAULT="d420c000.spi-0:64K@0(bootinfo),64K@64K(private),256K@128K(fsbl),64K@384K(env),192K@448K(opensbi),-@640K(uboot)"
CONFIG_CMD_UBI=y
CONFIG_SPACEMIT_FLASH=y
CONFIG_SPL_FASTBOOT=y
@ -211,6 +211,10 @@ CONFIG_PMIC_SPM8XX=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_SPM8XX=y
CONFIG_DM_REGULATOR_SPACEMIT_HUB=y
CONFIG_DM_BATTERY=y
CONFIG_CW2015_BATTERY=y
CONFIG_DM_CHARGER=y
CONFIG_SGM41515_CHARGER=y
CONFIG_SPL_SPACEMIT_POWER=y
CONFIG_DM_PWM=y
CONFIG_PWM_PXA=y
@ -271,4 +275,3 @@ CONFIG_PRINT_TIMESTAMP=y
# CONFIG_SPL_SHA1 is not set
# CONFIG_SPL_SHA256 is not set
CONFIG_ZSTD=y
CONFIG_FDT_FIXUP_PARTITIONS=y

33
debian/u-boot-spacemit.postinst vendored
View file

@ -46,15 +46,27 @@ configure)
fi
;;
"/dev/nvme0n1"*)
BOOTINFO_FILE=bootinfo_spinor.bin
BOOTINFO=/dev/mtdblock0
FSBL=/dev/mtdblock0
FSBL_SEEK=$((128 * 1024))
ENV=/dev/mtdblock0
ENV_SEEK=$((384 * 1024))
UBOOT=/dev/mtdblock0
# 以KB为单位
UBOOT_SEEK=640
if [ ! -e "/dev/mtdblock5" ]; then
BOOTINFO_FILE=bootinfo_spinor.bin
BOOTINFO=/dev/mtdblock0
FSBL=/dev/mtdblock0
FSBL_SEEK=$((128 * 1024))
ENV=/dev/mtdblock0
ENV_SEEK=$((384 * 1024))
UBOOT=/dev/mtdblock0
# 以KB为单位
UBOOT_SEEK=640
else
BOOTINFO_FILE=bootinfo_spinor.bin
BOOTINFO=/dev/mtdblock0
FSBL=/dev/mtdblock2
FSBL_SEEK=0
ENV=/dev/mtdblock3
ENV_SEEK=0
UBOOT=/dev/mtdblock5
# 以KB为单位
UBOOT_SEEK=0
fi
;;
*)
echo "Unsupported root=$ROOT"
@ -78,11 +90,12 @@ configure)
done
# 此前已经做了所有检查
set -x
dd if=/usr/lib/u-boot/$target/$BOOTINFO_FILE of=$BOOTINFO && sync
dd if=/usr/lib/u-boot/$target/FSBL.bin of=$FSBL seek=$FSBL_SEEK bs=1 && sync
dd if=/usr/lib/u-boot/$target/env.bin of=$ENV seek=$ENV_SEEK bs=1 && sync
dd if=/usr/lib/u-boot/$target/u-boot.itb of=$UBOOT seek=$UBOOT_SEEK bs=1K && sync
set +x
;;
esac

11
drivers/ddr/spacemit/k1x/ddr_init.c
View file

@ -31,6 +31,8 @@ extern const char *ddr_type;
extern int ddr_freq_change(u32 data_rate);
extern void qos_set_default(void);
u32 ddr_datarate;
static int test_pattern(fdt_addr_t base, fdt_size_t size)
{
fdt_addr_t addr;
@ -127,7 +129,6 @@ static int spacemit_ddr_probe(struct udevice *dev)
#ifdef CONFIG_K1_X_BOARD_FPGA
void (*ddr_init)(void);
#else
uint32_t ddr_datarate;
fdt_addr_t ddrc_base;
ddrc_base = dev_read_addr(dev);
@ -138,16 +139,16 @@ static int spacemit_ddr_probe(struct udevice *dev)
ddr_init();
#else
/* check if dram data-rate is configued in dts */
if(dev_read_u32u(dev, "datarate", &ddr_datarate)) {
/* if dram data-rate is NOT configued in eeprom or in dts, use default value */
if ((0 == ddr_datarate) && (dev_read_u32u(dev, "datarate", &ddr_datarate))) {
pr_info("ddr data rate not configed in dts, use 1200 as default!\n");
ddr_datarate = 1200;
} else {
pr_info("ddr data rate is %u configured in dts\n", ddr_datarate);
pr_info("ddr data rate is configured as %dMT/s\n", ddr_datarate);
}
/* if DDR cs number is NOT configued in eeprom or in dts, use default value */
if((0 == ddr_cs_num) && dev_read_u32u(dev, "cs-num", &ddr_cs_num)) {
if ((0 == ddr_cs_num) && dev_read_u32u(dev, "cs-num", &ddr_cs_num)) {
pr_info("ddr cs number not configed in dts!\n");
ddr_cs_num = DDR_CS_NUM;
}

37
drivers/fastboot/fb_blk.c
View file

@ -186,6 +186,8 @@ void fastboot_blk_flash_write(const char *cmd, void *download_buffer,
static char __maybe_unused part_name_t[20] = "";
unsigned long __maybe_unused src_len = ~0UL;
bool gzip_image = false;
bool is_hidden_part = false;
int part_index = 0;
if (fdev == NULL){
fdev = malloc(sizeof(struct flash_dev));
@ -213,9 +215,42 @@ void fastboot_blk_flash_write(const char *cmd, void *download_buffer,
response, fdev);
return;
}
for (part_index = 0; part_index < MAX_PARTITION_NUM; part_index++){
if (fdev->parts_info[part_index].part_name != NULL
&& strcmp(cmd, fdev->parts_info[part_index].part_name) == 0){
if (fdev->parts_info[part_index].hidden)
is_hidden_part = true;
break;
}
}
if (is_hidden_part){
/*find available blk dev*/
/* do_get_part_info(&dev_desc, cmd, &info); */
char *blk_dev;
int blk_index = -1;
if (get_available_blk_dev(&blk_dev, &blk_index) == 0) {
dev_desc = blk_get_dev(blk_dev, blk_index);
if (dev_desc == NULL){
fastboot_fail("can not get available blk dev", response);
return;
}
}else{
fastboot_fail("can not get available blk dev", response);
return;
}
strlcpy((char *)&info.name, cmd, sizeof(info.name));
info.size = fdev->parts_info[part_index].part_size / dev_desc->blksz;
info.start = fdev->parts_info[part_index].part_offset / dev_desc->blksz;
info.blksz = dev_desc->blksz;
printf("!!! flash image to hidden partition !!!\n");
}
#endif
if (fastboot_blk_get_part_info(cmd, &dev_desc, &info, response) < 0)
if (!is_hidden_part && fastboot_blk_get_part_info(cmd, &dev_desc, &info, response) < 0)
return;
if (check_gzip_format((uchar *)download_buffer, src_len) >= 0) {

26
drivers/fastboot/fb_mmc.c
View file

@ -528,6 +528,8 @@ void fastboot_mmc_flash_write(const char *cmd, void *download_buffer,
static char __maybe_unused part_name_t[20] = "";
unsigned long __maybe_unused src_len = ~0UL;
bool gzip_image = false;
bool is_hidden_part = false;
int part_index = 0;
if (fdev == NULL){
fdev = malloc(sizeof(struct flash_dev));
@ -659,6 +661,30 @@ void fastboot_mmc_flash_write(const char *cmd, void *download_buffer,
}
#endif
#ifdef CONFIG_SPACEMIT_FLASH
for (part_index = 0; part_index < MAX_PARTITION_NUM; part_index++){
if (fdev->parts_info[part_index].part_name != NULL
&& strcmp(cmd, fdev->parts_info[part_index].part_name) == 0){
if (fdev->parts_info[part_index].hidden)
is_hidden_part = true;
break;
}
}
if (is_hidden_part){
/*find available blk dev*/
dev_desc = fastboot_mmc_get_dev(response);
if (!dev_desc)
return;
strlcpy((char *)&info.name, cmd, sizeof(info.name));
info.size = fdev->parts_info[part_index].part_size / dev_desc->blksz;
info.start = fdev->parts_info[part_index].part_offset / dev_desc->blksz;
info.blksz = dev_desc->blksz;
printf("!!! flash image to hidden partition !!!\n");
}
#endif
if (!info.name[0] &&
fastboot_mmc_get_part_info(cmd, &dev_desc, &info, response) < 0)
return;

38
drivers/fastboot/fb_spacemit.c
View file

@ -110,12 +110,6 @@ int _clear_env_part(void *download_buffer, u32 download_bytes,
{
u32 boot_mode = get_boot_pin_select();
/* char cmdbuf[64] = {"\0"}; */
/* sprintf(cmdbuf, "env export -c -s 0x%lx 0x%lx", (ulong)CONFIG_ENV_SIZE, (ulong)download_buffer); */
/* if (run_command(cmdbuf, 0)){ */
/* return -1; */
/* } */
switch(boot_mode){
#ifdef CONFIG_ENV_IS_IN_MMC
case BOOT_MODE_EMMC:
@ -147,12 +141,6 @@ int _clear_env_part(void *download_buffer, u32 download_bytes,
ret = _fb_mtd_erase(mtd, CONFIG_ENV_SIZE);
if (ret)
return -1;
/*should not write env to env part*/
/* ret = _fb_mtd_write(mtd, download_buffer, 0, CONFIG_ENV_SIZE, NULL); */
/* if (ret){ */
/* pr_err("can not write env to mtd flash\n"); */
/* } */
}
break;
#endif
@ -208,7 +196,7 @@ int _write_mtd_partition(struct flash_dev *fdev)
* @brief transfer the string of size 'K' or 'M' to u32 type.
*
* @param reserve_size , the string of size
* @return int , return the transfer result.
* @return int , return the transfer result of KB.
*/
int transfer_string_to_ul(const char *reserve_size)
{
@ -303,6 +291,7 @@ int _parse_flash_config(struct flash_dev *fdev, void *load_flash_addr)
const char *node_file = NULL;
const char *node_offset = NULL;
const char *node_size = NULL;
fdev->parts_info[part_index].hidden = false;
cJSON *arraypart = cJSON_GetArrayItem(cj_parts, i);
cJSON *cj_name = cJSON_GetObjectItem(arraypart, "name");
@ -311,11 +300,20 @@ int _parse_flash_config(struct flash_dev *fdev, void *load_flash_addr)
else
node_part = "";
/*only blk dev would not add bootinfo partition*/
/*bootinfo should be hidden as default in gpt partition*/
if (!parse_mtd_partition){
if (strlen(node_part) > 0 && !strncmp("bootinfo", node_part, 8)){
pr_info("bootinfo would not add as partition\n");
continue;
fdev->parts_info[part_index].hidden = true;
}
}
cJSON *cj_hidden = cJSON_GetObjectItem(arraypart, "hidden");
if (cj_hidden){
if ((cj_hidden->type == cJSON_String && strcmp("true", cj_hidden->valuestring) == 0)
|| cj_hidden->type == cJSON_True){
printf("!!!! patr name:%s would set to hidden part !!!!\n", node_part);
fdev->parts_info[part_index].hidden = true;
}
}
@ -374,19 +372,26 @@ int _parse_flash_config(struct flash_dev *fdev, void *load_flash_addr)
if (off > 0)
combine_size = off;
/*TODO: support hidden partition for mtd dev*/
if (parse_mtd_partition){
/*parse mtd partition*/
if (strlen(combine_str) == 0)
sprintf(combine_str, "%s%s@%dK(%s)", combine_str, node_size, combine_size, node_part);
else
sprintf(combine_str, "%s,%s@%dK(%s)", combine_str, node_size, combine_size, node_part);
}else if (fdev->gptinfo.fastboot_flash_gpt){
}else if (!fdev->parts_info[part_index].hidden && fdev->gptinfo.fastboot_flash_gpt){
/*parse gpt partition*/
if (strlen(node_offset) == 0)
sprintf(combine_str, "%sname=%s,size=%s;", combine_str, node_part, node_size);
else
sprintf(combine_str, "%sname=%s,start=%s,size=%s;", combine_str, node_part, node_offset, node_size);
}
/*save part offset and size to byte*/
fdev->parts_info[part_index].part_offset = combine_size * 1024;
fdev->parts_info[part_index].part_size = transfer_string_to_ul(node_size) * 1024;
/*save as the next part offset*/
combine_size += transfer_string_to_ul(node_size);
/*after finish recovery, it would free the malloc paramenter at func recovery_show_result*/
@ -885,6 +890,7 @@ const struct oem_config_info config_info[] = {
{ "manufacturer", TLV_CODE_MANUF_NAME, 32, NULL },
{ "sdk_version", TLV_CODE_SDK_VERSION, 3, NULL},
{ "ddr_cs_num", TLV_CODE_DDR_CSNUM, 3, NULL},
{ "ddr_datarate", TLV_CODE_DDR_DATARATE, 5, NULL},
{ "ddr_type", TLV_CODE_DDR_TYPE, 32, NULL},
{ "pmic_type", TLV_CODE_PMIC_TYPE, 3, NULL},
{ "eeprom_i2c_index", TLV_CODE_EEPROM_I2C_INDEX, 3, NULL},

15
drivers/pci/pcie_dw_k1x.c
View file

@ -29,6 +29,8 @@ DECLARE_GLOBAL_DATA_PTR;
#define PCIE_VENDORID_MASK GENMASK(15, 0)
#define PCIE_DEVICEID_SHIFT 16
#define K1X_PCIE_VENDOR_ID 0x201F
#define k1X_PCIE_DEVICE_ID 0x0001
#define PCIE_LINK_CAPABILITY 0x7c
#define PCIE_LINK_CTL_2 0xa0
@ -629,6 +631,16 @@ static int init_phy(struct pcie_dw_k1x *k1x)
return 0;
}
static int pcie_dw_init_id(struct pcie_dw_k1x *pci)
{
dw_pcie_dbi_write_enable(&pci->dw, true);
writew(K1X_PCIE_VENDOR_ID, pci->dw.dbi_base + PCI_VENDOR_ID);
writew(k1X_PCIE_DEVICE_ID, pci->dw.dbi_base + PCI_DEVICE_ID);
dw_pcie_dbi_write_enable(&pci->dw, false);
return 0;
}
/**
* pcie_dw_k1x_probe() - Probe the PCIe bus for active link
*
@ -648,8 +660,6 @@ static int pcie_dw_k1x_probe(struct udevice *dev)
int ret;
u32 reg;
printf("%s, %d\n", __FUNCTION__, __LINE__);
/* enable pcie clk */
clk_enable(&pci->clock);
reset_deassert(&pci->reset);
@ -690,6 +700,7 @@ static int pcie_dw_k1x_probe(struct udevice *dev)
k1x_pcie_host_init(pci);
pcie_dw_setup_host(&pci->dw);
pcie_dw_init_id(pci);
if (!pcie_dw_k1x_pcie_link_up(pci, LINK_SPEED_GEN_2)) {
printf("PCIE-%d: Link down\n", dev_seq(dev));

4
drivers/power/Kconfig
View file

@ -51,6 +51,10 @@ source "drivers/power/pmic/Kconfig"
source "drivers/power/regulator/Kconfig"
source "drivers/power/battery/Kconfig"
source "drivers/power/charger/Kconfig"
choice
prompt "Select Sunxi PMIC Variant"
depends on ARCH_SUNXI

1
drivers/power/Makefile
View file

@ -5,6 +5,7 @@
obj-$(CONFIG_$(SPL_TPL_)ACPI_PMC) += acpi_pmc/
obj-y += battery/
obj-y += charger/
obj-$(CONFIG_$(SPL_TPL_)POWER_DOMAIN) += domain/
obj-y += fuel_gauge/
obj-y += mfd/

11
drivers/power/battery/Kconfig Normal file
View file

@ -0,0 +1,11 @@
config DM_BATTERY
bool "Enable Driver Model for BATTERY drivers (UCLASS_BATTERY)"
depends on DM
---help---
This config enables driver model battery support.
config CW2015_BATTERY
bool "Enable Driver Model for SPACEMIT CW2015 battery"
depends on DM_BATTERY
help
This config enables driver model for cw2015 battery

2
drivers/power/battery/Makefile
View file

@ -5,3 +5,5 @@
obj-$(CONFIG_POWER_BATTERY_TRATS) += bat_trats.o
obj-$(CONFIG_POWER_BATTERY_TRATS2) += bat_trats2.o
obj-$(CONFIG_DM_BATTERY) += battery-uclass.o
obj-$(CONFIG_$(SPL_)CW2015_BATTERY) += spacemit_cw2015.o

53
drivers/power/battery/battery-uclass.c Normal file
View file

@ -0,0 +1,53 @@
/*
* Copyright (C) 2018 Simon Shields <simon@lineageos.org>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <errno.h>
#include <dm.h>
#include <dm/uclass-internal.h>
#include <power/battery.h>
DECLARE_GLOBAL_DATA_PTR;
int battery_get(const char *devname, struct udevice **devp)
{
return uclass_get_device_by_name(UCLASS_BATTERY, devname, devp);
}
int battery_get_voltage(struct udevice *dev, unsigned int *uV)
{
const struct dm_battery_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->get_voltage)
return -ENOSYS;
return ops->get_voltage(dev, uV);
}
int battery_get_status(struct udevice *dev)
{
const struct dm_battery_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->get_status)
return -ENOSYS;
return ops->get_status(dev);
}
int battery_get_soc(struct udevice *dev)
{
const struct dm_battery_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->get_soc)
return -ENOSYS;
return ops->get_soc(dev);
}
UCLASS_DRIVER(battery) = {
.id = UCLASS_BATTERY,
.name = "battery",
};

324
drivers/power/battery/spacemit_cw2015.c Normal file
View file

@ -0,0 +1,324 @@
/*
* Copyright (C) 2024 Spacemit
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <errno.h>
#include <dm.h>
#include <dm/uclass-internal.h>
#include <power/battery.h>
#include <power/pmic.h>
#include <linux/delay.h>
#include <dm/lists.h>
#include <log.h>
#define REG_VERSION 0x0
#define REG_VCELL 0x2
#define REG_SOC 0x4
#define REG_RRT_ALERT 0x6
#define REG_CONFIG 0x8
#define REG_MODE 0xA
#define REG_VTEMPL 0xC
#define REG_VTEMPH 0xD
#define REG_BATINFO 0x10
#define MODE_SLEEP_MASK (0x3<<6)
#define MODE_SLEEP (0x3<<6)
#define MODE_NORMAL (0x0<<6)
#define MODE_QUICK_START (0x3<<4)
#define MODE_RESTART (0xf<<0)
#define CONFIG_UPDATE_FLG (0x1<<1)
#define ATHD (0x0<<3) // ATHD = 0%
#define MASK_ATHD GENMASK(7, 3)
#define MASK_SOC GENMASK(12, 0)
#define BATTERY_CAPACITY_ERROR 40*1000
#define BATTERY_CHARGING_ZERO 1800*1000
#define UI_FULL 100
#define DECIMAL_MAX 80
#define DECIMAL_MIN 20
#define CHARGING_ON 1
#define NO_CHARGING 0
#define SIZE_BATINFO 64
static unsigned char config_info[SIZE_BATINFO] = {};
/*struct cw_battery {
struct udevice *dev;
int charger_mode;
int capacity;
int voltage;
int status;
int change;
int raw_soc;
int time_to_empty;
};*/
static int cw2015_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
{
int ret;
ret = dm_i2c_read(dev, reg, buff, len);
if(ret) {
debug("read error from device: %p register: %#x!\n", dev, reg);
return ret;
}
return 0;
}
static int cw2015_write(struct udevice *dev, uint reg, uint8_t *buff, int len)
{
int ret;
ret = dm_i2c_write(dev, reg, buff, len);
if(ret) {
debug("write error to device: %p register: %#x!\n", dev, reg);
return ret;
}
return 0;
}
static int cw_get_voltage(struct udevice *dev, unsigned int *uV)
{
int ret;
unsigned char reg_val[2];
u16 value16, value16_1, value16_2, value16_3;
ret = cw2015_read(dev, REG_VCELL, reg_val, 2);
if(ret < 0) {
return ret;
}
value16 = (reg_val[0] << 8) + reg_val[1];
ret = cw2015_read(dev, REG_VCELL, reg_val, 2);
if(ret < 0) {
return ret;
}
value16_1 = (reg_val[0] << 8) + reg_val[1];
ret = cw2015_read(dev, REG_VCELL, reg_val, 2);
if(ret < 0) {
return ret;
}
value16_2 = (reg_val[0] << 8) + reg_val[1];
if(value16 > value16_1) {
value16_3 = value16;
value16 = value16_1;
value16_1 = value16_3;
}
if(value16_1 > value16_2) {
value16_3 =value16_1;
value16_1 =value16_2;
value16_2 =value16_3;
}
if(value16 >value16_1) {
value16_3 =value16;
value16 =value16_1;
value16_1 =value16_3;
}
*uV = value16_1 * 625 / 2048 * 1000;
return 0;
}
int cw_update_config_info(struct udevice *dev)
{
int ret;
unsigned char reg_val;
int i;
unsigned char reset_val;
// make sure no in sleep mode
ret = cw2015_read(dev, REG_MODE, &reg_val, 1);
if(ret < 0) {
return ret;
}
reset_val = reg_val;
if((reg_val & MODE_SLEEP_MASK) == MODE_SLEEP) {
return -1;
}
// update new battery info
for (i = 0; i < SIZE_BATINFO; i++) {
ret = cw2015_write(dev, REG_BATINFO + i, &config_info[i], 1);
if(ret < 0)
return ret;
}
reg_val = 0x00;
reg_val |= CONFIG_UPDATE_FLG; // set UPDATE_FLAG
reg_val &= 0x07; // clear ATHD
reg_val |= ATHD; // set ATHD
ret = cw2015_write(dev, REG_CONFIG, &reg_val, 1);
if(ret < 0)
return ret;
mdelay(50);
// reset
reg_val = 0x00;
reset_val &= ~(MODE_RESTART);
reg_val = reset_val | MODE_RESTART;
ret = cw2015_write(dev, REG_MODE, &reg_val, 1);
if(ret < 0)
return ret;
mdelay(10);
ret = cw2015_write(dev, REG_MODE, &reset_val, 1);
if(ret < 0)
return ret;
mdelay(100);
printf("cw2015 update config success!\n");
return 0;
}
static int cw_init(struct udevice *dev)
{
int ret;
int i;
unsigned char reg_val = MODE_NORMAL;
ret = cw2015_write(dev, REG_MODE, &reg_val, 1);
if (ret < 0)
return ret;
ret = cw2015_read(dev, REG_CONFIG, &reg_val, 1);
if(ret < 0)
return ret;
if (!(reg_val & CONFIG_UPDATE_FLG)) {
debug("update config flg is true, need update config\n");
ret = cw_update_config_info(dev);
if (ret < 0) {
printf("%s : update config fail\n", __func__);
return ret;
}
} else {
for(i = 0; i < SIZE_BATINFO; i++) {
ret = cw2015_read(dev, (REG_BATINFO + i), &reg_val, 1);
if (ret < 0)
return ret;
debug("%X\n", reg_val);
if (config_info[i] != reg_val)
break;
}
if (i != SIZE_BATINFO) {
reg_val = MODE_SLEEP;
ret = cw2015_write(dev, REG_MODE, &reg_val, 1);
if (ret < 0)
return ret;
mdelay(30);
reg_val = MODE_NORMAL;
ret = cw2015_write(dev, REG_MODE, &reg_val, 1);
if (ret < 0)
return ret;
printf("config didn't match, need update config\n");
ret = cw_update_config_info(dev);
if (ret < 0){
return ret;
}
}
}
mdelay(10);
for (i = 0; i < 30; i++) {
ret = cw2015_read(dev, REG_SOC, &reg_val, 1);
if (ret < 0)
return ret;
else if (reg_val <= 0x64)
break;
mdelay(120);
}
if (i >= 30 ){
reg_val = MODE_SLEEP;
ret = cw2015_write(dev, REG_MODE, &reg_val, 1);
printf("cw2015 input unvalid power error, cw2015 join sleep mode\n");
return -1;
}
printf("cw2015 init success!\n");
return 0;
}
static int cw_get_capacity(struct udevice *dev)
{
int ret;
unsigned char reg_val[2];
ret = cw2015_read(dev, REG_SOC, reg_val, 1);
if (ret < 0)
return ret;
return reg_val[0];
}
static int cw_get_status(struct udevice *dev)
{
int voltage;
int ret = cw_get_voltage(dev, &voltage);
if(ret)
return ret;
if(voltage <= 3400000)
ret = BAT_STATE_NEED_CHARGING;
else if(voltage > 3400000 && voltage <= 4350000)
ret = BAT_STATE_NORMAL;
else
ret = BAT_STATE_NOT_PRESENT;
return ret;
}
static struct dm_battery_ops cw2015_battery_ops = {
.get_voltage = cw_get_voltage,
.get_status = cw_get_status,
.get_soc = cw_get_capacity,
};
static int cw2015_probe(struct udevice *dev)
{
int ret, i;
int loop = 0;
const char *data;
data = dev_read_u8_array_ptr(dev, "cellwise,battery-profile", SIZE_BATINFO);
if (!data)
return -1;
for(i = 0; i < SIZE_BATINFO; i++)
config_info[i] = *(data + i);
ret = cw_init(dev);
while ((loop++ < 3) && (ret != 0)) {
mdelay(200);
ret = cw_init(dev);
}
if (ret) {
printf("%s : cw2015 init fail!\n", __func__);
return ret;
}
return 0;
}
static const struct udevice_id cw2015_ids[] = {
{ .compatible = "spacemit,cw2015", .data = 0 },
{ }
};
U_BOOT_DRIVER(cw_battery) = {
.name = "cw-bat",
.id = UCLASS_BATTERY,
.of_match = cw2015_ids,
.ops = &cw2015_battery_ops,
.probe = cw2015_probe,
//.priv_auto = sizeof(struct cw_battery),
};

11
drivers/power/charger/Kconfig Normal file
View file

@ -0,0 +1,11 @@
config DM_CHARGER
bool "Enable Driver Model for charger drivers (UCLASS_CHARGER)"
depends on DM
---help---
This config enables driver model charger support.
config SGM41515_CHARGER
bool "Enable Driver Model for SPACEMIT sgm41515 charger"
depends on DM_CHARGER
help
This config enables driver model for sgm41515 charger.

2
drivers/power/charger/Makefile Normal file
View file

@ -0,0 +1,2 @@
obj-$(CONFIG_DM_CHARGER) += charger-uclass.o
obj-$(CONFIG_$(SPL_)SGM41515_CHARGER) += sgm41515.o

54
drivers/power/charger/charger-uclass.c Normal file
View file

@ -0,0 +1,54 @@
/*
* Copyright (C) 2018 Simon Shields <simon@lineageos.org>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <errno.h>
#include <dm.h>
#include <dm/uclass-internal.h>
#include <power/charger.h>
DECLARE_GLOBAL_DATA_PTR;
int charger_get(const char *devname, struct udevice **devp)
{
return uclass_get_device_by_name(UCLASS_CHARGER, devname, devp);
}
int charger_set_current(struct udevice *dev, unsigned int microamps)
{
const struct dm_charger_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->set_current)
return -ENOSYS;
return ops->set_current(dev, microamps);
}
int charger_get_current(struct udevice *dev)
{
const struct dm_charger_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->get_current)
return -ENOSYS;
return ops->get_current(dev);
}
int charger_get_status(struct udevice *dev)
{
const struct dm_charger_ops *ops = dev_get_driver_ops(dev);
if (!ops || !ops->get_status)
return -ENOSYS;
return ops->get_status(dev);
}
UCLASS_DRIVER(charger) = {
.id = UCLASS_CHARGER,
.name = "charger",
};

395
drivers/power/charger/sgm41515.c Normal file
View file

@ -0,0 +1,395 @@
/*
* Copyright (C) 2024 Spacemit
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <errno.h>
#include <dm.h>
#include <dm/uclass-internal.h>
#include <power/charger.h>
#include <power/pmic.h>
#include <linux/delay.h>
#include <dm/lists.h>
#include <log.h>
#include <asm-generic/gpio.h>
#define SGM41515_CHRG_CTRL_0 0x00
#define SGM41515_CHRG_CTRL_1 0x01
#define SGM41515_CHRG_CTRL_2 0x02
#define SGM41515_CHRG_CTRL_3 0x03
#define SGM41515_CHRG_CTRL_4 0x04
#define SGM41515_CHRG_CTRL_5 0x05
#define SGM41515_CHRG_CTRL_6 0x06
#define SGM41515_CHRG_CTRL_7 0x07
#define SGM41515_CHRG_STAT 0x08
#define SGM41515_CHRG_FAULT 0x09
#define SGM41515_CHRG_CTRL_a 0x0a
#define SGM41515_CHRG_CTRL_b 0x0b
#define SGM41515_CHRG_CTRL_c 0x0c
#define SGM41515_CHRG_CTRL_d 0x0d
#define SGM41515_INPUT_DET 0x0e
#define SGM41515_CHRG_CTRL_f 0x0f
#define SGM41515_CHRG_EN BIT(4)
#define SGM41515_HIZ_EN BIT(7)
#define SGM41515_TERM_EN BIT(7)
#define SGM41515_VAC_OVP_MASK GENMASK(7, 6)
#define SGM41515_DPDM_ONGOING BIT(7)
#define SGM41515_VBUS_GOOD BIT(7)
#define SGM41515_VREG_V_MASK GENMASK(7, 3)
#define SGM41515_VREG_V_MAX_uV 4624000
#define SGM41515_VREG_V_MIN_uV 3856000
#define SGM41515_VREG_V_DEF_uV 4208000
#define SGM41515_VREG_V_STEP_uV 32000
#define SGM41515_IINDPM_I_MASK GENMASK(4, 0)
#define SGM41515_IINDPM_I_MIN_uA 100000
#define SGM41515_IINDPM_I_MAX_uA 3200000
#define SGM41515_IINDPM_STEP_uA 100000
#define SGM41515_IINDPM_DEF_uA 2400000
#define SGM41515_ICHRG_CUR_MASK GENMASK(5, 0)
#define SGM41515_PG_STAT BIT(2)
/* WDT TIMER SET */
#define SGM41515_WDT_TIMER_MASK GENMASK(5, 4)
#define SGM41515_WDT_TIMER_DISABLE 0
#define SGM41515_WDT_TIMER_40S BIT(4)
#define SGM41515_WDT_TIMER_80S BIT(5)
#define SGM41515_WDT_TIMER_160S (BIT(4)| BIT(5))
#define SGM41515_BOOSTV (BIT(4)| BIT(5))
#define SGM41515_BOOST_LIM BIT(7)
#define SGM41515_OTG_EN BIT(5)
#define SGM41515_PRECHRG_CUR_MASK GENMASK(7, 4)
#define SGM41515_TERMCHRG_CUR_MASK GENMASK(3, 0)
#define SGM41515_PRECHRG_I_DEF_uA 120000
#define SGM41515_TERMCHRG_I_DEF_uA 120000
static const unsigned int IPRECHG_CURRENT_STABLE[] = {
5000, 10000, 15000, 20000, 30000, 40000, 50000, 60000,
80000, 100000, 120000, 140000, 160000, 180000, 200000, 240000
};
static const unsigned int ITERM_CURRENT_STABLE[] = {
5000, 10000, 15000, 20000, 30000, 40000, 50000, 60000,
80000, 100000, 120000, 140000, 160000, 180000, 200000, 240000
};
static const unsigned int BOOST_VOLT_LIMIT[] = {
4850000, 5000000, 5150000, 5300000
};
struct sgm41515_charger {
struct gpio_desc nqon;
struct gpio_desc charge_en;
u32 ichg; /* charge current */
u32 ilim; /* input current */
u32 vreg; /* regulation voltage */
u32 iterm; /* termination current */
u32 iprechg; /* precharge current */
u32 vlim; /* minimum system voltage limit */
u32 max_ichg;
u32 max_vreg;
};
static int sgm41515_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
{
int ret;
ret = dm_i2c_read(dev, reg, buff, len);
if(ret) {
debug("read error from device: %p register: %#x!\n", dev, reg);
return ret;
}
return 0;
}
static int sgm41515_write(struct udevice *dev, uint reg, uint8_t *buff, int len)
{
int ret;
ret = dm_i2c_write(dev, reg, buff, len);
if(ret) {
debug("write error to device: %p register: %#x!\n", dev, reg);
return ret;
}
return 0;
}
static int sgm41515_set_input_curr_lim(struct udevice *dev, int iindpm)
{
int ret;
unsigned char reg, reg_val;
if (iindpm < SGM41515_IINDPM_I_MIN_uA ||
iindpm > SGM41515_IINDPM_I_MAX_uA)
return -EINVAL;
reg_val = (iindpm-SGM41515_IINDPM_I_MIN_uA) / SGM41515_IINDPM_STEP_uA;
ret = sgm41515_read(dev, SGM41515_CHRG_CTRL_0, &reg, 1);
reg &= ~SGM41515_IINDPM_I_MASK;
reg_val |= reg;
ret = sgm41515_write(dev, SGM41515_CHRG_CTRL_0, &reg_val, 1);
return ret;
}
static int sgm41515_set_chrg_curr(struct udevice *dev, int uA)
{
int ret;
unsigned char reg, reg_val;
if (uA <= 40000)
reg_val = uA / 5000;
else if (uA <= 110000)
reg_val = 0x08 + (uA -40000) / 10000;
else if (uA <= 270000)
reg_val = 0x0F + (uA -110000) / 20000;
else if (uA <= 540000)
reg_val = 0x17 + (uA -270000) / 30000;
else if (uA <= 1500000)
reg_val = 0x20 + (uA -540000) / 60000;
else if (uA <= 2940000)
reg_val = 0x30 + (uA -1500000) / 120000;
else
reg_val = 0x3d;
ret = sgm41515_read(dev, SGM41515_CHRG_CTRL_2, &reg, 1);
reg &= ~SGM41515_ICHRG_CUR_MASK;
reg_val |= reg;
ret = sgm41515_write(dev, SGM41515_CHRG_CTRL_2, &reg_val, 1);
return ret;
}
static int sgm41515_set_chrg_volt(struct udevice *dev, int chrg_volt)
{
int ret;
unsigned char reg, reg_val;
struct sgm41515_charger *priv = dev_get_priv(dev);
if (chrg_volt < SGM41515_VREG_V_MIN_uV)
chrg_volt = SGM41515_VREG_V_MIN_uV;
else if (chrg_volt > priv->max_vreg)
chrg_volt = priv->max_vreg;
reg_val = (chrg_volt-SGM41515_VREG_V_MIN_uV) / SGM41515_VREG_V_STEP_uV;
reg_val = reg_val<<3;
ret = sgm41515_read(dev, SGM41515_CHRG_CTRL_4, &reg, 1);
reg &= ~SGM41515_VREG_V_MASK;
reg_val |= reg;
ret = sgm41515_write(dev, SGM41515_CHRG_CTRL_4, &reg_val, 1);
return ret;
}
static int sgm41515_set_watchdog_timer(struct udevice *dev, int time)
{
int ret;
unsigned char reg, reg_val;
if (time == 0)
reg_val = SGM41515_WDT_TIMER_DISABLE;
else if (time == 40)
reg_val = SGM41515_WDT_TIMER_40S;
else if (time == 80)
reg_val = SGM41515_WDT_TIMER_80S;
else
reg_val = SGM41515_WDT_TIMER_160S;
ret = sgm41515_read(dev, SGM41515_CHRG_CTRL_5, &reg, 1);
reg &= ~SGM41515_WDT_TIMER_MASK;
reg_val |= reg;
ret = sgm41515_write(dev, SGM41515_CHRG_CTRL_5, &reg_val, 1);
return ret;
}
static int sgm41515_set_output_volt(struct udevice *dev, int uV)
{
int ret = 0;
int i = 0;
unsigned char reg, reg_val;
while(i < 4){
if (uV == BOOST_VOLT_LIMIT[i]){
reg_val = (unsigned char)i;
break;
}
i++;
}
if (reg_val < 0)
return reg_val;
reg_val = reg_val << 4;
ret = sgm41515_read(dev, SGM41515_CHRG_CTRL_6, &reg, 1);
reg &= ~SGM41515_BOOSTV;
reg_val |= reg;
ret = sgm41515_write(dev, SGM41515_CHRG_CTRL_6, &reg_val, 1);
return ret;
}
static int sgm41515_set_term_curr(struct udevice *dev, int uA)
{
unsigned char reg, reg_val;
for(reg_val = 1; reg_val < 16 && uA >= ITERM_CURRENT_STABLE[reg_val]; reg_val++)
;
reg_val--;
sgm41515_read(dev, SGM41515_CHRG_CTRL_3, &reg, 1);
reg &= ~SGM41515_TERMCHRG_CUR_MASK;
reg_val |= reg;
return sgm41515_write(dev, SGM41515_CHRG_CTRL_3, &reg_val, 1);
}
static int sgm41515_set_prechrg_curr(struct udevice *dev, int uA)
{
unsigned char reg, reg_val;
for(reg_val = 1; reg_val < 16 && uA >= IPRECHG_CURRENT_STABLE[reg_val]; reg_val++)
;
reg_val--;
reg_val = reg_val << 4;
sgm41515_read(dev, SGM41515_CHRG_CTRL_3, &reg, 1);
reg &= ~SGM41515_PRECHRG_CUR_MASK;
reg_val |= reg;
return sgm41515_write(dev, SGM41515_CHRG_CTRL_3, &reg_val, 1);
}
static int sgm41515_hw_init(struct udevice *dev)
{
int ret, val;
struct sgm41515_charger *priv = dev_get_priv(dev);
/* set input current limit */
ret = sgm41515_set_input_curr_lim(dev, priv->ilim);
if(ret) {
printf("set input current failed\n");
return ret;
}
/* set charge current and voltage limit */
ret = sgm41515_set_chrg_curr(dev, priv->ichg);
if(ret) {
printf("set charge current failed\n");
return ret;
}
ret = sgm41515_set_chrg_volt(dev, priv->max_vreg);
if(ret) {
printf("set charge voltage failed\n");
return ret;
}
sgm41515_set_watchdog_timer(dev, 0);
sgm41515_set_output_volt(dev, 5000000);
val = dev_read_u32_default(dev, "sgm41515-prechrg-uA", SGM41515_PRECHRG_I_DEF_uA);
sgm41515_set_prechrg_curr(dev, val);
val = dev_read_u32_default(dev, "sgm41515-termchrg-uA", SGM41515_TERMCHRG_I_DEF_uA);
sgm41515_set_term_curr(dev, val);
return 0;
}
static int sgm41515_enable_charge(struct udevice *dev)
{
int ret;
unsigned char reg, reg_val;
struct sgm41515_charger *priv = dev_get_priv(dev);
ret = gpio_request_by_name(dev, "ch-en-gpios", 0, &priv->charge_en,
GPIOD_IS_OUT);
if (ret) {
printf("%s: Warning: cannot get enable GPIO: ret=%d\n",
__func__, ret);
return ret;
}
/* enable charge */
dm_gpio_set_value(&priv->charge_en, 0);
ret = gpio_request_by_name(dev, "nqon-gpios", 0, &priv->nqon,
GPIOD_IS_OUT);
if (ret) {
printf("%s: Warning: cannot get enable GPIO: ret=%d\n",
__func__, ret);
return ret;
}
/* enable charge */
dm_gpio_set_value(&priv->nqon, 1);
reg_val = SGM41515_CHRG_EN;
ret = sgm41515_read(dev, SGM41515_CHRG_CTRL_1, &reg, 1);
reg &= ~SGM41515_CHRG_EN;
reg_val |= reg;
ret = sgm41515_write(dev, SGM41515_CHRG_CTRL_1, &reg_val, 1);
if(ret)
return ret;
return 0;
}
static int sgm41515_get_status(struct udevice *dev)
{
unsigned char reg;
int ret;
bool online;
struct sgm41515_charger *priv = dev_get_priv(dev);
ret = sgm41515_read(dev, SGM41515_CHRG_STAT, &reg, 1);
if(ret) {
printf("failed to get charger status\n");
return ret;
}
online = !!(reg & SGM41515_PG_STAT);
if(online) {
printf("vbus is attached\n");
ret = sgm41515_set_input_curr_lim(dev, priv->ilim);
if(ret) {
printf("set input current failed\n");
return ret;
}
return 1;
} else {
printf("vbus is not attached\n");
return 0;
}
return 0;
}
static int sgm41515_probe(struct udevice *dev)
{
int ret;
int input_current, ichrg_limit, vchrg_limit;
struct sgm41515_charger *priv = dev_get_priv(dev);
input_current = dev_read_u32_default(dev, "sgm41515-cur-input-uA", 2000000);
ichrg_limit = dev_read_u32_default(dev, "sgm41515-ichrg-uA", 2000000);
vchrg_limit = dev_read_u32_default(dev, "sgm41515-vchrg-uV", 4350000);
priv->max_vreg = vchrg_limit;
priv->ichg = ichrg_limit;
priv->ilim = input_current;
ret = sgm41515_hw_init(dev);
if(ret)
return ret;
/* enable charger */
sgm41515_enable_charge(dev);
printf("sgm41515 charger register successfully!\n");
return 0;
}
static const struct udevice_id sgm41515_ids[] = {
{ .compatible = "spacemit,sgm41515", .data = 0 },
{ }
};
static struct dm_charger_ops sgm41515_chg_ops = {
.get_status = sgm41515_get_status,
};
U_BOOT_DRIVER(sgm41515_charger) = {
.name = "sgm41515-charger",
.id = UCLASS_CHARGER,
.of_match = sgm41515_ids,
.ops = &sgm41515_chg_ops,
.probe = sgm41515_probe,
.priv_auto = sizeof(struct sgm41515_charger),
};

3
drivers/pwm/pwm-pxa.c
View file

@ -96,7 +96,6 @@ static int pxa_pwm_set_enable(struct udevice *dev, uint channel, bool enable)
struct pxa_pwm_priv *priv = dev_get_priv(dev);
if (enable) {
printf("!!!!!!!!!!!!!!!!!!\n");
return clk_enable(&priv->clk);
}
else
@ -146,7 +145,7 @@ static const struct udevice_id pxa_pwm_ids[] = {
{ }
};
U_BOOT_DRIVER(mtk_pwm) = {
U_BOOT_DRIVER(spacemit_pwm) = {
.name = "pxa_pwm",
.id = UCLASS_PWM,
.of_match = pxa_pwm_ids,

1
drivers/video/spacemit/dsi/Makefile
View file

@ -8,6 +8,7 @@ obj-y += video/spacemit_video_tx.o \
obj-y += video/lcd/lcd_icnl9911c.o
obj-y += video/lcd/lcd_icnl9951r.o
obj-y += video/lcd/lcd_jd9365dah3.o
obj-y += video/lcd/lcd_gx09inx101.o
obj-y += video/lcd/lcd_lt8911ext_edp_1080p.o

1
drivers/video/spacemit/dsi/include/spacemit_dsi_common.h
View file

@ -141,6 +141,7 @@ int lcd_mipi_probe(void);
int lcd_icnl9911c_init(void);
int lcd_icnl9951r_init(void);
int lcd_gx09inx101_init(void);
int lcd_jd9365dah3_init(void);
int lcd_lt8911ext_edp_1080p_init(void);
#endif /*_SPACEMIT_DSI_COMMON_H_*/

1
drivers/video/spacemit/dsi/include/spacemit_video_tx.h
View file

@ -160,6 +160,7 @@ struct spacemit_panel_priv {
struct gpio_desc bl;
struct gpio_desc enable;
struct gpio_desc reset;
struct udevice *backlight;
bool dcp_valid;
bool dcn_valid;
bool avee_valid;

341
drivers/video/spacemit/dsi/video/lcd/lcd_jd9365dah3.c Normal file
View file

@ -0,0 +1,341 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2023 Spacemit Co., Ltd.
*
*/
#include <linux/kernel.h>
#include "../../include/spacemit_dsi_common.h"
#include "../../include/spacemit_video_tx.h"
#include <linux/delay.h>
#define UNLOCK_DELAY 0
struct spacemit_mode_modeinfo jd9365dah3_spacemit_modelist[] = {
{
.name = "800x1280-60",
.refresh = 60,
.xres = 800,
.yres = 1280,
.real_xres = 800,
.real_yres = 1280,
.left_margin = 20,
.right_margin = 40,
.hsync_len = 20,
.upper_margin = 8,
.lower_margin = 20,
.vsync_len = 4,
.hsync_invert = 0,
.vsync_invert = 0,
.invert_pixclock = 0,
.pixclock_freq = 87*1000,
.pix_fmt_out = OUTFMT_RGB888,
.width = 108,
.height = 172,
},
};
struct spacemit_mipi_info jd9365dah3_mipi_info = {
.height = 1280,
.width = 800,
.hfp = 40, /* unit: pixel */
.hbp = 20,
.hsync = 20,
.vfp = 20, /* unit: line */
.vbp = 8,
.vsync = 4,
.fps = 60,
.work_mode = SPACEMIT_DSI_MODE_VIDEO, /*command_mode, video_mode*/
.rgb_mode = DSI_INPUT_DATA_RGB_MODE_888,
.lane_number = 4,
.phy_bit_clock = 614400000,
.phy_esc_clock = 51200000,
.split_enable = 0,
.eotp_enable = 0,
.burst_mode = DSI_BURST_MODE_BURST,
};
static struct spacemit_dsi_cmd_desc jd9365dah3_set_id_cmds[] = {
{SPACEMIT_DSI_SET_MAX_PKT_SIZE, SPACEMIT_DSI_LP_MODE, UNLOCK_DELAY, 1, {0x01}},
};
static struct spacemit_dsi_cmd_desc jd9365dah3_read_id_cmds[] = {
{SPACEMIT_DSI_GENERIC_READ1, SPACEMIT_DSI_LP_MODE, UNLOCK_DELAY, 1, {0x04}},
};
static struct spacemit_dsi_cmd_desc jd9365dah3_set_power_cmds[] = {
{SPACEMIT_DSI_SET_MAX_PKT_SIZE, SPACEMIT_DSI_HS_MODE, UNLOCK_DELAY, 1, {0x1}},
};
static struct spacemit_dsi_cmd_desc jd9365dah3_read_power_cmds[] = {
{SPACEMIT_DSI_GENERIC_READ1, SPACEMIT_DSI_HS_MODE, UNLOCK_DELAY, 1, {0xA}},
};
static struct spacemit_dsi_cmd_desc jd9365dah3_init_cmds[] = {
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0xE0, 0x00}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0xE1, 0x93}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0xE2, 0x65}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0xE3, 0xF8}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x80, 0x03}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0xE0, 0x01}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x00, 0x00}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x01, 0x40}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x03, 0x10}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x04, 0x47}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x0C, 0x74}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x17, 0x00}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x18, 0xD7}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x19, 0x01}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x1A, 0x00}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x1B, 0xD7}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x1C, 0x01}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x24, 0xFE}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x25, 0x40}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x35, 0x28}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x37, 0x69}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x38, 0x05}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x39, 0x08}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x3A, 0x0A}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x3C, 0x78}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x3D, 0xFF}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x3E, 0xFF}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x3F, 0xFF}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x40, 0x06}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x41, 0xA0}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x43, 0x14}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x44, 0x08}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x45, 0x20}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x4B, 0x04}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x55, 0x02}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x57, 0xA9}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x59, 0x0A}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x5A, 0x2D}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x5B, 0x19}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x5C, 0x15}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x5D, 0x7C}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x5E, 0x6C}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x5F, 0x5F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x60, 0x54}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x61, 0x50}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x62, 0x43}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x63, 0x46}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x64, 0x2F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x65, 0x48}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x66, 0x46}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x67, 0x44}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x68, 0x5F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x69, 0x49}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x6A, 0x4C}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x6B, 0x3D}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x6C, 0x36}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x6D, 0x29}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x6E, 0x18}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x6F, 0x0C}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x70, 0x7C}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x71, 0x6C}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x72, 0x5F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x73, 0x54}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x74, 0x50}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x75, 0x43}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x76, 0x46}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x77, 0x2F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x78, 0x48}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x79, 0x46}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x7A, 0x44}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x7B, 0x5F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x7C, 0x49}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x7D, 0x4C}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x7E, 0x3D}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x7F, 0x36}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x80, 0x29}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x81, 0x18}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x82, 0x0C}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0xE0, 0x02}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x00, 0x5F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x01, 0x5F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x02, 0x52}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x03, 0x51}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x04, 0x50}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x05, 0x4B}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x06, 0x4A}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x07, 0x49}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x08, 0x48}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x09, 0x47}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x0A, 0x46}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x0B, 0x45}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x0C, 0x44}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x0D, 0x40}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x0E, 0x41}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x0F, 0x5F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x10, 0x5F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x11, 0x5F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x12, 0x5F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x13, 0x5F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x14, 0x5F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x15, 0x5F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x16, 0x5F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x17, 0x5F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x18, 0x52}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x19, 0x51}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x1A, 0x50}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x1B, 0x4B}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x1C, 0x4A}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x1D, 0x49}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x1E, 0x48}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x1F, 0x47}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x20, 0x46}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x21, 0x45}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x22, 0x44}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x23, 0x40}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x24, 0x41}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x25, 0x5F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x26, 0x5F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x27, 0x5F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x28, 0x5F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x29, 0x5F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x2A, 0x5F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x2B, 0x5F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x2C, 0x1F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x2D, 0x1F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x2E, 0x12}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x2F, 0x00}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x30, 0x01}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x31, 0x08}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x32, 0x09}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x33, 0x0A}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x34, 0x0B}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x35, 0x04}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x36, 0x05}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x37, 0x06}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x38, 0x07}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x39, 0x11}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x3A, 0x10}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x3B, 0x1F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x3C, 0x1F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x3D, 0x1F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x3E, 0x1F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x3F, 0x1F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x40, 0x1F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x41, 0x1F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x42, 0x1F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x43, 0x1F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x44, 0x12}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x45, 0x00}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x46, 0x01}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x47, 0x08}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x48, 0x09}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x49, 0x0A}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x4A, 0x0B}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x4B, 0x04}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x4C, 0x05}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x4D, 0x06}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x4E, 0x07}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x4F, 0x11}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x50, 0x10}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x51, 0x1F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x52, 0x1F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x53, 0x1F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x54, 0x1F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x55, 0x1F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x56, 0x1F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x57, 0x1F}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x58, 0x40}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x59, 0x00}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x5A, 0x00}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x5B, 0x10}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x5C, 0x02}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x5D, 0x50}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x5E, 0x01}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x5F, 0x02}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x60, 0x50}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x61, 0x05}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x62, 0x02}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x63, 0x04}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x64, 0x64}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x65, 0x65}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x66, 0x08}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x67, 0x73}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x68, 0x04}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x69, 0x04}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x6A, 0x64}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x6B, 0x08}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x6C, 0x00}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x6D, 0x00}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x6E, 0x00}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x6F, 0x88}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x70, 0x00}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x71, 0x00}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x72, 0x06}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x73, 0x7B}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x74, 0x00}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x75, 0x0C}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x76, 0x00}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x77, 0x5D}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x78, 0x17}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x79, 0x10}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x7A, 0x00}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x7B, 0x00}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x7C, 0x00}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x7D, 0x03}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x7E, 0x7B}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0xE0, 0x04}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x2C, 0x6B}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x35, 0x0A}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0xE0, 0x00}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 120, 2, {0x11, 0x00}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 5, 2, {0x29, 0x00}},
{SPACEMIT_DSI_DCS_LWRITE, SPACEMIT_DSI_LP_MODE, 0, 2, {0x35, 0x00}},
};
static struct spacemit_dsi_cmd_desc jd9365dah3_sleep_out_cmds[] = {
{SPACEMIT_DSI_DCS_SWRITE,SPACEMIT_DSI_LP_MODE,120,2,{0x11, 0x00}},
{SPACEMIT_DSI_DCS_SWRITE,SPACEMIT_DSI_LP_MODE,50,2,{0x29, 0x00}},
};
static struct spacemit_dsi_cmd_desc jd9365dah3_sleep_in_cmds[] = {
{SPACEMIT_DSI_DCS_SWRITE,SPACEMIT_DSI_LP_MODE,50,2,{0x28, 0x00}},
{SPACEMIT_DSI_DCS_SWRITE,SPACEMIT_DSI_LP_MODE,120,2,{0x10, 0x00}},
};
struct lcd_mipi_panel_info lcd_jd9365dah3 = {
.lcd_name = "jd9365dah3",
.lcd_id = 0x9365,
.panel_id0 = 0x93,
.power_value = 0x18,
.panel_type = LCD_MIPI,
.width_mm = 108,
.height_mm = 172,
.dft_pwm_bl = 128,
.set_id_cmds_num = ARRAY_SIZE(jd9365dah3_set_id_cmds),
.read_id_cmds_num = ARRAY_SIZE(jd9365dah3_read_id_cmds),
.init_cmds_num = ARRAY_SIZE(jd9365dah3_init_cmds),
.set_power_cmds_num = ARRAY_SIZE(jd9365dah3_set_power_cmds),
.read_power_cmds_num = ARRAY_SIZE(jd9365dah3_read_power_cmds),
.sleep_out_cmds_num = ARRAY_SIZE(jd9365dah3_sleep_out_cmds),
.sleep_in_cmds_num = ARRAY_SIZE(jd9365dah3_sleep_in_cmds),
//.drm_modeinfo = jd9365dah3_modelist,
.spacemit_modeinfo = jd9365dah3_spacemit_modelist,
.mipi_info = &jd9365dah3_mipi_info,
.set_id_cmds = jd9365dah3_set_id_cmds,
.read_id_cmds = jd9365dah3_read_id_cmds,
.set_power_cmds = jd9365dah3_set_power_cmds,
.read_power_cmds = jd9365dah3_read_power_cmds,
.init_cmds = jd9365dah3_init_cmds,
.sleep_out_cmds = jd9365dah3_sleep_out_cmds,
.sleep_in_cmds = jd9365dah3_sleep_in_cmds,
.bitclk_sel = 3,
.bitclk_div = 1,
.pxclk_sel = 2,
.pxclk_div = 6,
};
int lcd_jd9365dah3_init(void)
{
int ret;
ret = lcd_mipi_register_panel(&lcd_jd9365dah3);
return ret;
}

36
drivers/video/spacemit/dsi/video/spacemit_mipi_port.c
View file

@ -17,7 +17,7 @@
#include <asm/global_data.h>
#include <asm/io.h>
#include <linux/delay.h>
#include <backlight.h>
#define PANEL_NUM_MAX 5
@ -354,13 +354,24 @@ static int lcd_bl_enable(struct video_tx_device *dev, bool enable)
struct lcd_mipi_tx_data *video_tx_client =
video_tx_get_drvdata(dev);
struct spacemit_panel_priv *priv = video_tx_client->priv;
int ret;
if (priv->bl_valid) {
if (enable)
dm_gpio_set_value(&priv->bl, 1);
else
dm_gpio_set_value(&priv->bl, 0);
if (enable) {
ret = backlight_set_brightness(priv->backlight, BACKLIGHT_DEFAULT);
pr_debug("%s: set brightness done, ret = %d\n", __func__, ret);
if (ret)
return ret;
ret = backlight_enable(priv->backlight);
pr_debug("%s: enable backlight done, ret = %d\n", __func__, ret);
if (ret)
return ret;
} else {
ret = backlight_set_brightness(priv->backlight, BACKLIGHT_OFF);
pr_debug("%s: shutdown backlight done, ret = %d\n", __func__, ret);
if (ret)
return ret;
}
}
return 0;
@ -444,6 +455,10 @@ int lcd_mipi_probe(void)
tx_device_client.panel_type = LCD_MIPI;
tx_device.panel_type = tx_device_client.panel_type;
lcd_icnl9951r_init();
} else if(strcmp("jd9365dah3", priv->panel_name) == 0) {
tx_device_client.panel_type = LCD_MIPI;
tx_device.panel_type = tx_device_client.panel_type;
lcd_jd9365dah3_init();
} else {
// lcd_icnl9911c_init();
lcd_gx09inx101_init();
@ -513,13 +528,14 @@ static int spacemit_panel_of_to_plat(struct udevice *dev)
}
ret = gpio_request_by_name(dev, "bl-gpios", 0, &priv->bl,
GPIOD_IS_OUT);
ret = uclass_get_device_by_phandle(UCLASS_PANEL_BACKLIGHT, dev,
"backlight", &priv->backlight);
if (ret) {
pr_debug("%s: Warning: cannot get bl GPIO: ret=%d\n",
__func__, ret);
pr_debug("%s: Warning: cannot get backlight pwm: ret = %d\n",
__func__, ret);
priv->bl_valid = false;
} else {
pr_debug("apply for pwm successfully\n");
priv->bl_valid = true;
}

17
drivers/video/spacemit/spacemit_dpu.c
View file

@ -6,6 +6,7 @@
#include <common.h>
#include <display.h>
#include <cpu_func.h>
#include <dm.h>
#include <dm/uclass.h>
#include <dm/device.h>
@ -306,12 +307,15 @@ static int spacemit_display_init(struct udevice *dev, ulong fbbase, ofnode ep_no
return ret;
}
hdmi_dpu_init(&hdmi_1080p_modeinfo, fbbase);
uc_priv->xsize = 1920;
uc_priv->ysize = 1080;
pr_info("fb=%lx, size=%d %d\n", fbbase, uc_priv->xsize, uc_priv->ysize);
pr_info("fb=%lx, size=%dx%d\n", fbbase, uc_priv->xsize, uc_priv->ysize);
memset((void *)fbbase, 0, uc_priv->xsize * uc_priv->ysize * VNBYTES(uc_priv->bpix));
flush_cache(fbbase, uc_priv->xsize * uc_priv->ysize * VNBYTES(uc_priv->bpix));
hdmi_dpu_init(&hdmi_1080p_modeinfo, fbbase);
return 0;
} else if (dpu_id == DPU_MODE_MIPI) {
@ -356,6 +360,11 @@ static int spacemit_display_init(struct udevice *dev, ulong fbbase, ofnode ep_no
uc_priv->xsize = spacemit_mode->xres;
uc_priv->ysize = spacemit_mode->yres;
pr_info("fb=%lx, size=%dx%d\n", fbbase, uc_priv->xsize, uc_priv->ysize);
memset((void *)fbbase, 0, uc_priv->xsize * uc_priv->ysize * VNBYTES(uc_priv->bpix));
flush_cache(fbbase, uc_priv->xsize * uc_priv->ysize * VNBYTES(uc_priv->bpix));
pr_debug("%s: panel type %d\n", __func__, fbi.tx->panel_type);
if (fbi.tx->panel_type == LCD_MIPI) {
@ -393,8 +402,6 @@ static int spacemit_display_init(struct udevice *dev, ulong fbbase, ofnode ep_no
pr_info("%s: Failed to find panel\n", __func__);
}
pr_info("fb=%lx, size=%d %d\n", fbbase, uc_priv->xsize, uc_priv->ysize);
return 0;
}

1
include/configs/k1-x.h
View file

@ -78,6 +78,7 @@
#define TLV_CODE_SDK_VERSION 0x40
#define TLV_CODE_DDR_CSNUM 0x41
#define TLV_CODE_DDR_TYPE 0x42
#define TLV_CODE_DDR_DATARATE 0x43
#define TLV_CODE_PMIC_TYPE 0x80
#define TLV_CODE_EEPROM_I2C_INDEX 0x81

2
include/dm/uclass-id.h
View file

@ -37,6 +37,8 @@ enum uclass_id {
UCLASS_AUDIO_CODEC, /* Audio codec with control and data path */
UCLASS_AXI, /* AXI bus */
UCLASS_BLK, /* Block device */
UCLASS_BATTERY, /* Battery */
UCLASS_CHARGER, /* Charger */
UCLASS_BOOTCOUNT, /* Bootcount backing store */
UCLASS_BOOTDEV, /* Boot device for locating an OS to boot */
UCLASS_BOOTMETH, /* Bootmethod for booting an OS */

3
include/efi_loader.h
View file

@ -721,6 +721,9 @@ efi_status_t efi_allocate_pool(enum efi_memory_type pool_type,
efi_uintn_t size, void **buffer);
/* EFI pool memory free function. */
efi_status_t efi_free_pool(void *buffer);
/* Allocate and retrieve EFI memory map */
efi_status_t efi_get_memory_map_alloc(efi_uintn_t *map_size,
struct efi_mem_desc **memory_map);
/* Returns the EFI memory map */
efi_status_t efi_get_memory_map(efi_uintn_t *memory_map_size,
struct efi_mem_desc *memory_map,

10
include/fb_spacemit.h
View file

@ -58,8 +58,16 @@ struct flash_volume_image {
struct flash_parts_info {
char *part_name;
char *file_name;
/*partition size info, such as 128MiB*/
/*partition offset info*/
u64 part_offset;
/*partition size info*/
u64 part_size;
/*save partition size to string*/
char *size;
/*use for fsbl, if hidden that gpt would reserve a raw memeory
for fsbl and the partition is not available.
*/

39
include/power/battery.h
View file

@ -7,6 +7,8 @@
#ifndef __POWER_BATTERY_H_
#define __POWER_BATTERY_H_
#ifndef CONFIG_DM_BATTERY
/* TODO: remove this once all users have been moved over to DM */
struct battery {
unsigned int version;
unsigned int state_of_chrg;
@ -18,4 +20,41 @@ struct battery {
};
int power_bat_init(unsigned char bus);
#else
enum dm_battery_state {
BAT_STATE_UNUSED = 0, /* never used */
BAT_STATE_NOT_PRESENT, /* battery is not present */
BAT_STATE_NEED_CHARGING, /* battery needs charging (i.e. low SOC or voltage) */
BAT_STATE_NORMAL, /* battery is OK */
};
/* Battery device operations */
struct dm_battery_ops {
/**
* Get the current voltage of the battery.
* @dev - battery device
* @uV - pointer to place to store voltage, in microvolts
* @return 0 if success, -errno otherwise.
*/
int (*get_voltage)(struct udevice *dev, unsigned int *uV);
/**
* Get the current battery status
* @dev - battery device
* @return -errno on error, enum dm_battery_state otherwise
*/
int (*get_status)(struct udevice *dev);
/**
* Get the battery's State Of Charge (SOC)
* @dev - battery device
* @return 0-100 value representing current battery charge percentage, -errno on error
*/
int (*get_soc)(struct udevice *dev);
};
int battery_get(const char *devname, struct udevice **devp);
int battery_get_voltage(struct udevice *dev, unsigned int *uV);
int battery_get_status(struct udevice *dev);
int battery_get_soc(struct udevice *dev);
#endif /* CONFIG_DM_BATTERY */
#endif /* __POWER_BATTERY_H_ */

40
include/power/charger.h Normal file
View file

@ -0,0 +1,40 @@
/*
* Copyright (C) 2018 Simon Shields <simon@lineageos.org>
*
* SPDX-License-Identifier: GPL-2.0+
*/
enum charger_state {
CHARGE_STATE_UNKNOWN = 0,
CHARGE_STATE_CHARGING = 1, /* charging normally */
CHARGE_STATE_FULL = 2, /* not charging - battery full */
CHARGE_STATE_NOT_CHARGING = 3, /* not charging - some other reason */
CHARGE_STATE_DISCHARGING = 4, /* discharging */
};
struct dm_charger_ops {
/**
* Get the charge current of the charger.
* Some devices may return the maximum charge current rather than the current charge current.
* @dev - charger device.
* @return -errno on error, charge current in uA.
*/
int (*get_current)(struct udevice *dev);
/**
* Set the maximum charge current for the charger. A current of zero will disable charging.
* @dev - charger device
* @return -errno on error, 0 otherwise.
*/
int (*set_current)(struct udevice *dev, unsigned int microamps);
/**
* Get current charging state.
* @dev - charger device
* @return -errno on error, enum charger_state otherwise.
*/
int (*get_status)(struct udevice *dev);
};
int charger_get(const char *devname, struct udevice **devp);
int charger_get_current(struct udevice *dev);
int charger_set_current(struct udevice *dev, unsigned int microamps);
int charger_get_status(struct udevice *dev);

34
lib/efi_loader/efi_memory.c
View file

@ -734,6 +734,40 @@ efi_status_t efi_get_memory_map(efi_uintn_t *memory_map_size,
return EFI_SUCCESS;
}
/**
* efi_get_memory_map_alloc() - allocate map describing memory usage
*
* The caller is responsible for calling FreePool() if the call succeeds.
*
* @memory_map buffer to which the memory map is written
* @map_size size of the memory map
* Return: status code
*/
efi_status_t efi_get_memory_map_alloc(efi_uintn_t *map_size,
struct efi_mem_desc **memory_map)
{
efi_status_t ret;
*memory_map = NULL;
*map_size = 0;
ret = efi_get_memory_map(map_size, *memory_map, NULL, NULL, NULL);
if (ret == EFI_BUFFER_TOO_SMALL) {
*map_size += sizeof(struct efi_mem_desc); /* for the map */
ret = efi_allocate_pool(EFI_BOOT_SERVICES_DATA, *map_size,
(void **)memory_map);
if (ret != EFI_SUCCESS)
return ret;
ret = efi_get_memory_map(map_size, *memory_map,
NULL, NULL, NULL);
if (ret != EFI_SUCCESS) {
efi_free_pool(*memory_map);
*memory_map = NULL;
}
}
return ret;
}
/**
* efi_add_conventional_memory_map() - add a RAM memory area to the map
*

36
lib/lmb.c
View file

@ -7,7 +7,9 @@
*/
#include <common.h>
#include <efi_loader.h>
#include <image.h>
#include <mapmem.h>
#include <lmb.h>
#include <log.h>
#include <malloc.h>
@ -153,6 +155,37 @@ void arch_lmb_reserve_generic(struct lmb *lmb, ulong sp, ulong end, ulong align)
}
}
/**
* efi_lmb_reserve() - add reservations for EFI memory
*
* Add reservations for all EFI memory areas that are not
* EFI_CONVENTIONAL_MEMORY.
*
* @lmb: lmb environment
* Return: 0 on success, 1 on failure
*/
static __maybe_unused int efi_lmb_reserve(struct lmb *lmb)
{
struct efi_mem_desc *memmap = NULL, *map;
efi_uintn_t i, map_size = 0;
efi_status_t ret;
ret = efi_get_memory_map_alloc(&map_size, &memmap);
if (ret != EFI_SUCCESS)
return 1;
for (i = 0, map = memmap; i < map_size / sizeof(*map); ++map, ++i) {
if (map->type != EFI_CONVENTIONAL_MEMORY)
lmb_reserve(lmb,
map_to_sysmem((void *)(uintptr_t)
map->physical_start),
map->num_pages * EFI_PAGE_SIZE);
}
efi_free_pool(memmap);
return 0;
}
static void lmb_reserve_common(struct lmb *lmb, void *fdt_blob)
{
arch_lmb_reserve(lmb);
@ -160,6 +193,9 @@ static void lmb_reserve_common(struct lmb *lmb, void *fdt_blob)
if (CONFIG_IS_ENABLED(OF_LIBFDT) && fdt_blob)
boot_fdt_add_mem_rsv_regions(lmb, fdt_blob);
if (CONFIG_IS_ENABLED(EFI_LOADER))
efi_lmb_reserve(lmb);
}
/* Initialize the struct, add memory and call arch/board reserve functions */