Update for v1.0alpha2

.gitignore

@@ -47,6 +47,12 @@ fit-dtb.blob*
 /boards.cfg
 /*.log
 
+/key/
+
+itb.fit.fit
+itb.fit.itb
+itb.map
+
 #
 # git files that we don't want to ignore even it they are dot-files
 #

Makefile

@@ -798,6 +798,10 @@ include scripts/Makefile.extrawarn
 KBUILD_CPPFLAGS += $(KCPPFLAGS)
 KBUILD_AFLAGS += $(KAFLAGS)
 KBUILD_CFLAGS += $(KCFLAGS)
+KBUILD_CFLAGS += $(call cc-option, -Werror)
+
+KBUILD_LDFLAGS  += -z noexecstack
+KBUILD_LDFLAGS  += $(call ld-option,--no-warn-rwx-segments)
 
 KBUILD_HOSTCFLAGS += $(if $(CONFIG_TOOLS_DEBUG),-g)
 

arch/riscv/Kconfig

@@ -31,8 +31,24 @@ config TARGET_SIPEED_MAIX
 config TARGET_OPENPITON_RISCV64
 	bool "Support RISC-V cores on OpenPiton SoC"
 
+config TARGET_SPACEMIT_K1PRO
+	bool "Support Spacemit K1-Pro SoC"
+	select SYS_CACHE_SHIFT_6
+
+config TARGET_SPACEMIT_K1X
+	bool "Support Spacemit K1-X SoC"
+	select SYS_CACHE_SHIFT_6
+
 endchoice
 
+config NOT_RELOC_TEXT_SECTION
+	bool "Don't relocate text section for u-boot debug!!!"
+	depends on TARGET_SPACEMIT_K1PRO || TARGET_SPACEMIT_K1X
+	default n
+	help
+	  Attention: this feture is just used for u-boot debug,
+	  it will make fatal error when boot kernel.
+
 config SYS_ICACHE_OFF
 	bool "Do not enable icache"
 	help
@@ -65,12 +81,14 @@ source "board/sifive/unleashed/Kconfig"
 source "board/sifive/unmatched/Kconfig"
 source "board/openpiton/riscv64/Kconfig"
 source "board/sipeed/maix/Kconfig"
+source "board/spacemit/k1-x/Kconfig"
 
 # platform-specific options below
 source "arch/riscv/cpu/ax25/Kconfig"
 source "arch/riscv/cpu/fu540/Kconfig"
 source "arch/riscv/cpu/fu740/Kconfig"
 source "arch/riscv/cpu/generic/Kconfig"
+source "arch/riscv/cpu/x60/Kconfig"
 
 # architecture-specific options below
 
@@ -155,6 +173,30 @@ config RISCV_ISA_C
 config RISCV_ISA_A
 	def_bool y
 
+config RISCV_ISA_DOUBLE_FLOAT
+	bool "double-precision floating-point instruction"
+	default y
+	help
+	  Choose this option to turn on double-precision floating-point support.
+
+config RISCV_ISA_ZICBOM
+	bool "Zicbom extension support for non-coherent DMA operation"
+	default y
+	help
+	   Adds support to dynamically detect the presence of the ZICBOM
+	   extension (Cache Block Management Operations) and enable its
+	   usage.
+
+	   The Zicbom extension can be used to handle for example
+	   non-coherent DMA support on devices that need it.
+
+	   If you don't know what to do here, say Y.
+
+config RISCV_CBOM_BLOCK_SIZE
+	int
+	depends on RISCV_ISA_ZICBOM
+	default SYS_CACHELINE_SIZE
+
 config 32BIT
 	bool
 

arch/riscv/Makefile

@@ -17,6 +17,12 @@ endif
 ifeq ($(CONFIG_RISCV_ISA_C),y)
 	ARCH_C = c
 endif
+ifeq ($(CONFIG_RISCV_ISA_DOUBLE_FLOAT),y)
+	ARCH_F = fd
+endif
+ifeq ($(CONFIG_RISCV_ISA_ZICBOM),y)
+	ARCH_EXTENTION = _zicbom
+endif
 ifeq ($(CONFIG_CMODEL_MEDLOW),y)
 	CMODEL = medlow
 endif
@@ -24,8 +30,12 @@ ifeq ($(CONFIG_CMODEL_MEDANY),y)
 	CMODEL = medany
 endif
 
-ARCH_FLAGS = -march=$(ARCH_BASE)$(ARCH_A)$(ARCH_C) -mabi=$(ABI) \
-	     -mcmodel=$(CMODEL)
+ifeq ($(CONFIG_SPACEMIT_X60),y)
+	SPACEMIT_X60_EXTENTION = _zba_zbb_zbc_zbs_zicsr_zifencei
+endif
+
+ARCH_FLAGS = -march=$(ARCH_BASE)$(ARCH_A)$(ARCH_F)$(ARCH_C)$(ARCH_EXTENTION)$(SPACEMIT_X60_EXTENTION) -mabi=$(ABI) \
+		-mcmodel=$(CMODEL)
 
 PLATFORM_CPPFLAGS	+= $(ARCH_FLAGS)
 CFLAGS_EFI		+= $(ARCH_FLAGS)

arch/riscv/cpu/x60/Kconfig

@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2023 Spacemit, Inc
+
+config SPACEMIT_X60
+	bool
+	select SUPPORT_SPL
+	select RAM
+	select SPL_RAM if SPL
+	select ARCH_EARLY_INIT_R
+	imply CPU
+	imply CPU_RISCV
+	imply RISCV_TIMER if (RISCV_SMODE || SPL_RISCV_SMODE)
+	imply SIFIVE_CLINT if RISCV_MMODE
+	imply SPL_SIFIVE_CLINT if SPL_RISCV_MMODE
+	imply CMD_CPU
+	imply SPL_CPU
+	imply SPL_OPENSBI
+	imply SPL_LOAD_FIT

arch/riscv/cpu/x60/Makefile

@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2023 Spacemit, Inc
+
+obj-y += cpu.o
+obj-y += cache.o
+obj-y += dram.o

arch/riscv/cpu/x60/cache.c

@@ -0,0 +1,141 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2023 Spacemit, Inc
+ */
+
+#include <common.h>
+#include <cpu_func.h>
+#include <dm.h>
+#include <asm/cache.h>
+#include <cache.h>
+#include <asm/csr.h>
+
+void icache_enable(void)
+{
+#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
+#if CONFIG_SPL_BUILD && CONFIG_SPL_RISCV_MMODE
+	/* csr:0x7c0 can be accessed in MMODE only */
+	asm volatile("csrsi 0x7c0, 0x2 \n\t");
+#endif
+#endif
+}
+
+void icache_disable(void)
+{
+#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
+#if CONFIG_SPL_BUILD && CONFIG_SPL_RISCV_MMODE
+	/* csr:0x7c0 can be accessed in MMODE only */
+	asm volatile("csrci 0x7c0, 0x2 \n\t");
+#endif
+#endif
+}
+
+int icache_status(void)
+{
+	int ret = 0;
+
+#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
+	/* 
+	  if the I$ is enabled by configuration, 
+	  set icache is enabled as default, it will be
+	  updated with csr:0x7c0 if it can be accessed
+	*/
+	ret = 1;
+#if CONFIG_SPL_BUILD && CONFIG_SPL_RISCV_MMODE
+	asm volatile (
+		"csrr t1, 0x7c0\n\t"
+		"andi	%0, t1, 0x02\n\t"
+		: "=r" (ret)
+		:
+		: "memory"
+	);
+#endif
+#endif
+
+	return ret;
+}
+
+void dcache_enable(void)
+{
+#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
+#if CONFIG_SPL_BUILD && CONFIG_SPL_RISCV_MMODE
+	/* csr:0x7c0 can be accessed in MMODE only */
+	asm volatile("csrsi 0x7c0, 0x1 \n\t");
+#endif
+#endif
+}
+
+void dcache_disable(void)
+{
+#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
+#if CONFIG_SPL_BUILD && CONFIG_SPL_RISCV_MMODE
+	/* csr:0x7c0 can be accessed in MMODE only */
+	asm volatile("csrci 0x7c0, 0x1 \n\t");
+#endif
+#endif
+}
+
+int dcache_status(void)
+{
+	int ret = 0;
+
+#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
+	/* 
+	  if the I$ is enabled by configuration, 
+	  set icache is enabled as default, it will be
+	  updated with csr:0x7c0 if it can be accessed
+	*/
+	ret = 1;
+#if CONFIG_SPL_BUILD && CONFIG_SPL_RISCV_MMODE
+	asm volatile (
+		"csrr t1, 0x7c0\n\t"
+		"andi	%0, t1, 0x01\n\t"
+		: "=r" (ret)
+		:
+		: "memory"
+	);
+#endif
+#endif
+
+	return ret;
+}
+
+int check_cache_range(unsigned long start, unsigned long end)
+{
+	int ok = 1;
+
+	if (start & (CONFIG_RISCV_CBOM_BLOCK_SIZE - 1))
+		ok = 0;
+
+	if (end & (CONFIG_RISCV_CBOM_BLOCK_SIZE - 1))
+		ok = 0;
+
+	if (!ok) {
+		warn_non_spl("CACHE: Misaligned operation at range [%08lx, %08lx]\n",
+			start, end);
+	}
+
+	return ok;
+}
+
+void invalidate_dcache_range(unsigned long start, unsigned long end)
+{
+	if (!check_cache_range(start, end))
+		return;
+
+	while (start < end) {
+		cbo_invalid(start);
+		start += CONFIG_RISCV_CBOM_BLOCK_SIZE;
+	}
+}
+
+void flush_dcache_range(unsigned long start, unsigned long end)
+{
+	if (!check_cache_range(start, end))
+		return;
+
+	while (start < end) {
+		cbo_flush(start);
+		start += CONFIG_RISCV_CBOM_BLOCK_SIZE;
+	}
+}

arch/riscv/cpu/x60/cpu.c

@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2023 Spacemit, Inc
+ */
+
+#include <common.h>
+#include <irq_func.h>
+#include <asm/cache.h>
+
+
+/*
+ * cleanup_before_linux() is called just before we call linux
+ * it prepares the processor for linux
+ *
+ * we disable interrupt and caches.
+ */
+int cleanup_before_linux(void)
+{
+	disable_interrupts();
+
+	cache_flush();
+
+	return 0;
+}
+

arch/riscv/cpu/x60/dram.c

@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2023 Spacemit, Inc
+ */
+
+#include <common.h>
+#include <fdtdec.h>
+#include <init.h>
+#include <asm/global_data.h>
+#include <linux/sizes.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+__weak int dram_init(void)
+{
+	return fdtdec_setup_mem_size_base();
+}
+
+__weak int dram_init_banksize(void)
+{
+	return fdtdec_setup_memory_banksize();
+}
+

arch/riscv/dts/Makefile

@@ -7,6 +7,8 @@ dtb-$(CONFIG_TARGET_OPENPITON_RISCV64) += openpiton-riscv64.dtb
 dtb-$(CONFIG_TARGET_SIFIVE_UNLEASHED) += hifive-unleashed-a00.dtb
 dtb-$(CONFIG_TARGET_SIFIVE_UNMATCHED) += hifive-unmatched-a00.dtb
 dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb
+dtb-$(CONFIG_TARGET_SPACEMIT_K1PRO) += k1-pro_qemu.dtb k1-pro_sim.dtb k1-pro_fpga.dtb
+dtb-$(CONFIG_TARGET_SPACEMIT_K1X) += k1-x_evb.dtb k1-x_deb2.dtb k1-x_deb1.dtb k1-x_hs450.dtb k1-x_spl.dtb
 
 include $(srctree)/scripts/Makefile.dts
 

arch/riscv/dts/k1-x.dtsi

@@ -0,0 +1,880 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/* Copyright (c) 2023 Spacemit, Inc */
+
+/dts-v1/;
+#include <dt-bindings/reset/reset-spacemit-k1x.h>
+#include <dt-bindings/clock/spacemit-k1x-clock.h>
+#include <dt-bindings/power-domain/k1x-pmu.h>
+#include <dt-bindings/phy/phy.h>
+
+/ {
+	compatible = "spacemit,k1x", "riscv";
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	aliases {
+		serial0 = &uart0;
+		mmc0 = &sdhci0;
+		mmc1 = &sdhci1;
+		mmc2 = &sdhci2;
+	};
+
+	cpus: cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		timebase-frequency = <10000000>;
+		cpu_0: cpu@0 {
+			compatible = "riscv";
+			device_type = "cpu";
+			reg = <0>;
+			status = "okay";
+			riscv,isa = "rv64imafdcvsu_zicsr_zifencei_zicbom_zihintpause_zba_zbb_zbc_zbs_svpbmt_sstc_sscofpmf";
+			mmu-type = "riscv,sv39";
+
+			cpu0_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+			};
+		};
+		cpu_1: cpu@1 {
+			compatible = "riscv";
+			device_type = "cpu";
+			reg = <1>;
+			status = "okay";
+			riscv,isa = "rv64imafdcvsu_zicsr_zifencei_zicbom_zihintpause_zba_zbb_zbc_zbs_svpbmt_sstc_sscofpmf";
+			mmu-type = "riscv,sv39";
+
+			cpu1_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+			};
+		};
+		cpu_2: cpu@2 {
+			compatible = "riscv";
+			device_type = "cpu";
+			reg = <2>;
+			status = "okay";
+			riscv,isa = "rv64imafdcvsu_zicsr_zifencei_zicbom_zihintpause_zba_zbb_zbc_zbs_svpbmt_sstc_sscofpmf";
+			mmu-type = "riscv,sv39";
+
+			cpu2_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+			};
+		};
+		cpu_3: cpu@3 {
+			compatible = "riscv";
+			device_type = "cpu";
+			reg = <3>;
+			status = "okay";
+			riscv,isa = "rv64imafdcvsu_zicsr_zifencei_zicbom_zihintpause_zba_zbb_zbc_zbs_svpbmt_sstc_sscofpmf";
+			mmu-type = "riscv,sv39";
+
+			cpu3_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+			};
+		};
+		cpu_4: cpu@4 {
+			compatible = "riscv";
+			device_type = "cpu";
+			reg = <4>;
+			status = "okay";
+			riscv,isa = "rv64imafdcvsu_zicsr_zifencei_zicbom_zihintpause_zba_zbb_zbc_zbs_svpbmt_sstc_sscofpmf";
+			mmu-type = "riscv,sv39";
+
+			cpu4_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+			};
+		};
+		cpu_5: cpu@5 {
+			compatible = "riscv";
+			device_type = "cpu";
+			reg = <5>;
+			status = "okay";
+			riscv,isa = "rv64imafdcvsu_zicsr_zifencei_zicbom_zihintpause_zba_zbb_zbc_zbs_svpbmt_sstc_sscofpmf";
+			mmu-type = "riscv,sv39";
+
+			cpu5_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+			};
+		};
+		cpu_6: cpu@6 {
+			compatible = "riscv";
+			device_type = "cpu";
+			reg = <6>;
+			status = "okay";
+			riscv,isa = "rv64imafdcvsu_zicsr_zifencei_zicbom_zihintpause_zba_zbb_zbc_zbs_svpbmt_sstc_sscofpmf";
+			mmu-type = "riscv,sv39";
+
+			cpu6_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+			};
+		};
+		cpu_7: cpu@7 {
+			compatible = "riscv";
+			device_type = "cpu";
+			reg = <7>;
+			status = "okay";
+			riscv,isa = "rv64imafdcvsu_zicsr_zifencei_zicbom_zihintpause_zba_zbb_zbc_zbs_svpbmt_sstc_sscofpmf";
+			mmu-type = "riscv,sv39";
+
+			cpu7_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+			};
+		};
+	};
+
+	clocks: clocks {
+		#address-cells = <0x2>;
+		#size-cells = <0x2>;
+		ranges;
+
+		vctcxo_24: vctcxo_24 {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <24000000>;
+			clock-output-names = "vctcxo_24";
+		};
+		vctcxo_3: vctcxo_3 {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <3000000>;
+			clock-output-names = "vctcxo_3";
+		};
+		vctcxo_1: vctcxo_1 {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <1000000>;
+			clock-output-names = "vctcxo_1";
+		};
+		pll1_vco: pll1_vco {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <24576000>;
+			clock-output-names = "pll1_vco";
+		};
+		clk_32k: clk_32k {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <32000>;
+			clock-output-names = "clk_32k";
+		};
+		clk_dummy: clk_dummy {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <0>;
+			clock-output-names = "clk_dummy";
+		};
+	};
+
+	soc:soc {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		clint0: clint@e4000000 {
+			compatible = "riscv,clint0";
+			interrupts-extended = <
+				&cpu0_intc  3 &cpu0_intc  7
+				&cpu1_intc  3 &cpu1_intc  7
+				&cpu2_intc  3 &cpu2_intc  7
+				&cpu3_intc  3 &cpu3_intc  7
+				&cpu4_intc  3 &cpu4_intc  7
+				&cpu5_intc  3 &cpu5_intc  7
+				&cpu6_intc  3 &cpu6_intc  7
+				&cpu7_intc  3 &cpu7_intc  7
+			>;
+			reg = <0x0 0xE4000000 0x0 0x00010000>;
+		};
+
+		ccu: clock-controller@d4050000 {
+			compatible = "spacemit,k1x-ccu";
+			reg = <0x0 0xd4050000 0x0 0x209c>,
+				<0x0 0xd4282800 0x0 0x400>,
+				<0x0 0xd4015000 0x0 0x1000>,
+				<0x0 0xd4090000 0x0 0x1000>,
+				<0x0 0xd4282c00 0x0 0x400>,
+				<0x0 0xd8440000 0x0 0x98>,
+				<0x0 0xc0000000 0x0 0x4280>,
+				<0x0 0xf0610000 0x0 0x20>;
+			reg-names = "mpmu", "apmu", "apbc", "apbs", "ciu", "dciu", "ddrc", "apbc2";
+			clocks = <&vctcxo_24>, <&vctcxo_3>, <&vctcxo_1>, <&pll1_vco>,
+				<&clk_32k>, <&clk_dummy>;
+			clock-names = "vctcxo_24", "vctcxo_3", "vctcxo_1", "pll1_vco",
+				"clk_32k", "clk_dummy";
+			#clock-cells = <1>;
+			status = "okay";
+		};
+
+		reset: reset-controller@d4050000 {
+			compatible = "spacemit,k1x-reset";
+			reg = <0x0 0xd4050000 0x0 0x209c>,
+				<0x0 0xd4282800 0x0 0x400>,
+				<0x0 0xd4015000 0x0 0x1000>,
+				<0x0 0xd4090000 0x0 0x1000>,
+				<0x0 0xd4282c00 0x0 0x400>,
+				<0x0 0xd8440000 0x0 0x98>,
+				<0x0 0xc0000000 0x0 0x4280>,
+				<0x0 0xf0610000 0x0 0x20>;
+			reg-names = "mpmu", "apmu", "apbc", "apbs", "ciu", "dciu", "ddrc", "apbc2";
+			#reset-cells = <1>;
+			status = "okay";
+		};
+
+		intc: interrupt-controller@e0000000 {
+			#interrupt-cells = <1>;
+			compatible = "riscv,plic0";
+			interrupt-controller;
+			interrupts-extended = <
+				&cpu0_intc 11 &cpu0_intc 9
+				&cpu1_intc 11 &cpu1_intc 9
+				&cpu2_intc 11 &cpu2_intc 9
+				&cpu3_intc 11 &cpu3_intc 9
+				&cpu4_intc 11 &cpu4_intc 9
+				&cpu5_intc 11 &cpu5_intc 9
+				&cpu6_intc 11 &cpu6_intc 9
+				&cpu7_intc 11 &cpu7_intc 9
+			>;
+			reg = <0x0 0xE0000000 0x0 0x04000000>;
+			reg-names = "control";
+			riscv,max-priority = <7>;
+			riscv,ndev = <159>;
+		};
+
+		gpio: gpio@d4019000 {
+			compatible = "spacemit,k1x-gpio";
+			reg = <0x0 0xd4019000 0x0 0x800>;
+			gpio-controller;
+			gpio-count = <128>;
+			#gpio-cells = <2>;
+			interrupts = <58>;
+			clocks = <&ccu CLK_GPIO>;
+			interrupt-names = "gpio_mux";
+			interrupt-parent = <&intc>;
+		};
+
+		pinctrl: pinctrl@d401e000 {
+			compatible = "pinctrl-single";
+			reg = <0x0 0xd401e000 0x0 0x400>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			#pinctrl-cells = <2>;
+			#gpio-range-cells = <3>;
+
+			pinctrl-single,register-width = <32>;
+			pinctrl-single,function-mask = <0xff77>;
+
+			range: gpio-range {
+				#pinctrl-single,gpio-range-cells = <3>;
+			};
+		};
+
+                pmu: power-management@0 {
+			compatible = "spacemit,k1x-pm-domain";
+			reg = <0x0 0xd4050000 0x0 0x3004>, <0x0 0xd4282800 0x0 0x400>;
+			#power-domain-cells = <1>;
+                };
+
+		uart0: uart@d4017000 {
+			compatible = "ns16550";
+			reg = <0x00000000 0xD4017000 0x00000000 0x00000100>;
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			clock-frequency = <14000000>;
+		};
+
+		dramc: ddr@c0000000 {
+			compatible = "spacemit,ddr-ctl";
+			reg = <0x00000000 0xC0000000 0x00000000 0x00400000>;
+		};
+
+		eth0: ethernet@cac80000 {
+			compatible = "spacemit,k1x-emac";
+			reg = <0x00000000 0xCAC80000 0x00000000 0x00000420>;
+			ctrl-reg = <0x3e4>;
+			dline-reg = <0x3e8>;
+			clocks = <&ccu CLK_EMAC0_BUS>;
+			clock-names = "emac-clk";
+			resets = <&reset RESET_EMAC0>;
+			reset-names = "emac-reset";
+			status = "disabled";
+		};
+
+		udc: udc@c0900100 {
+			compatible = "spacemit,mv-udc";
+			reg = <0x0 0xc0900100 0x0 0x4000>;
+			interrupts = <105>;
+			interrupt-parent = <&intc>;
+			status = "disabled";
+		};
+
+		usbphy1: usbphy1@c09c0000 {
+			compatible = "spacemit,usb2-phy";
+			reg = <0x0 0xc09c0000 0x0 0x200>;
+			spacemit,phy-name = "mv-usb-phy";
+			spacemit,pll-lock-bypass;
+			clocks = <&ccu CLK_USB_P1>;
+			#phy-cells = <0>;
+			status = "disabled";
+		};
+
+		ehci1: ehci1@c0980100 {
+			compatible = "spacemit,mv-ehci";
+			reg = <0x0 0xc0980100 0x0 0x4000>;
+			interrupts = <118>;
+			interrupt-parent = <&intc>;
+			spacemit,ehci-name = "mv-ehci";
+			spacemit,otg-force-a-bus-req;
+			resets = <&reset RESET_USBP1_AXI>;
+			clocks = <&ccu CLK_USB_P1>;
+			phys = <&usbphy1>;
+			status = "disabled";
+		};
+
+		combphy: phy@c0b10000{
+			compatible = "spacemit,k1x-combphy";
+			reg = <0x0 0xc0b10000 0x0 0x800>,
+				  <0x0 0xd4282910 0x0 0x400>;
+			reg-names = "puphy", "phy_sel";
+			resets = <&reset RESET_PCIE0>;
+			reset-names = "phy_rst";
+			#phy-cells = <1>;
+			status = "disabled";
+		};
+
+		usb2phy: usb2phy@0xc0a30000 {
+			compatible = "spacemit,usb2-phy";
+			reg = <0x0 0xc0a30000  0x0 0x200>;
+			spacemit,phy-name = "mv-usb-phy";
+			spacemit,pll-lock-bypass;
+			clocks = <&ccu CLK_USB30>;
+			#phy-cells = <0>;
+			status = "disabled";
+		};
+
+		usb3hub: usb3hub@0 {
+			compatible = "spacemit,usb3-hub";
+			status = "disabled";
+		};
+
+		usbdrd3: usb3@0 {
+			compatible = "spacemit,k1-x-dwc3";
+			#address-cells = <2>;
+			#size-cells = <2>;
+			resets = <&reset RESET_USB3_0>;
+			reset-names = "ctl_rst";
+			clocks = <&ccu CLK_USB30>;
+			clock-names = "usbdrd30";
+			interrupt-parent = <&intc>;
+			interrupts = <149>;
+			ranges;
+			status = "disabled";
+
+			dwc3@c0a00000 {
+				compatible = "snps,dwc3";
+				reg = <0x0 0xc0a00000 0x0 0x10000>;
+				interrupt-parent = <&intc>;
+				interrupts = <125>;
+				phys = <&combphy PHY_TYPE_USB3>, <&usb2phy>;
+				phy-names = "usb3-phy", "usb2-phy";
+			};
+		};
+
+		sdhci0: sdh@d4280000 {
+			compatible = "spacemit,k1-x-sdhci";
+			reg = <0x0 0xd4280000 0x0 0x200>;
+			interrupt-parent = <&intc>;
+			interrupts = <99>;
+			resets = <&reset RESET_SDH_AXI>,
+					 <&reset RESET_SDH0>;
+			reset-names = "sdh_axi", "sdh0";
+			clocks = <&ccu CLK_SDH0>,
+					 <&ccu CLK_SDH_AXI>;
+			clock-names = "sdh-io", "sdh-core";
+			status = "disabled";
+		};
+
+		sdhci1: sdh@d4280800 {
+			compatible = "spacemit,k1-x-sdhci";
+			reg = <0x0 0xd4280800 0x0 0x200>;
+			interrupt-parent = <&intc>;
+			interrupts = <100>;
+			resets = <&reset RESET_SDH_AXI>,
+					 <&reset RESET_SDH1>;
+			reset-names = "sdh_axi", "sdh1";
+			clocks = <&ccu CLK_SDH1>,
+					 <&ccu CLK_SDH_AXI>;
+			clock-names = "sdh-io", "sdh-core";
+			status = "disabled";
+		};
+
+		sdhci2: sdh@d4281000 {
+			compatible = "spacemit,k1-x-sdhci";
+			reg = <0x0 0xd4281000 0x0 0x200>;
+			interrupt-parent = <&intc>;
+			interrupts = <101>;
+			resets = <&reset RESET_SDH_AXI>,
+					 <&reset RESET_SDH2>;
+			reset-names = "sdh_axi", "sdh2";
+			clocks = <&ccu CLK_SDH2>,
+					 <&ccu CLK_SDH_AXI>;
+			clock-names = "sdh-io", "sdh-core";
+			status = "disabled";
+		};
+
+                i2c0: twsi0@d4010800 {
+			compatible = "spacemit,i2c";
+			reg = <0x0 0xd4010800 0x0 0x38>;
+			clocks = <&ccu CLK_TWSI0>;
+			resets = <&reset RESET_TWSI0>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+                };
+
+                i2c1: twsi1@d4011000 {
+			compatible = "spacemit,i2c";
+			reg = <0x0 0xd4011000 0x0 0x38>;
+			clocks = <&ccu CLK_TWSI1>;
+			resets = <&reset RESET_TWSI1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+                };
+
+                i2c2: twsi2@d4012000 {
+			compatible = "spacemit,i2c";
+			reg = <0x0 0xd4012000 0x0 0x38>;
+			clocks = <&ccu CLK_TWSI2>;
+			resets = <&reset RESET_TWSI2>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+                };
+
+                i2c3: twsi3@f0614000 {
+			compatible = "spacemit,i2c";
+			reg = <0x0 0xf0614000 0x0 0x38>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+                };
+
+                i2c4: twsi4@d4012800 {
+			compatible = "spacemit,i2c";
+			reg = <0x0 0xd4012800 0x0 0x38>;
+			clocks = <&ccu CLK_TWSI4>;
+			resets = <&reset RESET_TWSI4>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+                };
+
+                i2c5: twsi5@d4013800 {
+			compatible = "spacemit,i2c";
+			reg = <0x0 0xd4013800 0x0 0x38>;
+			clocks = <&ccu CLK_TWSI5>;
+			resets = <&reset RESET_TWSI5>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+                };
+
+                i2c6: twsi6@d4018800 {
+			compatible = "spacemit,i2c";
+			reg = <0x0 0xd4018800 0x0 0x38>;
+			clocks = <&ccu CLK_TWSI6>;
+			resets = <&reset RESET_TWSI6>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+                };
+
+                i2c7: twsi7@d401d000 {
+			compatible = "spacemit,i2c";
+			reg = <0x0 0xd401d000 0x0 0x38>;
+			clocks = <&ccu CLK_TWSI7>;
+			resets = <&reset RESET_TWSI7>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+                };
+
+                i2c8: twsi8@d401d800 {
+			compatible = "spacemit,i2c";
+			reg = <0x0 0xd401d800 0x0 0x38>;
+			clocks = <&ccu CLK_TWSI8>;
+			resets = <&reset RESET_TWSI8>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+                };
+
+		pcie0_rc: pcie@ca000000 {
+			compatible = "k1x,dwc-pcie";
+			reg = <0x0 0xca000000 0x0 0x00001000>, /* dbi */
+			      <0x0 0xca300000 0x0 0x0001ff24>, /* atu registers */
+			      <0x0 0x80000000 0x0 0x00100000>, /* config space */
+			      <0x0 0xd4282bcc 0x0 0x00000008>, /* k1x soc config addr */
+			      <0x0 0xc0b20000 0x0 0x00001000>, /* phy ahb */
+			      <0x0 0xc0b10000 0x0 0x00001000>, /* phy addr */
+			      <0x0 0xd4282bcc 0x0 0x00000008>, /* conf0 addr */
+			      <0x0 0xc0b10000 0x0 0x00001000>; /* phy0 addr */
+			reg-names = "dbi", "atu", "config", "k1x_conf", "phy_ahb", "phy_addr", "conf0_addr", "phy0_addr";
+
+			k1x,pcie-port = <0>;
+			clocks = <&ccu CLK_PCIE0>;
+			clock-names = "pcie-clk";
+			resets = <&reset RESET_PCIE0>;
+			reset-names = "pcie-reset";
+
+			bus-range = <0x00 0xff>;
+			max-link-speed = <2>;
+			num-lanes = <1>;
+			num-viewport = <8>;
+			device_type = "pci";
+			#address-cells = <3>;
+			#size-cells = <2>;
+			ranges = <0x81000000 0x0 0x80100000 0 0x80100000 0x0 0x100000>,
+				 <0x82000000 0x0 0x80200000 0 0x80200000 0x0 0x0fe00000>;
+
+			interrupts = <141>, <145>;
+			interrupt-parent = <&intc>;
+			#interrupt-cells = <1>;
+			interrupt-map-mask = <0 0 0 0x7>;
+			interrupt-map = <0000 0 0 1 &pcie0_intc 1>, /* int_a */
+					<0000 0 0 2 &pcie0_intc 2>, /* int_b */
+					<0000 0 0 3 &pcie0_intc 3>, /* int_c */
+					<0000 0 0 4 &pcie0_intc 4>; /* int_d */
+			linux,pci-domain = <0>;
+			status = "disabled";
+			pcie0_intc: interrupt-controller@0 {
+				interrupt-controller;
+				reg = <0 0 0 0 0>;
+				#address-cells = <0>;
+				#interrupt-cells = <1>;
+			};
+		};
+
+		pcie1_rc: pcie@ca400000 {
+			compatible = "k1x,dwc-pcie";
+			reg = <0x0 0xca400000 0x0 0x00001000>, /* dbi */
+			      <0x0 0xca700000 0x0 0x0001ff24>, /* atu registers */
+			      <0x0 0x90000000 0x0 0x00100000>, /* config space */
+			      <0x0 0xd4282bd4 0x0 0x00000008>, /* k1x soc config addr */
+			      <0x0 0xc0c20000 0x0 0x00001000>, /* phy ahb */
+			      <0x0 0xc0c10000 0x0 0x00001000>, /* phy addr */
+			      <0x0 0xd4282bcc 0x0 0x00000008>, /* conf0 addr */
+			      <0x0 0xc0b10000 0x0 0x00001000>; /* phy0 addr */
+			reg-names = "dbi", "atu", "config", "k1x_conf", "phy_ahb", "phy_addr", "conf0_addr", "phy0_addr";
+
+			k1x,pcie-port = <1>;
+			clocks = <&ccu CLK_PCIE1>;
+			clock-names = "pcie-clk";
+			resets = <&reset RESET_PCIE1>;
+			reset-names = "pcie-reset";
+
+			bus-range = <0x00 0xff>;
+			max-link-speed = <2>;
+			num-lanes = <2>;
+			num-viewport = <8>;
+			device_type = "pci";
+			#address-cells = <3>;
+			#size-cells = <2>;
+			ranges = <0x01000000 0x0 0x90100000 0 0x90100000 0x0 0x100000>,
+				 <0x02000000 0x0 0x90200000 0 0x90200000 0x0 0x0fe00000>;
+
+			interrupts = <142>, <146>;
+			interrupt-parent = <&intc>;
+			#interrupt-cells = <1>;
+			interrupt-map-mask = <0 0 0 0x7>;
+			interrupt-map = <0000 0 0 1 &pcie1_intc 1>, /* int_a */
+					<0000 0 0 2 &pcie1_intc 2>, /* int_b */
+					<0000 0 0 3 &pcie1_intc 3>, /* int_c */
+					<0000 0 0 4 &pcie1_intc 4>; /* int_d */
+			linux,pci-domain = <1>;
+			status = "disabled";
+			pcie1_intc: interrupt-controller@0 {
+				interrupt-controller;
+				reg = <0 0 0 0 0>;
+				#address-cells = <0>;
+				#interrupt-cells = <1>;
+			};
+		};
+
+		pcie2_rc: pcie@ca800000 {
+			compatible = "k1x,dwc-pcie";
+			reg = <0x0 0xca800000 0x0 0x00001000>, /* dbi */
+			      <0x0 0xcab00000 0x0 0x0001ff24>, /* atu registers */
+			      <0x0 0xa0000000 0x0 0x00100000>, /* config space */
+			      <0x0 0xd4282bdc 0x0 0x00000008>, /* k1x soc config addr */
+			      <0x0 0xc0d20000 0x0 0x00001000>, /* phy ahb */
+			      <0x0 0xc0d10000 0x0 0x00001000>, /* phy addr */
+			      <0x0 0xd4282bcc 0x0 0x00000008>, /* conf0 addr */
+			      <0x0 0xc0b10000 0x0 0x00001000>; /* phy0 addr */
+			reg-names = "dbi", "atu", "config", "k1x_conf", "phy_ahb", "phy_addr", "conf0_addr", "phy0_addr";
+
+			k1x,pcie-port = <2>;
+			clocks = <&ccu CLK_PCIE2>;
+			clock-names = "pcie-clk";
+			resets = <&reset RESET_PCIE2>;
+			reset-names = "pcie-reset";
+
+			bus-range = <0x00 0xff>;
+			max-link-speed = <2>;
+			num-lanes = <2>;
+			num-viewport = <8>;
+			device_type = "pci";
+			#address-cells = <3>;
+			#size-cells = <2>;
+			ranges = <0x01000000 0x0 0xa0100000 0 0xa0100000 0x0 0x100000>,
+				 <0x02000000 0x0 0xa0200000 0 0xa0200000 0x0 0x16000000>;
+
+			interrupts = <143>, <147>;
+			interrupt-parent = <&intc>;
+			#interrupt-cells = <1>;
+			interrupt-map-mask = <0 0 0 0x7>;
+			interrupt-map = <0000 0 0 1 &pcie2_intc 1>, /* int_a */
+					<0000 0 0 2 &pcie2_intc 2>, /* int_b */
+					<0000 0 0 3 &pcie2_intc 3>, /* int_c */
+					<0000 0 0 4 &pcie2_intc 4>; /* int_d */
+			linux,pci-domain = <2>;
+			status = "disabled";
+			pcie2_intc: interrupt-controller@0 {
+				interrupt-controller;
+				reg = <0 0 0 0 0>;
+				#address-cells = <0>;
+				#interrupt-cells = <1>;
+			};
+		};
+
+		qspi: spi@d420c000 {
+			compatible = "spacemit,k1x-qspi";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0xd420c000 0x0 0x1000>,
+			      <0x0 0xb8000000 0x0 0xd00000>;
+			reg-names = "qspi-base", "qspi-mmap";
+			qspi-sfa1ad = <0xa00000>;
+			qspi-sfa2ad = <0xb00000>;
+			qspi-sfb1ad = <0xc00000>;
+			qspi-sfb2ad = <0xd00000>;
+			clocks = <&ccu CLK_QSPI>,
+				<&ccu CLK_QSPI_BUS>;
+			clock-names = "qspi_clk", "qspi_bus_clk";
+			resets = <&reset RESET_QSPI>,
+				<&reset RESET_QSPI_BUS>;
+			reset-names = "qspi_reset", "qspi_bus_reset";
+			qspi-pmuap-reg = <0xd4282860>;
+			spi-max-frequency = <26500000>;
+			qspi-id = <4>;
+			status = "disabled";
+		};
+
+		efuse: fuse@f0702800 {
+			compatible = "spacemit,k1x-efuse";
+			reg = <0x0 0xf0702800 0x0 0x400>;
+			resets = <&reset RESET_AES>;
+			reset-names = "aes_reset";
+			clocks = <&ccu CLK_AES>;
+			clock-names = "aes_core";
+			status = "disabled";
+		};
+
+		dpu: dpu@c0340000 {
+			compatible = "spacemit,dpu";
+			reg = <0x0 0xC0340000 0x0 0x2A000>,
+				  <0x0 0xC0440000 0x0 0x2A000>;
+			reg-names = "dsi", "hdmi";
+			status = "disabled";
+
+			dpu_out: port {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				dpu_out_mipi: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&mipi_in_dpu>;
+				};
+
+				dpu_out_hdmi: endpoint@1 {
+					reg = <1>;
+					remote-endpoint = <&hdmi_in_dpu>;
+				};
+			};
+		};
+
+		mipi_dsi: mipi@d421a800 {
+			compatible = "spacemit,mipi-dsi";
+			reg = <0x0 0xD421A800 0 0x200>;
+			reg-names = "dsi";
+
+			clocks = <&ccu CLK_DPU_PXCLK>,
+				<&ccu CLK_DPU_MCLK>,
+				<&ccu CLK_DPU_HCLK>,
+				<&ccu CLK_DPU_ESC>,
+				<&ccu CLK_DPU_BIT>;
+			clock-names = "pxclk", "mclk", "hclk", "escclk", "bitclk";
+			resets = <&reset RESET_MIPI>,
+				<&reset RESET_LCD_MCLK>,
+				<&reset RESET_DSI_ESC>,
+				<&reset RESET_LCD>;
+			reset-names= "dsi_reset", "mclk_reset", "esc_reset", "lcd_reset";
+			power-domains = <&pmu K1X_PMU_LCD_PWR_DOMAIN>;
+
+			status = "disabled";
+
+			ports {
+				mipi_in: port {
+					#address-cells = <1>;
+					#size-cells = <0>;
+					mipi_in_dpu: endpoint@0 {
+						reg = <0>;
+						remote-endpoint = <&dpu_out_mipi>;
+					};
+				};
+			};
+		};
+
+		panel: panel {
+			  compatible = "spacemit,panel";
+			  status = "disabled";
+		};
+
+		hdmi: hdmi@c0400500 {
+			compatible = "spacemit,hdmi";
+			reg = <0x0 0xC0400500 0x0 0x200>;
+			reg-names = "hdmi";
+			clocks = <&ccu CLK_HDMI>;
+			clock-names = "hmclk";
+			resets = <&reset RESET_HDMI>;
+			reset-names= "hdmi_reset";
+			power-domains = <&pmu K1X_PMU_HDMI_PWR_DOMAIN>;
+			status = "disabled";
+
+			ports {
+				hdmi_in: port {
+					#address-cells = <1>;
+					#size-cells = <0>;
+					hdmi_in_dpu: endpoint@0 {
+						reg = <0>;
+						remote-endpoint = <&dpu_out_hdmi>;
+					};
+				};
+			};
+		};
+
+	};
+
+	binman: binman {
+		multiple-images;
+		itb {
+			filename = "u-boot.itb";
+
+			fit {
+				description = "Configuration to load U-Boot";
+				#address-cells = <2>;
+				fit,fdt-list = "of-list";
+
+				images {
+					uboot {
+						description = "U-Boot";
+						type = "standalone";
+						os = "U-Boot";
+						arch = "riscv";
+						compression = "none";
+						load = <CONFIG_SYS_TEXT_BASE>;
+
+						uboot_blob: blob-ext {
+							filename = "u-boot-nodtb.bin";
+						};
+					};
+
+					@fdt-SEQ {
+						description = "NAME";
+						type = "flat_dt";
+						compression = "none";
+					};
+				};
+
+				configurations {
+					default = "conf-1";
+
+					@conf-SEQ {
+						description = "U-boot FIT config";
+						loadables = "uboot";
+						fdt = "fdt-SEQ";
+					};
+				};
+			};
+		};
+	};
+
+	pmu {
+		compatible = "riscv,pmu";
+
+		riscv,event-to-mhpmevent =
+			/* BRANCH_INSTRUCTIONS */
+			<0x00005 0x0 0x01>,
+			/* BRANCH_MISSES */
+			<0x00006 0x0 0x02>,
+			/* STALLED_CYCLES_FRONTEND */
+			<0x00008 0x0 0x03>,
+			/* STALLED_CYCLES_BACKEND */
+			<0x00009 0x0 0x04>,
+			/* L1D_READ_ACCESS */
+			<0x10000 0x0 0x06>,
+			/* L1D_READ_MISS */
+			<0x10001 0x0 0x05>,
+			/* L1D_WRITE_ACCESS */
+			<0x10002 0x0 0x0a>,
+			/* L1D_WRITE_MISS */
+			<0x10003 0x0 0x09>,
+			/* L1I_READ_ACCESS */
+			<0x10008 0x0 0x0c>,
+			/* L1I_READ_MISS */
+			<0x10009 0x0 0x0b>,
+			/* L1I_PREFETCH_ACCESS */
+			<0x1000c 0x0 0x0e>,
+			/* L1I_PREFETCH_MISS */
+			<0x1000d 0x0 0x0d>,
+			/* DTLB_READ_MISS */
+			<0x10019 0x0 0x15>,
+			/* DTLB_WRITE_MISS */
+			<0x1001b 0x0 0x19>,
+			/* ITLB_READ_MISS */
+			<0x10021 0x0 0x1b>;
+
+		/* 16 valid counters: mhpmcounter3 ~ mhpmcounter18 */
+		riscv,event-to-mhpmcounters =
+			<0x00005 0x00006 0x0007fff8>,
+			<0x00008 0x00009 0x0007fff8>,
+			<0x10000 0x10003 0x0007fff8>,
+			<0x10008 0x10009 0x0007fff8>,
+			<0x1000c 0x1000d 0x0007fff8>,
+			<0x10019 0x10019 0x0007fff8>,
+			<0x1001b 0x1001b 0x0007fff8>,
+			<0x10021 0x10021 0x0007fff8>;
+
+		riscv,raw-event-to-mhpmcounters =
+			/*
+			 * For convenience, we treat 0x1~0xff as valid indexes,
+			 * but actually in hardware the valid indexes are 0x1~0xbd.
+			 */
+			<0x0 0x0 0xffffffff 0xffffff00 0x0007fff8>;
+	};
+};

arch/riscv/dts/k1-x_deb1.dts

@@ -0,0 +1,276 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/* Copyright (c) 2023 Spacemit, Inc */
+
+/dts-v1/;
+
+#include "k1-x.dtsi"
+#include "k1-x_pinctrl.dtsi"
+#include "k1-x_spm8821.dtsi"
+
+/ {
+	model = "spacemit k1-x deb1 board";
+
+	aliases {
+		efuse_power = &ldo_31;
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
+	};
+
+	chosen {
+		bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&cpu_0 {
+	/* boot frequency for cluster-0, should be 1600000, 1228000, 819000, or 614000 */
+	boot_freq_cluster0 = <1228000>;
+	/* boot frequency for cluster-1, should be 1600000, 1228000, 819000, or 614000 */
+	boot_freq_cluster1 = <1228000>;
+};
+
+&dramc {
+	/* dram data rate, should be 1200, 1600, or 2400 */
+	datarate = <2400>;
+};
+
+&cpus {
+	timebase-frequency = <24000000>;
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&i2c0 {
+	status = "disabled";
+};
+
+&i2c1 {
+	status = "disabled";
+};
+
+&i2c2 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c2_0>;
+	status = "okay";
+
+	eeprom@50{
+		compatible = "atmel,24c02";
+		reg = <0x50>;
+		vin-supply-names = "eeprom_1v8";
+		status = "okay";
+	};
+};
+
+&i2c3 {
+	status = "disabled";
+};
+
+&i2c4 {
+	clock-frequency = <400000>;
+	status = "okay";
+};
+
+&i2c5 {
+	status = "disabled";
+};
+
+&i2c6 {
+	status = "disabled";
+};
+
+&i2c7 {
+	status = "disabled";
+};
+
+&pinctrl {
+	pinctrl-single,gpio-range = <
+		&range GPIO_49  2 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_3V_DS4)
+		&range GPIO_58  1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_63  2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_65  1 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
+		&range GPIO_66  2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range PRI_TDI  2 (MUX_MODE1 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
+		&range PRI_TCK  1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range PRI_TDO  1 (MUX_MODE1 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
+		&range GPIO_74  1 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
+		&range GPIO_80  1 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_3V_DS4)
+		&range GPIO_81  3 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
+		&range GPIO_90  1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_91  2 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
+		&range DVL0     2 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_114 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_115 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_124 1 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
+		&range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+	>;
+
+	usbp1_vbus: usbp1_vbus {
+		pinctrl-single,pins =<
+			K1X_PADCONF(GPIO_66, MUX_MODE0, (EDGE_NONE | PULL_UP | PAD_1V8_DS2))    /* drive_vbus1_iso */
+		>;
+	};
+
+	gpio80_pmx_func0: gpio80_pmx_func0 {
+		pinctrl-single,pins = <
+			K1X_PADCONF(GPIO_80, MUX_MODE0, (EDGE_BOTH | PULL_UP | PAD_3V_DS4))  /* mmc cd */
+		>;
+	};
+};
+
+&gpio{
+	gpio-ranges = <
+		&pinctrl 49 GPIO_49 2
+		&pinctrl 58 GPIO_58 1
+		&pinctrl 63 GPIO_63 5
+		&pinctrl 70 PRI_TDI 4
+		&pinctrl 74 GPIO_74 1
+		&pinctrl 80 GPIO_80 4
+		&pinctrl 90 GPIO_90 3
+		&pinctrl 96 DVL0 2
+		&pinctrl 110 GPIO_110 1
+		&pinctrl 114 GPIO_114 3
+		&pinctrl 123 GPIO_123 5
+	>;
+};
+
+&udc {
+	status = "okay";
+};
+
+&usb2phy {
+	status = "okay";
+};
+
+&combphy {
+	status = "okay";
+};
+
+&usb3hub {
+	usb-gpios = <&gpio 97 0>;	/* gpio_97 for usb3 pwren */
+	hub-gpios = <&gpio 123 0>;	/* usb3 hub en */
+	reset-gpios = <&gpio 124 0>;	/* usb3 hub rst*/
+	status = "okay";
+};
+
+&usbdrd3 {
+	status = "okay";
+	dwc3@c0a00000 {
+		dr_mode = "host";
+		phy_type = "utmi";
+		snps,dis_enblslpm_quirk;
+		snps,dis-u2-freeclk-exists-quirk;
+		snps,dis-del-phy-power-chg-quirk;
+		snps,dis_u2_susphy_quirk;
+		snps,dis_u3_susphy_quirk;
+	};
+};
+
+&sdhci0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_mmc1 &gpio80_pmx_func0>;
+	bus-width = <4>;
+	cd-gpios = <&gpio 80 0>;
+	cd-inverted;
+	cap-sd-highspeed;
+	sdh-phy-module = <0>;
+	status = "okay";
+};
+
+/* eMMC */
+&sdhci2 {
+	bus-width = <8>;
+	non-removable;
+	mmc-hs400-1_8v;
+	mmc-hs400-enhanced-strobe;
+	sdh-phy-module = <1>;
+	status = "okay";
+};
+
+&eth0 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_gmac0>;
+
+	phy-reset-pin = <110>;
+
+	clk_tuning_enable;
+	clk-tuning-by-delayline;
+	tx-phase = <90>;
+	rx-phase = <73>;
+
+	phy-mode = "rgmii";
+	phy-addr = <1>;
+	phy-handle = <&rgmii>;
+
+	ref-clock-from-phy;
+
+	mdio {
+		#address-cells = <0x1>;
+		#size-cells = <0x0>;
+		rgmii: phy@0 {
+			compatible = "ethernet-phy-id001c.c916";
+			device_type = "ethernet-phy";
+			reg = <0x1>;
+		};
+	};
+};
+
+&pcie0_rc {
+	status = "disabled";
+};
+
+&pcie1_rc {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pcie1_3>;
+	status = "okay";
+};
+
+&qspi {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_qspi>;
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <26500000>;
+		m25p,fast-read;
+		broken-flash-reset;
+		status = "okay";
+	};
+};
+
+&efuse {
+	status = "okay";
+};
+
+&dpu {
+	status = "okay";
+};
+
+&hdmi {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_hdmi_0>;
+	status = "okay";
+};
+
+&mipi_dsi {
+	status = "disabled";
+};
+
+&panel {
+	dcp-gpios = <&gpio 82 0>;
+	dcn-gpios = <&gpio 83 0>;
+	bl-gpios = <&gpio 44 0>;
+	reset-gpios = <&gpio 81 0>;
+	status = "disabled";
+};

arch/riscv/dts/k1-x_deb2.dts

@@ -0,0 +1,275 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/* Copyright (c) 2023 Spacemit, Inc */
+
+/dts-v1/;
+
+#include "k1-x.dtsi"
+#include "k1-x_pinctrl.dtsi"
+#include "k1-x_pm853.dtsi"
+
+/ {
+	model = "spacemit k1-x deb2 board";
+
+	aliases {
+		efuse_power = &ldo_15;
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
+	};
+
+	chosen {
+		bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&cpu_0 {
+	/* boot frequency for cluster-0, should be 1600000, 1228000, 819000, or 614000 */
+	boot_freq_cluster0 = <1228000>;
+	/* boot frequency for cluster-1, should be 1600000, 1228000, 819000, or 614000 */
+	boot_freq_cluster1 = <1228000>;
+};
+
+&dramc {
+	/* dram data rate, should be 1200, 1600, or 2400 */
+	datarate = <2400>;
+};
+
+&cpus {
+	timebase-frequency = <24000000>;
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&i2c0 {
+	status = "disabled";
+};
+
+&i2c1 {
+	status = "disabled";
+};
+
+&i2c2 {
+	#address-cells = <1>;
+        #size-cells = <0>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_i2c2_0>;
+        status = "okay";
+
+        eeprom@50{
+                compatible = "atmel,24c02";
+                reg = <0x50>;
+                status = "okay";
+        };
+};
+
+&i2c3 {
+	status = "disabled";
+};
+
+&i2c4 {
+	clock-frequency = <400000>;
+	status = "okay";
+};
+
+&i2c5 {
+	status = "disabled";
+};
+
+&i2c6 {
+        status = "disabled";
+};
+
+&i2c7 {
+	status = "disabled";
+};
+
+&pinctrl {
+	pinctrl-single,gpio-range = <
+		&range GPIO_49  2 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_3V_DS4)
+		&range GPIO_58  1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_63  2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_65  1 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
+		&range GPIO_66  2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range PRI_TDI  2 (MUX_MODE1 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
+		&range PRI_TCK  1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range PRI_TDO  1 (MUX_MODE1 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
+		&range GPIO_74  1 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
+		&range GPIO_80  1 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_3V_DS4)
+		&range GPIO_81  3 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
+		&range GPIO_90  1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_91  2 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
+		&range DVL0     2 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_114 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_115 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_124 1 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
+		&range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+	>;
+
+	usbp1_vbus: usbp1_vbus {
+		pinctrl-single,pins =<
+			K1X_PADCONF(GPIO_66, MUX_MODE0, (EDGE_NONE | PULL_UP | PAD_1V8_DS2))    /* drive_vbus1_iso */
+		>;
+	};
+
+	gpio80_pmx_func0: gpio80_pmx_func0 {
+		pinctrl-single,pins = <
+			K1X_PADCONF(GPIO_80, MUX_MODE0, (EDGE_BOTH | PULL_UP | PAD_3V_DS4))  /* mmc cd */
+		>;
+	};
+};
+
+&gpio{
+	gpio-ranges = <
+		&pinctrl 49 GPIO_49 2
+		&pinctrl 58 GPIO_58 1
+		&pinctrl 63 GPIO_63 5
+		&pinctrl 70 PRI_TDI 4
+		&pinctrl 74 GPIO_74 1
+		&pinctrl 80 GPIO_80 4
+		&pinctrl 90 GPIO_90 3
+		&pinctrl 96 DVL0 2
+		&pinctrl 110 GPIO_110 1
+		&pinctrl 114 GPIO_114 3
+		&pinctrl 123 GPIO_123 5
+	>;
+};
+
+&udc {
+	status = "okay";
+};
+
+&usb2phy {
+	status = "okay";
+};
+
+&combphy {
+	status = "okay";
+};
+
+&usb3hub {
+	usb-gpios = <&gpio 97 0>;	/* gpio_97 for usb3 pwren */
+	hub-gpios = <&gpio 123 0>;	/* usb3 hub en */
+	reset-gpios = <&gpio 124 0>;	/* usb3 hub rst*/
+	status = "okay";
+};
+
+&usbdrd3 {
+	status = "okay";
+	dwc3@c0a00000 {
+		dr_mode = "host";
+		phy_type = "utmi";
+		snps,dis_enblslpm_quirk;
+		snps,dis-u2-freeclk-exists-quirk;
+		snps,dis-del-phy-power-chg-quirk;
+		snps,dis_u2_susphy_quirk;
+		snps,dis_u3_susphy_quirk;
+	};
+};
+
+&sdhci0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_mmc1 &gpio80_pmx_func0>;
+	bus-width = <4>;
+	cd-gpios = <&gpio 80 0>;
+	cd-inverted;
+	cap-sd-highspeed;
+	sdh-phy-module = <0>;
+	status = "okay";
+};
+
+/* eMMC */
+&sdhci2 {
+	bus-width = <8>;
+	non-removable;
+	mmc-hs400-1_8v;
+	mmc-hs400-enhanced-strobe;
+	sdh-phy-module = <1>;
+	status = "okay";
+};
+
+&eth0 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_gmac0>;
+
+	phy-reset-pin = <110>;
+
+	clk_tuning_enable;
+	clk-tuning-by-delayline;
+	tx-phase = <90>;
+	rx-phase = <73>;
+
+	phy-mode = "rgmii";
+	phy-addr = <1>;
+	phy-handle = <&rgmii>;
+
+	ref-clock-from-phy;
+
+	mdio {
+		#address-cells = <0x1>;
+		#size-cells = <0x0>;
+		rgmii: phy@0 {
+			compatible = "ethernet-phy-id001c.c916";
+			device_type = "ethernet-phy";
+			reg = <0x1>;
+		};
+	};
+};
+
+&pcie0_rc {
+	status = "disabled";
+};
+
+&pcie1_rc {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pcie1_3>;
+	status = "okay";
+};
+
+&qspi {
+        status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_qspi>;
+
+        flash@0 {
+                compatible = "jedec,spi-nor";
+                reg = <0>;
+                spi-max-frequency = <26500000>;
+                m25p,fast-read;
+                broken-flash-reset;
+                status = "okay";
+        };
+};
+
+&efuse {
+	status = "okay";
+};
+
+&dpu {
+	status = "okay";
+};
+
+&hdmi {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_hdmi_0>;
+	status = "okay";
+};
+
+&mipi_dsi {
+	status = "disabled";
+};
+
+&panel {
+	dcp-gpios = <&gpio 82 0>;
+	dcn-gpios = <&gpio 83 0>;
+	bl-gpios = <&gpio 44 0>;
+	reset-gpios = <&gpio 81 0>;
+	status = "disabled";
+};

arch/riscv/dts/k1-x_evb.dts

@@ -0,0 +1,256 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/* Copyright (c) 2023 Spacemit, Inc */
+
+/dts-v1/;
+
+#include "k1-x.dtsi"
+#include "k1-x_pinctrl.dtsi"
+#include "k1-x_pm853.dtsi"
+
+/ {
+	model = "spacemit k1-x evb board";
+
+	aliases {
+		efuse_power = &ldo_15;
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
+	};
+
+	chosen {
+		bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&cpu_0 {
+	/* boot frequency for cluster-0, should be 1600000, 1228000, 819000, or 614000 */
+	boot_freq_cluster0 = <1228000>;
+	/* boot frequency for cluster-1, should be 1600000, 1228000, 819000, or 614000 */
+	boot_freq_cluster1 = <1228000>;
+};
+
+&dramc {
+	/* dram data rate, should be 1200, 1600, or 2400 */
+	datarate = <2400>;
+};
+
+&cpus {
+	timebase-frequency = <24000000>;
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&i2c0 {
+	status = "disabled";
+};
+
+&i2c1 {
+	status = "disabled";
+};
+
+&i2c2 {
+	status = "disabled";
+};
+
+&i2c3 {
+	status = "disabled";
+};
+
+&i2c4 {
+	clock-frequency = <400000>;
+	status = "okay";
+};
+
+&i2c5 {
+	status = "disabled";
+};
+
+&i2c6 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	pinctrl-names = "default";
+	status = "okay";
+
+	eeprom@50{
+		compatible = "atmel,24c02";
+		reg = <0x50>;
+		bus = <6>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		status = "okay";
+	};
+};
+
+&i2c7 {
+	status = "disabled";
+};
+
+&pinctrl {
+	usbp1_vbus: usbp1_vbus {
+		pinctrl-single,pins =<
+			K1X_PADCONF(GPIO_66, MUX_MODE0, (EDGE_NONE | PULL_UP | PAD_1V8_DS2))    /* drive_vbus1_iso */
+		>;
+	};
+
+	gpio80_pmx_func0: gpio80_pmx_func0 {
+		pinctrl-single,pins = <
+			K1X_PADCONF(GPIO_80, MUX_MODE0, (EDGE_BOTH | PULL_UP | PAD_3V_DS4))  /* mmc cd */
+		>;
+	};
+};
+
+&udc {
+	status = "okay";
+};
+
+&usbphy1 {
+	status = "disabled";
+};
+
+&ehci1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&usbp1_vbus>;
+	status = "disabled";
+};
+
+&usbdrd3 {
+	status = "disabled";
+	dwc3@c0a00000 {
+		maximum-speed = "high-speed";
+		dr_mode = "peripheral";
+		phy_type = "utmi_wide";
+		snps,dis_enblslpm_quirk;
+	};
+};
+
+&sdhci0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_mmc1 &gpio80_pmx_func0>;
+	bus-width = <4>;
+	cd-gpios = <&gpio 80 0>;
+	cd-inverted;
+	cap-sd-highspeed;
+	sdh-phy-module = <0>;
+	status = "okay";
+};
+
+/* eMMC */
+&sdhci2 {
+	bus-width = <8>;
+	non-removable;
+	mmc-hs400-1_8v;
+	mmc-hs400-enhanced-strobe;
+	sdh-phy-module = <1>;
+	status = "okay";
+};
+
+&eth0 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_gmac0>;
+
+	phy-reset-pin = <44>;
+
+	clk_tuning_enable;
+	clk-tuning-by-delayline;
+	tx-phase = <90>;
+	rx-phase = <73>;
+
+	phy-mode = "rgmii";
+	phy-addr = <1>;
+	phy-handle = <&rgmii>;
+
+	ref-clock-from-phy;
+
+	mdio {
+		#address-cells = <0x1>;
+		#size-cells = <0x0>;
+		rgmii: phy@0 {
+			compatible = "ethernet-phy-id001c.c916";
+			device_type = "ethernet-phy";
+			reg = <0x1>;
+		};
+	};
+};
+
+&pcie0_rc {
+	status = "disabled";
+};
+
+&pcie1_rc {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pcie1_0>;
+};
+
+&qspi {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_qspi>;
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <26500000>;
+
+		m25p,fast-read;
+		broken-flash-reset;
+		status = "okay";
+	};
+};
+
+&efuse {
+	status = "okay";
+};
+
+&dpu {
+	status = "okay";
+};
+
+&hdmi {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_hdmi_0>;
+	status = "okay";
+};
+
+&ldo_13 {
+	regulator-init-microvolt = <2800000>;
+	regulator-boot-on;
+	regulator-state-mem {
+			regulator-off-in-suspend;
+	};
+};
+
+&ldo_15 {
+	regulator-init-microvolt = <1800000>;
+	regulator-boot-on;
+	regulator-state-mem {
+			regulator-off-in-suspend;
+	};
+};
+
+&ldo_17 {
+	regulator-init-microvolt = <1200000>;
+	regulator-boot-on;
+	regulator-state-mem {
+			regulator-off-in-suspend;
+	};
+};
+
+&mipi_dsi {
+	status = "disabled";
+};
+
+&panel {
+	dcp-gpios = <&gpio 21 0>;
+	dcn-gpios = <&gpio 22 0>;
+	bl-gpios = <&gpio 23 0>;
+	reset-gpios = <&gpio 24 0>;
+	status = "disabled";
+};

arch/riscv/dts/k1-x_fpga.dts

@@ -0,0 +1,127 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/* Copyright (c) 2023 Spacemit, Inc */
+
+/dts-v1/;
+
+#include "k1-x.dtsi"
+
+/ {
+	model = "spacemit k1-x fpga board";
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
+		u-boot,dm-spl;
+	};
+
+	chosen {
+		bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
+		stdout-path = "serial0:115200n8";
+		u-boot,dm-spl;
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&i2c0 {
+	status = "disabled";
+};
+
+&i2c1 {
+	status = "disabled";
+};
+
+&i2c2 {
+	status = "disabled";
+};
+
+&i2c3 {
+	/* SEC_I2C */
+	status = "disabled";
+};
+
+&i2c4 {
+	clock-frequency = <400000>;
+	status = "okay";
+};
+
+&i2c5 {
+	status = "disabled";
+};
+
+&i2c6 {
+	status = "disabled";
+};
+
+&i2c7 {
+	status = "disabled";
+};
+
+&i2c8 {
+	/* PWR_I2C */
+	status = "okay";
+};
+
+&udc {
+	status = "disabled";
+};
+
+&usbdrd3 {
+	status = "disabled";
+	dwc3@c0a00000 {
+		maximum-speed = "high-speed";
+		dr_mode = "peripheral";
+		phy_type = "utmi_wide";
+		snps,dis_enblslpm_quirk;
+	};
+};
+
+&sdhci0 {
+	bus-width = <4>;
+	broken-cd;
+	cap-sd-highspeed;
+	sdh-phy-module = <0>;
+	status = "okay";
+};
+
+/* eMMC */
+&sdhci2 {
+	bus-width = <8>;
+	non-removable;
+	cap-mmc-highspeed;
+	sdh-phy-module = <1>;
+	status = "disabled";
+};
+
+&eth0 {
+	status = "okay";
+
+	phy-reset-pin = <40>;
+
+	clk_tuning_enable;
+	clk-tuning-by-reg;
+	tx-phase = <0x1>;
+	rx-phase = <0x5>;
+
+	phy-mode = "rgmii";
+	phy-addr = <0>;
+	phy-handle = <&rgmii>;
+
+	ref-clock-from-phy;
+
+	mdio {
+		#address-cells = <0x1>;
+		#size-cells = <0x0>;
+		rgmii: phy@0 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			device_type = "ethernet-phy";
+			reg = <0x0>;
+		};
+	};
+};
+
+&pcie0_rc {
+	status = "disabled";
+};

arch/riscv/dts/k1-x_fpga_1x4.dts

@@ -0,0 +1,220 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/* Copyright (c) 2023 Spacemit, Inc */
+
+/dts-v1/;
+/ {
+	model = "spacemit k1-x fpga board";
+	compatible = "spacemit,k1x", "riscv";
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x00000000 0x00000000 0x00000000 0x70000000>;
+		u-boot,dm-spl;
+	};
+
+	chosen {
+		bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
+		stdout-path = "serial0:115200n8";
+		u-boot,dm-spl;
+	};
+
+	cpus: cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		timebase-frequency = <10000000>;
+		u-boot,dm-spl;
+		cpu_0: cpu@0 {
+			device_type = "cpu";
+			reg = <0>;
+			status = "okay";
+			compatible = "riscv";
+			riscv,isa = "rv64imafdcvsu_zicsr_zifencei_zicbom_zihintpause_zba_zbb_zbc_zbs_svpbmt";
+			riscv,cbom-block-size = <64>;
+			mmu-type = "riscv,sv39";
+			cpu-freq = "1.848Ghz";
+			cpu-icache = "64KB";
+			cpu-dcache = "64KB";
+			cpu-l2cache = "1MB";
+			cpu-tlb = "1024 4-ways";
+			cpu-cacheline = "64Bytes";
+			cpu-vector = "0.7.1";
+			u-boot,dm-spl;
+			cpu0_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+				u-boot,dm-spl;
+			};
+		};
+		cpu_1: cpu@1 {
+			device_type = "cpu";
+			reg = <1>;
+			status = "okay";
+			compatible = "riscv";
+			riscv,isa = "rv64imafdcvsu_zicsr_zifencei_zicbom_zihintpause_zba_zbb_zbc_zbs_svpbmt";
+			riscv,cbom-block-size = <64>;
+			mmu-type = "riscv,sv39";
+			cpu-freq = "1.848Ghz";
+			cpu-icache = "64KB";
+			cpu-dcache = "64KB";
+			cpu-l2cache = "1MB";
+			cpu-tlb = "1024 4-ways";
+			cpu-cacheline = "64Bytes";
+			cpu-vector = "0.7.1";
+			u-boot,dm-spl;
+
+			cpu1_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+				u-boot,dm-spl;
+			};
+		};
+		cpu_2: cpu@2 {
+			device_type = "cpu";
+			reg = <2>;
+			status = "okay";
+			compatible = "riscv";
+			riscv,isa = "rv64imafdcvsu_zicsr_zifencei_zicbom_zihintpause_zba_zbb_zbc_zbs_svpbmt";
+			riscv,cbom-block-size = <64>;
+			mmu-type = "riscv,sv39";
+			cpu-freq = "1.848Ghz";
+			cpu-icache = "64KB";
+			cpu-dcache = "64KB";
+			cpu-l2cache = "1MB";
+			cpu-tlb = "1024 4-ways";
+			cpu-cacheline = "64Bytes";
+			cpu-vector = "0.7.1";
+			u-boot,dm-spl;
+
+			cpu2_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+				u-boot,dm-spl;
+			};
+		};
+		cpu_3: cpu@3 {
+			device_type = "cpu";
+			reg = <3>;
+			status = "okay";
+			compatible = "riscv";
+			riscv,isa = "rv64imafdcvsu_zicsr_zifencei_zicbom_zihintpause_zba_zbb_zbc_zbs_svpbmt";
+			riscv,cbom-block-size = <64>;
+			mmu-type = "riscv,sv39";
+			cpu-freq = "1.848Ghz";
+			cpu-icache = "64KB";
+			cpu-dcache = "64KB";
+			cpu-l2cache = "1MB";
+			cpu-tlb = "1024 4-ways";
+			cpu-cacheline = "64Bytes";
+			cpu-vector = "0.7.1";
+			u-boot,dm-spl;
+
+			cpu3_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+				u-boot,dm-spl;
+			};
+		};
+	};
+
+	clocks {
+		#address-cells = <0x2>;
+		#size-cells = <0x2>;
+		ranges;
+	};
+
+	soc {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		u-boot,dm-spl;
+
+		clint0: clint@e4000000 {
+			compatible = "riscv,clint0";
+			interrupts-extended = <
+				&cpu0_intc  3 &cpu0_intc  7
+				&cpu1_intc  3 &cpu1_intc  7
+				&cpu2_intc  3 &cpu2_intc  7
+				&cpu3_intc  3 &cpu3_intc  7
+			>;
+			reg = <0x0 0xE4000000 0x0 0x00010000>;
+			clint,has-no-64bit-mmio;
+			u-boot,dm-spl;
+		};
+
+		intc: interrupt-controller@e0000000 {
+			#interrupt-cells = <1>;
+			compatible = "riscv,plic0";
+			interrupt-controller;
+			interrupts-extended = <
+				&cpu0_intc 0xffffffff &cpu0_intc 9
+				&cpu1_intc 0xffffffff &cpu1_intc 9
+				&cpu2_intc 0xffffffff &cpu2_intc 9
+				&cpu3_intc 0xffffffff &cpu3_intc 9
+			>;
+			reg = <0x0 0xE0000000 0x0 0x04000000>;
+			reg-names = "control";
+			riscv,max-priority = <7>;
+			riscv,ndev = <159>;
+		};
+
+		uart0: uart@d4017000 {
+			u-boot,dm-spl;
+			compatible = "ns16550";
+			reg = <0x00000000 0xD4017000 0x00000000 0x00000100>;
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			clock-frequency = <14000000>;
+			status = "okay";
+		};
+
+		ddr@c0000000 {
+			u-boot,dm-spl;
+			compatible = "spacemit,ddr-ctl";
+			reg = <0x00000000 0xC0000000 0x00000000 0x00400000>;
+		};
+
+		eth0: ethernet@cac80000 {
+			compatible = "spacemit,k1x-emac";
+			reg = <0x00000000 0xCAC80000 0x00000000 0x00000420>;
+			ctrl-reg = <0x3e4>;
+			dline-reg = <0x3e8>;
+			status = "okay";
+
+			phy-reset-pin = <40>;
+
+			clk_tuning_enable;
+			clk-tuning-by-reg;
+			tx-phase = <0x0>;
+			rx-phase = <0x1>;
+
+			phy-mode = "rgmii";
+			phy-addr = <0>;
+			phy-handle = <&rgmii>;
+
+			ref-clock-from-phy;
+
+			mdio {
+				#address-cells = <0x1>;
+				#size-cells = <0x0>;
+				rgmii: phy@0 {
+					compatible = "ethernet-phy-ieee802.3-c22";
+					device_type = "ethernet-phy";
+					reg = <0x0>;
+				};
+			};
+
+		};
+	};
+};
+

arch/riscv/dts/k1-x_fpga_2x2.dts

@@ -0,0 +1,221 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/* Copyright (c) 2023 Spacemit, Inc */
+
+/dts-v1/;
+/ {
+	model = "spacemit k1-x fpga board";
+	compatible = "spacemit,k1x", "riscv";
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x00000000 0x00000000 0x00000000 0x70000000>;
+		u-boot,dm-spl;
+	};
+
+	chosen {
+		bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
+		stdout-path = "serial0:115200n8";
+		u-boot,dm-spl;
+	};
+
+	cpus: cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		timebase-frequency = <10000000>;
+		u-boot,dm-spl;
+		cpu_0: cpu@0 {
+			device_type = "cpu";
+			reg = <0>;
+			status = "okay";
+			compatible = "riscv";
+			riscv,isa = "rv64imafdcvsu_zicsr_zifencei_zicbom_zihintpause_zba_zbb_zbc_zbs_svpbmt";
+			riscv,cbom-block-size = <64>;
+			mmu-type = "riscv,sv39";
+			cpu-freq = "1.848Ghz";
+			cpu-icache = "64KB";
+			cpu-dcache = "64KB";
+			cpu-l2cache = "1MB";
+			cpu-tlb = "1024 4-ways";
+			cpu-cacheline = "64Bytes";
+			cpu-vector = "0.7.1";
+			u-boot,dm-spl;
+			cpu0_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+				u-boot,dm-spl;
+			};
+		};
+		cpu_1: cpu@1 {
+			device_type = "cpu";
+			reg = <1>;
+			status = "okay";
+			compatible = "riscv";
+			riscv,isa = "rv64imafdcvsu_zicsr_zifencei_zicbom_zihintpause_zba_zbb_zbc_zbs_svpbmt";
+			riscv,cbom-block-size = <64>;
+			mmu-type = "riscv,sv39";
+			cpu-freq = "1.848Ghz";
+			cpu-icache = "64KB";
+			cpu-dcache = "64KB";
+			cpu-l2cache = "1MB";
+			cpu-tlb = "1024 4-ways";
+			cpu-cacheline = "64Bytes";
+			cpu-vector = "0.7.1";
+			u-boot,dm-spl;
+
+			cpu1_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+				u-boot,dm-spl;
+			};
+		};
+		cpu_2: cpu@2 {
+			device_type = "cpu";
+			reg = <4>;
+			status = "okay";
+			compatible = "riscv";
+			riscv,isa = "rv64imafdcvsu_zicsr_zifencei_zicbom_zihintpause_zba_zbb_zbc_zbs_svpbmt";
+			riscv,cbom-block-size = <64>;
+			mmu-type = "riscv,sv39";
+			cpu-freq = "1.848Ghz";
+			cpu-icache = "64KB";
+			cpu-dcache = "64KB";
+			cpu-l2cache = "1MB";
+			cpu-tlb = "1024 4-ways";
+			cpu-cacheline = "64Bytes";
+			cpu-vector = "0.7.1";
+			u-boot,dm-spl;
+
+			cpu2_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+				u-boot,dm-spl;
+			};
+		};
+		cpu_3: cpu@3 {
+			device_type = "cpu";
+			reg = <5>;
+			status = "okay";
+			compatible = "riscv";
+			riscv,isa = "rv64imafdcvsu_zicsr_zifencei_zicbom_zihintpause_zba_zbb_zbc_zbs_svpbmt";
+			riscv,cbom-block-size = <64>;
+			mmu-type = "riscv,sv39";
+			cpu-freq = "1.848Ghz";
+			cpu-icache = "64KB";
+			cpu-dcache = "64KB";
+			cpu-l2cache = "1MB";
+			cpu-tlb = "1024 4-ways";
+			cpu-cacheline = "64Bytes";
+			cpu-vector = "0.7.1";
+			u-boot,dm-spl;
+
+			cpu3_intc: interrupt-controller {
+				#interrupt-cells = <1>;
+				compatible = "riscv,cpu-intc";
+				interrupt-controller;
+				u-boot,dm-spl;
+			};
+		};
+	};
+
+	clocks {
+		#address-cells = <0x2>;
+		#size-cells = <0x2>;
+		ranges;
+	};
+
+	soc {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		u-boot,dm-spl;
+
+		clint0: clint@e4000000 {
+			compatible = "riscv,clint0";
+			interrupts-extended = <
+				&cpu0_intc  3 &cpu0_intc  7
+				&cpu1_intc  3 &cpu1_intc  7
+				&cpu2_intc  3 &cpu2_intc  7
+				&cpu3_intc  3 &cpu3_intc  7
+			>;
+			reg = <0x0 0xE4000000 0x0 0x00010000>;
+			clint,has-no-64bit-mmio;
+			u-boot,dm-spl;
+		};
+
+		intc: interrupt-controller@e0000000 {
+			#interrupt-cells = <1>;
+			compatible = "riscv,plic0";
+			interrupt-controller;
+			interrupts-extended = <
+				&cpu0_intc 0xffffffff &cpu0_intc 9
+				&cpu1_intc 0xffffffff &cpu1_intc 9
+				&cpu2_intc 0xffffffff &cpu2_intc 9
+				&cpu3_intc 0xffffffff &cpu3_intc 9
+			>;
+			reg = <0x0 0xE0000000 0x0 0x04000000>;
+			reg-names = "control";
+			riscv,max-priority = <7>;
+			riscv,ndev = <159>;
+		};
+
+		uart0: uart@d4017000 {
+			u-boot,dm-spl;
+			compatible = "ns16550";
+			reg = <0x00000000 0xD4017000 0x00000000 0x00000100>;
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			clock-frequency = <14000000>;
+			status = "okay";
+		};
+
+		ddr@c0000000 {
+			u-boot,dm-spl;
+			compatible = "spacemit,ddr-ctl";
+			reg = <0x00000000 0xC0000000 0x00000000 0x00400000>;
+		};
+
+		eth0: ethernet@cac80000 {
+			compatible = "spacemit,k1x-emac";
+			reg = <0x00000000 0xCAC80000 0x00000000 0x00000420>;
+			ctrl-reg = <0x3e4>;
+			dline-reg = <0x3e8>;
+			status = "okay";
+
+			phy-reset-pin = <40>;
+
+			clk_tuning_enable;
+			clk-tuning-by-reg;
+			tx-phase = <0x0>;
+			rx-phase = <0x1>;
+
+			phy-mode = "rgmii";
+			phy-addr = <0>;
+			phy-handle = <&rgmii>;
+
+			ref-clock-from-phy;
+
+			mdio {
+				#address-cells = <0x1>;
+				#size-cells = <0x0>;
+				rgmii: phy@0 {
+					compatible = "ethernet-phy-ieee802.3-c22";
+					device_type = "ethernet-phy";
+					reg = <0x0>;
+				};
+			};
+
+		};
+
+	};
+};
+

arch/riscv/dts/k1-x_hs450.dts

@@ -0,0 +1,186 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/* Copyright (c) 2023 Spacemit, Inc */
+
+/dts-v1/;
+
+#include "k1-x.dtsi"
+#include "k1-x_pinctrl.dtsi"
+#include "k1-x_pm853.dtsi"
+
+/ {
+	model = "spacemit k1-x hs450 board";
+
+	aliases {
+		efuse_power = &ldo_15;
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
+	};
+
+	chosen {
+		bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&cpu_0 {
+	/* boot frequency for cluster-0, should be 1600000, 1228000, 819000, or 614000 */
+	boot_freq_cluster0 = <1228000>;
+	/* boot frequency for cluster-1, should be 1600000, 1228000, 819000, or 614000 */
+	boot_freq_cluster1 = <1228000>;
+};
+
+&dramc {
+	/* dram data rate, should be 1200, 1600, or 2400 */
+	datarate = <2400>;
+};
+
+&cpus {
+	timebase-frequency = <24000000>;
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&i2c2 {
+	#address-cells = <1>;
+        #size-cells = <0>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_i2c2_0>;
+        status = "okay";
+
+        eeprom@50{
+                compatible = "atmel,24c02";
+                reg = <0x50>;
+                status = "okay";
+        };
+};
+
+&i2c4 {
+	clock-frequency = <400000>;
+	status = "okay";
+};
+
+&pinctrl {
+	pinctrl-single,gpio-range = <
+		&range GPIO_49  2 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_3V_DS4)
+		&range GPIO_58  1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_63  2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_65  1 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
+		&range GPIO_66  2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_74  1 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
+		&range GPIO_80  1 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_3V_DS4)
+		&range GPIO_81  3 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
+		&range GPIO_90  1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_91  2 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
+		&range DVL0     2 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_114 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_115 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+	>;
+
+	gpio80_pmx_func0: gpio80_pmx_func0 {
+		pinctrl-single,pins = <
+			K1X_PADCONF(GPIO_80, MUX_MODE0, (EDGE_BOTH | PULL_UP | PAD_3V_DS4))  /* mmc cd */
+		>;
+	};
+};
+
+&gpio{
+	gpio-ranges = <
+		&pinctrl 49 GPIO_49 2
+		&pinctrl 58 GPIO_58 1
+		&pinctrl 63 GPIO_63 5
+		&pinctrl 74 GPIO_74 1
+		&pinctrl 80 GPIO_80 4
+		&pinctrl 90 GPIO_90 3
+		&pinctrl 96 DVL0 2
+		&pinctrl 110 GPIO_110 1
+		&pinctrl 114 GPIO_114 4
+		&pinctrl 123 GPIO_123 1
+		&pinctrl 125 GPIO_125 3
+	>;
+};
+
+&udc {
+	status = "okay";
+};
+
+&combphy {
+	status = "okay";
+};
+
+&usbdrd3 {
+	status = "okay";
+	dwc3@c0a00000 {
+		dr_mode = "host";
+		phy_type = "utmi";
+		snps,dis_enblslpm_quirk;
+		snps,dis-u2-freeclk-exists-quirk;
+		snps,dis-del-phy-power-chg-quirk;
+		snps,dis_u2_susphy_quirk;
+		snps,dis_u3_susphy_quirk;
+	};
+};
+
+&sdhci0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_mmc1 &gpio80_pmx_func0>;
+	bus-width = <4>;
+	cd-gpios = <&gpio 80 0>;
+	cd-inverted;
+	cap-sd-highspeed;
+	sdh-phy-module = <0>;
+	status = "okay";
+};
+
+/* eMMC */
+&sdhci2 {
+	bus-width = <8>;
+	non-removable;
+	mmc-hs400-1_8v;
+	mmc-hs400-enhanced-strobe;
+	sdh-phy-module = <1>;
+	status = "okay";
+};
+
+&pcie1_rc {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pcie1_3>;
+	status = "okay";
+};
+
+&qspi {
+        status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_qspi>;
+
+        flash@0 {
+                compatible = "jedec,spi-nor";
+                reg = <0>;
+                spi-max-frequency = <26500000>;
+                m25p,fast-read;
+                broken-flash-reset;
+                status = "okay";
+        };
+};
+
+&efuse {
+	status = "okay";
+};
+
+&dpu {
+	status = "okay";
+};
+
+&hdmi {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_hdmi_0>;
+	status = "okay";
+};
+

arch/riscv/dts/k1-x_pm853.dtsi

@@ -0,0 +1,255 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/* Copyright (c) 2023 Spacemit, Inc */
+
+&i2c8 {
+	clock-frequency = <100000>;
+	u-boot,dm-spl;
+	status = "okay";
+
+	pm853: pmic@31 {
+		compatible = "spacemit,pm853";
+		reg = <0x31>;
+		bus = <8>;
+		u-boot,dm-spl;
+
+		regulators {
+			/* buck */
+			dcdc_1: DCDC_REG1 {
+				regulator-name = "dcdc1";
+				regulator-min-microvolt = <480000>;
+				regulator-max-microvolt = <3160000>;
+				regulator-init-microvolt = <950000>;
+				regulator-boot-on;
+				u-boot,dm-spl;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			dcdc_2: DCDC_REG2 {
+				regulator-name = "dcdc2";
+				regulator-min-microvolt = <600000>;
+				regulator-max-microvolt = <3950000>;
+			};
+
+			dcdc_3: DCDC_REG3 {
+				regulator-name = "dcdc3";
+				regulator-min-microvolt = <600000>;
+				regulator-max-microvolt = <3950000>;
+			};
+
+			/**
+			 * the order of powering on
+			 * 1. dcdc5
+			 * 2. ldo19
+			 * 3. dcdc4
+			 * 4. ldo4
+			 * 5. ldo9
+			 */
+			dcdc_5: DCDC_REG5 {
+				regulator-name = "dcdc5";
+				regulator-min-microvolt = <600000>;
+				regulator-max-microvolt = <3950000>;
+				regulator-boot-on;
+				u-boot,dm-spl;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			ldo_19: LDO_REG19 {
+				regulator-name = "ldo19";
+				regulator-min-microvolt = <100000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-boot-on;
+				u-boot,dm-spl;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			dcdc_4: DCDC_REG4 {
+				regulator-name = "dcdc4";
+				regulator-min-microvolt = <480000>;
+				regulator-max-microvolt = <3160000>;
+				regulator-init-microvolt = <650000>;
+				regulator-boot-on;
+				u-boot,dm-spl;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			ldo_4: LDO_REG4 {
+				regulator-name = "ldo4";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-init-microvolt = <3300000>;
+				regulator-boot-on;
+				u-boot,dm-spl;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			ldo_9: LDO_REG9 {
+				regulator-name = "ldo9";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-init-microvolt = <3300000>;
+				regulator-boot-on;
+				u-boot,dm-spl;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			/* ldo */
+			ldo_1: LDO_REG1 {
+				regulator-name = "ldo1";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			ldo_2: LDO_REG2 {
+				regulator-name = "ldo2";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			ldo_3: LDO_REG3 {
+				regulator-name = "ldo3";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			ldo_5: LDO_REG5 {
+				regulator-name = "ldo5";
+				regulator-min-microvolt = <1600000>;
+				regulator-max-microvolt = <1900000>;
+			};
+
+			ldo_6: LDO_REG6 {
+				regulator-name = "ldo6";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			ldo_7: LDO_REG7 {
+				regulator-name = "ldo7";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <1950000>;
+			};
+
+			ldo_8: LDO_REG8 {
+				regulator-name = "ldo8";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			ldo_10: LDO_REG10 {
+				regulator-name = "ldo10";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			ldo_11: LDO_REG11 {
+				regulator-name = "ldo11";
+				regulator-boot-on;
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <1950000>;
+				u-boot,dm-spl;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			ldo_12: LDO_REG12 {
+				regulator-name = "ldo12";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			ldo_13: LDO_REG13 {
+				regulator-name = "ldo13";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			ldo_14: LDO_REG14 {
+				regulator-name = "ldo14";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			ldo_15: LDO_REG15 {
+				regulator-name = "ldo15";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <1950000>;
+			};
+
+			ldo_16: LDO_REG16 {
+				regulator-name = "ldo16";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			ldo_17: LDO_REG17 {
+				regulator-name = "ldo17";
+				regulator-min-microvolt = <100000>;
+				regulator-max-microvolt = <1350000>;
+			};
+
+			ldo_18: LDO_REG18 {
+				regulator-name = "ldo18";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <1950000>;
+			};
+
+			ldo_20: LDO_REG20 {
+				regulator-name = "ldo20";
+				regulator-min-microvolt = <100000>;
+				regulator-max-microvolt = <1350000>;
+			};
+
+			ldo_21: LDO_REG21 {
+				regulator-name = "ldo21";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <1950000>;
+			};
+
+			ldo_22: LDO_REG22 {
+				regulator-name = "ldo22";
+				regulator-min-microvolt = <100000>;
+				regulator-max-microvolt = <1350000>;
+			};
+
+			sw_1: SWITCH_REG1 {
+				regulator-name = "switch1";
+			};
+		};
+	};
+
+	sy8810l: sy8810l@70 {
+		compatible = "spacemit,sy8810l";
+		reg = <0x70>;
+		bus = <8>;
+		u-boot,dm-spl;
+
+		regulators {
+			u-boot,dm-spl;
+
+			edcdc_1: EDCDC_REG1 {
+				regulator-name = "edcdc1";
+				regulator-min-microvolt = <600000>;
+				regulator-max-microvolt = <1500000>;
+				regulator-init-microvolt = <950000>;
+				regulator-boot-on;
+				u-boot,dm-spl;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+		};
+	};
+};

arch/riscv/dts/k1-x_spl.dts

@@ -0,0 +1,170 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/* Copyright (c) 2023 Spacemit, Inc */
+
+/dts-v1/;
+
+#include "k1-x.dtsi"
+#include "k1-x_pinctrl.dtsi"
+#include "k1-x_spm8821.dtsi"
+#include "k1-x_pm853.dtsi"
+
+/ {
+	model = "spacemit k1-x spl";
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
+		u-boot,dm-spl;
+	};
+
+	chosen {
+		bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
+		stdout-path = "serial0:115200n8";
+		u-boot,dm-spl;
+	};
+};
+
+&cpus {
+	timebase-frequency = <24000000>;
+	u-boot,dm-spl;
+
+	cpu@0 {
+		/* boot frequency for cluster-0, should be 1600000, 1228000, 819000, or 614000 */
+		boot_freq_cluster0 = <1228000>;
+		/* boot frequency for cluster-1, should be 1600000, 1228000, 819000, or 614000 */
+		boot_freq_cluster1 = <1228000>;
+		u-boot,dm-spl;
+	};
+};
+
+&clocks {
+	u-boot,dm-spl;
+
+	vctcxo_24 {
+		u-boot,dm-spl;
+	};
+
+	vctcxo_3 {
+		u-boot,dm-spl;
+	};
+
+	vctcxo_1 {
+		u-boot,dm-spl;
+	};
+
+	pll1_vco {
+		u-boot,dm-spl;
+	};
+
+	clk_32k {
+		u-boot,dm-spl;
+	};
+
+	clk_dummy {
+		u-boot,dm-spl;
+	};
+};
+
+&soc {
+	u-boot,dm-spl;
+
+	clock-controller@d4050000 {
+		status = "okay";
+		u-boot,dm-spl;
+	};
+
+	reset-controller@d4050000 {
+		status = "okay";
+		u-boot,dm-spl;
+	};
+
+	uart@d4017000 {
+		status = "okay";
+		u-boot,dm-spl;
+	};
+
+	ddr@c0000000 {
+		/* dram data rate, should be 1200, 1600, or 2400 */
+		datarate = <2400>;
+		u-boot,dm-spl;
+	};
+
+	sdh@d4280000 {
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_mmc1 &gpio80_pmx_func0>;
+		bus-width = <4>;
+		cap-sd-highspeed;
+		sdh-phy-module = <0>;
+		status = "okay";
+		u-boot,dm-spl;
+	};
+
+	/* eMMC */
+	sdh@d4281000 {
+		bus-width = <8>;
+		non-removable;
+		mmc-hs400-1_8v;
+		mmc-hs400-enhanced-strobe;
+		sdh-phy-module = <1>;
+		status = "okay";
+		u-boot,dm-spl;
+	};
+
+	twsi6@d4018800 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_i2c6_1>;
+		status = "okay";
+		u-boot,dm-spl;
+
+		eeprom@50{
+			compatible = "atmel,24c02";
+			u-boot,dm-spl;
+			reg = <0x50>;
+			bus = <6>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			status = "okay";
+		};
+	};
+
+	spi@d420c000 {
+		status = "okay";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_qspi>;
+		u-boot,dm-spl;
+
+		spi-max-frequency = <15140000>;
+		flash@0 {
+			compatible = "jedec,spi-nor";
+			reg = <0>;
+			spi-max-frequency = <26500000>;
+
+			m25p,fast-read;
+			broken-flash-reset;
+			u-boot,dm-spl;
+			status = "okay";
+		};
+	};
+
+	fuse@f0702800 {
+		status = "okay";
+		u-boot,dm-spl;
+	};
+};
+
+&pinctrl {
+	usbp1_vbus: usbp1_vbus {
+		pinctrl-single,pins =<
+			K1X_PADCONF(GPIO_66, MUX_MODE0, (EDGE_NONE | PULL_UP | PAD_1V8_DS2))	/* drive_vbus1_iso */
+		>;
+	};
+
+	gpio80_pmx_func0: gpio80_pmx_func0 {
+		pinctrl-single,pins = <
+			K1X_PADCONF(GPIO_80, MUX_MODE0, (EDGE_BOTH | PULL_UP | PAD_3V_DS4))  /* mmc cd */
+		>;
+	};
+};
+

arch/riscv/dts/k1-x_spm8821.dtsi

@@ -0,0 +1,138 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/* Copyright (c) 2023 Spacemit, Inc */
+
+&i2c8 {
+	clock-frequency = <100000>;
+	u-boot,dm-spl;
+	status = "okay";
+
+	spm8821: pmic@41 {
+		compatible = "spacemit,spm8821";
+		reg = <0x41>;
+		bus = <8>;
+		u-boot,dm-spl;
+
+		regulators {
+			/* buck */
+			dcdc_6: DCDC_REG1 {
+				regulator-name = "dcdc1";
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3450000>;
+				regulator-init-microvolt = <950000>;
+				regulator-boot-on;
+				u-boot,dm-spl;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			dcdc_7: DCDC_REG2 {
+				regulator-name = "dcdc2";
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3450000>;
+			};
+
+			dcdc_8: DCDC_REG3 {
+				regulator-name = "dcdc3";
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3450000>;
+				regulator-boot-on;
+				u-boot,dm-spl;
+			};
+
+			dcdc_9: DCDC_REG4 {
+				regulator-name = "dcdc4";
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3450000>;
+			};
+
+			dcdc_10: DCDC_REG5 {
+				regulator-name = "dcdc5";
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3450000>;
+			};
+
+			dcdc_11: DCDC_REG6 {
+				regulator-name = "dcdc6";
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3450000>;
+			};
+
+			/* aldo */
+			ldo_23: LDO_REG1 {
+				regulator-name = "ldo1";
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3400000>;
+				regulator-init-microvolt = <3300000>;
+				regulator-boot-on;
+				u-boot,dm-spl;
+			};
+
+			ldo_24: LDO_REG2 {
+				regulator-name = "ldo2";
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3400000>;
+			};
+
+			ldo_25: LDO_REG3 {
+				regulator-name = "ldo3";
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3400000>;
+			};
+
+			ldo_26: LDO_REG4 {
+				regulator-name = "ldo4";
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3400000>;
+			};
+
+			/* dldo */
+			ldo_27: LDO_REG5 {
+				regulator-name = "ldo5";
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3400000>;
+			};
+
+			ldo_28: LDO_REG6 {
+				regulator-name = "ldo6";
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3400000>;
+			};
+
+			ldo_29: LDO_REG7 {
+				regulator-name = "ldo7";
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3400000>;
+			};
+
+			ldo_30: LDO_REG8 {
+				regulator-name = "ldo8";
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3400000>;
+			};
+
+			ldo_31: LDO_REG9 {
+				regulator-name = "ldo9";
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3400000>;
+			};
+
+			ldo_32: LDO_REG10 {
+				regulator-name = "ldo10";
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3400000>;
+			};
+
+			ldo_33: LDO_REG11 {
+				regulator-name = "ldo11";
+				regulator-min-microvolt = <500000>;
+				regulator-max-microvolt = <3400000>;
+			};
+
+			sw_2: SWITCH_REG1 {
+				regulator-name = "switch1";
+			};
+		};
+	};
+};
+

arch/riscv/include/asm/arch-x60/ddr.h

@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2023 spacemit, Inc.
+ */
+
+#ifndef _DDR_SPACEMIT_H
+#define _DDR_SPACEMIT_H
+
+int ddr_freq_max(void);
+u32 ddr_get_density(void);
+
+#endif /* _DDR_SPACEMIT_H */

arch/riscv/include/asm/arch-x60/gpio.h

@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2023 spacemit, Inc.
+ */
+
+#ifndef _GPIO_SPACEMIT_H
+#define _GPIO_SPACEMIT_H
+
+/* It is only used for compiling */
+
+#endif /* _GPIO_SPACEMIT_H */

arch/riscv/include/asm/atomic.h

@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2023 SiFive, Inc.
+ */
+
+#ifndef __RISCV_ATOMIC_H
+#define __RISCV_ATOMIC_H
+
+/* use the generic asm/atomic.h until we define a better one */
+
+#include <asm/system.h>
+#include <asm-generic/atomic.h>
+
+#endif

arch/riscv/include/asm/bitops.h

@@ -149,6 +149,43 @@ static inline unsigned long ffz(unsigned long word)
  * #define ffs(x) generic_ffs(x)
  */
 
+static inline int find_next_zero_bit(void *addr, int size, int offset)
+{
+	unsigned long *p = ((unsigned long *)addr) + (offset / BITS_PER_LONG);
+	unsigned long result = offset & ~(BITS_PER_LONG - 1);
+	unsigned long tmp;
+
+	if (offset >= size)
+		return size;
+	size -= result;
+	offset &= (BITS_PER_LONG - 1);
+	if (offset) {
+		tmp = *(p++);
+		tmp |= ~0UL >> (BITS_PER_LONG - offset);
+		if (size < BITS_PER_LONG)
+			goto found_first;
+		if (~tmp)
+			goto found_middle;
+		size -= BITS_PER_LONG;
+		result += BITS_PER_LONG;
+	}
+	while (size & ~(BITS_PER_LONG - 1)) {
+		tmp = *(p++);
+		if (~tmp)
+			goto found_middle;
+		result += BITS_PER_LONG;
+		size -= BITS_PER_LONG;
+	}
+	if (!size)
+		return result;
+	tmp = *p;
+
+found_first:
+	tmp |= ~0UL << size;
+found_middle:
+	return result + ffz(tmp);
+}
+
 /*
  * hweightN: returns the hamming weight (i.e. the number
  * of bits set) of a N-bit word
@@ -158,6 +195,9 @@ static inline unsigned long ffz(unsigned long word)
 #define hweight16(x) generic_hweight16(x)
 #define hweight8(x) generic_hweight8(x)
 
+#define test_and_set_bit		__test_and_set_bit
+#define test_and_clear_bit		__test_and_clear_bit
+
 #define ext2_set_bit			test_and_set_bit
 #define ext2_clear_bit			test_and_clear_bit
 #define ext2_test_bit			test_bit

arch/riscv/include/asm/cache.h

@@ -7,6 +7,38 @@
 #ifndef _ASM_RISCV_CACHE_H
 #define _ASM_RISCV_CACHE_H
 
+#ifndef __ASSEMBLY__
+#define cbo_clean(start)			\
+	({								\
+		unsigned long __v = (unsigned long)(start); \
+		__asm__ __volatile__("cbo.clean"	\
+							 " 0(%0)"		\
+							 :				\
+							 : "rK"(__v)	\
+							 : "memory");	\
+	})
+
+#define cbo_invalid(start)			\
+	({								\
+		unsigned long __v = (unsigned long)(start); \
+		__asm__ __volatile__("cbo.inval"	\
+							 " 0(%0)"		\
+							 :				\
+							 : "rK"(__v)	\
+							 : "memory");	\
+	})
+
+#define cbo_flush(start)			\
+	({								\
+		unsigned long __v = (unsigned long)(start); \
+		__asm__ __volatile__("cbo.flush"	\
+							 " 0(%0)"		\
+							 :				\
+							 : "rK"(__v)	\
+							 : "memory");	\
+	})
+#endif /* __ASSEMBLY__ */
+
 /* cache */
 void cache_flush(void);
 

arch/riscv/include/asm/system.h

@@ -7,15 +7,24 @@
 #ifndef __ASM_RISCV_SYSTEM_H
 #define __ASM_RISCV_SYSTEM_H
 
+#include <asm/csr.h>
+
 struct event;
 
 /*
- * Interrupt configuring macros.
- *
- * TODO
- *
+ * Interupt configuration macros
  */
 
+#define local_irq_save(__flags)                                 \
+    do {                                                        \
+        __flags = csr_read_clear(CSR_SSTATUS, SR_SIE) & SR_SIE; \
+    } while (0)
+
+#define local_irq_restore(__flags)              \
+    do {                                        \
+        csr_set(CSR_SSTATUS, __flags & SR_SIE); \
+    } while (0)
+
 /* Hook to set up the CPU (called from SPL too) */
 int riscv_cpu_setup(void *ctx, struct event *event);
 

arch/riscv/lib/fdt_fixup.c

@@ -133,6 +133,41 @@ int board_fix_fdt(void *fdt)
 }
 #endif
 
+#ifdef CONFIG_FDT_ADD_MEMORY_NODE
+#if CONFIG_NR_DRAM_BANKS > 4
+#define _MEMORY_BANKS_MAX CONFIG_NR_DRAM_BANKS
+#else
+#define _MEMORY_BANKS_MAX 4
+#endif
+/*
+ * fdt_pack_reg - pack address and size array into the "reg"-suitable stream
+ */
+static int fdt_pack_reg(const void *fdt, void *buf, u64 *address, u64 *size,
+			int n)
+{
+	int i;
+	int address_cells = fdt_address_cells(fdt, 0);
+	int size_cells = fdt_size_cells(fdt, 0);
+	char *p = buf;
+
+	for (i = 0; i < n; i++) {
+		if (address_cells == 2)
+			*(fdt64_t *)p = cpu_to_fdt64(address[i]);
+		else
+			*(fdt32_t *)p = cpu_to_fdt32(address[i]);
+		p += 4 * address_cells;
+
+		if (size_cells == 2)
+			*(fdt64_t *)p = cpu_to_fdt64(size[i]);
+		else
+			*(fdt32_t *)p = cpu_to_fdt32(size[i]);
+		p += 4 * size_cells;
+	}
+
+	return p - (char *)buf;
+}
+#endif
+
 int arch_fixup_fdt(void *blob)
 {
 	int err;
@@ -161,6 +196,50 @@ int arch_fixup_fdt(void *blob)
 		return log_msg_ret("could not set boot-hartid", err);
 #endif
 
+
+#ifdef CONFIG_FDT_ADD_MEMORY_NODE
+	u8 tmp[_MEMORY_BANKS_MAX * 16];
+	u64 ram_base[1];
+	u64 ram_size[1];
+	char memstart[32];
+	int nodeoffset, len;
+
+	/* delete memory node before add new memory node. */
+	do {
+		nodeoffset = fdt_subnode_offset(blob, 0, "memory");
+		if (nodeoffset >= 0) {
+			fdt_del_node(blob, nodeoffset);
+		}
+	} while(nodeoffset >= 0);
+
+	for (int bank_index = CONFIG_NR_DRAM_BANKS - 1; bank_index >= 0; bank_index--){
+		memset(memstart, 0, 32);
+		sprintf(memstart, "memory@%llx", gd->bd->bi_dram[bank_index].start);
+
+		ram_base[0] = gd->bd->bi_dram[bank_index].start;
+		ram_size[0] = gd->bd->bi_dram[bank_index].size;
+
+		nodeoffset = fdt_add_subnode(blob, 0, memstart);
+
+		err = fdt_setprop(blob, nodeoffset, "device_type", "memory",
+				sizeof("memory"));
+		if (err < 0) {
+			printf("WARNING: could not set %s %s.\n", "device_type",
+					fdt_strerror(err));
+			return err;
+		}
+
+		len = fdt_pack_reg(blob, tmp, ram_base, ram_size, 1);
+
+		err = fdt_setprop(blob, nodeoffset, "reg", tmp, len);
+		if (err < 0) {
+			printf("WARNING: could not set %s %s.\n",
+					"reg", fdt_strerror(err));
+			return err;
+		}
+	}
+#endif
+
 	/* Copy the reserved-memory node to the DT used by OS */
 	err = riscv_fdt_copy_resv_mem_node(gd->fdt_blob, blob);
 	if (err < 0)

board/spacemit/k1-x/Kconfig

@@ -0,0 +1,100 @@
+if TARGET_SPACEMIT_K1X
+
+config SYS_BOARD
+	default "k1-x"
+
+config SYS_VENDOR
+	default "spacemit"
+
+config SYS_CPU
+	default "x60"
+
+config SYS_CONFIG_NAME
+	default "k1-x"
+
+config SYS_TEXT_BASE
+	default 0x81200000 if SPL
+	default 0x80000000 if !RISCV_SMODE
+	default 0x80200000 if RISCV_SMODE && ARCH_RV64I
+	default 0x80400000 if RISCV_SMODE && ARCH_RV32I
+
+config SPL_TEXT_BASE
+	default 0x20100000
+
+config SPL_OPENSBI_LOAD_ADDR
+	hex
+	default 0x21000000
+
+config FDT_ADD_MEMORY_NODE
+	bool "enable to add memory node to fdt before boot kernel"
+	default n
+
+config SPACEMIT_BUILD_BIN
+	bool "build fsbl.bin for spacemit image"
+	default n
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+	select SPACEMIT_X60
+	select FDT_ADD_MEMORY_NODE
+	imply AHCI
+	imply SMP
+	imply BOARD_LATE_INIT
+	imply PCI_INIT_R
+	imply SPL_RAM_SUPPORT
+	imply SPL_RAM_DEVICE
+	imply CMD_PCI
+	imply CMD_POWEROFF
+	imply CMD_SBI
+	imply CMD_SCSI
+	imply CMD_PING
+	imply CMD_EXT2
+	imply CMD_EXT4
+	imply CMD_FAT
+	imply CMD_FS_GENERIC
+	imply DOS_PARTITION
+	imply ISO_PARTITION
+	imply EFI_PARTITION
+	imply SCSI_AHCI
+	imply AHCI_PCI
+	imply E1000
+	imply NVME
+	imply PCI
+	imply PCIE_ECAM_GENERIC
+	imply SCSI
+	imply DM_SCSI
+	imply SYS_NS16550
+	imply SIFIVE_SERIAL
+	imply HTIF_CONSOLE if 64BIT
+	imply SYSRESET
+	imply SYSRESET_CMD_POWEROFF
+	imply SYSRESET_SYSCON
+	imply VIRTIO_MMIO
+	imply VIRTIO_PCI
+	imply VIRTIO_NET
+	imply VIRTIO_BLK
+	imply MTD_NOR_FLASH
+	imply CFI_FLASH
+	imply OF_HAS_PRIOR_STAGE
+
+choice
+	prompt "product board"
+	default K1_X_BOARD_FPGA
+
+config K1_X_BOARD_FPGA
+	bool "k1-x board fpga"
+	help
+	  k1-x board is fpga.
+
+config K1_X_BOARD_ASIC
+	bool "k1-x board asic"
+	help
+	  k1-x board is asic.
+
+config K1_X_BOARD_SIMULATION
+	bool "k1-x board simulation"
+	help
+	  k1-x board is simulation.
+endchoice
+
+endif

board/spacemit/k1-x/Makefile

@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2022-2023 Spacemit, Inc
+
+obj-y	+= k1x.o
+obj-$(CONFIG_SPL_BUILD)	+= spl.o k1x-i2c-eeprom.o
+obj-$(CONFIG_SPLASH_SOURCE) +=splash.o

board/spacemit/k1-x/config.mk

@@ -0,0 +1,57 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2022-2024 Spacemit, Inc
+
+
+# Add 4KB header for u-boot-spl.bin
+quiet_cmd_build_spl_platform = BUILD   $2
+cmd_build_spl_platform = \
+	cp $(srctree)/$3 \
+		$(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/ && \
+	python3 $(srctree)/tools/build_binary_file.py \
+		-c $(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/configs/fsbl.yml \
+		-o $(srctree)/FSBL.bin; \
+	python3 $(srctree)/tools/build_binary_file.py \
+		-c $(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/configs/bootinfo_spinor.yml \
+		-o $(srctree)/bootinfo_spinor.bin; \
+	python3 $(srctree)/tools/build_binary_file.py \
+		-c $(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/configs/bootinfo_spinand.yml \
+		-o $(srctree)/bootinfo_spinand.bin; \
+	python3 $(srctree)/tools/build_binary_file.py \
+		-c $(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/configs/bootinfo_emmc.yml \
+		-o $(srctree)/bootinfo_emmc.bin; \
+	python3 $(srctree)/tools/build_binary_file.py \
+		-c $(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/configs/bootinfo_sd.yml \
+		-o $(srctree)/bootinfo_sd.bin && \
+	rm -f $(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/u-boot-spl.bin
+
+quiet_cmd_build_itb = BUILD   $2
+cmd_build_itb = \
+	mkdir -p $(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/dtb && \
+	cp $(srctree)/arch/$(ARCH)/dts/*.dtb $(srctree)/ &&\
+	cp $(srctree)/arch/$(ARCH)/dts/*.dtb \
+		$(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/dtb/ && \
+	cp $(srctree)/u-boot-nodtb.bin \
+		$(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/ && \
+	$(srctree)/tools/mkimage -f \
+		$(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/configs/uboot_fdt.its \
+		-r $(srctree)/$2;\
+	rm -rf $(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/dtb && \
+	rm -f $(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/u-boot-nodtb.bin
+
+MRPROPER_FILES += $(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/u-boot-nodtb.bin
+MRPROPER_FILES += $(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/u-boot-spl.bin
+MRPROPER_FILES += u-boot.itb FSBL.bin
+MRPROPER_FILES += bootinfo_spinor.bin bootinfo_spinand.bin bootinfo_emmc.bin bootinfo_sd.bin
+MRPROPER_FILES += k1-x_evb.dtb k1-x_deb2.dtb k1-x_deb1.dtb k1-x_spl.dtb
+MRPROPER_DIRS += $(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/dtb
+
+u-boot.itb: u-boot-nodtb.bin u-boot-dtb.bin u-boot.dtb FORCE
+	$(call if_changed,build_itb,$@)
+
+ifneq ($(CONFIG_SPL_BUILD),)
+INPUTS-y += FSBL.bin
+
+FSBL.bin: spl/u-boot-spl.bin FORCE
+	$(call if_changed,build_spl_platform,$@,$<)
+endif

board/spacemit/k1-x/configs/bootinfo_emmc.yml

@@ -0,0 +1,41 @@
+# bootinfo build configuration script
+# key word
+# image       -- image definition
+#   module    -- image module define
+#   data      -- image item data config
+info:
+  arch: RISCV64
+  description: spacemit k1x eMMC bootinfo image
+image:
+  - module: bootinfo
+    data:
+      - structure:
+      # only structure support nest data type
+      # item name, item value or method, item size
+        - name, header, 0
+        - magic, 0xB00714F0, 4
+        - version, 0x00010001, 4
+
+        - flash_type, eMMC, 4
+        - mid, 0, 1
+        - reserved, 0, 1
+        - did, 0, 2
+        - page_size, 512, 4
+        - block_size, 0x10000, 4
+        - total_size, 0x10000000, 4
+        - multi_plane, 0, 1
+        - reserved, 0, 3
+
+        - spl0_offset, 0x200, 4
+        - spl1_offset, 0x00000, 4
+        - spl_size_limit, 0x36000, 4
+
+        - partitiontable0_offset, 0, 4
+        - partitiontable1_offset, 0, 4
+        - reserved, 0, 12
+
+      - structure:
+        - name, crc32_sum, 0
+        - crc, crc32(header), 4
+        - pad, 0, 12
+

board/spacemit/k1-x/configs/bootinfo_sd.yml

@@ -0,0 +1,40 @@
+# bootinfo build configuration script
+# key word
+# image       -- image definition
+#   module    -- image module define
+#   data      -- image item data config
+info:
+  arch: RISCV64
+  description: spacemit k1x sdcard bootinfo image
+image:
+  - module: bootinfo
+    data:
+      - structure:
+      # only structure support nest data type
+      # item name, item value or method, item size
+        - name, header, 0
+        - magic, 0xB00714F0, 4
+        - version, 0x00010001, 4
+
+        - flash_type, SDC, 4
+        - mid, 0, 1
+        - reserved, 0, 1
+        - did, 0, 2
+        - page_size, 512, 4
+        - block_size, 0x10000, 4
+        - total_size, 0x10000000, 4
+        - multi_plane, 0, 1
+        - reserved, 0, 3
+
+        - spl0_offset, 0x40000, 4
+        - spl1_offset, 0x80000, 4
+        - spl_size_limit, 0x36000, 4
+
+        - partitiontable0_offset, 0, 4
+        - partitiontable1_offset, 0, 4
+        - reserved, 0, 12
+
+      - structure:
+        - name, crc32_sum, 0
+        - crc, crc32(header), 4
+        - pad, 0, 12

board/spacemit/k1-x/configs/bootinfo_spinand.yml

@@ -0,0 +1,40 @@
+# bootinfo build configuration script
+# key word
+# image       -- image definition
+#   module    -- image module define
+#   data      -- image item data config
+info:
+  arch: RISCV64
+  description: spacemit k1x spinand bootinfo image
+image:
+  - module: bootinfo
+    data:
+      - structure:
+      # only structure support nest data type
+      # item name, item value or method, item size
+        - name, header, 0
+        - magic, 0xB00714F0, 4
+        - version, 0x00010001, 4
+
+        - flash_type, NAND, 4
+        - mid, 0, 1
+        - reserved, 0, 1
+        - did, 0, 2
+        - page_size, 2048, 4
+        - block_size, 0x20000, 4
+        - total_size, 0x10000000, 4
+        - multi_plane, 0, 1
+        - reserved, 0, 3
+
+        - spl0_offset, 0x40000, 4
+        - spl1_offset, 0x80000, 4
+        - spl_size_limit, 0x36000, 4
+
+        - partitiontable0_offset, 0, 4
+        - partitiontable1_offset, 0, 4
+        - reserved, 0, 12
+
+      - structure:
+        - name, crc32_sum, 0
+        - crc, crc32(header), 4
+        - pad, 0, 12

board/spacemit/k1-x/configs/bootinfo_spinor.yml

@@ -0,0 +1,40 @@
+# bootinfo build configuration script
+# key word
+# image       -- image definition
+#   module    -- image module define
+#   data      -- image item data config
+info:
+  arch: RISCV64
+  description: spacemit k1x spinor bootinfo image
+image:
+  - module: bootinfo
+    data:
+      - structure:
+      # only structure support nest data type
+      # item name, item value or method, item size
+        - name, header, 0
+        - magic, 0xB00714F0, 4
+        - version, 0x00010001, 4
+
+        - flash_type, NORF, 4
+        - mid, 0, 1
+        - reserved, 0, 1
+        - did, 0, 2
+        - page_size, 256, 4
+        - block_size, 0x10000, 4
+        - total_size, 0x100000, 4
+        - multi_plane, 0, 1
+        - reserved, 0, 3
+
+        - spl0_offset, 0x10000, 4
+        - spl1_offset, 0x50000, 4
+        - spl_size_limit, 0x36000, 4
+
+        - partitiontable0_offset, 0, 4
+        - partitiontable1_offset, 0, 4
+        - reserved, 0, 12
+
+      - structure:
+        - name, crc32_sum, 0
+        - crc, crc32(header), 4
+        - pad, 0, 12

board/spacemit/k1-x/configs/fsbl.yml

@@ -0,0 +1,118 @@
+# fspl build configuration script
+# key word
+# image       -- image definition
+#   module    -- image module define
+#   data      -- image item data config
+info:
+  arch: RISCV64
+  description: spacemit k1x fsbl image
+image:
+  - module: ROTPK
+    data:
+      - pubkey:
+          name: rsakeypair0
+          algorithm: RSA2048
+          source: key/rsakeypair0_prv.key
+          align: 256
+  - module: image_header
+    data:
+      - structure:
+      # only structure support nest data type
+      # item name, item value or method, item size
+        - name, header0, 0
+        - magic, AIHD, 4
+        - version, 1, 1
+        - secure, 0, 1
+        - reserved, 0, 2
+        - imgsize, 0x1000, 8
+        - load_addr, 0, 8
+        - pad, 0xA5, 8
+  - module: image_config
+    data:
+      - structure:
+        - name, keydata, 0
+        - key_default, 0, 4
+        - table_num, 4, 4
+        - structure:
+          - name, keytable0, 0
+          - key_name, spl, 16
+          - key_id, 0, 4
+        - structure:
+          - name, keytable1, 0
+          - key_name, uboot, 16
+          - key_id, 1, 4
+        - structure:
+          - name, keytable2, 0
+          - key_name, kernel, 16
+          - key_id, 2, 4
+        - structure:
+          - name, keytable3, 0
+          - key_name, rootfs, 16
+          - key_id, 3, 4
+        - reserved, 0, 320
+        - hash:
+            name: rotpk_hash
+            algorithm: SHA256
+            source: rsakeypair0
+            align: 32
+        - pad, 0, 40
+  - module: oem_pubkey
+    data:
+      - structure:
+        - name, oem_key, 0
+        - pubkey:
+            name: spl_pubkey
+            algorithm: RSA2048
+            source: key/spl_pubkey_prv.key
+            align: 256
+        - pubkey:
+            name: uboot_pubkey
+            algorithm: RSA2048
+            source: key/uboot_pubkey_pub.key
+            align: 256
+        - pubkey:
+            name: kernel_pubkey
+            algorithm: RSA2048
+            source: key/kernel_pubkey_pub.key
+            align: 256
+        - pubkey:
+            name: rootfs_pubkey
+            algorithm: RSA2048
+            source: key/rootfs_pubkey_pub.key
+            align: 256
+        - reserved, 0, 1024
+  - module: cert0
+    data:
+      - signature:
+          name: signature0
+          algorithm: SHA256+RSA2048
+          key: rsakeypair0
+          # signature source MUST has the same order within file
+          source: header0 + keydata + oem_key
+          align: 256
+  - module: padding
+    data:
+      - structure:
+        - pad, 0, 992
+  - module: spl
+    data:
+      - structure:
+        - name, header1, 0
+        - magic, AIHD, 4
+        - version, 1, 1
+        - secure, 0, 1
+        - reserved, 0, 2
+        - imgsize, sizeof(fsbl), 8
+        - load_addr, 0, 8
+        - pad, 0xA5, 8
+      - file:
+          name: fsbl
+          source: ../u-boot-spl.bin
+          align: 32
+      - signature:
+          name: signature1
+          algorithm: SHA256+RSA2048
+          key: spl_pubkey
+          # signature source MUST has the same order within file
+          source: header1 + fsbl
+          align: 256

board/spacemit/k1-x/configs/key/kernel_pubkey_prv.key

@@ -0,0 +1,27 @@
+-----BEGIN RSA PRIVATE KEY-----
+MIIEowIBAAKCAQEAvaYXdRPLdtudQHCNaCFSLyWIg12prSu6HkGiLNp3lwBIYvwy
+KwYAsVzdOM4fSyVkjHR+atsfxJYERIYmx916P14SHcU2pRgXgLc/tT+5BEDIFRtM
+0Gn+6KYZpEFIv0vY/Rscvs7oC7cRiK5Asv5xvTgTHCs3d/pA6jVQ1kg9cES5gxWf
+yAxRgndFZcHDe2S34eBueiZLR0Xcbx4COBhRvkvM5+hJGgSW7BzkXf00GQmDmHt7
+x6vfpo4fFKlnEJicLeGljmIeQyImBWvibvMW+DSByaL3XpHluwxf6RhKlyZ/68c5
+xumV2NsFAGFF1vYN9HWHKz8ZmNmtmeOjkcQlJQIDAQABAoIBAFvrphD8IDEi7wwt
+wYxIIkJxycIKYtRpjlNd8pIU7cQFwhAgNty9kxZkcWE4HtjYbezaBfAa90HciIMC
+Fsfm5HrUSKmfTgYlMDcWGs3p7e5Oy+vXCJs31PLEl0cS0YTO6YR8YKlnNfd/qwL5
+mqhnRY+2HyUXGVKQvGgIoX7LEuRXxIK/gaFNE0udzO87eD/GCfwf7hAE6x3wdVGb
+ZJ+m7oA7AdCT7c8VjsaJY1OQfyAxWYV5Frzll2F7v87YxVPioUfWzPJmR51Q9XID
+mZ06RmneeUrmkF0tQnFrcjQC5TD2jaqiI4SJT/cmWXW/FV3JW67Jspp/ocAPxRXF
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+E5On+vPGLdmZd0CgwxWAl623qNvCcKd6hIMxAVlm61ZIxBm2p6uX/ys1ueSDcA57
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+CgfNsFNUcvG6olKqCGsb8vd2LzO5Lp7uJ1X0k/B/3fLnpxBF5IyEX4X+oEJvVad0
+PoQteZ35s009tJuEj9EgzuE/2RgbbOHq6baqJT64xpqi9cgRvUa2/Nux4JSHXeZF
++aulAoGBAIJhoN8R1WM9INYtbFbYvLn0mLWXB7ZjvjlXNUmEKDibX57qHOq4VNS2
+5uI2qXd/JIORXwn2u+jB3+e/ebPWem5tH4xl0J0TnjAmcjiBGV8ihn90Bi3nDvQy
+XtUdODYyzDvecPt7B3SfvQct7qwlnj2AJr8jDSmd6nuGvL/dHS+i
+-----END RSA PRIVATE KEY-----

board/spacemit/k1-x/configs/key/kernel_pubkey_pub.key

@@ -0,0 +1,9 @@
+-----BEGIN PUBLIC KEY-----
+MIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEAvaYXdRPLdtudQHCNaCFS
+LyWIg12prSu6HkGiLNp3lwBIYvwyKwYAsVzdOM4fSyVkjHR+atsfxJYERIYmx916
+P14SHcU2pRgXgLc/tT+5BEDIFRtM0Gn+6KYZpEFIv0vY/Rscvs7oC7cRiK5Asv5x
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+vkvM5+hJGgSW7BzkXf00GQmDmHt7x6vfpo4fFKlnEJicLeGljmIeQyImBWvibvMW
++DSByaL3XpHluwxf6RhKlyZ/68c5xumV2NsFAGFF1vYN9HWHKz8ZmNmtmeOjkcQl
+JQIDAQAB
+-----END PUBLIC KEY-----

board/spacemit/k1-x/configs/key/rootfs_pubkey_prv.key

@@ -0,0 +1,27 @@
+-----BEGIN RSA PRIVATE KEY-----
+MIIEpAIBAAKCAQEA2HeOSXnUDRfMhf7JK9FEAWhV8R3BZ5zSnr4MPW5by9hg76Rl
+LckiRWOjepOToneib7hilLT77Xurch7/hMaqOyymwOsvUlMkHadE56nPFa8eGjFn
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+Y5E6cnSOao8mluTgurnstzW/vkuNXJijDIao+uuspup2Yy9ssDV/M2Cf/4KZOGj/
+HemYbCZ1jxlm0tCQNgsxbOyy+B+bHSPfWEfbAvFYjz1iB8nB/gig5LRt7Od4gnAl
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+ORfzxJXE5HP4fWMyAbaeUAa41Z2dz8j3TJwN7gl34bQ/xSjR26gCUg==
+-----END RSA PRIVATE KEY-----

board/spacemit/k1-x/configs/key/rootfs_pubkey_pub.key

@@ -0,0 +1,9 @@
+-----BEGIN PUBLIC KEY-----
+MIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEA2HeOSXnUDRfMhf7JK9FE
+AWhV8R3BZ5zSnr4MPW5by9hg76RlLckiRWOjepOToneib7hilLT77Xurch7/hMaq
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+Or/wJDKFAET5diRM/irGrLoTg8HhborMeuHhBp9rabMTzIrY3AOGcM8eaQRUUvUX
+QwIDAQAB
+-----END PUBLIC KEY-----

board/spacemit/k1-x/configs/key/rsakeypair0_prv.key

@@ -0,0 +1,27 @@
+-----BEGIN RSA PRIVATE KEY-----
+MIIEpQIBAAKCAQEA4NHeBkoDPsJBtq6LG8y2m8nGJFmWQrquhLaRNuG9arUUMz9n
+1UxpggLbW+1PzilK7zHwxE1tueSQw1d/YG04IaTw4LpXk3FWQZOK/EOhrcI9PpRW
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+uNwKCyFbZhr3vUrKeizhKJrebfmoSEZO3ByWewjkUGBG58ORJk+wQlA=
+-----END RSA PRIVATE KEY-----

board/spacemit/k1-x/configs/key/rsakeypair0_pub.key

@@ -0,0 +1,9 @@
+-----BEGIN PUBLIC KEY-----
+MIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEA4NHeBkoDPsJBtq6LG8y2
+m8nGJFmWQrquhLaRNuG9arUUMz9n1UxpggLbW+1PzilK7zHwxE1tueSQw1d/YG04
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+MKibamnJUSdvwsekEhGPrEKMe9VfDb7ZIwcXo1OKkg7jL6GJpup5lWpwLjkZFnRQ
+BwIDAQAB
+-----END PUBLIC KEY-----

board/spacemit/k1-x/configs/key/spl_pubkey_prv.key

@@ -0,0 +1,27 @@
+-----BEGIN RSA PRIVATE KEY-----
+MIIEpAIBAAKCAQEA0mNGLxt74bvCoWD17OQVdXgdcSCzyVEBkn7KBOnVxH7IY5sN
+UwoUzq2jCRDZrdewRznH19y6aWrh7/+DXlPsQP1Q+RbH0tbJwAQ4j7V0447vI65Y
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+i9CW1fIBhgkAFj2d/7p4CNvmD173OSpqSNeJCatCuUqn6PFf713O0/ql2dit/tgH
+hj+KhpUCgYBER5wTA1ZyNOBNtKFtRr23hemYDDc1TTG/fEGOh2kePWzpnjme1hSm
+9mf9o/DnOX51ClIWSRTH3FnE17Es5orBqOLSWIT/yq4dxpqRF04PiCOgT8IY1tM8
+JTdsuzFdLSlcLR8NFY/mLEb/BnsycoQFg9pUvJiiJ7krb0DJo9wGeA==
+-----END RSA PRIVATE KEY-----

board/spacemit/k1-x/configs/key/spl_pubkey_pub.key

@@ -0,0 +1,9 @@
+-----BEGIN PUBLIC KEY-----
+MIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEA0mNGLxt74bvCoWD17OQV
+dXgdcSCzyVEBkn7KBOnVxH7IY5sNUwoUzq2jCRDZrdewRznH19y6aWrh7/+DXlPs
+QP1Q+RbH0tbJwAQ4j7V0447vI65Y61kfrQr/R6TIJyC16wZJtYtaZk24oIitapo/
+iJUWGDgOmyqTaPlEmgw7kic8sXnEK6qjCTdXl80olKNBtVe3/N75Dt5wp7W3q6yR
+fx3sEN/hAEJuvBVxBiwVSTSFasyE849trg1mpDbiW+Hb+BmpGTwHqKWUpNZnoW2D
+l6QgNwVQKSn63WA/n2P4ZNqNLe34/uPLTDMBN/zKmebL+ObuvO1/49z0Ll/Znbqr
+PQIDAQAB
+-----END PUBLIC KEY-----

board/spacemit/k1-x/configs/key/uboot_pubkey_prv.key

@@ -0,0 +1,27 @@
+-----BEGIN RSA PRIVATE KEY-----
+MIIEowIBAAKCAQEAqiguq8fQoohe7i6h19Ebxa9X0ClK1shf7cgCsSJ3dcwNV9Pe
+yOYRPNPCOP0D7s1MaYPk4NceumvNzDx/b2AhY3HiXX7Trem5Jcm5UEv00KWgZ8qc
+ZDl+0tB9+gEpECucYAjEDsVcxDHzQi0WuK3p0qjl09FArKRDkWA2F0FZyR+hDj75
+ohxAxzd9/MbYMbgp1kXRsbBMU079M1Lv3+GaffkMQpV+dTJmOYredYVCejN5QScS
+Xc0jbQFdj7bd6WOtuHMM9UX8KBseQKHezR0q9kXOZ0BC4ecFJ0rxalCmY4G7gVxE
+UiL+VoJuRHXSGTWYlnVz/cgUvtaV24+u5RmAjwIDAQABAoIBAQCo29l89X0xXl2+
+xp4ru0NxSZG+bMvtG8o/AUbSnF6qksYHC6XB/rbKg2byAPy/JhMXfyFKk5DV9Ze0
+f7EDSQW5V1IJ8IuGwjPPsUFq0wXvbP4jIilTOM+HzAnIaRBkELNNhkVyVx+5P8yl
+NnOe8E/jk2MIcldZPGYlRbJIH71HXbF1cczrYzjVDabyZp/XgJLAj91OygsTtmsB
+uA1WnrYKIHfCzzX8JvLNy2cOxENIQwFrbNvJDI4MZrlwrkTBZvYQAezbKcYBJYvD
+uihvZeExkRiHf3QMHcxFev4AajU7Fkk+CYLoddF8JtAVHBJICUu9le60fFvoR8Cv
+C8DOwMg5AoGBAOIoMANJ1do1L/yshf7nEGVV70Butyl7EJK3gS6QGx8xjkNOkSLD
+3LajCZTFLFEM/KpZM2veKYYnCgOFfgGv5f8RbXvINsiqCYf91MCH+t9plTVO59MT
+3ckEVjTXbdnNC1lXEFo/+eEYiD5DDR7B8T3BaOGW8UG66/8MefzvrVH7AoGBAMCc
+QdkrN24rkUzoDChXnZ11GQp2kVqvVS0hFtfsLUsKg9HdG7t1pGYPcM+4b2MgUKCN
+KmkG6PJRyJ0Yhgc0mW5GkZI1/PnMsUqmJNYW4dNK1fHLpfRb181k0NkjJ81x1nok
+tkZyP69KsKt4JPz2qnsfG0C6OEmZbFnHUyHcCRt9AoGAInlJyFaK+LY+2F9cFZ0X
+TLsqu0GlPfd6cULzuCtTVw/wxaXGTexZSqXTog/kT36RTU5HnlvBLKfqyNqieJNd
+leIMNGAyqafxx/8TXT3dKg0oJ3YdtHlEx42XrnpgTmEJJ9czsO4rovpgWk1SRKv/
+oBBJconVwNVDgB9gwQOwAd0CgYBGX5ErkL+y8BYpnEr83m5HHoakrQeUs6USVRms
+kK1H0rKxFfFQ/72uUIvuSTvhYugykQFi2FR6XOlIhLJLpas9gGklm7YvatuII8Yn
+trqR4bDjpH2hF4F0mRY5j7+2L5amkA1NFecw28BLFh2lk1Zcn9PsRV3Vfkn5T3uP
+Tn7BXQKBgE2txSaFT1NcBZ8BOlMvUR8L8Qbs4pgrj1ztNtyrFFATc+gqI7d2TM/3
+wxjCpnisMeEVaJdKaQayZF3FJl9phocf+duU0ey3iXwl1QXGrnfODvFRLlW2D90f
+OzOuYHR+qvYZjtOb1Q2Ci1dluc84nRQMUkrOoVqJxhtEx5aQJPgc
+-----END RSA PRIVATE KEY-----

board/spacemit/k1-x/configs/key/uboot_pubkey_pub.key

@@ -0,0 +1,9 @@
+-----BEGIN PUBLIC KEY-----
+MIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEAqiguq8fQoohe7i6h19Eb
+xa9X0ClK1shf7cgCsSJ3dcwNV9PeyOYRPNPCOP0D7s1MaYPk4NceumvNzDx/b2Ah
+Y3HiXX7Trem5Jcm5UEv00KWgZ8qcZDl+0tB9+gEpECucYAjEDsVcxDHzQi0WuK3p
+0qjl09FArKRDkWA2F0FZyR+hDj75ohxAxzd9/MbYMbgp1kXRsbBMU079M1Lv3+Ga
+ffkMQpV+dTJmOYredYVCejN5QScSXc0jbQFdj7bd6WOtuHMM9UX8KBseQKHezR0q
+9kXOZ0BC4ecFJ0rxalCmY4G7gVxEUiL+VoJuRHXSGTWYlnVz/cgUvtaV24+u5RmA
+jwIDAQAB
+-----END PUBLIC KEY-----

board/spacemit/k1-x/configs/uboot_fdt.its

@@ -0,0 +1,83 @@
+/dts-v1/;
+
+/ {
+	description = "U-boot FIT image for k1x";
+	#address-cells = <2>;
+	fit,fdt-list = "of-list";
+
+	images {
+		uboot {
+			description = "U-Boot";
+			type = "standalone";
+			os = "U-Boot";
+			arch = "riscv";
+			compression = "none";
+			load = <0x0 0x00200000>;
+			data = /incbin/("../u-boot-nodtb.bin");
+			hash-1 {
+				algo = "crc32";
+			};
+		};
+
+		fdt_1 {
+			description = "k1_evb";
+			type = "flat_dt";
+			compression = "none";
+			data = /incbin/("../dtb/k1-x_evb.dtb");
+			hash-1 {
+				algo = "crc32";
+			};
+		};
+		fdt_2 {
+			description = "k1_deb1";
+			type = "flat_dt";
+			compression = "none";
+			data = /incbin/("../dtb/k1-x_deb1.dtb");
+			hash-1 {
+				algo = "crc32";
+			};
+		};
+		fdt_3 {
+			description = "k1_deb2";
+			type = "flat_dt";
+			compression = "none";
+			data = /incbin/("../dtb/k1-x_deb2.dtb");
+			hash-1 {
+				algo = "crc32";
+			};
+		};
+		fdt_4 {
+                        description = "k1_hs450";
+                        type = "flat_dt";
+                        compression = "none";
+                        data = /incbin/("../dtb/k1-x_hs450.dtb");
+                        hash-1 {
+                                algo = "crc32";
+                        };
+                };
+	};
+
+	configurations {
+		default = "conf_1";
+		conf_1 {
+			description = "k1_evb";
+			loadables = "uboot";
+			fdt = "fdt_1";
+		};
+		conf_2 {
+			description = "k1_deb1";
+			loadables = "uboot";
+			fdt = "fdt_2";
+		};
+		conf_3 {
+			description = "k1_deb2";
+			loadables = "uboot";
+			fdt = "fdt_3";
+		};
+		conf_4 {
+                        description = "k1_hs450";
+                        loadables = "uboot";
+                        fdt = "fdt_4";
+                };
+	};
+};

board/spacemit/k1-x/k1x-i2c-eeprom.c

@@ -0,0 +1,141 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include <env.h>
+#include <i2c.h>
+#include <asm/io.h>
+#include <common.h>
+#include <asm/global_data.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define MUX_MODE0	0			/* func 0 */
+#define MUX_MODE1	BIT(0)			/* func 1 */
+#define MUX_MODE2	BIT(1)			/* func 2 */
+#define MUX_MODE3	BIT(0) | BIT(1)		/* func 3 */
+#define MUX_MODE4	BIT(2)			/* func 4 */
+#define MUX_MODE5	BIT(0) | BIT(2)		/* func 5 */
+#define EDGE_NONE	BIT(6)			/* edge-detection is unabled */
+#define PAD_1V8_DS2	BIT(12)			/* voltage:1.8v, driver strength: 2 */
+#define PULL_UP       	BIT(14) | BIT(15)	/* pull-up */
+
+char *spacemit_i2c_eeprom[] = {
+	"atmel,24c02",
+};
+
+struct tlv_eeprom {
+	u8    type;
+	u8  length;
+};
+
+int spacemit_eeprom_read(uint8_t chip, uint8_t *buffer, uint8_t id)
+{
+	struct tlv_eeprom tlv;
+	int ret;
+	uint8_t buf[1] = {0};
+	uint8_t len[1] = {0};
+    	u16 i = 0;
+	u8 j;
+
+	tlv.type = 0;
+	tlv.length = 0;
+
+	for (i = 11; i <= 256; i = i + tlv.length + 2) {
+		ret = i2c_read(chip, i, 1, buf, 1);
+		tlv.type = *buf;
+
+		ret = i2c_read(chip, i + 1, 1, len, 1);
+		tlv.length = *len;
+
+		if (tlv.length == 0) {
+			pr_err("Error: wrong tlv length\n");
+			return -1;
+		}
+
+		if (tlv.type == id) {
+			for(j = 0; j < tlv.length; j++) {
+				ret = i2c_read(chip, i + 2 + j, 1, (char *)buffer, 1);
+				buffer++;
+			}
+			return 0;
+		}
+	}
+
+	pr_info("No 0x%x tlv type in eeprom\n", id);
+	return -2;
+}
+
+void i2c_set_pinctrl(int bus, int pin)
+{
+	if ((bus == 2) && (pin == 0)) {
+		//gpio84
+		writel(MUX_MODE4 | EDGE_NONE | PULL_UP | PAD_1V8_DS2, (void __iomem *)0xd401e154);
+		//gpio85
+		writel(MUX_MODE4 | EDGE_NONE | PULL_UP | PAD_1V8_DS2, (void __iomem *)0xd401e158);
+	} else if ((bus == 6) && (pin == 1)) {
+		//gpio118
+		writel(MUX_MODE2 | EDGE_NONE | PULL_UP | PAD_1V8_DS2, (void __iomem *)0xd401e228);
+		//gpio119
+		writel(MUX_MODE2 | EDGE_NONE | PULL_UP | PAD_1V8_DS2, (void __iomem *)0xd401e22c);
+	}else
+		pr_err("bus or pinctrl wrong\n");
+}
+
+const uint8_t eeprom_config[][2] = {
+	// eeprom in evb: I2C6, pin group1(GPIO_118, GPIO_119)
+	{2, 0},
+	// eeprom in deb1 & deb2: I2C2, pin group0(GPIO_84, GPIO_85)
+	{6, 1},
+};
+
+int k1x_eeprom_init(void)
+{
+	int offset, ret, saddr, i;
+	char *name;
+	uint8_t bus, pin;
+
+	for(i = 0; i < ARRAY_SIZE(spacemit_i2c_eeprom); i++){
+		name = spacemit_i2c_eeprom[i];
+		offset = fdt_node_offset_by_compatible(gd->fdt_blob, -1, name);
+		if(offset > 0){
+			pr_info("Get %s node \n", name);
+			break;
+		}
+	}
+
+	if (offset < 0) {
+		pr_err("%s Get eeprom node error\n", __func__);
+		return -EINVAL;
+	}
+
+	saddr = fdtdec_get_uint(gd->fdt_blob, offset, "reg", 0);
+	if (!saddr) {
+		pr_err("%s: %s Node has no reg\n", __func__, name);
+		return -EINVAL;
+	}
+
+	for (i = 0; i < ARRAY_SIZE(eeprom_config); i++) {
+		bus = eeprom_config[i][0];
+		pin = eeprom_config[i][1];
+		i2c_set_pinctrl(bus, pin);
+
+		ret = i2c_set_bus_num(bus);
+		if (ret < 0) {
+			pr_err("%s: %s set i2c bus number error\n", __func__, name);
+			continue;
+		}
+
+		ret = i2c_probe(saddr);
+		if (ret < 0) {
+			pr_err("%s: %s probe i2c(%d) failed\n", __func__, name, bus);
+			continue;
+		}
+		break;
+	}
+
+	if (i >= ARRAY_SIZE(eeprom_config))
+		return -EINVAL;
+	else {
+		pr_info("find eeprom in bus %d, address %d\n", eeprom_config[i][0], saddr);
+		return saddr;
+	}
+}

board/spacemit/k1-x/k1x.c

@@ -0,0 +1,727 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2023 Spacemit, Inc
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/ofnode.h>
+#include <dm/lists.h>
+#include <env.h>
+#include <fdtdec.h>
+#include <image.h>
+#include <log.h>
+#include <mapmem.h>
+#include <spl.h>
+#include <init.h>
+#include <virtio_types.h>
+#include <virtio.h>
+#include <asm/io.h>
+#include <asm/sections.h>
+#include <stdlib.h>
+#include <linux/io.h>
+#include <asm/global_data.h>
+#include <part.h>
+#include <env_internal.h>
+#include <asm/arch/ddr.h>
+#include <power/regulator.h>
+#include <fb_spacemit.h>
+#include <net.h>
+#include <i2c.h>
+#include <linux/delay.h>
+#include <tlv_eeprom.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+static char found_partition[64] = {0};
+#ifdef CONFIG_DISPLAY_SPACEMIT_HDMI
+extern int is_hdmi_connected;
+#endif
+
+void set_boot_mode(enum board_boot_mode boot_mode)
+{
+	writel(boot_mode, (void *)BOOT_DEV_FLAG_REG);
+}
+
+enum board_boot_mode get_boot_pin_select(void)
+{
+	/*if not set boot mode, try to return boot pin select*/
+	u32 boot_select = readl((void *)BOOT_PIN_SELECT) & BOOT_STRAP_BIT_STORAGE_MASK;
+	boot_select = boot_select >> BOOT_STRAP_BIT_OFFSET;
+	pr_debug("boot_select:%x\n", boot_select);
+
+	/*select spl boot device:
+ 
+		 b'(bit1)(bit0)
+	emmc:b'00, //BOOT_STRAP_BIT_EMMC
+	nor :b'10, //BOOT_STRAP_BIT_NOR
+	nand:b'01, //BOOT_STRAP_BIT_NAND
+	sd  :b'11, //BOOT_STRAP_BIT_SD
+*/
+	switch (boot_select) {
+	case BOOT_STRAP_BIT_EMMC:
+		return BOOT_MODE_EMMC;
+	case BOOT_STRAP_BIT_NAND:
+		return BOOT_MODE_NAND;
+	case BOOT_STRAP_BIT_NOR:
+		return BOOT_MODE_NOR;
+	case BOOT_STRAP_BIT_SD:
+	default:
+		return BOOT_MODE_SD;
+	}
+}
+
+enum board_boot_mode get_boot_mode(void)
+{
+	/*if usb boot or has set boot mode, return boot mode*/
+	u32 boot_mode = readl((void *)BOOT_DEV_FLAG_REG);
+	pr_debug("%s, boot_mode:%x\n", __func__, boot_mode);
+
+	switch (boot_mode) {
+	case BOOT_MODE_USB:
+		return BOOT_MODE_USB;
+	case BOOT_MODE_EMMC:
+		return BOOT_MODE_EMMC;
+	case BOOT_MODE_NAND:
+		return BOOT_MODE_NAND;
+	case BOOT_MODE_NOR:
+		return BOOT_MODE_NOR;
+	case BOOT_MODE_SD:
+		return BOOT_MODE_SD;
+	case BOOT_MODE_SHELL:
+		return BOOT_MODE_SHELL;
+	}
+
+	/*else return boot pin select*/
+	return get_boot_pin_select();
+}
+
+
+int mmc_get_env_dev(void)
+{
+	u32 boot_mode = 0;
+	boot_mode = get_boot_mode();
+	pr_debug("%s, uboot boot_mode:%x\n", __func__, boot_mode);
+
+	if (boot_mode == BOOT_MODE_EMMC)
+		return MMC_DEV_EMMC;
+	else
+		return MMC_DEV_SD;
+}
+
+
+void run_fastboot_command(void)
+{
+	u32 boot_mode = get_boot_mode();
+
+	/*if define BOOT_MODE_USB flag in BOOT_CIU_DEBUG_REG0, it would excute fastboot*/
+	u32 cui_flasg = readl((void *)BOOT_CIU_DEBUG_REG0);
+	if (boot_mode == BOOT_MODE_USB || cui_flasg == BOOT_MODE_USB){
+		/*would reset debug_reg0*/
+		writel(0, (void *)BOOT_CIU_DEBUG_REG0);
+
+		char *cmd_para = "fastboot 0";
+		run_command(cmd_para, 0);
+	}
+}
+
+int run_uboot_shell(void)
+{
+	u32 boot_mode = get_boot_mode();
+
+	/*if define BOOT_MODE_SHELL flag in BOOT_CIU_DEBUG_REG0, it would into uboot shell*/
+	u32 flag = readl((void *)BOOT_CIU_DEBUG_REG0);
+	if (boot_mode == BOOT_MODE_SHELL || flag == BOOT_MODE_SHELL){
+		/*would reset debug_reg0*/
+		writel(0, (void *)BOOT_CIU_DEBUG_REG0);
+		return 0;
+	}
+	return 1;
+}
+
+void _load_env_from_blk(struct blk_desc *dev_desc, const char *dev_name, int dev)
+{
+	/*
+	TODO:
+		load env from bootfs, if bootfs is fat/ext4 at blk dev, use fatload/ext4load.
+	*/
+	int err;
+	u32 part;
+	char cmd[128];
+	struct disk_partition info;
+
+	for (part = 1; part <= MAX_SEARCH_PARTITIONS; part++) {
+		err = part_get_info(dev_desc, part, &info);
+		if (err)
+			continue;
+		if (!strcmp(BOOTFS_NAME, info.name)){
+			pr_debug("match info.name:%s\n", info.name);
+			break;
+		}
+	}
+	if (part > MAX_SEARCH_PARTITIONS)
+		return;
+
+	env_set("bootfs_part", simple_itoa(part));
+	env_set("bootfs_devname", dev_name);
+
+	/*load env.txt and import to uboot*/
+	sprintf(cmd, "fatload %s %d:%d 0x%x env_%s.txt", dev_name,
+			dev, part, CONFIG_SPL_LOAD_FIT_ADDRESS, CONFIG_SYS_CONFIG_NAME);
+	pr_debug("cmd:%s\n", cmd);
+	if (run_command(cmd, 0))
+		return;
+
+	memset(cmd, '\0', 128);
+	sprintf(cmd, "env import -t 0x%x", CONFIG_SPL_LOAD_FIT_ADDRESS);
+	pr_debug("cmd:%s\n", cmd);
+	if (!run_command(cmd, 0)){
+		pr_info("load env_%s.txt from bootfs successful\n", CONFIG_SYS_CONFIG_NAME);
+	}
+}
+
+char* parse_mtdparts_and_find_bootfs(void) {
+	const char *mtdparts = env_get("mtdparts");
+	char cmd_buf[256];
+
+	if (!mtdparts) {
+		pr_debug("mtdparts not set\n");
+		return NULL;
+	}
+
+	/* Find the last partition */
+	const char *last_part_start = strrchr(mtdparts, '(');
+	if (last_part_start) {
+		last_part_start++; /* Skip the left parenthesis */
+		const char *end = strchr(last_part_start, ')');
+		if (end && (end - last_part_start < sizeof(found_partition))) {
+			int len = end - last_part_start;
+			strncpy(found_partition, last_part_start, len);
+			found_partition[len] = '\0';
+
+			snprintf(cmd_buf, sizeof(cmd_buf), "ubi part %s", found_partition);
+			if (run_command(cmd_buf, 0) == 0) {
+				/* Check if the bootfs volume exists */
+				snprintf(cmd_buf, sizeof(cmd_buf), "ubi check %s", BOOTFS_NAME);
+				if (run_command(cmd_buf, 0) == 0) {
+					pr_info("Found bootfs in partition: %s\n", found_partition);
+					return found_partition;
+				}
+			}
+		}
+	}
+
+	pr_debug("bootfs not found in any partition\n");
+	return NULL;
+}
+
+void import_env_from_bootfs(void)
+{
+	u32 boot_mode = get_boot_mode();
+	switch (boot_mode) {
+	case BOOT_MODE_NAND:
+#if CONFIG_IS_ENABLED(ENV_IS_IN_MTD)
+		/*load env from nand bootfs*/
+		const char *bootfs_name = BOOTFS_NAME ;
+		char cmd[128];
+
+		if (!bootfs_name) {
+			pr_err("bootfs not set\n");
+			return;
+		}
+
+		/* Parse mtdparts to find the partition containing the BOOTFS_NAME volume */
+		char *mtd_partition   = parse_mtdparts_and_find_bootfs();
+		if (!mtd_partition  ) {
+			pr_err("Bootfs not found in any partition\n");
+			return;
+		}
+
+		sprintf(cmd, "ubifsmount ubi0:%s", bootfs_name);
+		if (run_command(cmd, 0)) {
+			pr_err("Cannot mount ubifs partition '%s'\n", bootfs_name);
+			return;
+		}
+
+		sprintf(cmd, "ubifsload 0x%x env_%s.txt", CONFIG_SPL_LOAD_FIT_ADDRESS, CONFIG_SYS_CONFIG_NAME);
+		if (run_command(cmd, 0)) {
+			pr_err("Failed to load env_%s.txt from bootfs\n", CONFIG_SYS_CONFIG_NAME);
+			return;
+		}
+
+		memset(cmd, '\0', 128);
+		sprintf(cmd, "env import -t 0x%x", CONFIG_SPL_LOAD_FIT_ADDRESS);
+		if (!run_command(cmd, 0)) {
+			pr_err("Imported environment from 'env_k1-x.txt'\n");
+		}
+#endif
+		break;
+	case BOOT_MODE_NOR:
+#ifdef CONFIG_FASTBOOT_SUPPORT_BLOCK_DEV_NAME
+		struct blk_desc *dev_desc;
+
+		/*nvme need scan at first*/
+		if (!strncmp("nvme", CONFIG_FASTBOOT_SUPPORT_BLOCK_DEV_NAME, 4)
+						&& run_command("nvme scan", 0)){
+			pr_err("can not find any nvme devices!\n");
+			return;
+		}
+
+		if (strlen(CONFIG_FASTBOOT_SUPPORT_BLOCK_DEV_NAME) > 0){
+			/* First try partition names on the default device */
+			dev_desc = blk_get_dev(CONFIG_FASTBOOT_SUPPORT_BLOCK_DEV_NAME,
+								CONFIG_FASTBOOT_SUPPORT_BLOCK_DEV_INDEX);
+			if (dev_desc) {
+				_load_env_from_blk(dev_desc, CONFIG_FASTBOOT_SUPPORT_BLOCK_DEV_NAME,
+							CONFIG_FASTBOOT_SUPPORT_BLOCK_DEV_INDEX);
+			}
+	}
+#endif
+		break;
+	case BOOT_MODE_EMMC:
+	case BOOT_MODE_SD:
+#ifdef CONFIG_MMC
+		int dev;
+		struct mmc *mmc;
+
+		dev = mmc_get_env_dev();
+		mmc = find_mmc_device(dev);
+		if (!mmc) {
+			pr_err("Cannot find mmc device\n");
+			return;
+		}
+		if (mmc_init(mmc)){
+			return;
+		}
+
+		_load_env_from_blk(mmc_get_blk_desc(mmc), "mmc", dev);
+		break;
+#endif
+	default:
+		break;
+	}
+	return;
+}
+
+void run_cardfirmware_flash_command(void)
+{
+	struct mmc *mmc;
+	struct disk_partition info;
+	int part_dev, err;
+	char cmd[128] = {"\0"};
+
+#ifdef CONFIG_MMC
+	mmc = find_mmc_device(MMC_DEV_SD);
+	if (!mmc)
+		return;
+	if (mmc_init(mmc))
+		return;
+
+	for (part_dev = 1; part_dev <= MAX_SEARCH_PARTITIONS; part_dev++) {
+		err = part_get_info(mmc_get_blk_desc(mmc), part_dev, &info);
+		if (err)
+			continue;
+		if (!strcmp(BOOTFS_NAME, info.name))
+			break;
+
+	}
+
+	if (part_dev > MAX_SEARCH_PARTITIONS)
+		return;
+
+	/*check if flash config file is in sd card*/
+	sprintf(cmd, "fatsize mmc %d:%d %s", MMC_DEV_SD, part_dev, FLASH_CONFIG_FILE_NAME);
+	pr_debug("cmd:%s\n", cmd);
+	if (!run_command(cmd, 0))
+		run_command("spacemit_flashing mmc", 0);
+#endif
+	return;
+}
+
+void setenv_boot_mode(void)
+{
+	u32 boot_mode = get_boot_mode();
+	switch (boot_mode) {
+	case BOOT_MODE_NAND:
+		env_set("boot_device", "nand");
+		break;
+	case BOOT_MODE_NOR:
+		env_set("boot_device", "nor");
+#ifdef CONFIG_FASTBOOT_SUPPORT_BLOCK_DEV_NAME
+		env_set("boot_devnum", simple_itoa(CONFIG_FASTBOOT_SUPPORT_BLOCK_DEV_INDEX));
+#endif
+		break;
+	case BOOT_MODE_EMMC:
+		env_set("boot_device", "mmc");
+		env_set("boot_devnum", simple_itoa(MMC_DEV_EMMC));
+		break;
+	case BOOT_MODE_SD:
+		env_set("boot_device", "mmc");
+		env_set("boot_devnum", simple_itoa(MMC_DEV_SD));
+		break;
+	default:
+		env_set("boot_device", "");
+		break;
+	}
+}
+
+void read_from_eeprom(struct tlvinfo_tlv **tlv_data, u8 tcode)
+{
+	static u8 eeprom_data[256];
+	struct tlvinfo_header *tlv_hdr = NULL;
+	struct tlvinfo_tlv *tlv_entry;
+	unsigned int tlv_offset, tlv_len;
+	int ret = 0;
+
+	ret = read_tlvinfo_tlv_eeprom(eeprom_data, &tlv_hdr, &tlv_entry, 0);
+	if (ret < 0) {
+		pr_err("read tlvinfo from eeprom failed!\n");
+		return;
+	}
+
+	tlv_offset = sizeof(struct tlvinfo_header);
+	tlv_len = sizeof(struct tlvinfo_header) + be16_to_cpu(tlv_hdr->totallen);
+	while (tlv_offset < tlv_len) {
+		tlv_entry = (struct tlvinfo_tlv *)&eeprom_data[tlv_offset];
+		if (tlv_entry->type == tcode) {
+			*tlv_data = tlv_entry;
+			return;
+		}
+
+		tlv_offset += sizeof(struct tlvinfo_tlv) + tlv_entry->length;
+	}
+
+	*tlv_data = NULL;
+	return;
+}
+
+void set_env_ethaddr(void)
+{
+	int ret = 0, ethaddr_valid = 0, eth1addr_valid = 0;
+	uint8_t mac_addr[6], mac1_addr[6];
+	char cmd_str[128] = {0};
+
+	/* get mac address from eeprom */
+	ret = mac_read_from_eeprom();
+	if (ret < 0) {
+		pr_err("read mac address from eeprom failed!\n");
+		return ;
+	}
+
+	/* check ethaddr valid */
+	ethaddr_valid = eth_env_get_enetaddr("ethaddr", mac_addr);
+	eth1addr_valid = eth_env_get_enetaddr("eth1addr", mac1_addr);
+	if (ethaddr_valid && eth1addr_valid) {
+		pr_info("valid ethaddr: %02x:%02x:%02x:%02x:%02x:%02x\n",
+			mac_addr[0], mac_addr[1], mac_addr[2],
+			mac_addr[3], mac_addr[4], mac_addr[5]);
+		return ;
+	}
+
+	/*create random ethaddr*/
+	net_random_ethaddr(mac_addr);
+	mac_addr[0] = 0xfe;
+	mac_addr[1] = 0xfe;
+	mac_addr[2] = 0xfe;
+
+	memcpy(mac1_addr, mac_addr, sizeof(mac1_addr));
+	mac1_addr[5] = mac_addr[5] + 1;
+
+	/* write to env ethaddr and eth1addr */
+	eth_env_set_enetaddr("ethaddr", mac_addr);
+	eth_env_set_enetaddr("eth1addr", mac1_addr);
+
+	/* save mac address to eeprom */
+	snprintf(cmd_str, (sizeof(cmd_str) - 1), "tlv_eeprom set 0x24 %02x:%02x:%02x:%02x:%02x:%02x", \
+			mac_addr[0], mac_addr[1], mac_addr[2], mac_addr[3], mac_addr[4], mac_addr[5]);
+	run_command(cmd_str, 0);
+
+	memset(cmd_str, 0, sizeof(cmd_str));
+	snprintf(cmd_str, (sizeof(cmd_str) - 1), "tlv_eeprom set 0x2A 2");
+	run_command(cmd_str, 0);
+
+	memset(cmd_str, 0, sizeof(cmd_str));
+	snprintf(cmd_str, (sizeof(cmd_str) - 1), "tlv_eeprom write");
+	run_command(cmd_str, 0);
+}
+
+void set_dev_serial_no(void)
+{
+	u8 sn[6] = {0};
+	char cmd_str[128] = {0};
+	struct tlvinfo_tlv *tlv_entry = NULL;
+	int i = 0;
+	unsigned int seed = 0;
+
+	read_from_eeprom(&tlv_entry, TLV_CODE_SERIAL_NUMBER);
+	if (tlv_entry && tlv_entry->length == 12) {
+			if (tlv_entry->value[0] | tlv_entry->value[1] | tlv_entry->value[2] |
+				tlv_entry->value[3] | tlv_entry->value[4] | tlv_entry->value[5] |
+				tlv_entry->value[6] | tlv_entry->value[7] | tlv_entry->value[8] |
+				tlv_entry->value[9] | tlv_entry->value[10] | tlv_entry->value[11]) {
+				pr_err("Serial number is valid.\n");
+				return ;
+			}
+	}
+
+	pr_info("Generate rand serial number:\n");
+	/* Generate rand serial number */
+	seed = get_ticks();
+	for (i = 0; i < 6; i++) {
+		sn[i] = rand_r(&seed);
+		pr_info("%02x", sn[i]);
+	}
+	pr_info("\n");
+
+	/* save serial number to eeprom */
+	snprintf(cmd_str, (sizeof(cmd_str) - 1), "tlv_eeprom set 0x23 %02x%02x%02x%02x%02x%02x", \
+			sn[0], sn[1], sn[2], sn[3], sn[4], sn[5]);
+	run_command(cmd_str, 0);
+
+	memset(cmd_str, 0, sizeof(cmd_str));
+	snprintf(cmd_str, (sizeof(cmd_str) - 1), "tlv_eeprom write");
+	run_command(cmd_str, 0);
+}
+
+struct code_desc_info {
+	u8	m_code;
+	char	*m_name;
+};
+
+void refresh_config_info(void)
+{
+	struct tlvinfo_tlv *tlv_info = NULL;
+	char *strval;
+	int i;
+
+	struct code_desc_info info[] = {
+		{ TLV_CODE_PRODUCT_NAME,   "product_name"},
+		{ TLV_CODE_SERIAL_NUMBER,  "serial#"},
+		{ TLV_CODE_MANUF_DATE,     "manufacture_date"},
+		{ TLV_CODE_MANUF_NAME,     "manufacturer"},
+	};
+
+	for (i = 0; i < ARRAY_SIZE(info); i++){
+		read_from_eeprom(&tlv_info, info[i].m_code);
+		if (tlv_info == NULL){
+			pr_err("can not find tlv data:%s\n", info[i].m_name);
+			continue;
+		}
+
+		strval = malloc(tlv_info->length + 1);
+		memset(strval, 0, tlv_info->length + 1);
+		strncpy(strval, tlv_info->value, tlv_info->length);
+		env_set(info[i].m_name, strval);
+		free(strval);
+	}
+
+	struct code_desc_info version[] = {
+		{ TLV_CODE_DEVICE_VERSION, "device_version"},
+		{ 0x40,                    "sdk_version"},
+	};
+
+	strval = malloc(64);
+	for (i = 0; i < ARRAY_SIZE(version); i++){
+		read_from_eeprom(&tlv_info, version[i].m_code);
+		if (tlv_info == NULL){
+			pr_err("can not find tlv data:%s\n", version[i].m_name);
+			continue;
+		}
+
+		memset(strval, 0, 64);
+		sprintf(strval, "%d", *tlv_info->value);
+		env_set(version[i].m_name, strval);
+	}
+	free(strval);
+}
+
+int board_init(void)
+{
+#ifdef CONFIG_DM_REGULATOR_SPM8XX
+	int ret;
+
+	ret = regulators_enable_boot_on(true);
+	if (ret)
+		pr_debug("%s: Cannot enable boot on regulator\n", __func__);
+#endif
+	return 0;
+}
+
+int board_late_init(void)
+{
+	ulong kernel_start;
+	ofnode chosen_node;
+	char ram_size_str[16] = {"\0"};
+	int ret;
+
+	if (IS_ENABLED(CONFIG_SYSRESET_SPACEMIT))
+		device_bind_driver(gd->dm_root, "spacemit_sysreset",
+					"spacemit_sysreset", NULL);
+
+	set_env_ethaddr();
+	set_dev_serial_no();
+
+	/*read from eeprom and update info to env*/
+	refresh_config_info();
+
+	run_fastboot_command();
+
+	run_cardfirmware_flash_command();
+
+	ret = run_uboot_shell();
+	if (!ret) {
+		pr_info("reboot into uboot shell\n");
+		return 0;
+	}
+
+	/*import env.txt from bootfs*/
+	import_env_from_bootfs();
+
+#ifdef CONFIG_DISPLAY_SPACEMIT_HDMI
+	if (is_hdmi_connected < 0) {
+		env_set("stdout", "serial");
+	}
+#endif
+
+	setenv_boot_mode();
+
+	/*read from eeprom and update info to env*/
+	refresh_config_info();
+
+	/*save ram size to env, transfer to MB*/
+	sprintf(ram_size_str, "mem=%dMB", (int)(gd->ram_size / SZ_1MB));
+	env_set("ram_size", ram_size_str);
+
+	chosen_node = ofnode_path("/chosen");
+	if (!ofnode_valid(chosen_node)) {
+		pr_debug("No chosen node found, can't get kernel start address\n");
+		return 0;
+	}
+
+	ret = ofnode_read_u64(chosen_node, "riscv,kernel-start",
+				  (u64 *)&kernel_start);
+	if (ret) {
+		pr_debug("Can't find kernel start address in device tree\n");
+		return 0;
+	}
+
+	env_set_hex("kernel_start", kernel_start);
+
+	return 0;
+}
+
+void *board_fdt_blob_setup(int *err)
+{
+	*err = 0;
+
+	/* Stored the DTB address there during our init */
+	if (IS_ENABLED(CONFIG_OF_SEPARATE) || IS_ENABLED(CONFIG_OF_BOARD)) {
+		if (gd->arch.firmware_fdt_addr){
+			if (!fdt_check_header((void *)(ulong)gd->arch.firmware_fdt_addr)){
+				return (void *)(ulong)gd->arch.firmware_fdt_addr;
+			}
+		}
+	}
+	return (ulong *)&_end;
+}
+
+enum env_location env_get_location(enum env_operation op, int prio)
+{
+	if (prio >= 1)
+		return ENVL_UNKNOWN;
+
+	u32 boot_mode = get_boot_mode();
+	switch (boot_mode) {
+#ifdef CONFIG_ENV_IS_IN_MTD
+	case BOOT_MODE_NAND:
+		return ENVL_MTD;
+#endif
+#ifdef CONFIG_ENV_IS_IN_NAND
+	case BOOT_MODE_NAND:
+		return ENVL_NAND;
+#endif
+#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
+	case BOOT_MODE_NOR:
+		return ENVL_SPI_FLASH;
+#endif
+#ifdef CONFIG_ENV_IS_IN_MMC
+	case BOOT_MODE_EMMC:
+	case BOOT_MODE_SD:
+		return ENVL_MMC;
+#endif
+	default:
+#ifdef CONFIG_ENV_IS_NOWHERE
+		return ENVL_NOWHERE;
+#else
+		return ENVL_UNKNOWN;
+#endif
+	}
+}
+
+int misc_init_r(void)
+{
+#ifdef CONFIG_DYNAMIC_DDR_CLK_FREQ
+	int ret;
+
+	ret = ddr_freq_max();
+	if(ret < 0) {
+		pr_debug("%s: Try to adjust ddr freq failed!\n", __func__);
+		return ret;
+	}
+#endif
+
+	return 0;
+}
+
+int dram_init(void)
+{
+	u64 dram_size = (u64)ddr_get_density() * SZ_1MB;
+
+	gd->ram_base = CONFIG_SYS_SDRAM_BASE;
+	gd->ram_size = dram_size;
+
+	return 0;
+}
+
+int dram_init_banksize(void)
+{
+	u64 dram_size = (u64)ddr_get_density() * SZ_1MB;
+
+	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	if(dram_size > SZ_2GB) {
+		gd->bd->bi_dram[0].size = SZ_2G;
+		gd->bd->bi_dram[1].start = 0x100000000;
+		gd->bd->bi_dram[1].size = dram_size - SZ_2G;
+	} else {
+		gd->bd->bi_dram[0].size = dram_size;
+		gd->bd->bi_dram[1].start = 0;
+		gd->bd->bi_dram[1].size = 0;
+	}
+
+	return 0;
+}
+
+ulong board_get_usable_ram_top(ulong total_size)
+{
+	u64 dram_size = (u64)ddr_get_density() * SZ_1MB;
+
+		/* Some devices (like the EMAC) have a 32-bit DMA limit. */
+	if(dram_size > SZ_2GB) {
+		return 0x80000000;
+	} else {
+		return dram_size;
+	}
+}
+
+#if !defined(CONFIG_SPL_BUILD)
+int board_fit_config_name_match(const char *name)
+{
+	char *product_name = env_get("product_name");
+
+	if ((NULL != product_name) && (0 == strcmp(product_name, name))) {
+		pr_debug("Boot from fit configuration %s\n", name);
+		return 0;
+	}
+	else
+		return -1;
+}
+#endif

board/spacemit/k1-x/spl.c

@@ -0,0 +1,407 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2023 Spacemit, Inc
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <init.h>
+#include <spl.h>
+#include <misc.h>
+#include <log.h>
+#include <i2c.h>
+#include <linux/io.h>
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <env.h>
+#include <env_internal.h>
+#include <mapmem.h>
+#include <asm/global_data.h>
+#include <fb_spacemit.h>
+#include <tlv_eeprom.h>
+#include <stdlib.h>
+
+#define GEN_CNT			(0xD5001000)
+#define STORAGE_API_P_ADDR	(0xC0838498)
+#define SDCARD_API_ENTRY	(0xFFE0A548)
+
+/* pin mux */
+#define MUX_MODE0       0
+#define MUX_MODE1       1
+#define MUX_MODE2       2
+#define MUX_MODE3       3
+#define MUX_MODE4       4
+#define MUX_MODE5       5
+#define MUX_MODE6       6
+#define MUX_MODE7       7
+
+/* edge detect */
+#define EDGE_NONE       (1 << 6)
+#define EDGE_RISE       (1 << 4)
+#define EDGE_FALL       (1 << 5)
+#define EDGE_BOTH       (3 << 4)
+
+/* driver strength*/
+#define PAD_1V8_DS0     (0 << 11)
+#define PAD_1V8_DS1     (1 << 11)
+#define PAD_1V8_DS2     (2 << 11)
+#define PAD_1V8_DS3     (3 << 11)
+
+/*
+ * notice: !!!
+ * ds2 ---> bit10, ds1 ----> bit12, ds0 ----> bit11
+*/
+#define PAD_3V_DS0      (0 << 10)     /* bit[12:10] 000 */
+#define PAD_3V_DS1      (2 << 10)     /* bit[12:10] 010 */
+#define PAD_3V_DS2      (4 << 10)     /* bit[12:10] 100 */
+#define PAD_3V_DS3      (6 << 10)     /* bit[12:10] 110 */
+#define PAD_3V_DS4      (1 << 10)     /* bit[12:10] 001 */
+#define PAD_3V_DS5      (3 << 10)     /* bit[12:10] 011 */
+#define PAD_3V_DS6      (5 << 10)     /* bit[12:10] 101 */
+#define PAD_3V_DS7      (7 << 10)     /* bit[12:10] 111 */
+
+/* pull up/down */
+#define PULL_DIS        (0 << 13)     /* bit[15:13] 000 */
+#define PULL_UP         (6 << 13)     /* bit[15:13] 110 */
+#define PULL_DOWN       (5 << 13)     /* bit[15:13] 101 */
+
+#define MFPR_MMC1_BASE     0xD401E1B8
+#define MMC1_DATA3_OFFSET  0x00
+#define MMC1_DATA2_OFFSET  0x04
+#define MMC1_DATA1_OFFSET  0x08
+#define MMC1_DATA0_OFFSET  0x0C
+#define MMC1_CMD_OFFSET    0x10
+#define MMC1_CLK_OFFSET    0x14
+
+extern int k1x_eeprom_init(void);
+extern int spacemit_eeprom_read(uint8_t chip, uint8_t *buffer, uint8_t id);
+char *product_name;
+
+int timer_init(void)
+{
+	/* enable generic cnt */
+	u32 read_data;
+	void __iomem *reg;
+
+	reg = ioremap(GEN_CNT, 0x20);
+	read_data = readl(reg);
+	read_data |= BIT(0);
+	writel(read_data, reg);
+
+	return 0;
+}
+
+enum board_boot_mode get_boot_storage(void)
+{
+	size_t *api = (size_t*)STORAGE_API_P_ADDR;
+	size_t address = *api;
+	// Did NOT select sdcard boot, but sdcard always has first boot priority
+	if (SDCARD_API_ENTRY == address)
+		return BOOT_MODE_SD;
+	else
+		return get_boot_pin_select();
+}
+
+void fix_boot_mode(void)
+{
+	if (0 == readl((void *)BOOT_DEV_FLAG_REG))
+		set_boot_mode(get_boot_storage());
+}
+
+void board_pinctrl_setup(void)
+{
+	//sdcard pinctrl setup
+	writel(MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4, (void __iomem *)MFPR_MMC1_BASE + MMC1_DATA3_OFFSET);
+	writel(MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4, (void __iomem *)MFPR_MMC1_BASE + MMC1_DATA2_OFFSET);
+	writel(MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4, (void __iomem *)MFPR_MMC1_BASE + MMC1_DATA1_OFFSET);
+	writel(MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4, (void __iomem *)MFPR_MMC1_BASE + MMC1_DATA0_OFFSET);
+	writel(MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4, (void __iomem *)MFPR_MMC1_BASE + MMC1_CMD_OFFSET);
+	writel(MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_3V_DS4, (void __iomem *)MFPR_MMC1_BASE + MMC1_CLK_OFFSET);
+}
+
+#if CONFIG_IS_ENABLED(SPACEMIT_K1X_EFUSE)
+int load_board_config_from_efuse(int *eeprom_i2c_index,
+				 int *eeprom_pin_group, int *pmic_type)
+{
+	struct udevice *dev;
+	uint8_t fuses[2];
+	int ret;
+
+	/* retrieve the device */
+	ret = uclass_get_device_by_driver(UCLASS_MISC,
+			DM_DRIVER_GET(spacemit_k1x_efuse), &dev);
+	if (ret) {
+		return ret;
+	}
+
+	// read from efuse, each bank has 32byte efuse data
+	ret = misc_read(dev, 9 * 32 + 0, fuses, sizeof(fuses));
+	if ((0 == ret) && (0 != fuses[0])) {
+		// byte0 bit0~3 is eeprom i2c controller index
+		*eeprom_i2c_index = fuses[0] & 0x0F;
+		// byte0 bit4~5 is eeprom pin group index
+		*eeprom_pin_group = (fuses[0] >> 4) & 0x03;
+		// byte1 bit0~3 is pmic type
+		*pmic_type = fuses[1] & 0x0F;
+	}
+
+	return ret;
+}
+#endif
+
+static void load_default_board_config(int *eeprom_i2c_index,
+		int *eeprom_pin_group, int *pmic_type)
+{
+	char *temp;
+
+	temp = env_get("eeprom_i2c_index");
+	if (NULL != temp)
+		*eeprom_i2c_index = dectoul(temp, NULL);
+	else
+		*eeprom_i2c_index = K1_DEFALT_EEPROM_I2C_INDEX;
+
+	temp = env_get("eeprom_pin_group");
+	if (NULL != temp)
+		*eeprom_pin_group = dectoul(temp, NULL);
+	else
+		*eeprom_pin_group = K1_DEFALT_EEPROM_PIN_GROUP;
+
+	temp = env_get("pmic_type");
+	if (NULL != temp)
+		*pmic_type = dectoul(temp, NULL);
+	else
+		*pmic_type = K1_DEFALT_PMIC_TYPE;
+}
+
+#if CONFIG_IS_ENABLED(SPACEMIT_POWER)
+extern int board_pmic_init(void);
+#endif
+
+void load_board_config(int *eeprom_i2c_index, int *eeprom_pin_group, int *pmic_type)
+{
+	load_default_board_config(eeprom_i2c_index, eeprom_pin_group, pmic_type);
+
+#if CONFIG_IS_ENABLED(SPACEMIT_K1X_EFUSE)
+	/* update env from efuse data */
+	load_board_config_from_efuse(eeprom_i2c_index, eeprom_pin_group, pmic_type);
+#endif
+
+	pr_debug("eeprom_i2c_index :%d\n", *eeprom_i2c_index);
+	pr_debug("eeprom_pin_group :%d\n", *eeprom_pin_group);
+	pr_debug("pmic_type :%d\n", *pmic_type);
+}
+
+int spl_board_init_f(void)
+{
+	int ret;
+	struct udevice *dev;
+
+#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
+	/* init i2c */
+	i2c_init_board();
+#endif
+
+#if CONFIG_IS_ENABLED(SPACEMIT_POWER)
+	board_pmic_init();
+#endif
+
+	/* DDR init */
+	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+	if (ret) {
+		pr_err("DRAM init failed: %d\n", ret);
+		return ret;
+	}
+
+	timer_init();
+
+	return 0;
+}
+
+void board_init_f(ulong dummy)
+{
+	int ret;
+
+	// fix boot mode after boot rom
+	fix_boot_mode();
+
+	// setup pinctrl
+	board_pinctrl_setup();
+
+	ret = spl_early_init();
+	if (ret)
+		panic("spl_early_init() failed: %d\n", ret);
+
+	riscv_cpu_setup(NULL, NULL);
+
+	preloader_console_init();
+	pr_debug("boot_mode: %x\n", get_boot_mode());
+
+	ret = spl_board_init_f();
+	if (ret)
+		panic("spl_board_init_f() failed: %d\n", ret);
+}
+
+#ifdef CONFIG_SPL_LOAD_FIT
+int board_fit_config_name_match(const char *name)
+{
+	char *buildin_name;
+
+	buildin_name = product_name;
+	if (NULL == buildin_name)
+		buildin_name = env_get("product_name");
+
+	if ((NULL != buildin_name) && (0 == strcmp(buildin_name, name))) {
+		pr_debug("Boot from fit configuration %s\n", name);
+		return 0;
+	}
+	else
+		return -1;
+}
+#endif
+
+static struct env_driver *_spl_env_driver_lookup(enum env_location loc)
+{
+	struct env_driver *drv;
+	const int n_ents = ll_entry_count(struct env_driver, env_driver);
+	struct env_driver *entry;
+
+	drv = ll_entry_start(struct env_driver, env_driver);
+	for (entry = drv; entry != drv + n_ents; entry++) {
+		if (loc == entry->location)
+			return entry;
+	}
+
+	/* Not found */
+	return NULL;
+}
+
+static struct env_driver *spl_env_driver_lookup(enum env_operation op, enum env_location loc)
+{
+	struct env_driver *drv;
+
+	if (loc == ENVL_UNKNOWN)
+		return NULL;
+
+	drv = _spl_env_driver_lookup(loc);
+	if (!drv) {
+		pr_debug("%s: No environment driver for location %d\n", __func__, loc);
+		return NULL;
+	}
+
+	return drv;
+}
+
+static void spl_load_env(void)
+{
+	struct env_driver *drv;
+	int ret = -1;
+	u32 boot_mode = get_boot_mode();
+
+	/*if boot from usb, spl should not find env*/
+	if (boot_mode == BOOT_MODE_USB){
+		return;
+	}
+
+	/*
+	only load env from mtd dev, because only mtd dev need
+	env mtdparts info to load image.
+	*/
+	enum env_location loc = ENVL_UNKNOWN;
+	switch (boot_mode) {
+#ifdef CONFIG_ENV_IS_IN_NAND
+	case BOOT_MODE_NAND:
+		loc = ENVL_NAND;
+		break;
+#endif
+#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
+	case BOOT_MODE_NOR:
+		loc = ENVL_SPI_FLASH;
+		break;
+#endif
+#ifdef CONFIG_ENV_IS_IN_MTD
+	case BOOT_MODE_NAND:
+	case BOOT_MODE_NOR:
+		loc = ENVL_MTD;
+		break;
+#endif
+	default:
+		return;
+	}
+
+	drv = spl_env_driver_lookup(ENVOP_INIT, loc);
+	if (!drv){
+		pr_err("%s, can not load env from storage\n", __func__);
+		return;
+	}
+
+	ret = drv->load();
+	if (!ret){
+		pr_info("has init env successful\n");
+	}else{
+		pr_err("load env from storage fail, would use default env\n");
+		/*if load env from storage fail, it should not write bootmode to reg*/
+		boot_mode = BOOT_MODE_NONE;
+	}
+}
+
+char *get_product_name(void)
+{
+	char *name = NULL;
+	int eeprom_addr;
+
+	eeprom_addr = k1x_eeprom_init();
+	name = calloc(1, 64);
+	if ((eeprom_addr >= 0) && (NULL != name) && (0 == spacemit_eeprom_read(
+		eeprom_addr, name, TLV_CODE_PRODUCT_NAME))) {
+		pr_info("Get product name from eeprom %s\n", name);
+		return name;
+	}
+
+	if (NULL != name)
+		free(name);
+
+	pr_debug("Use default product name %s\n", env_get("product_name"));
+	return NULL;
+}
+
+void spl_board_init(void)
+{
+	/*load env*/
+	spl_load_env();
+	product_name = get_product_name();
+}
+
+struct image_header *spl_get_load_buffer(ssize_t offset, size_t size)
+{
+	return map_sysmem(CONFIG_SPL_LOAD_FIT_ADDRESS, 0);
+}
+
+void board_boot_order(u32 *spl_boot_list)
+{
+	u32 boot_mode = get_boot_mode();
+	pr_debug("boot_mode:%x\n", boot_mode);
+	if (boot_mode == BOOT_MODE_USB){
+		spl_boot_list[0] = BOOT_DEVICE_BOARD;
+	}else{
+		switch (boot_mode) {
+		case BOOT_MODE_EMMC:
+			spl_boot_list[0] = BOOT_DEVICE_MMC2;
+			break;
+		case BOOT_MODE_NAND:
+			spl_boot_list[0] = BOOT_DEVICE_NAND;
+			break;
+		case BOOT_MODE_NOR:
+			spl_boot_list[0] = BOOT_DEVICE_NOR;
+			break;
+		case BOOT_MODE_SD:
+			spl_boot_list[0] = BOOT_DEVICE_MMC1;
+			break;
+		default:
+			spl_boot_list[0] = BOOT_DEVICE_RAM;
+			break;
+		}
+
+		//reserve for debug/test to load/run uboot from ram.
+		spl_boot_list[1] = BOOT_DEVICE_RAM;
+	}
+}

board/spacemit/k1-x/splash.c

@@ -0,0 +1,160 @@
+#include <common.h>
+#include <dm.h>
+#include <env.h>
+#include <image.h>
+#include <splash.h>
+#include <mmc.h>
+#include <fb_spacemit.h>
+
+
+#if defined(CONFIG_SPLASH_SCREEN) && defined(CONFIG_CMD_BMP)
+
+void set_emmc_splash_location(struct splash_location *locations) {
+	int dev_index = mmc_get_env_dev();
+	int part_index;
+	char devpart_str[16];
+
+	if (get_partition_index_by_name(BOOTFS_NAME, &part_index) < 0) {
+		pr_err("Failed to get partition index for %s\n", BOOTFS_NAME);
+		return;
+	}
+
+	snprintf(devpart_str, sizeof(devpart_str), "%d:%d", dev_index, part_index);
+
+	locations[0].name = "emmc_fs";
+	locations[0].storage = SPLASH_STORAGE_MMC;
+	locations[0].flags = SPLASH_STORAGE_FS;
+	locations[0].devpart = strdup(devpart_str);
+}
+
+void set_mmc_splash_location(struct splash_location *locations) {
+	int dev_index = mmc_get_env_dev();
+	int part_index;
+	char devpart_str[16];
+
+	if (get_partition_index_by_name(BOOTFS_NAME, &part_index) < 0) {
+		pr_err("Failed to get partition index for %s\n", BOOTFS_NAME);
+		return;
+	}
+
+	snprintf(devpart_str, sizeof(devpart_str), "%d:%d", dev_index, part_index);
+
+	locations[0].name = "mmc_fs";
+	locations[0].storage = SPLASH_STORAGE_MMC;
+	locations[0].flags = SPLASH_STORAGE_FS;
+	locations[0].devpart = strdup(devpart_str);
+}
+
+void set_nor_splash_location(struct splash_location *locations) {
+	struct blk_desc *dev_desc;
+	struct disk_partition info;
+	int err;
+	u32 part;
+	char devpart_str[16];
+
+	if (run_command("nvme scan", 0)) {
+		pr_err("Cannot scan NVMe devices!\n");
+		return;
+	}
+
+	dev_desc = blk_get_dev("nvme", CONFIG_FASTBOOT_SUPPORT_BLOCK_DEV_INDEX);
+	if (!dev_desc) {
+		pr_err("Cannot find NVMe device\n");
+		return;
+	}
+
+	for (part = 1; part <= MAX_SEARCH_PARTITIONS; part++) {
+		err = part_get_info(dev_desc, part, &info);
+		if (err) {
+			continue;
+		}
+
+		if (!strcmp(BOOTFS_NAME, info.name)) {
+			break;
+		}
+	}
+
+	if (part > MAX_SEARCH_PARTITIONS) {
+		pr_err("Failed to find bootfs on NOR\n");
+		return;
+	}
+
+	snprintf(devpart_str, sizeof(devpart_str), "%d:%d", CONFIG_FASTBOOT_SUPPORT_BLOCK_DEV_INDEX, part);
+
+	locations[0].name = "nvme_fs";
+	locations[0].storage = SPLASH_STORAGE_NVME;
+	locations[0].flags = SPLASH_STORAGE_FS;
+	locations[0].devpart = strdup(devpart_str);
+}
+
+void set_nand_splash_location(struct splash_location *locations)
+{
+	char *nand_part = parse_mtdparts_and_find_bootfs();
+	if (nand_part) {
+		locations[0].name = "nand_fs";
+		locations[0].storage = SPLASH_STORAGE_NAND;
+		locations[0].flags = SPLASH_STORAGE_FS;
+		locations[0].mtdpart = strdup(nand_part);
+		locations[0].ubivol = strdup(BOOTFS_NAME);
+	} else {
+		pr_err("Failed to find bootfs on NAND\n");
+	}
+}
+
+int load_splash_screen(void) {
+	enum board_boot_mode boot_mode = get_boot_mode();
+	struct splash_location splash_locations[1];
+
+	memset(splash_locations, 0, sizeof(splash_locations));
+
+	switch (boot_mode) {
+		case BOOT_MODE_EMMC:
+			set_emmc_splash_location(splash_locations);
+			break;
+		case BOOT_MODE_SD:
+			set_mmc_splash_location(splash_locations);
+			break;
+		case BOOT_MODE_NAND:
+			set_nand_splash_location(splash_locations);
+			break;
+		case BOOT_MODE_NOR:
+			set_nor_splash_location(splash_locations);
+			break;
+		default:
+			pr_err("Unsupported boot mode for splash screen\n");
+			break;
+	}
+
+	if (CONFIG_IS_ENABLED(SPLASH_SOURCE))
+		return splash_source_load(splash_locations, ARRAY_SIZE(splash_locations));
+
+	return splash_video_logo_load();
+}
+
+int splash_screen_prepare(void)
+{
+	enum board_boot_mode boot_mode = get_boot_mode();
+	switch (boot_mode) {
+	case BOOT_MODE_EMMC:
+		env_set("splashsource", "emmc_fs");
+		break;
+	case BOOT_MODE_SD:
+		env_set("splashsource", "mmc_fs");
+		break;
+	case BOOT_MODE_NAND:
+		env_set("splashsource", "nand_fs");
+		break;
+	case BOOT_MODE_NOR:
+		env_set("splashsource", "nvme_fs");
+		break;
+	case BOOT_MODE_SHELL:
+	case BOOT_MODE_USB:
+	default:
+		pr_err("Cannot support showing bootlogo in this boot mode!\n");
+		break;
+	}
+
+	return load_splash_screen();
+}
+
+#endif

boot/Kconfig

@@ -1190,6 +1190,13 @@ config AUTOBOOT_MENU_SHOW
 	  environmnent variable (if enabled) and before handling the boot delay.
 	  See README.bootmenu for more details.
 
+config BOOTMENU_KEY_ESC
+	bool "Use ESC key to enter the boot menu"
+	depends on AUTOBOOT_MENU_SHOW
+	help
+	  If this option is enabled, holding down the ESC key during boot will
+	  trigger the boot menu.
+
 config BOOTMENU_DISABLE_UBOOT_CONSOLE
 	bool "Disallow bootmenu to enter the U-Boot console"
 	depends on AUTOBOOT_MENU_SHOW

cmd/Kconfig

@@ -2625,4 +2625,21 @@ config MMC_SPEED_MODE_SET
 	  and is indicated using the index from enum bus_mode in
 	  include/mmc.h. A speed mode can be set only if it has already
 	  been enabled in the device tree.
+
+menu "spacemit commands"
+
+config SPACEMIT_FLASH
+	bool "enable spacemit flash behavior"
+	default n
+	help
+	  enable spacemit flash behavior, use for flashing function.
+
+config SPL_FASTBOOT
+	bool "Enable SPL Fastboot Mode"
+	default n
+	help
+	  Enable this option to enable fastboot in spl
+
+endmenu
+
 endmenu

cmd/Makefile

@@ -194,6 +194,8 @@ obj-$(CONFIG_CMD_ETHSW) += ethsw.o
 obj-$(CONFIG_CMD_AXI) += axi.o
 obj-$(CONFIG_CMD_PVBLOCK) += pvblock.o
 
+obj-$(CONFIG_SPACEMIT_FLASH) += spacemit_flash.o
+
 # Power
 obj-$(CONFIG_CMD_PMIC) += pmic.o
 obj-$(CONFIG_CMD_REGULATOR) += regulator.o

cmd/bootmenu.c

@@ -424,7 +424,7 @@ static void menu_display_statusline(struct menu *m)
 	printf(ANSI_CURSOR_POSITION, menu->count + 5, 1);
 	puts(ANSI_CLEAR_LINE);
 	printf(ANSI_CURSOR_POSITION, menu->count + 6, 3);
-	puts("Press UP/DOWN to move, ENTER to select, ESC/CTRL+C to quit");
+	puts("Press UP/DOWN to move, ENTER to select, CTRL+C to quit");
 	puts(ANSI_CLEAR_LINE_TO_END);
 	printf(ANSI_CURSOR_POSITION, menu->count + 7, 1);
 	puts(ANSI_CLEAR_LINE);
@@ -581,6 +581,24 @@ cleanup:
 int menu_show(int bootdelay)
 {
 	int ret;
+#ifdef CONFIG_BOOTMENU_KEY_ESC
+	ret = run_command("usb start", 0);
+	if (ret != 0) {
+		printf("Error: Failed to execute 'usb start'\n");
+	}
+
+	if (tstc()) {
+		int key = fgetc(stdin);
+		/* 0x1B is the ASCII code for 'Esc' */
+		if (key == 0x1B){
+			printf("Enter boot menu\n");
+		}else{
+			return 0;
+		}
+	}
+	else
+		return 0;
+#endif
 
 	while (1) {
 		ret = bootmenu_show(bootdelay);

cmd/mtd.c

@@ -253,7 +253,8 @@ static int do_mtd_io(struct cmd_tbl *cmdtp, int flag, int argc,
 	bool dump, read, raw, woob, write_empty_pages, has_pages = false;
 	u64 start_off, off, len, remaining, default_len;
 	struct mtd_oob_ops io_op = {};
-	uint user_addr = 0, npages;
+	uint npages;
+	u64 user_addr = 0;
 	const char *cmd = argv[0];
 	struct mtd_info *mtd;
 	u32 oob_len;

cmd/nvedit.c

@@ -118,7 +118,7 @@ static int env_print(char *name, int flag)
 	}
 
 	/* should never happen */
-	printf("## Error: cannot export environment\n");
+	pr_err("## Error: cannot export environment\n");
 	return 0;
 }
 
@@ -145,7 +145,7 @@ static int do_env_print(struct cmd_tbl *cmdtp, int flag, int argc,
 		rcode = env_print(NULL, env_flag);
 		if (!rcode)
 			return 1;
-		printf("\nEnvironment size: %d/%ld bytes\n",
+		pr_debug("\nEnvironment size: %d/%ld bytes\n",
 			rcode, (ulong)ENV_SIZE);
 		return 0;
 	}
@@ -155,7 +155,7 @@ static int do_env_print(struct cmd_tbl *cmdtp, int flag, int argc,
 	for (i = 1; i < argc; ++i) {
 		int rc = env_print(argv[i], env_flag);
 		if (!rc) {
-			printf("## Error: \"%s\" not defined\n", argv[i]);
+			pr_err("## Error: \"%s\" not defined\n", argv[i]);
 			++rcode;
 		}
 	}
@@ -255,7 +255,7 @@ static int _do_env_set(int flag, int argc, char *const argv[], int env_flag)
 	name = argv[1];
 
 	if (strchr(name, '=')) {
-		printf("## Error: illegal character '='"
+		pr_err("## Error: illegal character '='"
 		       "in variable name \"%s\"\n", name);
 		return 1;
 	}
@@ -278,7 +278,7 @@ static int _do_env_set(int flag, int argc, char *const argv[], int env_flag)
 
 	value = malloc(len);
 	if (value == NULL) {
-		printf("## Can't malloc %d bytes\n", len);
+		pr_err("## Can't malloc %d bytes\n", len);
 		return 1;
 	}
 	for (i = 2, s = value; i < argc; ++i) {
@@ -296,7 +296,7 @@ static int _do_env_set(int flag, int argc, char *const argv[], int env_flag)
 	hsearch_r(e, ENV_ENTER, &ep, &env_htab, env_flag);
 	free(value);
 	if (!ep) {
-		printf("## Error inserting \"%s\" variable, errno=%d\n",
+		pr_err("## Error inserting \"%s\" variable, errno=%d\n",
 			name, errno);
 		return 1;
 	}
@@ -411,7 +411,7 @@ int do_env_ask(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 static int print_static_binding(const char *var_name, const char *callback_name,
 				void *priv)
 {
-	printf("\t%-20s %-20s\n", var_name, callback_name);
+	pr_debug("\t%-20s %-20s\n", var_name, callback_name);
 
 	return 0;
 }
@@ -440,9 +440,9 @@ static int print_active_callback(struct env_entry *entry)
 
 	if (i == num_callbacks)
 		/* this should probably never happen, but just in case... */
-		printf("\t%-20s %p\n", entry->key, entry->callback);
+		pr_debug("\t%-20s %p\n", entry->key, entry->callback);
 	else
-		printf("\t%-20s %-20s\n", entry->key, clbkp->name);
+		pr_debug("\t%-20s %-20s\n", entry->key, clbkp->name);
 
 	return 0;
 }
@@ -465,20 +465,20 @@ int do_env_callback(struct cmd_tbl *cmdtp, int flag, int argc,
 	for (i = 0, clbkp = ll_entry_start(struct env_clbk_tbl, env_clbk);
 	     i < num_callbacks;
 	     i++, clbkp++)
-		printf("\t%s\n", clbkp->name);
+		pr_debug("\t%s\n", clbkp->name);
 	puts("\n");
 
 	/* Print the static bindings that may exist */
 	puts("Static callback bindings:\n");
-	printf("\t%-20s %-20s\n", "Variable Name", "Callback Name");
-	printf("\t%-20s %-20s\n", "-------------", "-------------");
+	pr_debug("\t%-20s %-20s\n", "Variable Name", "Callback Name");
+	pr_debug("\t%-20s %-20s\n", "-------------", "-------------");
 	env_attr_walk(ENV_CALLBACK_LIST_STATIC, print_static_binding, NULL);
 	puts("\n");
 
 	/* walk through each variable and print the callback if it has one */
 	puts("Active callback bindings:\n");
-	printf("\t%-20s %-20s\n", "Variable Name", "Callback Name");
-	printf("\t%-20s %-20s\n", "-------------", "-------------");
+	pr_debug("\t%-20s %-20s\n", "Variable Name", "Callback Name");
+	pr_debug("\t%-20s %-20s\n", "-------------", "-------------");
 	hwalk_r(&env_htab, print_active_callback);
 	return 0;
 }
@@ -491,7 +491,7 @@ static int print_static_flags(const char *var_name, const char *flags,
 	enum env_flags_vartype type = env_flags_parse_vartype(flags);
 	enum env_flags_varaccess access = env_flags_parse_varaccess(flags);
 
-	printf("\t%-20s %-20s %-20s\n", var_name,
+	pr_debug("\t%-20s %-20s %-20s\n", var_name,
 		env_flags_get_vartype_name(type),
 		env_flags_get_varaccess_name(access));
 
@@ -509,7 +509,7 @@ static int print_active_flags(struct env_entry *entry)
 	type = (enum env_flags_vartype)
 		(entry->flags & ENV_FLAGS_VARTYPE_BIN_MASK);
 	access = env_flags_parse_varaccess_from_binflags(entry->flags);
-	printf("\t%-20s %-20s %-20s\n", entry->key,
+	pr_debug("\t%-20s %-20s %-20s\n", entry->key,
 		env_flags_get_vartype_name(type),
 		env_flags_get_varaccess_name(access));
 
@@ -522,7 +522,7 @@ static int print_active_flags(struct env_entry *entry)
 int do_env_flags(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	/* Print the available variable types */
-	printf("Available variable type flags (position %d):\n",
+	pr_debug("Available variable type flags (position %d):\n",
 		ENV_FLAGS_VARTYPE_LOC);
 	puts("\tFlag\tVariable Type Name\n");
 	puts("\t----\t------------------\n");
@@ -530,7 +530,7 @@ int do_env_flags(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 	puts("\n");
 
 	/* Print the available variable access types */
-	printf("Available variable access flags (position %d):\n",
+	pr_debug("Available variable access flags (position %d):\n",
 		ENV_FLAGS_VARACCESS_LOC);
 	puts("\tFlag\tVariable Access Name\n");
 	puts("\t----\t--------------------\n");
@@ -539,18 +539,18 @@ int do_env_flags(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 
 	/* Print the static flags that may exist */
 	puts("Static flags:\n");
-	printf("\t%-20s %-20s %-20s\n", "Variable Name", "Variable Type",
+	pr_debug("\t%-20s %-20s %-20s\n", "Variable Name", "Variable Type",
 		"Variable Access");
-	printf("\t%-20s %-20s %-20s\n", "-------------", "-------------",
+	pr_debug("\t%-20s %-20s %-20s\n", "-------------", "-------------",
 		"---------------");
 	env_attr_walk(ENV_FLAGS_LIST_STATIC, print_static_flags, NULL);
 	puts("\n");
 
 	/* walk through each variable and print the flags if non-default */
 	puts("Active flags:\n");
-	printf("\t%-20s %-20s %-20s\n", "Variable Name", "Variable Type",
+	pr_debug("\t%-20s %-20s %-20s\n", "Variable Name", "Variable Type",
 		"Variable Access");
-	printf("\t%-20s %-20s %-20s\n", "-------------", "-------------",
+	pr_debug("\t%-20s %-20s %-20s\n", "-------------", "-------------",
 		"---------------");
 	hwalk_r(&env_htab, print_active_flags);
 	return 0;
@@ -865,7 +865,7 @@ NXTARG:		;
 	return 0;
 
 sep_err:
-	printf("## Error: %s: only one of \"-b\", \"-c\" or \"-t\" allowed\n",
+	pr_err("## Error: %s: only one of \"-b\", \"-c\" or \"-t\" allowed\n",
 	       cmd);
 	return 1;
 }
@@ -946,8 +946,9 @@ static int do_env_import(struct cmd_tbl *cmdtp, int flag,
 	if (argc < 1)
 		return CMD_RET_USAGE;
 
-	if (!fmt)
-		printf("## Warning: defaulting to text format\n");
+	if (!fmt){
+		pr_info("## Warning: defaulting to text format\n");
+	}
 
 	if (sep != '\n' && crlf_is_lf )
 		crlf_is_lf = 0;
@@ -972,11 +973,11 @@ static int do_env_import(struct cmd_tbl *cmdtp, int flag,
 			++size;
 		}
 		if (size == MAX_ENV_SIZE) {
-			printf("## Warning: Input data exceeds %d bytes"
+			pr_info("## Warning: Input data exceeds %d bytes"
 				" - truncated\n", MAX_ENV_SIZE);
 		}
 		size += 2;
-		printf("## Info: input data size = %zu = 0x%zX\n", size, size);
+		pr_info("## Info: input data size = %zu = 0x%zX\n", size, size);
 	}
 
 	if (argc > 2)
@@ -987,7 +988,7 @@ static int do_env_import(struct cmd_tbl *cmdtp, int flag,
 		env_t *ep = (env_t *)ptr;
 
 		if (size <= offsetof(env_t, data)) {
-			printf("## Error: Invalid size 0x%zX\n", size);
+			pr_err("## Error: Invalid size 0x%zX\n", size);
 			return 1;
 		}
 
@@ -1012,7 +1013,7 @@ static int do_env_import(struct cmd_tbl *cmdtp, int flag,
 	return 0;
 
 sep_err:
-	printf("## %s: only one of \"-b\", \"-c\" or \"-t\" allowed\n",
+	pr_err("## %s: only one of \"-b\", \"-c\" or \"-t\" allowed\n",
 		cmd);
 	return 1;
 }
@@ -1036,7 +1037,7 @@ static int do_env_indirect(struct cmd_tbl *cmdtp, int flag,
 	}
 
 	if (env_get(from) == NULL && default_value == NULL) {
-		printf("## env indirect: Environment variable for <from> (%s) does not exist.\n", from);
+		pr_err("## env indirect: Environment variable for <from> (%s) does not exist.\n", from);
 
 		return CMD_RET_FAILURE;
 	}
@@ -1080,15 +1081,15 @@ static int print_env_info(void)
 		value = "unknown";
 		break;
 	}
-	printf("env_valid = %s\n", value);
+	pr_debug("env_valid = %s\n", value);
 
 	/* print environment ready flag */
 	value = gd->flags & GD_FLG_ENV_READY ? "true" : "false";
-	printf("env_ready = %s\n", value);
+	pr_debug("env_ready = %s\n", value);
 
 	/* print environment using default flag */
 	value = gd->flags & GD_FLG_ENV_DEFAULT ? "true" : "false";
-	printf("env_use_default = %s\n", value);
+	pr_debug("env_use_default = %s\n", value);
 
 	return CMD_RET_SUCCESS;
 }
@@ -1142,11 +1143,11 @@ static int do_env_info(struct cmd_tbl *cmdtp, int flag,
 	if (eval_flags & ENV_INFO_IS_DEFAULT) {
 		if (gd->flags & GD_FLG_ENV_DEFAULT) {
 			if (!quiet)
-				printf("Default environment is used\n");
+				pr_debug("Default environment is used\n");
 			eval_results |= ENV_INFO_IS_DEFAULT;
 		} else {
 			if (!quiet)
-				printf("Environment was loaded from persistent storage\n");
+				pr_debug("Environment was loaded from persistent storage\n");
 		}
 	}
 
@@ -1156,15 +1157,15 @@ static int do_env_info(struct cmd_tbl *cmdtp, int flag,
 		loc = env_get_location(ENVOP_SAVE, gd->env_load_prio);
 		if (ENVL_NOWHERE != loc && ENVL_UNKNOWN != loc) {
 			if (!quiet)
-				printf("Environment can be persisted\n");
+				pr_debug("Environment can be persisted\n");
 			eval_results |= ENV_INFO_IS_PERSISTED;
 		} else {
 			if (!quiet)
-				printf("Environment cannot be persisted\n");
+				pr_debug("Environment cannot be persisted\n");
 		}
 #else
 		if (!quiet)
-			printf("Environment cannot be persisted\n");
+			pr_debug("Environment cannot be persisted\n");
 #endif
 	}
 

common/Kconfig

@@ -82,9 +82,10 @@ config LOGLEVEL
 	    9 - debug hardware I/O
 
 config SPL_LOGLEVEL
-	int
+	int "loglevel for spl"
 	depends on SPL
 	default LOGLEVEL
+	range 0 10
 
 config TPL_LOGLEVEL
 	int

common/Makefile

@@ -10,6 +10,7 @@ obj-y += main.o
 obj-y += exports.o
 obj-$(CONFIG_HUSH_PARSER) += cli_hush.o
 obj-$(CONFIG_AUTOBOOT) += autoboot.o
+obj-$(CONFIG_SPL_FASTBOOT) += cli.o
 
 # # boards
 obj-y += board_f.o
@@ -59,6 +60,7 @@ obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += fdt_support.o
 obj-$(CONFIG_SPL_USB_HOST) += usb.o usb_hub.o
 obj-$(CONFIG_SPL_USB_STORAGE) += usb_storage.o
 obj-$(CONFIG_SPL_MUSB_NEW) += usb.o
+obj-$(CONFIG_SPL_FASTBOOT) += usb.o
 endif # CONFIG_SPL_BUILD
 
 #others

common/board_f.c

@@ -742,6 +742,10 @@ static int jump_to_copy(void)
 	arch_setup_gd(gd->new_gd);
 	board_init_f_r_trampoline(gd->start_addr_sp);
 #else
+	#ifdef CONFIG_NOT_RELOC_TEXT_SECTION
+	gd->relocaddr = CONFIG_SYS_TEXT_BASE;
+	#endif
+
 	relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
 #endif
 

common/board_r.c

@@ -65,6 +65,7 @@
 #include <asm-generic/gpio.h>
 #include <efi_loader.h>
 #include <relocate.h>
+#include <command.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -582,6 +583,34 @@ static int run_main_loop(void)
 	return 0;
 }
 
+#ifdef CONFIG_FASTBOOT_CMD_OEM_READ
+int initialize_console_log_buffer(void)
+{
+	printf("initialize_console_log_buffer\n");
+
+	if (!gd->console_log.buffer) {
+		gd->console_log.buffer = (char *)malloc(LOG_BUFFER_SIZE);
+		if (gd->console_log.buffer) {
+			memset(gd->console_log.buffer, 0, LOG_BUFFER_SIZE);
+			gd->console_log.write_ptr = gd->console_log.buffer;
+			gd->console_log.read_ptr = gd->console_log.buffer;
+			printf("Have allocated memory for console log buffer\n");
+		} else {
+			printf("Error: Unable to allocate memory for console log buffer\n");
+			return -1;
+		}
+	}
+	return 0;
+}
+
+void free_console_log_buffer(void)
+{
+	if (gd->console_log.buffer) {
+		free(gd->console_log.buffer);
+	}
+}
+#endif
+
 /*
  * We hope to remove most of the driver-related init and do it if/when
  * the driver is later used.
@@ -724,6 +753,9 @@ static init_fnc_t init_sequence_r[] = {
 #endif
 	stdio_add_devices,
 	jumptable_init,
+#ifdef CONFIG_FASTBOOT_CMD_OEM_READ
+	initialize_console_log_buffer,
+#endif
 #ifdef CONFIG_API
 	api_init,
 #endif

common/cli.c

@@ -75,7 +75,7 @@ int run_command_repeatable(const char *cmd, int flag)
 #else
 __weak int board_run_command(const char *cmdline)
 {
-	printf("## Commands are disabled. Please enable CONFIG_CMDLINE.\n");
+	pr_debug("## Commands are disabled. Please enable CONFIG_CMDLINE.\n");
 
 	return 1;
 }
@@ -156,7 +156,7 @@ int do_run(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 
 		arg = env_get(argv[i]);
 		if (arg == NULL) {
-			printf("## Error: \"%s\" not defined\n", argv[i]);
+			pr_err("## Error: \"%s\" not defined\n", argv[i]);
 			return 1;
 		}
 
@@ -203,7 +203,7 @@ void cli_secure_boot_cmd(const char *cmd)
 	int rc;
 
 	if (!cmd) {
-		printf("## Error: Secure boot command not specified\n");
+		pr_err("## Error: Secure boot command not specified\n");
 		goto err;
 	}
 
@@ -214,7 +214,7 @@ void cli_secure_boot_cmd(const char *cmd)
 #ifdef CONFIG_CMDLINE
 	cmdtp = find_cmd(cmd);
 	if (!cmdtp) {
-		printf("## Error: \"%s\" not defined\n", cmd);
+		pr_err("## Error: \"%s\" not defined\n", cmd);
 		goto err;
 	}
 
@@ -226,7 +226,7 @@ void cli_secure_boot_cmd(const char *cmd)
 #endif
 
 	/* Shouldn't ever return from boot command. */
-	printf("## Error: \"%s\" returned (code %d)\n", cmd, rc);
+	pr_err("## Error: \"%s\" returned (code %d)\n", cmd, rc);
 
 err:
 	/*
@@ -247,7 +247,7 @@ void cli_loop(void)
 #elif defined(CONFIG_CMDLINE)
 	cli_simple_loop();
 #else
-	printf("## U-Boot command line is disabled. Please enable CONFIG_CMDLINE\n");
+	pr_debug("## U-Boot command line is disabled. Please enable CONFIG_CMDLINE\n");
 #endif /*CONFIG_HUSH_PARSER*/
 }
 

common/cli_readline.c

@@ -243,7 +243,7 @@ static void cread_add_str(char *str, int strsize, int insert,
 		str++;
 	}
 }
-
+int is_direction_key = 0;
 static int cread_line(const char *const prompt, char *buf, unsigned int *len,
 		int timeout)
 {
@@ -297,6 +297,7 @@ static int cread_line(const char *const prompt, char *buf, unsigned int *len,
 			} else if (esc_len == 2) {
 				switch (ichar) {
 				case 'D':	/* <- key */
+					is_direction_key = 1;
 					ichar = CTL_CH('b');
 					act = ESC_CONVERTED;
 					break;	/* pass off to ^B handler */

common/command.c

@@ -79,7 +79,7 @@ int _do_help(struct cmd_tbl *cmd_start, int cmd_items, struct cmd_tbl *cmdtp,
 		if (cmdtp != NULL) {
 			rcode |= cmd_usage(cmdtp);
 		} else {
-			printf("Unknown command '%s' - try 'help' without arguments for list of all known commands\n\n",
+			pr_debug("Unknown command '%s' - try 'help' without arguments for list of all known commands\n\n",
 			       argv[i]);
 			rcode = 1;
 		}
@@ -132,10 +132,10 @@ struct cmd_tbl *find_cmd(const char *cmd)
 
 int cmd_usage(const struct cmd_tbl *cmdtp)
 {
-	printf("%s - %s\n\n", cmdtp->name, cmdtp->usage);
+	pr_info("%s - %s\n\n", cmdtp->name, cmdtp->usage);
 
 #ifdef	CONFIG_SYS_LONGHELP
-	printf("Usage:\n%s ", cmdtp->name);
+	pr_info("Usage:\n%s ", cmdtp->name);
 
 	if (!cmdtp->help) {
 		puts ("- No additional help available.\n");
@@ -508,7 +508,7 @@ void fixup_cmdtable(struct cmd_tbl *cmdtp, int size)
 
 		addr = (ulong)(cmdtp->cmd) + gd->reloc_off;
 #ifdef DEBUG_COMMANDS
-		printf("Command \"%s\": 0x%08lx => 0x%08lx\n",
+		pr_debug("Command \"%s\": 0x%08lx => 0x%08lx\n",
 		       cmdtp->name, (ulong)(cmdtp->cmd), addr);
 #endif
 		cmdtp->cmd = (int (*)(struct cmd_tbl *, int, int,
@@ -606,7 +606,7 @@ enum command_ret_t cmd_process(int flag, int argc, char *const argv[],
 	/* Look up command in command table */
 	cmdtp = find_cmd(argv[0]);
 	if (cmdtp == NULL) {
-		printf("Unknown command '%s' - try 'help'\n", argv[0]);
+		pr_debug("Unknown command '%s' - try 'help'\n", argv[0]);
 		return 1;
 	}
 
@@ -648,7 +648,7 @@ int cmd_process_error(struct cmd_tbl *cmdtp, int err)
 		return CMD_RET_USAGE;
 
 	if (err) {
-		printf("Command '%s' failed: Error %d\n", cmdtp->name, err);
+		pr_err("Command '%s' failed: Error %d\n", cmdtp->name, err);
 		return CMD_RET_FAILURE;
 	}
 

common/console.c

@@ -22,6 +22,7 @@
 #include <watchdog.h>
 #include <asm/global_data.h>
 #include <linux/delay.h>
+#include <command.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -59,7 +60,7 @@ static int on_console(const char *name, const char *value, enum env_op op,
 
 	case env_op_delete:
 		if ((flags & H_FORCE) == 0)
-			printf("Can't delete \"%s\"\n", name);
+			pr_err("Can't delete \"%s\"\n", name);
 		return 1;
 
 	default:
@@ -655,13 +656,42 @@ static inline void pre_console_puts(const char *s) {}
 static inline void print_pre_console_buffer(int flushpoint) {}
 #endif
 
+#ifdef CONFIG_FASTBOOT_CMD_OEM_READ
+void handle_console_log(const char *s) {
+	if (!gd || !gd->console_log.buffer) {
+		return;
+	}
+
+	while (*s) {
+		/* To ensure that the write pointer does not overlap with the read pointer,
+		the log buffer maintains at least 1 byte free. */
+		if (gd->console_log.write_ptr == gd->console_log.read_ptr - 1 ||
+			(gd->console_log.write_ptr == gd->console_log.buffer + LOG_BUFFER_SIZE - 1 &&
+			 gd->console_log.read_ptr == gd->console_log.buffer)) {
+			break;
+		}
+
+		*gd->console_log.write_ptr++ = *s;
+
+		if (gd->console_log.write_ptr >= gd->console_log.buffer + LOG_BUFFER_SIZE) {
+			gd->console_log.write_ptr = gd->console_log.buffer;
+		}
+
+		s++;
+	}
+}
+#endif
+
 void putc(const char c)
 {
 	if (!gd)
 		return;
 
 	console_record_putc(c);
-
+#ifdef CONFIG_FASTBOOT_CMD_OEM_READ
+	char str[2] = {c, '\0'};
+	handle_console_log(str);
+#endif
 	/* sandbox can send characters to stdout before it has a console */
 	if (IS_ENABLED(CONFIG_SANDBOX) && !(gd->flags & GD_FLG_SERIAL_READY)) {
 		os_putc(c);
@@ -703,6 +733,9 @@ void puts(const char *s)
 
 	console_record_puts(s);
 
+#ifdef CONFIG_FASTBOOT_CMD_OEM_READ
+	handle_console_log(s);
+#endif
 	/* sandbox can send characters to stdout before it has a console */
 	if (IS_ENABLED(CONFIG_SANDBOX) && !(gd->flags & GD_FLG_SERIAL_READY)) {
 		os_puts(s);

common/dlmalloc.c

@@ -2392,14 +2392,14 @@ static void malloc_update_mallinfo()
 void malloc_stats()
 {
   malloc_update_mallinfo();
-  printf("max system bytes = %10u\n",
+  pr_debug("max system bytes = %10u\n",
 	  (unsigned int)(max_total_mem));
-  printf("system bytes     = %10u\n",
+  pr_debug("system bytes     = %10u\n",
 	  (unsigned int)(sbrked_mem + mmapped_mem));
-  printf("in use bytes     = %10u\n",
+  pr_debug("in use bytes     = %10u\n",
 	  (unsigned int)(current_mallinfo.uordblks + mmapped_mem));
 #if HAVE_MMAP
-  printf("max mmap regions = %10u\n",
+  pr_debug("max mmap regions = %10u\n",
 	  (unsigned int)max_n_mmaps);
 #endif
 }

common/fdt_support.c

@@ -121,8 +121,9 @@ int fdt_find_or_add_subnode(void *fdt, int parentoffset, const char *name)
 	if (offset == -FDT_ERR_NOTFOUND)
 		offset = fdt_add_subnode(fdt, parentoffset, name);
 
-	if (offset < 0)
-		printf("%s: %s: %s\n", __func__, name, fdt_strerror(offset));
+	if (offset < 0){
+		pr_debug("%s: %s: %s\n", __func__, name, fdt_strerror(offset));
+	}
 
 	return offset;
 }
@@ -155,14 +156,15 @@ static int fdt_fixup_stdout(void *fdt, int chosenoff)
 	memcpy(tmp, path, len);
 
 	err = fdt_setprop(fdt, chosenoff, "linux,stdout-path", tmp, len);
-	if (err < 0)
-		printf("WARNING: could not set linux,stdout-path %s.\n",
+	if (err < 0){
+		pr_debug("WARNING: could not set linux,stdout-path %s.\n",
 		       fdt_strerror(err));
+	}
 
 	return err;
 
 noalias:
-	printf("WARNING: %s: could not read %s alias: %s\n",
+	pr_debug("WARNING: %s: could not read %s alias: %s\n",
 	       __func__, sername, fdt_strerror(err));
 
 	return 0;
@@ -190,7 +192,7 @@ int fdt_root(void *fdt)
 
 	err = fdt_check_header(fdt);
 	if (err < 0) {
-		printf("fdt_root: %s\n", fdt_strerror(err));
+		pr_debug("fdt_root: %s\n", fdt_strerror(err));
 		return err;
 	}
 
@@ -200,7 +202,7 @@ int fdt_root(void *fdt)
 				  strlen(serial) + 1);
 
 		if (err < 0) {
-			printf("WARNING: could not set serial-number %s.\n",
+			pr_debug("WARNING: could not set serial-number %s.\n",
 			       fdt_strerror(err));
 			return err;
 		}
@@ -241,7 +243,7 @@ int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end)
 
 	err = fdt_add_mem_rsv(fdt, initrd_start, initrd_end - initrd_start);
 	if (err < 0) {
-		printf("fdt_initrd: %s\n", fdt_strerror(err));
+		pr_debug("fdt_initrd: %s\n", fdt_strerror(err));
 		return err;
 	}
 
@@ -251,7 +253,7 @@ int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end)
 			      (uint64_t)initrd_start, is_u64);
 
 	if (err < 0) {
-		printf("WARNING: could not set linux,initrd-start %s.\n",
+		pr_debug("WARNING: could not set linux,initrd-start %s.\n",
 		       fdt_strerror(err));
 		return err;
 	}
@@ -260,7 +262,7 @@ int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end)
 			      (uint64_t)initrd_end, is_u64);
 
 	if (err < 0) {
-		printf("WARNING: could not set linux,initrd-end %s.\n",
+		pr_debug("WARNING: could not set linux,initrd-end %s.\n",
 		       fdt_strerror(err));
 
 		return err;
@@ -287,7 +289,7 @@ int fdt_chosen(void *fdt)
 
 	err = fdt_check_header(fdt);
 	if (err < 0) {
-		printf("fdt_chosen: %s\n", fdt_strerror(err));
+		pr_debug("fdt_chosen: %s\n", fdt_strerror(err));
 		return err;
 	}
 
@@ -301,7 +303,7 @@ int fdt_chosen(void *fdt)
 				  abuf_data(&buf), abuf_size(&buf));
 		abuf_uninit(&buf);
 		if (err < 0) {
-			printf("WARNING: could not set rng-seed %s.\n",
+			pr_debug("WARNING: could not set rng-seed %s.\n",
 			       fdt_strerror(err));
 			return err;
 		}
@@ -313,7 +315,7 @@ int fdt_chosen(void *fdt)
 		err = fdt_setprop(fdt, nodeoffset, "bootargs", str,
 				  strlen(str) + 1);
 		if (err < 0) {
-			printf("WARNING: could not set bootargs %s.\n",
+			pr_debug("WARNING: could not set bootargs %s.\n",
 			       fdt_strerror(err));
 			return err;
 		}
@@ -323,7 +325,7 @@ int fdt_chosen(void *fdt)
 	err = fdt_setprop(fdt, nodeoffset, "u-boot,version", PLAIN_VERSION,
 			  strlen(PLAIN_VERSION) + 1);
 	if (err < 0) {
-		printf("WARNING: could not set u-boot,version %s.\n",
+		pr_debug("WARNING: could not set u-boot,version %s.\n",
 		       fdt_strerror(err));
 		return err;
 	}
@@ -342,9 +344,10 @@ void do_fixup_by_path(void *fdt, const char *path, const char *prop,
 	debug("\n");
 #endif
 	int rc = fdt_find_and_setprop(fdt, path, prop, val, len, create);
-	if (rc)
-		printf("Unable to update property %s:%s, err=%s\n",
+	if (rc){
+		pr_debug("Unable to update property %s:%s, err=%s\n",
 			path, prop, fdt_strerror(rc));
+	}
 }
 
 void do_fixup_by_path_u32(void *fdt, const char *path, const char *prop,
@@ -465,7 +468,7 @@ int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks)
 	u8 tmp[MEMORY_BANKS_MAX * 16]; /* Up to 64-bit address + 64-bit size */
 
 	if (banks > MEMORY_BANKS_MAX) {
-		printf("%s: num banks %d exceeds hardcoded limit %d."
+		pr_debug("%s: num banks %d exceeds hardcoded limit %d."
 		       " Recompile with higher MEMORY_BANKS_MAX?\n",
 		       __FUNCTION__, banks, MEMORY_BANKS_MAX);
 		return -1;
@@ -473,7 +476,7 @@ int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks)
 
 	err = fdt_check_header(blob);
 	if (err < 0) {
-		printf("%s: %s\n", __FUNCTION__, fdt_strerror(err));
+		pr_debug("%s: %s\n", __FUNCTION__, fdt_strerror(err));
 		return err;
 	}
 
@@ -485,7 +488,7 @@ int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks)
 	err = fdt_setprop(blob, nodeoffset, "device_type", "memory",
 			sizeof("memory"));
 	if (err < 0) {
-		printf("WARNING: could not set %s %s.\n", "device_type",
+		pr_debug("WARNING: could not set %s %s.\n", "device_type",
 				fdt_strerror(err));
 		return err;
 	}
@@ -504,7 +507,7 @@ int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks)
 
 	err = fdt_setprop(blob, nodeoffset, "reg", tmp, len);
 	if (err < 0) {
-		printf("WARNING: could not set %s %s.\n",
+		pr_debug("WARNING: could not set %s %s.\n",
 				"reg", fdt_strerror(err));
 		return err;
 	}
@@ -518,14 +521,14 @@ int fdt_set_usable_memory(void *blob, u64 start[], u64 size[], int areas)
 	u8 tmp[8 * 16]; /* Up to 64-bit address + 64-bit size */
 
 	if (areas > 8) {
-		printf("%s: num areas %d exceeds hardcoded limit %d\n",
+		pr_debug("%s: num areas %d exceeds hardcoded limit %d\n",
 		       __func__, areas, 8);
 		return -1;
 	}
 
 	err = fdt_check_header(blob);
 	if (err < 0) {
-		printf("%s: %s\n", __func__, fdt_strerror(err));
+		pr_debug("%s: %s\n", __func__, fdt_strerror(err));
 		return err;
 	}
 
@@ -538,7 +541,7 @@ int fdt_set_usable_memory(void *blob, u64 start[], u64 size[], int areas)
 
 	err = fdt_setprop(blob, nodeoffset, "linux,usable-memory", tmp, len);
 	if (err < 0) {
-		printf("WARNING: could not set %s %s.\n",
+		pr_debug("WARNING: could not set %s %s.\n",
 		       "reg", fdt_strerror(err));
 		return err;
 	}
@@ -638,7 +641,7 @@ int fdt_record_loadable(void *blob, u32 index, const char *name,
 
 	err = fdt_check_header(blob);
 	if (err < 0) {
-		printf("%s: %s\n", __func__, fdt_strerror(err));
+		pr_debug("%s: %s\n", __func__, fdt_strerror(err));
 		return err;
 	}
 
@@ -837,7 +840,7 @@ static int fdt_del_subnodes(const void *blob, int parent_offset)
 				fdt_get_name(blob, off, 0), off);
 			ret = fdt_del_node((void *)blob, off);
 			if (ret < 0) {
-				printf("Can't delete node: %s\n",
+				pr_debug("Can't delete node: %s\n",
 					fdt_strerror(ret));
 				return ret;
 			} else {
@@ -868,7 +871,7 @@ static int fdt_del_partitions(void *blob, int parent_offset)
 		} else {
 			ret = fdt_del_subnodes(blob, parent_offset);
 			if (ret < 0) {
-				printf("Can't remove subnodes: %s\n",
+				pr_debug("Can't remove subnodes: %s\n",
 					fdt_strerror(ret));
 				return ret;
 			}
@@ -926,7 +929,7 @@ add_sub:
 			else
 				goto err_size;
 		} else if (ret < 0) {
-			printf("Can't add partition node: %s\n",
+			pr_debug("Can't add partition node: %s\n",
 				fdt_strerror(ret));
 			return ret;
 		}
@@ -985,10 +988,10 @@ add_label:
 	}
 	return 0;
 err_size:
-	printf("Can't increase blob size: %s\n", fdt_strerror(ret));
+	pr_err("Can't increase blob size: %s\n", fdt_strerror(ret));
 	return ret;
 err_prop:
-	printf("Can't add property: %s\n", fdt_strerror(ret));
+	pr_err("Can't add property: %s\n", fdt_strerror(ret));
 	return ret;
 }
 
@@ -1073,10 +1076,11 @@ void fdt_del_node_and_alias(void *blob, const char *alias)
 #ifdef DEBUG
 static void of_dump_addr(const char *s, const fdt32_t *addr, int na)
 {
-	printf("%s", s);
-	while(na--)
-		printf(" %08x", *(addr++));
-	printf("\n");
+	pr_debug("%s", s);
+	while(na--){
+		pr_debug(" %08x", *(addr++));
+	}
+	pr_debug("\n");
 }
 #else
 static void of_dump_addr(const char *s, const fdt32_t *addr, int na) { }
@@ -1348,7 +1352,7 @@ static u64 __of_translate_address(const void *blob, int node_offset,
 	/* Cound address cells & copy address locally */
 	bus->count_cells(blob, parent, &na, &ns);
 	if (!OF_CHECK_COUNTS(na, ns)) {
-		printf("%s: Bad cell count for %s\n", __FUNCTION__,
+		pr_debug("%s: Bad cell count for %s\n", __FUNCTION__,
 		       fdt_get_name(blob, node_offset, NULL));
 		goto bail;
 	}
@@ -1375,7 +1379,7 @@ static u64 __of_translate_address(const void *blob, int node_offset,
 		pbus = of_match_bus(blob, parent);
 		pbus->count_cells(blob, parent, &pna, &pns);
 		if (!OF_CHECK_COUNTS(pna, pns)) {
-			printf("%s: Bad cell count for %s\n", __FUNCTION__,
+			pr_debug("%s: Bad cell count for %s\n", __FUNCTION__,
 				fdt_get_name(blob, node_offset, NULL));
 			break;
 		}
@@ -1454,7 +1458,7 @@ int fdt_get_dma_range(const void *blob, int node, phys_addr_t *cpu,
 	node = parent;
 	parent = fdt_parent_offset(blob, node);
 	if (parent < 0) {
-		printf("Found dma-ranges in root node, shouldn't happen\n");
+		pr_debug("Found dma-ranges in root node, shouldn't happen\n");
 		ret = -EINVAL;
 		goto out;
 	}
@@ -1463,7 +1467,7 @@ int fdt_get_dma_range(const void *blob, int node, phys_addr_t *cpu,
 	bus_node = of_match_bus(blob, node);
 	bus_node->count_cells(blob, node, &na, &ns);
 	if (!OF_CHECK_COUNTS(na, ns)) {
-		printf("%s: Bad cell count for %s\n", __FUNCTION__,
+		pr_debug("%s: Bad cell count for %s\n", __FUNCTION__,
 		       fdt_get_name(blob, node, NULL));
 		return -EINVAL;
 		goto out;
@@ -1472,7 +1476,7 @@ int fdt_get_dma_range(const void *blob, int node, phys_addr_t *cpu,
 	bus_node = of_match_bus(blob, parent);
 	bus_node->count_cells(blob, parent, &pna, &pns);
 	if (!OF_CHECK_COUNTS(pna, pns)) {
-		printf("%s: Bad cell count for %s\n", __FUNCTION__,
+		pr_debug("%s: Bad cell count for %s\n", __FUNCTION__,
 		       fdt_get_name(blob, parent, NULL));
 		return -EINVAL;
 		goto out;
@@ -1557,11 +1561,11 @@ int fdt_set_phandle(void *fdt, int nodeoffset, uint32_t phandle)
 		char buf[64];
 
 		fdt_get_path(fdt, nodeoffset, buf, sizeof(buf));
-		printf("Trying to update node %s with phandle %u ",
+		pr_debug("Trying to update node %s with phandle %u ",
 		       buf, phandle);
 
 		fdt_get_path(fdt, off, buf, sizeof(buf));
-		printf("that already exists in node %s.\n", buf);
+		pr_debug("that already exists in node %s.\n", buf);
 		return -FDT_ERR_BADPHANDLE;
 	}
 #endif
@@ -1588,14 +1592,14 @@ unsigned int fdt_create_phandle(void *fdt, int nodeoffset)
 
 		ret = fdt_generate_phandle(fdt, &phandle);
 		if (ret < 0) {
-			printf("Can't generate phandle: %s\n",
+			pr_debug("Can't generate phandle: %s\n",
 			       fdt_strerror(ret));
 			return 0;
 		}
 
 		ret = fdt_set_phandle(fdt, nodeoffset, phandle);
 		if (ret < 0) {
-			printf("Can't set phandle %u: %s\n", phandle,
+			pr_debug("Can't set phandle %u: %s\n", phandle,
 			       fdt_strerror(ret));
 			return 0;
 		}
@@ -1616,7 +1620,7 @@ unsigned int fdt_create_phandle_by_compatible(void *fdt, const char *compat)
 	int offset = fdt_node_offset_by_compatible(fdt, -1, compat);
 
 	if (offset < 0) {
-		printf("Can't find node with compatible \"%s\": %s\n", compat,
+		pr_debug("Can't find node with compatible \"%s\": %s\n", compat,
 		       fdt_strerror(offset));
 		return 0;
 	}
@@ -1641,7 +1645,7 @@ unsigned int fdt_create_phandle_by_pathf(void *fdt, const char *fmt, ...)
 	va_end(ap);
 
 	if (offset < 0) {
-		printf("Can't find node by given path: %s\n",
+		pr_debug("Can't find node by given path: %s\n",
 		       fdt_strerror(offset));
 		return 0;
 	}
@@ -1674,7 +1678,7 @@ int fdt_set_node_status(void *fdt, int nodeoffset, enum fdt_status status)
 		ret = fdt_setprop_string(fdt, nodeoffset, "status", "fail");
 		break;
 	default:
-		printf("Invalid fdt status: %x\n", status);
+		pr_debug("Invalid fdt status: %x\n", status);
 		ret = -1;
 		break;
 	}
@@ -1758,13 +1762,13 @@ add_edid:
 			else
 				goto err_size;
 		} else if (ret < 0) {
-			printf("Can't add property: %s\n", fdt_strerror(ret));
+			pr_debug("Can't add property: %s\n", fdt_strerror(ret));
 			return ret;
 		}
 	}
 	return 0;
 err_size:
-	printf("Can't increase blob size: %s\n", fdt_strerror(ret));
+	pr_err("Can't increase blob size: %s\n", fdt_strerror(ret));
 	return ret;
 }
 #endif
@@ -1793,21 +1797,21 @@ int fdt_verify_alias_address(void *fdt, int anode, const char *alias, u64 addr)
 
 	node = fdt_path_offset(fdt, path);
 	if (node < 0) {
-		printf("Warning: device tree alias '%s' points to invalid "
+		pr_debug("Warning: device tree alias '%s' points to invalid "
 		       "node %s.\n", alias, path);
 		return 0;
 	}
 
 	reg = fdt_getprop(fdt, node, "reg", &len);
 	if (!reg) {
-		printf("Warning: device tree node '%s' has no address.\n",
+		pr_debug("Warning: device tree node '%s' has no address.\n",
 		       path);
 		return 0;
 	}
 
 	dt_addr = fdt_translate_address(fdt, node, reg);
 	if (addr != dt_addr) {
-		printf("Warning: U-Boot configured device %s at address %llu,\n"
+		pr_debug("Warning: U-Boot configured device %s at address %llu,\n"
 		       "but the device tree has it address %llx.\n",
 		       alias, addr, dt_addr);
 		return 0;
@@ -2048,11 +2052,11 @@ int fdt_overlay_apply_verbose(void *fdt, void *fdto)
 
 	err = fdt_overlay_apply(fdt, fdto);
 	if (err < 0) {
-		printf("failed on fdt_overlay_apply(): %s\n",
+		pr_err("failed on fdt_overlay_apply(): %s\n",
 				fdt_strerror(err));
 		if (!has_symbols) {
-			printf("base fdt does did not have a /__symbols__ node\n");
-			printf("make sure you've compiled with -@\n");
+			pr_debug("base fdt does did not have a /__symbols__ node\n");
+			pr_debug("make sure you've compiled with -@\n");
 		}
 	}
 	return err;
@@ -2071,7 +2075,7 @@ int fdt_valid(struct fdt_header **blobp)
 	int err;
 
 	if (!blob) {
-		printf("The address of the fdt is invalid (NULL).\n");
+		pr_debug("The address of the fdt is invalid (NULL).\n");
 		return 0;
 	}
 
@@ -2080,25 +2084,25 @@ int fdt_valid(struct fdt_header **blobp)
 		return 1;	/* valid */
 
 	if (err < 0) {
-		printf("libfdt fdt_check_header(): %s", fdt_strerror(err));
+		pr_debug("libfdt fdt_check_header(): %s", fdt_strerror(err));
 		/*
 		 * Be more informative on bad version.
 		 */
 		if (err == -FDT_ERR_BADVERSION) {
 			if (fdt_version(blob) <
 			    FDT_FIRST_SUPPORTED_VERSION) {
-				printf(" - too old, fdt %d < %d",
+				pr_debug(" - too old, fdt %d < %d",
 				       fdt_version(blob),
 				       FDT_FIRST_SUPPORTED_VERSION);
 			}
 			if (fdt_last_comp_version(blob) >
 			    FDT_LAST_SUPPORTED_VERSION) {
-				printf(" - too new, fdt %d > %d",
+				pr_debug(" - too new, fdt %d > %d",
 				       fdt_version(blob),
 				       FDT_LAST_SUPPORTED_VERSION);
 			}
 		}
-		printf("\n");
+		pr_debug("\n");
 		*blobp = NULL;
 		return 0;
 	}

common/hash.c

@@ -536,7 +536,7 @@ static int parse_verify_sum(struct hash_algo *algo, char *verify_str,
 		else {
 			vsum_str = env_get(verify_str);
 			if (vsum_str == NULL || strlen(vsum_str) != digits) {
-				printf("Expected %d hex digits in env var\n",
+				pr_debug("Expected %d hex digits in env var\n",
 				       digits);
 				return 1;
 			}
@@ -551,9 +551,10 @@ static void hash_show(struct hash_algo *algo, ulong addr, ulong len, uint8_t *ou
 {
 	int i;
 
-	printf("%s for %08lx ... %08lx ==> ", algo->name, addr, addr + len - 1);
-	for (i = 0; i < algo->digest_size; i++)
-		printf("%02x", output[i]);
+	pr_debug("%s for %08lx ... %08lx ==> ", algo->name, addr, addr + len - 1);
+	for (i = 0; i < algo->digest_size; i++){
+		pr_debug("%02x", output[i]);
+	}
 }
 
 int hash_command(const char *algo_name, int flags, struct cmd_tbl *cmdtp,
@@ -574,7 +575,7 @@ int hash_command(const char *algo_name, int flags, struct cmd_tbl *cmdtp,
 		void *buf;
 
 		if (hash_lookup_algo(algo_name, &algo)) {
-			printf("Unknown hash algorithm '%s'\n", algo_name);
+			pr_debug("Unknown hash algorithm '%s'\n", algo_name);
 			return CMD_RET_USAGE;
 		}
 		argc -= 2;
@@ -600,7 +601,7 @@ int hash_command(const char *algo_name, int flags, struct cmd_tbl *cmdtp,
 #endif
 			if (parse_verify_sum(algo, *argv, vsum,
 					flags & HASH_FLAG_ENV)) {
-				printf("ERROR: %s does not contain a valid "
+				pr_err("ERROR: %s does not contain a valid "
 					"%s sum\n", *argv, algo->name);
 				return 1;
 			}
@@ -608,15 +609,15 @@ int hash_command(const char *algo_name, int flags, struct cmd_tbl *cmdtp,
 				int i;
 
 				hash_show(algo, addr, len, output);
-				printf(" != ");
+				pr_debug(" != ");
 				for (i = 0; i < algo->digest_size; i++)
-					printf("%02x", vsum[i]);
+					pr_debug("%02x", vsum[i]);
 				puts(" ** ERROR **\n");
 				return 1;
 			}
 		} else {
 			hash_show(algo, addr, len, output);
-			printf("\n");
+			pr_debug("\n");
 
 			if (argc) {
 				store_result(algo, output, *argv,
@@ -633,7 +634,7 @@ int hash_command(const char *algo_name, int flags, struct cmd_tbl *cmdtp,
 
 		crc = crc32_wd(0, (const uchar *)addr, len, CHUNKSZ_CRC32);
 
-		printf("CRC32 for %08lx ... %08lx ==> %08lx\n",
+		pr_debug("CRC32 for %08lx ... %08lx ==> %08lx\n",
 				addr, addr + len - 1, crc);
 
 		if (argc >= 3) {

common/menu.c

@@ -513,7 +513,7 @@ void bootmenu_loop(struct bootmenu_data *menu,
 			*key = KEY_NONE;
 		} else {
 		/* Alone ESC key was pressed */
-			*key = KEY_QUIT;
+			*key = KEY_NONE;
 			*esc = (c == '\e') ? 1 : 0;
 		}
 		break;

common/spl/Kconfig

@@ -690,6 +690,20 @@ config SPL_FS_LOAD_PAYLOAD_NAME
 	help
 	  Filename to read to load U-Boot when reading from filesystem.
 
+config SPL_FS_LOAD_OTHERS_FILES
+	bool "Support onother file to load"
+	depends on SPL_FS_EXT4 || SPL_FS_FAT || SPL_FS_SQUASHFS
+	help
+	  it support that load onother file from the filessystem
+	  independent.
+
+config SPL_FS_LOAD_OTHERS_FILES_NAME
+	string "another File to load for U-Boot from the filesystem"
+	depends on SPL_FS_LOAD_OTHERS_FILES
+	default "u-boot.itb"
+	help
+	  if it has onother file should load independent from filesystem.
+
 config SPL_FS_LOAD_KERNEL_NAME
 	string "File to load for the OS kernel from the filesystem"
 	depends on (SPL_FS_EXT4 || SPL_FS_FAT || SPL_FS_SQUASHFS) && SPL_OS_BOOT
@@ -1297,8 +1311,39 @@ config SPL_SPI_LOAD
 	  Enable support for loading next stage, U-Boot or otherwise, from
 	  SPI NOR in U-Boot SPL.
 
+config SPL_MTD_LOAD
+	bool "Support loading from mtd device"
+	help
+	  Enable support for loading next stage, U-Boot or otherwise, from
+	  SPI NOR in U-Boot SPL. it would dynamic to get the current mtd dev.
+
 endif # SPL_SPI_FLASH_SUPPORT
 
+config SYS_LOAD_IMAGE_PARTITION_NAME
+	string "Partition name to use to load U-Boot from"
+	depends on SPL_MTD_LOAD || SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
+	help
+	  Partition name on the storage to load U-Boot from.
+
+config SYS_LOAD_IMAGE_SEC_PARTITION
+	bool "Second partition to use to load U-Boot from"
+	depends on SPL_MTD_LOAD || SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
+	help
+	  Second Partition if need on the storage to load U-Boot from.
+
+config SYS_LOAD_IMAGE_SEC_PARTITION_INDEX
+	int "Second partition index to use to load U-Boot from"
+	depends on SYS_LOAD_IMAGE_SEC_PARTITION
+	default 2
+	help
+	  Second partition name on the storage to load U-Boot from.
+
+config SYS_LOAD_IMAGE_SEC_PARTITION_NAME
+	string "Second partition name to use to load U-Boot from"
+	depends on SYS_LOAD_IMAGE_SEC_PARTITION
+	help
+	  Second partition name on the storage to load U-Boot from.
+
 config SYS_SPI_U_BOOT_OFFS
 	hex "address of u-boot payload in SPI flash"
 	default 0x8000 if ARCH_SUNXI
@@ -1376,6 +1421,12 @@ config SPL_DFU
 	  This feature is useful to flash the binaries to factory or bare-metal
 	  boards using USB interface.
 
+config SPL_FASTBOOT_LOAD
+	bool "Support fastboot in spl to load image"
+	help
+	  This feature enables fastboot in spl, and it could download image to
+	  ram and run it.
+
 choice
 	bool "DFU device selection"
 	depends on SPL_DFU

common/spl/Makefile

@@ -33,4 +33,6 @@ obj-$(CONFIG_$(SPL_TPL_)DFU) += spl_dfu.o
 obj-$(CONFIG_$(SPL_TPL_)SPI_LOAD) += spl_spi.o
 obj-$(CONFIG_$(SPL_TPL_)RAM_SUPPORT) += spl_ram.o
 obj-$(CONFIG_$(SPL_TPL_)USB_SDP_SUPPORT) += spl_sdp.o
+obj-$(CONFIG_$(SPL_TPL_)FASTBOOT_LOAD) += spl_fastboot.o
+obj-$(CONFIG_$(SPL_TPL_)MTD_LOAD) += spl_mtd.o
 endif

common/spl/spl.c

@@ -133,20 +133,20 @@ void spl_fixup_fdt(void *fdt_blob)
 
 	err = fdt_check_header(fdt_blob);
 	if (err < 0) {
-		printf("fdt_root: %s\n", fdt_strerror(err));
+		pr_debug("fdt_root: %s\n", fdt_strerror(err));
 		return;
 	}
 
 	/* fixup the memory dt node */
 	err = fdt_shrink_to_minimum(fdt_blob, 0);
 	if (err == 0) {
-		printf(SPL_TPL_PROMPT "fdt_shrink_to_minimum err - %d\n", err);
+		pr_debug(SPL_TPL_PROMPT "fdt_shrink_to_minimum err - %d\n", err);
 		return;
 	}
 
 	err = arch_fixup_fdt(fdt_blob);
 	if (err) {
-		printf(SPL_TPL_PROMPT "arch_fixup_fdt err - %d\n", err);
+		pr_debug(SPL_TPL_PROMPT "arch_fixup_fdt err - %d\n", err);
 		return;
 	}
 #endif
@@ -272,8 +272,8 @@ static int spl_load_fit_image(struct spl_image_info *spl_image,
 			     IH_ARCH_DEFAULT, IH_TYPE_STANDALONE, -1,
 			     FIT_LOAD_OPTIONAL, &fw_data, &fw_len);
 	if (ret >= 0) {
-		printf("DEPRECATED: 'standalone = ' property.");
-		printf("Please use either 'firmware =' or 'kernel ='\n");
+		pr_debug("DEPRECATED: 'standalone = ' property.");
+		pr_debug("Please use either 'firmware =' or 'kernel ='\n");
 	} else {
 		ret = fit_image_load(&images, (ulong)header, NULL,
 				     &fit_uname_config, IH_ARCH_DEFAULT,
@@ -298,7 +298,7 @@ static int spl_load_fit_image(struct spl_image_info *spl_image,
 		spl_image->os = IH_OS_INVALID;
 	spl_image->name = genimg_get_os_name(spl_image->os);
 
-	debug(SPL_TPL_PROMPT "payload image: %32s load addr: 0x%lx size: %d\n",
+	pr_debug(SPL_TPL_PROMPT "payload image: %32s load addr: 0x%lx size: %d\n",
 	      spl_image->name, spl_image->load_addr, spl_image->size);
 
 #ifdef CONFIG_SPL_FIT_SIGNATURE
@@ -314,7 +314,7 @@ static int spl_load_fit_image(struct spl_image_info *spl_image,
 			/* HACK: U-boot expects FDT at a specific address */
 			fdt_hack = spl_image->load_addr + spl_image->size;
 			fdt_hack = (fdt_hack + 3) & ~3;
-			debug("Relocating FDT to %p\n", spl_image->fdt_addr);
+			pr_debug("Relocating FDT to %p\n", spl_image->fdt_addr);
 			memcpy((void *)fdt_hack, spl_image->fdt_addr, dt_len);
 		}
 	}
@@ -357,7 +357,7 @@ __weak int spl_parse_legacy_header(struct spl_image_info *spl_image,
 				   const struct image_header *header)
 {
 	/* LEGACY image not supported */
-	debug("Legacy boot image support not enabled, proceeding to other boot methods\n");
+	pr_debug("Legacy boot image support not enabled, proceeding to other boot methods\n");
 	return -EINVAL;
 }
 
@@ -399,7 +399,7 @@ int spl_parse_image_header(struct spl_image_info *spl_image,
 			spl_image->load_addr = CONFIG_SYS_LOAD_ADDR;
 			spl_image->entry_point = CONFIG_SYS_LOAD_ADDR;
 			spl_image->size = end - start;
-			debug(SPL_TPL_PROMPT
+			pr_debug(SPL_TPL_PROMPT
 			      "payload zImage, load addr: 0x%lx size: %d\n",
 			      spl_image->load_addr, spl_image->size);
 			return 0;
@@ -411,12 +411,12 @@ int spl_parse_image_header(struct spl_image_info *spl_image,
 
 #ifdef CONFIG_SPL_RAW_IMAGE_SUPPORT
 		/* Signature not found - assume u-boot.bin */
-		debug("mkimage signature not found - ih_magic = %x\n",
+		pr_debug("mkimage signature not found - ih_magic = %x\n",
 			header->ih_magic);
 		spl_set_header_raw_uboot(spl_image);
 #else
 		/* RAW image not supported, proceed to other boot methods. */
-		debug("Raw boot image support not enabled, proceeding to other boot methods\n");
+		pr_debug("Raw boot image support not enabled, proceeding to other boot methods\n");
 		return -EINVAL;
 #endif
 	}
@@ -431,7 +431,7 @@ __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
 	image_entry_noargs_t image_entry =
 		(image_entry_noargs_t)spl_image->entry_point;
 
-	debug("image entry point: 0x%lx\n", spl_image->entry_point);
+	pr_debug("image entry point: 0x%lx\n", spl_image->entry_point);
 	image_entry();
 }
 
@@ -469,7 +469,7 @@ static int write_spl_handoff(void)
 	ret = handoff_arch_save(ho);
 	if (ret)
 		return ret;
-	debug(SPL_TPL_PROMPT "Wrote SPL handoff\n");
+	pr_debug(SPL_TPL_PROMPT "Wrote SPL handoff\n");
 
 	return 0;
 }
@@ -512,7 +512,7 @@ static int spl_common_init(bool setup_malloc)
 #endif
 	ret = bootstage_init(u_boot_first_phase());
 	if (ret) {
-		debug("%s: Failed to set up bootstage: ret=%d\n", __func__,
+		pr_debug("%s: Failed to set up bootstage: ret=%d\n", __func__,
 		      ret);
 		return ret;
 	}
@@ -523,7 +523,7 @@ static int spl_common_init(bool setup_malloc)
 
 		ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
 		if (ret)
-			debug("%s: Failed to unstash bootstage: ret=%d\n",
+			pr_debug("%s: Failed to unstash bootstage: ret=%d\n",
 			      __func__, ret);
 	}
 #endif /* CONFIG_BOOTSTAGE_STASH */
@@ -532,14 +532,14 @@ static int spl_common_init(bool setup_malloc)
 #if CONFIG_IS_ENABLED(LOG)
 	ret = log_init();
 	if (ret) {
-		debug("%s: Failed to set up logging\n", __func__);
+		pr_debug("%s: Failed to set up logging\n", __func__);
 		return ret;
 	}
 #endif
 	if (CONFIG_IS_ENABLED(OF_REAL)) {
 		ret = fdtdec_setup();
 		if (ret) {
-			debug("fdtdec_setup() returned error %d\n", ret);
+			pr_debug("fdtdec_setup() returned error %d\n", ret);
 			return ret;
 		}
 	}
@@ -550,7 +550,7 @@ static int spl_common_init(bool setup_malloc)
 		ret = dm_init_and_scan(!CONFIG_IS_ENABLED(OF_PLATDATA));
 		bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_SPL);
 		if (ret) {
-			debug("dm_init_and_scan() returned error %d\n", ret);
+			pr_debug("dm_init_and_scan() returned error %d\n", ret);
 			return ret;
 		}
 	}
@@ -572,7 +572,7 @@ int spl_early_init(void)
 {
 	int ret;
 
-	debug("%s\n", __func__);
+	pr_debug("%s\n", __func__);
 
 	ret = spl_common_init(true);
 	if (ret)
@@ -588,7 +588,7 @@ int spl_init(void)
 	bool setup_malloc = !(IS_ENABLED(CONFIG_SPL_STACK_R) &&
 			IS_ENABLED(CONFIG_SPL_SYS_MALLOC_SIMPLE));
 
-	debug("%s\n", __func__);
+	pr_debug("%s\n", __func__);
 
 	if (!(gd->flags & GD_FLG_SPL_EARLY_INIT)) {
 		ret = spl_common_init(setup_malloc);
@@ -686,10 +686,17 @@ static int boot_from_devices(struct spl_image_info *spl_image,
 		    CONFIG_IS_ENABLED(LIBCOMMON_SUPPORT) &&
 		    !IS_ENABLED(CONFIG_SILENT_CONSOLE)) {
 			if (loader)
-				printf("Trying to boot from %s\n",
+			{
+				pr_debug("Trying to boot from %s\n",
 				       spl_loader_name(loader));
+#if IS_ENABLED(CONFIG_TARGET_SPACEMIT_K1X)
+				if (!strncmp("RAM", spl_loader_name(loader), 3)){
+					asm("ebreak");
+				}
+#endif
+			}
 			else if (CONFIG_IS_ENABLED(SHOW_ERRORS))
-				printf(SPL_TPL_PROMPT
+				pr_debug(SPL_TPL_PROMPT
 				       "Unsupported Boot Device %d\n", bootdev);
 			else
 				puts(SPL_TPL_PROMPT "Unsupported Boot Device!\n");
@@ -711,7 +718,7 @@ void board_init_f(ulong dummy)
 
 		ret = spl_early_init();
 		if (ret) {
-			debug("spl_early_init() failed: %d\n", ret);
+			pr_debug("spl_early_init() failed: %d\n", ret);
 			hang();
 		}
 	}
@@ -732,7 +739,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 	struct spl_image_info spl_image;
 	int ret;
 
-	debug(">>" SPL_TPL_PROMPT "board_init_r()\n");
+	pr_debug(">>" SPL_TPL_PROMPT "board_init_r()\n");
 
 	spl_set_bd();
 
@@ -754,7 +761,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 	if (CONFIG_IS_ENABLED(BLOBLIST)) {
 		ret = bloblist_init();
 		if (ret) {
-			debug("%s: Failed to set up bloblist: ret=%d\n",
+			pr_debug("%s: Failed to set up bloblist: ret=%d\n",
 			      __func__, ret);
 			puts(SPL_TPL_PROMPT "Cannot set up bloblist\n");
 			hang();
@@ -799,6 +806,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 #ifdef CONFIG_SYS_SPL_ARGS_ADDR
 	spl_image.arg = (void *)CONFIG_SYS_SPL_ARGS_ADDR;
 #endif
+
 	spl_image.boot_device = BOOT_DEVICE_NONE;
 	board_boot_order(spl_boot_list);
 
@@ -807,7 +815,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 	if (ret) {
 		if (CONFIG_IS_ENABLED(SHOW_ERRORS) &&
 		    CONFIG_IS_ENABLED(LIBCOMMON_SUPPORT))
-			printf(SPL_TPL_PROMPT "failed to boot from all boot devices (err=%d)\n",
+			pr_err(SPL_TPL_PROMPT "failed to boot from all boot devices (err=%d)\n",
 			       ret);
 		else
 			puts(SPL_TPL_PROMPT "failed to boot from all boot devices\n");
@@ -817,44 +825,46 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 	spl_perform_fixups(&spl_image);
 	if (CONFIG_IS_ENABLED(HANDOFF)) {
 		ret = write_spl_handoff();
-		if (ret)
-			printf(SPL_TPL_PROMPT
+		if (ret){
+			pr_err(SPL_TPL_PROMPT
 			       "SPL hand-off write failed (err=%d)\n", ret);
+		}
 	}
 	if (CONFIG_IS_ENABLED(BLOBLIST)) {
 		ret = bloblist_finish();
-		if (ret)
-			printf("Warning: Failed to finish bloblist (ret=%d)\n",
+		if (ret){
+			pr_err("Warning: Failed to finish bloblist (ret=%d)\n",
 			       ret);
+		}
 	}
 
 	switch (spl_image.os) {
 	case IH_OS_U_BOOT:
-		debug("Jumping to %s...\n", spl_phase_name(spl_next_phase()));
+		pr_debug("Jumping to %s...\n", spl_phase_name(spl_next_phase()));
 		break;
 #if CONFIG_IS_ENABLED(ATF)
 	case IH_OS_ARM_TRUSTED_FIRMWARE:
-		debug("Jumping to U-Boot via ARM Trusted Firmware\n");
+		pr_debug("Jumping to U-Boot via ARM Trusted Firmware\n");
 		spl_fixup_fdt(spl_image.fdt_addr);
 		spl_invoke_atf(&spl_image);
 		break;
 #endif
 #if CONFIG_IS_ENABLED(OPTEE_IMAGE)
 	case IH_OS_TEE:
-		debug("Jumping to U-Boot via OP-TEE\n");
+		pr_debug("Jumping to U-Boot via OP-TEE\n");
 		spl_board_prepare_for_optee(spl_image.fdt_addr);
 		jump_to_image_optee(&spl_image);
 		break;
 #endif
 #if CONFIG_IS_ENABLED(OPENSBI)
 	case IH_OS_OPENSBI:
-		debug("Jumping to U-Boot via RISC-V OpenSBI\n");
+		pr_debug("Jumping to U-Boot via RISC-V OpenSBI\n");
 		spl_invoke_opensbi(&spl_image);
 		break;
 #endif
 #if CONFIG_IS_ENABLED(OS_BOOT)
 	case IH_OS_LINUX:
-		debug("Jumping to Linux\n");
+		pr_debug("Jumping to Linux\n");
 #if defined(CONFIG_SYS_SPL_ARGS_ADDR)
 		spl_fixup_fdt((void *)CONFIG_SYS_SPL_ARGS_ADDR);
 #endif
@@ -862,18 +872,19 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 		jump_to_image_linux(&spl_image);
 #endif
 	default:
-		debug("Unsupported OS image.. Jumping nevertheless..\n");
+		pr_debug("Unsupported OS image.. Jumping nevertheless..\n");
 	}
 #if CONFIG_VAL(SYS_MALLOC_F_LEN) && !defined(CONFIG_SYS_SPL_MALLOC_SIZE)
-	debug("SPL malloc() used 0x%lx bytes (%ld KB)\n", gd->malloc_ptr,
+	pr_debug("SPL malloc() used 0x%lx bytes (%ld KB)\n", gd->malloc_ptr,
 	      gd->malloc_ptr / 1024);
 #endif
 	bootstage_mark_name(get_bootstage_id(false), "end phase");
 #ifdef CONFIG_BOOTSTAGE_STASH
 	ret = bootstage_stash((void *)CONFIG_BOOTSTAGE_STASH_ADDR,
 			      CONFIG_BOOTSTAGE_STASH_SIZE);
-	if (ret)
-		debug("Failed to stash bootstage: err=%d\n", ret);
+	if (ret){
+		pr_debug("Failed to stash bootstage: err=%d\n", ret);
+	}
 #endif
 
 	spl_board_prepare_for_boot();
@@ -920,7 +931,7 @@ __weak void spl_relocate_stack_check(void)
 			break;
 		ptr++;
 	}
-	printf("SPL initial stack usage: %lu bytes\n",
+	pr_debug("SPL initial stack usage: %lu bytes\n",
 	       CONFIG_VAL(SIZE_LIMIT_PROVIDE_STACK) - i);
 #endif
 }
@@ -954,7 +965,7 @@ ulong spl_relocate_stack_gd(void)
 
 #if defined(CONFIG_SPL_SYS_MALLOC_SIMPLE) && CONFIG_VAL(SYS_MALLOC_F_LEN)
 	if (CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN) {
-		debug("SPL malloc() before relocation used 0x%lx bytes (%ld KB)\n",
+		pr_debug("SPL malloc() before relocation used 0x%lx bytes (%ld KB)\n",
 		      gd->malloc_ptr, gd->malloc_ptr / 1024);
 		ptr -= CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN;
 		gd->malloc_base = ptr;

common/spl/spl_fastboot.c

@@ -0,0 +1,112 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2023 Spacemit, Inc
+ */
+
+#include <common.h>
+#include <image.h>
+#include <log.h>
+#include <spl.h>
+#include <asm/global_data.h>
+#include <mtd.h>
+#include <linux/err.h>
+#include <env.h>
+
+#include <g_dnl.h>
+#include <fastboot.h>
+#include <net.h>
+#include <usb.h>
+#include <watchdog.h>
+#include <linux/stringify.h>
+#include <vsprintf.h>
+
+static ulong spl_fastboot_load_read(struct spl_load_info *load, ulong sector,
+			       ulong count, void *buf)
+{
+	ulong addr;
+
+	pr_debug("%s: sector %lx, count %lx, buf %lx\n",
+	      __func__, sector, count, (ulong)buf);
+
+	addr = (ulong)CONFIG_SPL_LOAD_FIT_ADDRESS + sector;
+	if (CONFIG_IS_ENABLED(IMAGE_PRE_LOAD))
+		addr += image_load_offset;
+
+	memcpy(buf, (void *)addr, count);
+
+	return count;
+}
+
+
+
+static int run_fastboot_usb(void)
+{
+	int controller_index = 0;
+	int ret;
+
+	fastboot_init((void *)CONFIG_SPL_LOAD_FIT_ADDRESS, CONFIG_FASTBOOT_BUF_SIZE);
+	ret = usb_gadget_initialize(controller_index);
+	if (ret) {
+		pr_err("USB init failed: %d\n", ret);
+		return -1;
+	}
+
+	g_dnl_clear_detach();
+	ret = g_dnl_register("usb_dnl_fastboot");
+	if (ret)
+		return ret;
+
+	if (!g_dnl_board_usb_cable_connected()) {
+		puts("\rUSB cable not detected.\n" \
+		     "Command exit.\n");
+		ret = -1;
+		goto exit;
+	}
+
+	while (1) {
+		if (g_dnl_detach())
+			break;
+		if (ctrlc())
+			break;
+		WATCHDOG_RESET();
+		usb_gadget_handle_interrupts(controller_index);
+	}
+
+	ret = 0;
+
+exit:
+	g_dnl_unregister();
+	g_dnl_clear_detach();
+	usb_gadget_release(controller_index);
+
+	return ret;
+}
+
+
+static int spl_fastboot_load_image(struct spl_image_info *spl_image,
+			      struct spl_boot_device *bootdev)
+{
+	struct image_header *header;
+
+	if (run_fastboot_usb()){
+		pr_err("run fastboot fail\n");
+		return -1;
+	}
+
+	header = (struct image_header *)CONFIG_SPL_LOAD_FIT_ADDRESS;
+	if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
+	    image_get_magic(header) == FDT_MAGIC) {
+		struct spl_load_info load;
+
+		pr_debug("Found FIT\n");
+		load.bl_len = 1;
+		load.read = spl_fastboot_load_read;
+		spl_load_simple_fit(spl_image, &load, 0, header);
+	}else{
+		pr_debug("not support legacy image\n");
+		return -1;
+	}
+	return 0;
+}
+
+SPL_LOAD_IMAGE_METHOD("FASTBOOT", 0, BOOT_DEVICE_BOARD, spl_fastboot_load_image);

common/spl/spl_fit.c

@@ -17,6 +17,8 @@
 #include <asm/cache.h>
 #include <asm/global_data.h>
 #include <linux/libfdt.h>
+#include <cpu_func.h>
+#include <linux/kernel.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -91,7 +93,7 @@ static int spl_fit_get_image_name(const struct spl_fit_info *ctx,
 
 	name = fdt_getprop(ctx->fit, ctx->conf_node, type, &len);
 	if (!name) {
-		debug("cannot find property '%s': %d\n", type, len);
+		pr_debug("cannot find property '%s': %d\n", type, len);
 		return -EINVAL;
 	}
 
@@ -138,7 +140,7 @@ static int spl_fit_get_image_name(const struct spl_fit_info *ctx,
 	}
 
 	if (!found) {
-		debug("no string for index %d\n", index);
+		pr_debug("no string for index %d\n", index);
 		return -E2BIG;
 	}
 
@@ -169,7 +171,7 @@ static int spl_fit_get_image_node(const struct spl_fit_info *ctx,
 	if (err)
 		return err;
 
-	debug("%s: '%s'\n", type, str);
+	pr_debug("%s: '%s'\n", type, str);
 
 	node = fdt_subnode_offset(ctx->fit, ctx->images_node, str);
 	if (node < 0) {
@@ -249,23 +251,25 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 	const void *data;
 	const void *fit = ctx->fit;
 	bool external_data = false;
+	ulong flush_dcache_addr;
+	ulong flush_lenth;
 
 	if (IS_ENABLED(CONFIG_SPL_FPGA) ||
 	    (IS_ENABLED(CONFIG_SPL_OS_BOOT) && IS_ENABLED(CONFIG_SPL_GZIP))) {
 		if (fit_image_get_type(fit, node, &type))
 			puts("Cannot get image type.\n");
 		else
-			debug("%s ", genimg_get_type_name(type));
+			pr_debug("%s ", genimg_get_type_name(type));
 	}
 
 	if (IS_ENABLED(CONFIG_SPL_GZIP)) {
 		fit_image_get_comp(fit, node, &image_comp);
-		debug("%s ", genimg_get_comp_name(image_comp));
+		pr_debug("%s ", genimg_get_comp_name(image_comp));
 	}
 
 	if (fit_image_get_load(fit, node, &load_addr)) {
 		if (!image_info->load_addr) {
-			printf("Can't load %s: No load address and no buffer\n",
+			pr_debug("Can't load %s: No load address and no buffer\n",
 			       fit_get_name(fit, node, NULL));
 			return -ENOBUFS;
 		}
@@ -304,7 +308,7 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 			       nr_sectors, src_ptr) != nr_sectors)
 			return -EIO;
 
-		debug("External data: dst=%p, offset=%x, size=%lx\n",
+		pr_debug("External data: dst=%p, offset=%x, size=%lx\n",
 		      src_ptr, offset, (unsigned long)length);
 		src = src_ptr + overhead;
 	} else {
@@ -313,7 +317,7 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 			puts("Cannot get image data/size\n");
 			return -ENOENT;
 		}
-		debug("Embedded data: dst=%lx, size=%lx\n", load_addr,
+		pr_debug("Embedded data: dst=%lx, size=%lx\n", load_addr,
 		      (unsigned long)length);
 		src = (void *)data;	/* cast away const */
 	}
@@ -342,6 +346,10 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 		memcpy(load_ptr, src, length);
 	}
 
+	flush_dcache_addr = round_down((ulong)load_ptr,CONFIG_RISCV_CBOM_BLOCK_SIZE);
+	flush_lenth = round_up(length, CONFIG_RISCV_CBOM_BLOCK_SIZE);
+	flush_dcache_range(flush_dcache_addr, flush_dcache_addr + flush_lenth);
+
 	if (image_info) {
 		ulong entry_point;
 
@@ -385,7 +393,7 @@ static int spl_fit_append_fdt(struct spl_image_info *spl_image,
 	/* Figure out which device tree the board wants to use */
 	node = spl_fit_get_image_node(ctx, FIT_FDT_PROP, index++);
 	if (node < 0) {
-		debug("%s: cannot find FDT node\n", __func__);
+		pr_debug("%s: cannot find FDT node\n", __func__);
 
 		/*
 		 * U-Boot did not find a device tree inside the FIT image. Use
@@ -414,10 +422,10 @@ static int spl_fit_append_fdt(struct spl_image_info *spl_image,
 		for (; ; index++) {
 			node = spl_fit_get_image_node(ctx, FIT_FDT_PROP, index);
 			if (node == -E2BIG) {
-				debug("%s: No additional FDT node\n", __func__);
+				pr_debug("%s: No additional FDT node\n", __func__);
 				break;
 			} else if (node < 0) {
-				debug("%s: unable to find FDT node %d\n",
+				pr_debug("%s: unable to find FDT node %d\n",
 				      __func__, index);
 				continue;
 			}
@@ -431,7 +439,7 @@ static int spl_fit_append_fdt(struct spl_image_info *spl_image,
 				 */
 				tmpbuffer = malloc(CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY_BUF_SZ);
 				if (!tmpbuffer)
-					debug("%s: unable to allocate space for overlays\n",
+					pr_debug("%s: unable to allocate space for overlays\n",
 					      __func__);
 			}
 			image_info.load_addr = (ulong)tmpbuffer;
@@ -454,7 +462,7 @@ static int spl_fit_append_fdt(struct spl_image_info *spl_image,
 				break;
 			}
 
-			debug("%s: DT overlay %s applied\n", __func__,
+			pr_debug("%s: DT overlay %s applied\n", __func__,
 			      fit_get_name(ctx->fit, node, NULL));
 		}
 		free(tmpbuffer);
@@ -572,8 +580,8 @@ __weak void *spl_load_simple_fit_fix_load(const void *fit)
 
 static void warn_deprecated(const char *msg)
 {
-	printf("DEPRECATED: %s\n", msg);
-	printf("\tSee doc/uImage.FIT/source_file_format.txt\n");
+	pr_debug("DEPRECATED: %s\n", msg);
+	pr_debug("\tSee doc/uImage.FIT/source_file_format.txt\n");
 }
 
 static int spl_fit_upload_fpga(struct spl_fit_info *ctx, int node,
@@ -584,7 +592,7 @@ static int spl_fit_upload_fpga(struct spl_fit_info *ctx, int node,
 	int devnum = 0;
 	int flags = 0;
 
-	debug("FPGA bitstream at: %x, size: %x\n",
+	pr_debug("FPGA bitstream at: %x, size: %x\n",
 	      (u32)fpga_image->load_addr, fpga_image->size);
 
 	compatible = fdt_getprop(ctx->fit, node, "compatible", NULL);
@@ -594,14 +602,14 @@ static int spl_fit_upload_fpga(struct spl_fit_info *ctx, int node,
 		if (CONFIG_IS_ENABLED(FPGA_LOAD_SECURE))
 			flags = fpga_compatible2flag(devnum, compatible);
 		if (strcmp(compatible, "u-boot,fpga-legacy"))
-			debug("Ignoring compatible = %s property\n",
+			pr_debug("Ignoring compatible = %s property\n",
 			      compatible);
 	}
 
 	ret = fpga_load(devnum, (void *)fpga_image->load_addr,
 			fpga_image->size, BIT_FULL, flags);
 	if (ret) {
-		printf("%s: Cannot load the image to the FPGA\n", __func__);
+		pr_debug("%s: Cannot load the image to the FPGA\n", __func__);
 		return ret;
 	}
 
@@ -628,7 +636,7 @@ static int spl_fit_load_fpga(struct spl_fit_info *ctx,
 	/* Load the image and set up the fpga_image structure */
 	ret = spl_load_fit_image(info, sector, ctx, node, &fpga_image);
 	if (ret) {
-		printf("%s: Cannot load the FPGA: %i\n", __func__, ret);
+		pr_debug("%s: Cannot load the FPGA: %i\n", __func__, ret);
 		return ret;
 	}
 
@@ -664,7 +672,7 @@ static int spl_simple_fit_read(struct spl_fit_info *ctx,
 
 	count = info->read(info, sector, sectors, buf);
 	ctx->fit = buf;
-	debug("fit read sector %lx, sectors=%d, dst=%p, count=%lu, size=0x%lx\n",
+	pr_debug("fit read sector %lx, sectors=%d, dst=%p, count=%lu, size=0x%lx\n",
 	      sector, sectors, buf, count, size);
 
 	return (count == 0) ? -EIO : 0;
@@ -688,7 +696,7 @@ static int spl_simple_fit_parse(struct spl_fit_info *ctx)
 	/* find the node holding the images information */
 	ctx->images_node = fdt_path_offset(ctx->fit, FIT_IMAGES_PATH);
 	if (ctx->images_node < 0) {
-		debug("%s: Cannot find /images node: %d\n", __func__,
+		pr_debug("%s: Cannot find /images node: %d\n", __func__,
 		      ctx->images_node);
 		return -EINVAL;
 	}
@@ -736,7 +744,7 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 		node = spl_fit_get_image_node(&ctx, FIT_KERNEL_PROP, 0);
 
 	if (node < 0) {
-		debug("could not find firmware image, trying loadables...\n");
+		pr_debug("could not find firmware image, trying loadables...\n");
 		node = spl_fit_get_image_node(&ctx, "loadables", 0);
 		/*
 		 * If we pick the U-Boot image from "loadables", start at
@@ -745,7 +753,7 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 		index = 1;
 	}
 	if (node < 0) {
-		debug("%s: Cannot find u-boot image node: %d\n",
+		pr_debug("%s: Cannot find u-boot image node: %d\n",
 		      __func__, node);
 		return -1;
 	}
@@ -760,7 +768,7 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 	 * as a U-Boot image, if no OS-type has been declared.
 	 */
 	if (!spl_fit_image_get_os(ctx.fit, node, &spl_image->os))
-		debug("Image OS is %s\n", genimg_get_os_name(spl_image->os));
+		pr_debug("Image OS is %s\n", genimg_get_os_name(spl_image->os));
 	else if (!IS_ENABLED(CONFIG_SPL_OS_BOOT))
 		spl_image->os = IH_OS_U_BOOT;
 
@@ -794,7 +802,7 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 		image_info.load_addr = 0;
 		ret = spl_load_fit_image(info, sector, &ctx, node, &image_info);
 		if (ret < 0) {
-			printf("%s: can't load image loadables index %d (ret = %d)\n",
+			pr_debug("%s: can't load image loadables index %d (ret = %d)\n",
 			       __func__, index, ret);
 			return ret;
 		}
@@ -803,7 +811,7 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 			spl_fit_upload_fpga(&ctx, node, &image_info);
 
 		if (!spl_fit_image_get_os(ctx.fit, node, &os_type))
-			debug("Loadable is %s\n", genimg_get_os_name(os_type));
+			pr_debug("Loadable is %s\n", genimg_get_os_name(os_type));
 
 		if (os_takes_devicetree(os_type)) {
 			spl_fit_append_fdt(&image_info, info, sector, &ctx);

common/spl/spl_mmc.c

@@ -144,7 +144,7 @@ static int spl_mmc_get_device_index(u32 boot_device)
 	}
 
 #ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
-	printf("spl: unsupported mmc boot device.\n");
+	pr_debug("spl: unsupported mmc boot device.\n");
 #endif
 
 	return -ENODEV;
@@ -165,7 +165,7 @@ static int spl_mmc_find_device(struct mmc **mmcp, u32 boot_device)
 #endif /* DM_MMC */
 	if (err) {
 #ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
-		printf("spl: could not initialize mmc. error: %d\n", err);
+		pr_err("spl: could not initialize mmc. error: %d\n", err);
 #endif
 		return err;
 	}
@@ -173,7 +173,7 @@ static int spl_mmc_find_device(struct mmc **mmcp, u32 boot_device)
 	err = *mmcp ? 0 : -ENODEV;
 	if (err) {
 #ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
-		printf("spl: could not find mmc device %d. error: %d\n",
+		pr_err("spl: could not find mmc device %d. error: %d\n",
 		       mmc_dev, err);
 #endif
 		return err;
@@ -190,6 +190,7 @@ static int mmc_load_image_raw_partition(struct spl_image_info *spl_image,
 {
 	struct disk_partition info;
 	int err;
+	const char *part_name;
 
 #ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
 	int type_part;
@@ -206,6 +207,33 @@ static int mmc_load_image_raw_partition(struct spl_image_info *spl_image,
 	}
 #endif
 
+#ifdef CONFIG_SYS_LOAD_IMAGE_PARTITION_NAME
+	if (partition == CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION){
+		if (strlen(CONFIG_SYS_LOAD_IMAGE_PARTITION_NAME) > 0){
+			part_name = CONFIG_SYS_LOAD_IMAGE_PARTITION_NAME;
+		}
+	}
+#endif
+
+#ifdef CONFIG_SYS_LOAD_IMAGE_SEC_PARTITION_NAME
+	if (partition == CONFIG_SYS_LOAD_IMAGE_SEC_PARTITION_INDEX){
+		if (strlen(CONFIG_SYS_LOAD_IMAGE_SEC_PARTITION_NAME) > 0){
+			part_name = CONFIG_SYS_LOAD_IMAGE_SEC_PARTITION_NAME;
+		}
+	}
+#endif
+
+	for (int p = 1; p <= MAX_SEARCH_PARTITIONS; p++) {
+		err = part_get_info(mmc_get_blk_desc(mmc), p, &info);
+		if (err)
+			continue;
+		if (!strcmp(part_name, info.name)){
+			if (mmc_load_image_raw_sector(spl_image, bootdev, mmc, info.start) == 0)
+				return 0;
+			break;
+		}
+	}
+
 	err = part_get_info(mmc_get_blk_desc(mmc), partition, &info);
 	if (err) {
 #ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
@@ -297,7 +325,7 @@ static int spl_mmc_do_fs_boot(struct spl_image_info *spl_image,
 				break;
 			}
 		}
-		printf("Using first bootable partition: %d\n", partition);
+		pr_debug("Using first bootable partition: %d\n", partition);
 		if (partition == CONFIG_SYS_MMCSD_FS_BOOT_PARTITION) {
 			return -ENOSYS;
 		}
@@ -418,6 +446,7 @@ int spl_mmc_load(struct spl_image_info *spl_image,
 	static struct mmc *mmc;
 	u32 boot_mode;
 	int err = 0;
+	__maybe_unused int load_others_res = -1;
 	__maybe_unused int part = 0;
 	int mmc_dev;
 
@@ -432,7 +461,7 @@ int spl_mmc_load(struct spl_image_info *spl_image,
 		if (err) {
 			mmc = NULL;
 #ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
-			printf("spl: mmc init failed with error: %d\n", err);
+			pr_err("spl: mmc init failed with error: %d\n", err);
 #endif
 			return err;
 		}
@@ -468,11 +497,19 @@ int spl_mmc_load(struct spl_image_info *spl_image,
 		raw_sect = spl_mmc_get_uboot_raw_sector(mmc, raw_sect);
 
 #ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
+
+#ifdef CONFIG_SYS_LOAD_IMAGE_SEC_PARTITION
+		/*load second */
+		load_others_res = mmc_load_image_raw_partition(spl_image, bootdev,
+						   mmc, CONFIG_SYS_LOAD_IMAGE_SEC_PARTITION_INDEX,
+						   raw_sect);
+
+#endif
 		err = mmc_load_image_raw_partition(spl_image, bootdev,
 						   mmc, raw_part,
 						   raw_sect);
-		if (!err)
-			return err;
+		if (!err || !load_others_res)
+			return 0;
 #endif
 #ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
 		err = mmc_load_image_raw_sector(spl_image, bootdev, mmc,
@@ -484,9 +521,22 @@ int spl_mmc_load(struct spl_image_info *spl_image,
 	case MMCSD_MODE_FS:
 		debug("spl: mmc boot mode: fs\n");
 
+#ifdef CONFIG_SPL_FS_LOAD_OTHERS_FILES_NAME
+		pr_debug("load other itb file\n");
+		const char *other_filename = CONFIG_SPL_FS_LOAD_OTHERS_FILES_NAME;
+
+		/* if load other file file, it should not return fail directory, and
+			try to load the normal bootfile.
+		*/
+		load_others_res = spl_mmc_do_fs_boot(spl_image, bootdev, mmc, other_filename);
+		if (load_others_res){
+			pr_debug("load other file fail, try to load the normal boot file\n");
+		}
+
+#endif
 		err = spl_mmc_do_fs_boot(spl_image, bootdev, mmc, filename);
-		if (!err)
-			return err;
+		if (!err || !load_others_res)
+			return 0;
 
 		break;
 #ifdef CONFIG_SPL_LIBCOMMON_SUPPORT

common/spl/spl_mtd.c

@@ -0,0 +1,187 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2023 Spacemit, Inc
+ */
+
+#include <common.h>
+#include <image.h>
+#include <log.h>
+#include <spl.h>
+#include <asm/global_data.h>
+#include <mtd.h>
+#include <linux/err.h>
+#include <env.h>
+#include <mapmem.h>
+
+static uint mtd_len_to_pages(struct mtd_info *mtd, u64 len)
+{
+	do_div(len, mtd->writesize);
+
+	return len;
+}
+
+static bool mtd_is_aligned_with_min_io_size(struct mtd_info *mtd, u64 size)
+{
+	return !do_div(size, mtd->writesize);
+}
+
+static bool mtd_is_aligned_with_block_size(struct mtd_info *mtd, u64 size)
+{
+	return !do_div(size, mtd->erasesize);
+}
+
+static int spl_mtd_read(struct mtd_info *mtd, ulong sector, ulong count, void *buf)
+{
+	bool read, raw, woob, has_pages = false;
+	u64 start_off, off, len, remaining;
+	struct mtd_oob_ops io_op = {};
+	uint npages;
+	int ret = -1;
+
+	u8 *buffer = map_sysmem((u64)buf, 0);
+	if (!buffer)
+		return -1;
+
+	debug("sector:%lx, count:%lx, buffer:%lx\n", sector, count, (ulong)buffer);
+	start_off = sector;
+	if (!mtd_is_aligned_with_min_io_size(mtd, start_off)) {
+		pr_debug("Offset not aligned with a page (0x%x)\n",
+		       mtd->writesize);
+		return ret;
+	}
+
+	len = count;
+	if (!mtd_is_aligned_with_min_io_size(mtd, len)) {
+		len = round_up(len, mtd->writesize);
+		debug("Size not on a page boundary (0x%x), rounding to 0x%llx\n",
+		       mtd->writesize, len);
+	}
+	if (mtd->type == MTD_NANDFLASH || mtd->type == MTD_MLCNANDFLASH)
+		has_pages = true;
+
+	remaining = len;
+	npages = mtd_len_to_pages(mtd, len);
+
+	io_op.mode = raw ? MTD_OPS_RAW : MTD_OPS_AUTO_OOB;
+	io_op.len = has_pages ? mtd->writesize : len;
+	io_op.ooblen = woob ? mtd->oobsize : 0;
+	io_op.datbuf = buffer;
+	io_op.oobbuf = woob ? &buffer[len] : NULL;
+
+	/* Search for the first good block after the given offset */
+	off = start_off;
+	while (mtd_block_isbad(mtd, off))
+		off += mtd->erasesize;
+
+	/* Loop over the pages to do the actual read/write */
+	while (remaining) {
+		/* Skip the block if it is bad */
+		if (mtd_is_aligned_with_block_size(mtd, off) &&
+		    mtd_block_isbad(mtd, off)) {
+			off += mtd->erasesize;
+			continue;
+		}
+
+		ret = mtd_read_oob(mtd, off, &io_op);
+		if (ret) {
+			pr_debug("Failure while %s at offset 0x%llx\n",
+			       read ? "reading" : "writing", off);
+			break;
+		}
+
+		off += io_op.retlen;
+		remaining -= io_op.retlen;
+		io_op.datbuf += io_op.retlen;
+		io_op.oobbuf += io_op.oobretlen;
+	}
+	return ret;
+}
+
+
+static ulong spl_spi_load_read(struct spl_load_info *load, ulong sector,
+			       ulong count, void *buf)
+{
+	int ret;
+
+	debug("%s: sector %lx, count %lx, buf %lx\n",
+	      __func__, sector, count, (ulong)buf);
+
+	struct mtd_info *mtd = load->dev;
+	debug("%s, get mtd:%p\n", __func__, mtd);
+	ret = spl_mtd_read(mtd, sector, count, buf);
+	if (!ret)
+		return count;
+	else
+		return 0;
+}
+
+
+static int mtd_load_image(struct spl_image_info *spl_image,
+			      struct spl_boot_device *bootdev, struct mtd_info *mtd)
+{
+	struct image_header *header;
+	ulong len;
+	int err = 0;
+	len = sizeof(*header);
+	if (!mtd_is_aligned_with_min_io_size(mtd, len)) {
+		len = round_up(len, mtd->writesize);
+		pr_debug("Size not on a page boundary (0x%x), rounding to 0x%lx\n",
+		       mtd->writesize, len);
+	}
+
+	header = spl_get_load_buffer(-sizeof(*header), sizeof(*header));
+	err = spl_mtd_read(mtd, 0, len, (void *)header);
+	if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
+	    image_get_magic(header) == FDT_MAGIC) {
+		struct spl_load_info load;
+
+		debug("Found FIT\n");
+		load.dev = mtd;
+		load.priv = NULL;
+		load.filename = NULL;
+		load.bl_len = 1;
+		load.read = spl_spi_load_read;
+		err = spl_load_simple_fit(spl_image, &load, 0, header);
+	} else {
+		debug("unsupport Legacy image\n");
+		return -1;
+	}
+
+	return err;
+}
+
+
+static int spl_spi_load_image(struct spl_image_info *spl_image,
+			      struct spl_boot_device *bootdev)
+{
+	struct mtd_info *mtd;
+	int err = 0;
+	__maybe_unused int load_others_res = -1;
+
+	mtd_probe_devices();
+
+#ifdef CONFIG_SYS_LOAD_IMAGE_SEC_PARTITION_NAME
+	mtd = get_mtd_device_nm(CONFIG_SYS_LOAD_IMAGE_SEC_PARTITION_NAME);
+	if (IS_ERR_OR_NULL(mtd)){
+		debug("MTD device %s not found\n", CONFIG_SYS_LOAD_IMAGE_SEC_PARTITION_NAME);
+		return -1;
+	}
+	load_others_res = mtd_load_image(spl_image, bootdev, mtd);
+#endif
+
+	mtd = get_mtd_device_nm(CONFIG_SYS_LOAD_IMAGE_PARTITION_NAME);
+	if (IS_ERR_OR_NULL(mtd)){
+		debug("MTD device %s not found\n", CONFIG_SYS_LOAD_IMAGE_PARTITION_NAME);
+		return -1;
+	}
+	err = mtd_load_image(spl_image, bootdev, mtd);
+
+	if (!err || !load_others_res)
+		return 0;
+	else
+		return -1;
+}
+
+/* Use priorty 1 so that boards can override this */
+SPL_LOAD_IMAGE_METHOD("MTD-NOR", 0, BOOT_DEVICE_NOR, spl_spi_load_image);
+SPL_LOAD_IMAGE_METHOD("MTD-NAND", 0, BOOT_DEVICE_NAND, spl_spi_load_image);

common/spl/spl_opensbi.c

@@ -57,8 +57,12 @@ void spl_invoke_opensbi(struct spl_image_info *spl_image)
 	/* Find U-Boot image in /fit-images */
 	ret = spl_opensbi_find_uboot_node(spl_image->fdt_addr, &uboot_node);
 	if (ret) {
-		pr_err("Can't find U-Boot node, %d\n", ret);
+		debug("Can't find U-Boot node, %d\n", ret);
+#ifdef CONFIG_SYS_LOAD_IMAGE_SEC_PARTITION
+		debug("had defined another file to load, maybe the uboot node set in it\n");
+#else
 		hang();
+#endif
 	}
 
 	/* Get U-Boot entry point */
@@ -66,6 +70,10 @@ void spl_invoke_opensbi(struct spl_image_info *spl_image)
 	if (ret)
 		ret = fit_image_get_load(spl_image->fdt_addr, uboot_node, &uboot_entry);
 
+#ifdef CONFIG_SYS_LOAD_IMAGE_SEC_PARTITION
+	/*if load other image, uboot_entry maybe not true, set to TEXT_BASE directory*/
+	uboot_entry = CONFIG_SYS_TEXT_BASE;
+#endif
 	/* Prepare opensbi_info object */
 	opensbi_info.magic = FW_DYNAMIC_INFO_MAGIC_VALUE;
 	opensbi_info.version = FW_DYNAMIC_INFO_VERSION;

common/spl/spl_ram.c

@@ -94,6 +94,7 @@ static int spl_ram_load_image(struct spl_image_info *spl_image,
 
 	return 0;
 }
+
 #if CONFIG_IS_ENABLED(RAM_DEVICE)
 SPL_LOAD_IMAGE_METHOD("RAM", 0, BOOT_DEVICE_RAM, spl_ram_load_image);
 #endif

common/splash.c

@@ -57,7 +57,7 @@ static struct splash_location default_splash_locations[] = {
 
 #include <bmp_logo_data.h>
 
-static int splash_video_logo_load(void)
+int splash_video_logo_load(void)
 {
 	char *splashimage;
 	ulong bmp_load_addr;
@@ -78,7 +78,7 @@ static int splash_video_logo_load(void)
 	return 0;
 }
 #else
-static inline int splash_video_logo_load(void) { return -ENOSYS; }
+inline int splash_video_logo_load(void) { return -ENOSYS; }
 #endif
 
 __weak int splash_screen_prepare(void)

common/splash_source.c

@@ -22,6 +22,7 @@
 #include <usb.h>
 #include <virtio.h>
 #include <asm/global_data.h>
+#include <stdint.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -127,6 +128,9 @@ static int splash_select_fs_dev(struct splash_location *location)
 	case SPLASH_STORAGE_SATA:
 		res = fs_set_blk_dev("sata", location->devpart, FS_TYPE_ANY);
 		break;
+	case SPLASH_STORAGE_NVME:
+		res = fs_set_blk_dev("nvme", location->devpart, FS_TYPE_ANY);
+		break;
 	case SPLASH_STORAGE_NAND:
 		if (location->ubivol != NULL)
 			res = fs_set_blk_dev("ubi", NULL, FS_TYPE_UBIFS);
@@ -201,7 +205,7 @@ static int splash_mount_ubifs(struct splash_location *location)
 	if (res)
 		return res;
 
-	sprintf(cmd, "ubifsmount %s", location->ubivol);
+	sprintf(cmd, "ubifsmount ubi0:%s", location->ubivol);
 	res = run_command(cmd, 0);
 
 	return res;
@@ -263,6 +267,10 @@ static int splash_load_fs(struct splash_location *location, u32 bmp_load_addr)
 		goto out;
 	}
 
+	res = splash_select_fs_dev(location);
+	if (res)
+		goto out;
+
 	if (bmp_load_addr + bmp_size >= gd->start_addr_sp) {
 		printf("Error: splashimage address too high. Data overwrites U-Boot and/or placed beyond DRAM boundaries.\n");
 		res = -EFAULT;
@@ -337,7 +345,7 @@ static int splash_load_fit(struct splash_location *location, u32 bmp_load_addr)
 	if (res < 0)
 		return res;
 
-	img_header = (struct image_header *)bmp_load_addr;
+	img_header = (struct image_header *)(uintptr_t)bmp_load_addr;
 	if (image_get_magic(img_header) != FDT_MAGIC) {
 		printf("Could not find FDT magic\n");
 		return -EINVAL;
@@ -347,7 +355,7 @@ static int splash_load_fit(struct splash_location *location, u32 bmp_load_addr)
 
 	/* Read in entire FIT */
 	fit_header = (const u32 *)(bmp_load_addr + header_size);
-	res = splash_storage_read_raw(location, (u32)fit_header, fit_size);
+	res = splash_storage_read_raw(location, (uintptr_t)fit_header, fit_size);
 	if (res < 0)
 		return res;
 
@@ -372,7 +380,7 @@ static int splash_load_fit(struct splash_location *location, u32 bmp_load_addr)
 	/* Extract the splash data from FIT */
 	/* 1. Test if splash is in FIT internal data. */
 	if (!fit_image_get_data(fit_header, node_offset, &internal_splash_data, &internal_splash_size))
-		memmove((void *)bmp_load_addr, internal_splash_data, internal_splash_size);
+		memmove((void *)(uintptr_t)bmp_load_addr, internal_splash_data, internal_splash_size);
 	/* 2. Test if splash is in FIT external data with fixed position. */
 	else if (!fit_image_get_data_position(fit_header, node_offset, &external_splash_addr))
 		is_splash_external = true;

common/usb.c

@@ -73,7 +73,7 @@ int usb_init(void)
 	/* init low_level USB */
 	for (i = 0; i < CONFIG_USB_MAX_CONTROLLER_COUNT; i++) {
 		/* init low_level USB */
-		printf("USB%d:   ", i);
+		pr_debug("USB%d:   ", i);
 		ret = usb_lowlevel_init(i, USB_INIT_HOST, &ctrl);
 		if (ret == -ENODEV) {	/* No such device. */
 			puts("Port not available.\n");
@@ -91,7 +91,7 @@ int usb_init(void)
 		 */
 		controllers_initialized++;
 		start_index = dev_index;
-		printf("scanning bus %d for devices... ", i);
+		pr_debug("scanning bus %d for devices... ", i);
 		ret = usb_alloc_new_device(ctrl, &dev);
 		if (ret)
 			break;
@@ -108,7 +108,7 @@ int usb_init(void)
 			puts("No USB Device found\n");
 			continue;
 		} else {
-			printf("%d USB Device(s) found\n",
+			pr_debug("%d USB Device(s) found\n",
 				dev_index - start_index);
 		}
 
@@ -136,8 +136,9 @@ int usb_stop(void)
 		usb_hub_reset();
 
 		for (i = 0; i < CONFIG_USB_MAX_CONTROLLER_COUNT; i++) {
-			if (usb_lowlevel_stop(i))
-				printf("failed to stop USB controller %d\n", i);
+			if (usb_lowlevel_stop(i)){
+				pr_err("failed to stop USB controller %d\n", i);
+			}
 		}
 	}
 
@@ -390,12 +391,12 @@ static int usb_parse_config(struct usb_device *dev,
 	dev->configno = cfgno;
 	head = (struct usb_descriptor_header *) &buffer[0];
 	if (head->bDescriptorType != USB_DT_CONFIG) {
-		printf(" ERROR: NOT USB_CONFIG_DESC %x\n",
+		pr_err(" ERROR: NOT USB_CONFIG_DESC %x\n",
 			head->bDescriptorType);
 		return -EINVAL;
 	}
 	if (head->bLength != USB_DT_CONFIG_SIZE) {
-		printf("ERROR: Invalid USB CFG length (%d)\n", head->bLength);
+		pr_err("ERROR: Invalid USB CFG length (%d)\n", head->bLength);
 		return -EINVAL;
 	}
 	memcpy(&dev->config, head, USB_DT_CONFIG_SIZE);
@@ -409,7 +410,7 @@ static int usb_parse_config(struct usb_device *dev,
 		switch (head->bDescriptorType) {
 		case USB_DT_INTERFACE:
 			if (head->bLength != USB_DT_INTERFACE_SIZE) {
-				printf("ERROR: Invalid USB IF length (%d)\n",
+				pr_err("ERROR: Invalid USB IF length (%d)\n",
 					head->bLength);
 				break;
 			}
@@ -446,7 +447,7 @@ static int usb_parse_config(struct usb_device *dev,
 		case USB_DT_ENDPOINT:
 			if (head->bLength != USB_DT_ENDPOINT_SIZE &&
 			    head->bLength != USB_DT_ENDPOINT_AUDIO_SIZE) {
-				printf("ERROR: Invalid USB EP length (%d)\n",
+				pr_err("ERROR: Invalid USB EP length (%d)\n",
 					head->bLength);
 				break;
 			}
@@ -462,7 +463,7 @@ static int usb_parse_config(struct usb_device *dev,
 			epno = dev->config.if_desc[ifno].no_of_ep;
 			if_desc = &dev->config.if_desc[ifno];
 			if (epno >= USB_MAXENDPOINTS) {
-				printf("Interface %d has too many endpoints!\n",
+				pr_debug("Interface %d has too many endpoints!\n",
 					if_desc->desc.bInterfaceNumber);
 				return -EINVAL;
 			}
@@ -483,7 +484,7 @@ static int usb_parse_config(struct usb_device *dev,
 			break;
 		case USB_DT_SS_ENDPOINT_COMP:
 			if (head->bLength != USB_DT_SS_EP_COMP_SIZE) {
-				printf("ERROR: Invalid USB EPC length (%d)\n",
+				pr_err("ERROR: Invalid USB EPC length (%d)\n",
 					head->bLength);
 				break;
 			}
@@ -580,12 +581,13 @@ int usb_get_configuration_len(struct usb_device *dev, int cfgno)
 	config = (struct usb_config_descriptor *)&buffer[0];
 	result = usb_get_descriptor(dev, USB_DT_CONFIG, cfgno, buffer, 9);
 	if (result < 9) {
-		if (result < 0)
-			printf("unable to get descriptor, error %lX\n",
+		if (result < 0){
+			pr_err("unable to get descriptor, error %lX\n",
 				dev->status);
-		else
-			printf("config descriptor too short " \
+		}else{
+			pr_debug("config descriptor too short " \
 				"(expected %i, got %i)\n", 9, result);
+		}
 		return -EIO;
 	}
 	return le16_to_cpu(config->wTotalLength);
@@ -636,7 +638,7 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate)
 		}
 	}
 	if (!if_face) {
-		printf("selecting invalid interface %d", interface);
+		pr_err("selecting invalid interface %d", interface);
 		return -EINVAL;
 	}
 	/*
@@ -875,7 +877,7 @@ int usb_alloc_new_device(struct udevice *controller, struct usb_device **devp)
 	int i;
 	debug("New Device %d\n", dev_index);
 	if (dev_index == USB_MAX_DEVICE) {
-		printf("ERROR, too many USB Devices, max=%d\n", USB_MAX_DEVICE);
+		pr_err("ERROR, too many USB Devices, max=%d\n", USB_MAX_DEVICE);
 		return -ENOSPC;
 	}
 	/* default Address is 0, real addresses start with 1 */
@@ -935,11 +937,11 @@ static int get_descriptor_len(struct usb_device *dev, int len, int expect_len)
 	err = usb_get_descriptor(dev, USB_DT_DEVICE, 0, desc, len);
 	if (err < expect_len) {
 		if (err < 0) {
-			printf("unable to get device descriptor (error=%d)\n",
+			pr_err("unable to get device descriptor (error=%d)\n",
 				err);
 			return err;
 		} else {
-			printf("USB device descriptor short read (expected %i, got %i)\n",
+			pr_debug("USB device descriptor short read (expected %i, got %i)\n",
 				expect_len, err);
 			return -EIO;
 		}
@@ -1017,7 +1019,7 @@ static int usb_setup_descriptor(struct usb_device *dev, bool do_read)
 		dev->maxpacketsize = PACKET_SIZE_64;
 		break;
 	default:
-		printf("%s: invalid max packet size\n", __func__);
+		pr_err("%s: invalid max packet size\n", __func__);
 		return -EIO;
 	}
 
@@ -1037,7 +1039,7 @@ static int usb_prepare_device(struct usb_device *dev, int addr, bool do_read,
 	 */
 	err = usb_alloc_device(dev);
 	if (err) {
-		printf("Cannot allocate device context to get SLOT_ID\n");
+		pr_err("Cannot allocate device context to get SLOT_ID\n");
 		return err;
 	}
 	err = usb_setup_descriptor(dev, do_read);
@@ -1052,7 +1054,7 @@ static int usb_prepare_device(struct usb_device *dev, int addr, bool do_read,
 	err = usb_set_address(dev); /* set address */
 
 	if (err < 0) {
-		printf("\n      USB device not accepting new address " \
+		pr_err("\n      USB device not accepting new address " \
 			"(error=%lX)\n", dev->status);
 		return err;
 	}
@@ -1106,7 +1108,7 @@ int usb_select_config(struct usb_device *dev)
 			err = usb_get_configuration_no(dev, 0, tmpbuf, err);
 	}
 	if (err < 0) {
-		printf("usb_new_device: Cannot read configuration, " \
+		pr_err("usb_new_device: Cannot read configuration, " \
 		       "skipping device %04x:%04x\n",
 		       dev->descriptor.idVendor, dev->descriptor.idProduct);
 		free(tmpbuf);
@@ -1122,7 +1124,7 @@ int usb_select_config(struct usb_device *dev)
 	 */
 	err = usb_set_configuration(dev, dev->config.desc.bConfigurationValue);
 	if (err < 0) {
-		printf("failed to set default configuration " \
+		pr_err("failed to set default configuration " \
 			"len %d, status %lX\n", dev->act_len, dev->status);
 		return err;
 	}
@@ -1252,7 +1254,7 @@ void usb_find_usb2_hub_address_port(struct usb_device *udev,
 		struct udevice *dev = parent;
 
 		if (device_get_uclass_id(dev->parent) != UCLASS_USB_HUB) {
-			printf("Error: Cannot find high speed parent of usb-1 device\n");
+			pr_err("Error: Cannot find high speed parent of usb-1 device\n");
 			*hub_address = 0;
 			*hub_port = 0;
 			return;
@@ -1279,7 +1281,7 @@ void usb_find_usb2_hub_address_port(struct usb_device *udev,
 			return;
 		}
 
-	printf("Error: Cannot find high speed parent of usb-1 device\n");
+	pr_err("Error: Cannot find high speed parent of usb-1 device\n");
 	*hub_address = 0;
 	*hub_port = 0;
 }

configs/k1-x_fpga_1x4_defconfig

@@ -0,0 +1,134 @@
+CONFIG_RISCV=y
+CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_SYS_MALLOC_LEN=0x800000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_ENV_SIZE=0x4000
+CONFIG_ENV_OFFSET=0x80000
+CONFIG_DEFAULT_DEVICE_TREE="k1-x_fpga_1x4"
+CONFIG_SPL_TEXT_BASE=0xC0801000
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SIZE_LIMIT=0x30000
+CONFIG_SPL=y
+CONFIG_SYS_LOAD_ADDR=0x200000
+# CONFIG_AHCI is not set
+CONFIG_TARGET_SPACEMIT_K1X=y
+CONFIG_SPL_OPENSBI_LOAD_ADDR=0x0
+CONFIG_ARCH_RV64I=y
+CONFIG_RISCV_SMODE=y
+CONFIG_LOCALVERSION="spacemit"
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000000
+CONFIG_STACK_SIZE=0x100000
+CONFIG_FIT=y
+# CONFIG_FIT_FULL_CHECK is not set
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x40000000
+# CONFIG_BOOTSTD is not set
+# CONFIG_LEGACY_IMAGE_FORMAT is not set
+CONFIG_SUPPORT_RAW_INITRD=y
+CONFIG_BOOTDELAY=0
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_STOP_STR="s"
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="bootm 0x50000000"
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+CONFIG_SPL_MAX_SIZE=0x30000
+CONFIG_SPL_PAD_TO=0x0
+CONFIG_SPL_BSS_START_ADDR=0xC0830000
+CONFIG_SPL_BSS_MAX_SIZE=0x8000
+CONFIG_SPL_BOARD_INIT=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK=0xc0840000
+CONFIG_SYS_SPL_MALLOC=y
+CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y
+CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x4000000
+CONFIG_SYS_SPL_MALLOC_SIZE=0x2000000
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_NAME="opensbi"
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SEC_PARTITION=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SEC_PARTITION_INDEX=0x2
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SEC_PARTITION_NAME="uboot"
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DM_RESET=y
+CONFIG_SPL_USB_GADGET=y
+CONFIG_SPL_FASTBOOT_LOAD=y
+CONFIG_SPL_USB_SDP_SUPPORT=y
+CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
+# CONFIG_CMD_CPU is not set
+CONFIG_SYS_BOOTM_LEN=0xa000000
+CONFIG_CMD_GPT=y
+CONFIG_CMD_GPT_RENAME=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_BKOPS_ENABLE=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_PART=y
+# CONFIG_CMD_SCSI is not set
+CONFIG_CMD_DHCP=y
+CONFIG_SYS_DISABLE_AUTOLOAD=y
+CONFIG_CMD_PXE=y
+CONFIG_CMD_SYSBOOT=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_CMD_MTDPARTS_SPREAD=y
+CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES=y
+CONFIG_MTDIDS_DEFAULT="nor0=spi-nor"
+CONFIG_MTDPARTS_DEFAULT="spi-nor:448K(reserve),2M(uboot)"
+CONFIG_SPACEMIT_FLASH=y
+CONFIG_SPL_FASTBOOT=y
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_ENV_IS_NOWHERE=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_MMC_ENV_DEV=1
+# CONFIG_SPL_ENV_IS_NOWHERE is not set
+CONFIG_PROT_UDP=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_IP_DEFRAG=y
+CONFIG_KEEP_SERVERADDR=y
+CONFIG_BOOTP_SERVERIP=y
+CONFIG_DEVRES=y
+# CONFIG_SCSI_AHCI is not set
+# CONFIG_CLK is not set
+CONFIG_DMA=y
+CONFIG_DMA_CHANNELS=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x40000000
+CONFIG_FASTBOOT_BUF_SIZE=0x10000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=1
+CONFIG_FASTBOOT_MMC_BOOT_SUPPORT=y
+CONFIG_FASTBOOT_MMC_BOOT1_NAME="fsbl"
+CONFIG_FASTBOOT_MMC_BOOT2_NAME="fsbl_1"
+# CONFIG_GPIO is not set
+# CONFIG_I2C is not set
+# CONFIG_INPUT is not set
+CONFIG_MISC=y
+CONFIG_MMC=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ADMA=y
+CONFIG_MMC_SDHCI_K1X=y
+CONFIG_DM_MTD=y
+# CONFIG_MTD_NOR_FLASH is not set
+CONFIG_SPACEMIT_K1X_EMAC=y
+CONFIG_NVME_PCI=y
+CONFIG_PCIE_DW_K1X=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_SINGLE=y
+CONFIG_RESET_SPACEMIT_K1X=y
+# CONFIG_SCSI is not set
+# CONFIG_DM_SCSI is not set
+CONFIG_SYS_NS16550_IER=0x40
+# CONFIG_HTIF_CONSOLE is not set
+# CONFIG_SIFIVE_SERIAL is not set
+CONFIG_TIMER_EARLY=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_VENDOR_NUM=0x361C
+CONFIG_USB_GADGET_PRODUCT_NUM=0x1001
+CONFIG_USB2_K1X_CI=y
+# CONFIG_BINMAN_FDT is not set
+# CONFIG_SPL_USE_TINY_PRINTF is not set

configs/k1-x_fpga_2x2_defconfig

@@ -0,0 +1,134 @@
+CONFIG_RISCV=y
+CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_SYS_MALLOC_LEN=0x800000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_ENV_SIZE=0x4000
+CONFIG_ENV_OFFSET=0x80000
+CONFIG_DEFAULT_DEVICE_TREE="k1-x_fpga_2x2"
+CONFIG_SPL_TEXT_BASE=0xC0801000
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SIZE_LIMIT=0x30000
+CONFIG_SPL=y
+CONFIG_SYS_LOAD_ADDR=0x200000
+# CONFIG_AHCI is not set
+CONFIG_TARGET_SPACEMIT_K1X=y
+CONFIG_SPL_OPENSBI_LOAD_ADDR=0x0
+CONFIG_ARCH_RV64I=y
+CONFIG_RISCV_SMODE=y
+CONFIG_LOCALVERSION="spacemit"
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000000
+CONFIG_STACK_SIZE=0x100000
+CONFIG_FIT=y
+# CONFIG_FIT_FULL_CHECK is not set
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x40000000
+# CONFIG_BOOTSTD is not set
+# CONFIG_LEGACY_IMAGE_FORMAT is not set
+CONFIG_SUPPORT_RAW_INITRD=y
+CONFIG_BOOTDELAY=0
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_STOP_STR="s"
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="bootm 0x50000000"
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+CONFIG_SPL_MAX_SIZE=0x30000
+CONFIG_SPL_PAD_TO=0x0
+CONFIG_SPL_BSS_START_ADDR=0xC0830000
+CONFIG_SPL_BSS_MAX_SIZE=0x8000
+CONFIG_SPL_BOARD_INIT=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK=0xc0840000
+CONFIG_SYS_SPL_MALLOC=y
+CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y
+CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x4000000
+CONFIG_SYS_SPL_MALLOC_SIZE=0x2000000
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_NAME="opensbi"
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SEC_PARTITION=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SEC_PARTITION_INDEX=0x2
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SEC_PARTITION_NAME="uboot"
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DM_RESET=y
+CONFIG_SPL_USB_GADGET=y
+CONFIG_SPL_FASTBOOT_LOAD=y
+CONFIG_SPL_USB_SDP_SUPPORT=y
+CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
+# CONFIG_CMD_CPU is not set
+CONFIG_SYS_BOOTM_LEN=0xa000000
+CONFIG_CMD_GPT=y
+CONFIG_CMD_GPT_RENAME=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_BKOPS_ENABLE=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_PART=y
+# CONFIG_CMD_SCSI is not set
+CONFIG_CMD_DHCP=y
+CONFIG_SYS_DISABLE_AUTOLOAD=y
+CONFIG_CMD_PXE=y
+CONFIG_CMD_SYSBOOT=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_CMD_MTDPARTS_SPREAD=y
+CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES=y
+CONFIG_MTDIDS_DEFAULT="nor0=spi-nor"
+CONFIG_MTDPARTS_DEFAULT="spi-nor:448K(reserve),2M(uboot)"
+CONFIG_SPACEMIT_FLASH=y
+CONFIG_SPL_FASTBOOT=y
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_ENV_IS_NOWHERE=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_MMC_ENV_DEV=1
+# CONFIG_SPL_ENV_IS_NOWHERE is not set
+CONFIG_PROT_UDP=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_IP_DEFRAG=y
+CONFIG_KEEP_SERVERADDR=y
+CONFIG_BOOTP_SERVERIP=y
+CONFIG_DEVRES=y
+# CONFIG_SCSI_AHCI is not set
+# CONFIG_CLK is not set
+CONFIG_DMA=y
+CONFIG_DMA_CHANNELS=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x40000000
+CONFIG_FASTBOOT_BUF_SIZE=0x10000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=1
+CONFIG_FASTBOOT_MMC_BOOT_SUPPORT=y
+CONFIG_FASTBOOT_MMC_BOOT1_NAME="fsbl"
+CONFIG_FASTBOOT_MMC_BOOT2_NAME="fsbl_1"
+# CONFIG_GPIO is not set
+# CONFIG_I2C is not set
+# CONFIG_INPUT is not set
+CONFIG_MISC=y
+CONFIG_MMC=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ADMA=y
+CONFIG_MMC_SDHCI_K1X=y
+CONFIG_DM_MTD=y
+# CONFIG_MTD_NOR_FLASH is not set
+CONFIG_SPACEMIT_K1X_EMAC=y
+CONFIG_NVME_PCI=y
+CONFIG_PCIE_DW_K1X=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_SINGLE=y
+CONFIG_RESET_SPACEMIT_K1X=y
+# CONFIG_SCSI is not set
+# CONFIG_DM_SCSI is not set
+CONFIG_SYS_NS16550_IER=0x40
+# CONFIG_HTIF_CONSOLE is not set
+# CONFIG_SIFIVE_SERIAL is not set
+CONFIG_TIMER_EARLY=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_VENDOR_NUM=0x361C
+CONFIG_USB_GADGET_PRODUCT_NUM=0x1001
+CONFIG_USB2_K1X_CI=y
+# CONFIG_BINMAN_FDT is not set
+# CONFIG_SPL_USE_TINY_PRINTF is not set

configs/k1-x_fpga_defconfig

@@ -0,0 +1,137 @@
+CONFIG_RISCV=y
+CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_SYS_MALLOC_LEN=0x800000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_ENV_SIZE=0x4000
+CONFIG_ENV_OFFSET=0x80000
+CONFIG_DEFAULT_DEVICE_TREE="k1-x_fpga"
+CONFIG_SPL_TEXT_BASE=0xC0801000
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SIZE_LIMIT=0x30000
+CONFIG_SPL=y
+CONFIG_SYS_LOAD_ADDR=0x200000
+# CONFIG_AHCI is not set
+CONFIG_TARGET_SPACEMIT_K1X=y
+CONFIG_SPL_OPENSBI_LOAD_ADDR=0x0
+CONFIG_ARCH_RV64I=y
+CONFIG_RISCV_SMODE=y
+CONFIG_LOCALVERSION="spacemit"
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000000
+CONFIG_STACK_SIZE=0x100000
+CONFIG_FIT=y
+# CONFIG_FIT_FULL_CHECK is not set
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x40000000
+# CONFIG_BOOTSTD is not set
+# CONFIG_LEGACY_IMAGE_FORMAT is not set
+CONFIG_SUPPORT_RAW_INITRD=y
+CONFIG_BOOTDELAY=0
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_STOP_STR="s"
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="bootm 0x50000000"
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+CONFIG_SPL_MAX_SIZE=0x30000
+CONFIG_SPL_PAD_TO=0x0
+CONFIG_SPL_BSS_START_ADDR=0xC0830000
+CONFIG_SPL_BSS_MAX_SIZE=0x8000
+CONFIG_SPL_BOARD_INIT=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK=0xc0840000
+CONFIG_SYS_SPL_MALLOC=y
+CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y
+CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x4000000
+CONFIG_SYS_SPL_MALLOC_SIZE=0x2000000
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_NAME="opensbi"
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SEC_PARTITION=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SEC_PARTITION_INDEX=0x2
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SEC_PARTITION_NAME="uboot"
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_DM_RESET=y
+CONFIG_SPL_USB_GADGET=y
+CONFIG_SPL_FASTBOOT_LOAD=y
+CONFIG_SPL_USB_SDP_SUPPORT=y
+CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
+# CONFIG_CMD_CPU is not set
+CONFIG_SYS_BOOTM_LEN=0xa000000
+CONFIG_CMD_GPT=y
+CONFIG_CMD_GPT_RENAME=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_BKOPS_ENABLE=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_PART=y
+# CONFIG_CMD_SCSI is not set
+CONFIG_CMD_DHCP=y
+CONFIG_SYS_DISABLE_AUTOLOAD=y
+CONFIG_CMD_PXE=y
+CONFIG_CMD_SYSBOOT=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_CMD_MTDPARTS_SPREAD=y
+CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES=y
+CONFIG_MTDIDS_DEFAULT="nor0=spi-nor"
+CONFIG_MTDPARTS_DEFAULT="spi-nor:448K(reserve),2M(uboot)"
+CONFIG_SPACEMIT_FLASH=y
+CONFIG_SPL_FASTBOOT=y
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_ENV_IS_NOWHERE=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_MMC_ENV_DEV=1
+# CONFIG_SPL_ENV_IS_NOWHERE is not set
+CONFIG_PROT_UDP=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_IP_DEFRAG=y
+CONFIG_KEEP_SERVERADDR=y
+CONFIG_BOOTP_SERVERIP=y
+CONFIG_DEVRES=y
+# CONFIG_SCSI_AHCI is not set
+CONFIG_SPACEMIT_K1X_CCU=y
+CONFIG_DMA=y
+CONFIG_DMA_CHANNELS=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x40000000
+CONFIG_FASTBOOT_BUF_SIZE=0x10000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=1
+CONFIG_FASTBOOT_MMC_BOOT_SUPPORT=y
+CONFIG_FASTBOOT_MMC_BOOT1_NAME="fsbl"
+CONFIG_FASTBOOT_MMC_BOOT2_NAME="fsbl_1"
+# CONFIG_GPIO is not set
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_SPACEMIT=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+# CONFIG_INPUT is not set
+CONFIG_MISC=y
+CONFIG_MMC=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ADMA=y
+CONFIG_MMC_SDHCI_K1X=y
+CONFIG_DM_MTD=y
+# CONFIG_MTD_NOR_FLASH is not set
+CONFIG_SPACEMIT_K1X_EMAC=y
+CONFIG_NVME_PCI=y
+CONFIG_PCIE_DW_K1X=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_SINGLE=y
+CONFIG_RESET_SPACEMIT_K1X=y
+# CONFIG_SCSI is not set
+# CONFIG_DM_SCSI is not set
+CONFIG_SYS_NS16550_IER=0x40
+# CONFIG_HTIF_CONSOLE is not set
+# CONFIG_SIFIVE_SERIAL is not set
+CONFIG_TIMER_EARLY=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_VENDOR_NUM=0x361C
+CONFIG_USB_GADGET_PRODUCT_NUM=0x1001
+CONFIG_USB2_K1X_CI=y
+# CONFIG_BINMAN_FDT is not set
+# CONFIG_SPL_USE_TINY_PRINTF is not set

configs/k1_defconfig

@@ -0,0 +1,229 @@
+CONFIG_RISCV=y
+CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_SYS_MALLOC_LEN=0x800000
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_ENV_SIZE=0x4000
+CONFIG_ENV_OFFSET=0x80000
+CONFIG_DM_GPIO=y
+CONFIG_SPL_DM_SPI=y
+CONFIG_DEFAULT_DEVICE_TREE="k1-x_spl"
+CONFIG_SPL_TEXT_BASE=0xC0801000
+CONFIG_SPL_MMC=y
+CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_SIZE_LIMIT=0x33000
+CONFIG_SPL=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI=y
+CONFIG_SYS_LOAD_ADDR=0x200000
+CONFIG_ENV_ADDR=0x80000
+# CONFIG_AHCI is not set
+CONFIG_TARGET_SPACEMIT_K1X=y
+CONFIG_SPL_OPENSBI_LOAD_ADDR=0x0
+CONFIG_K1_X_BOARD_ASIC=y
+CONFIG_ARCH_RV64I=y
+CONFIG_RISCV_SMODE=y
+# CONFIG_SPL_SMP is not set
+CONFIG_LOCALVERSION="spacemit"
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000000
+CONFIG_STACK_SIZE=0x100000
+CONFIG_FIT=y
+CONFIG_SPL_FIT_SIGNATURE=y
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x40000000
+# CONFIG_BOOTSTD is not set
+CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_SUPPORT_RAW_INITRD=y
+CONFIG_BOOTDELAY=0
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_STOP_STR="s"
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="bootm 0x40000000"
+# CONFIG_SYS_DEVICE_NULLDEV is not set
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+CONFIG_MISC_INIT_R=y
+CONFIG_SPL_MAX_SIZE=0x33000
+CONFIG_SPL_PAD_TO=0x0
+CONFIG_SPL_BSS_START_ADDR=0xC0836000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
+CONFIG_SPL_BOARD_INIT=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK=0xC0840000
+CONFIG_SYS_SPL_MALLOC=y
+CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y
+CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x4000000
+CONFIG_SYS_SPL_MALLOC_SIZE=0x2000000
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_MMC_TINY=y
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_DM_SPI_FLASH=y
+CONFIG_SPL_DM_RESET=y
+CONFIG_SPL_POWER=y
+# CONFIG_SPL_RAM_SUPPORT is not set
+# CONFIG_SPL_SPI_FLASH_TINY is not set
+CONFIG_SPL_SPI_FLASH_MTD=y
+CONFIG_SPL_MTD_LOAD=y
+CONFIG_SYS_LOAD_IMAGE_PARTITION_NAME="opensbi"
+CONFIG_SYS_LOAD_IMAGE_SEC_PARTITION=y
+CONFIG_SYS_LOAD_IMAGE_SEC_PARTITION_NAME="uboot"
+CONFIG_SPL_USB_GADGET=y
+CONFIG_SPL_FASTBOOT_LOAD=y
+CONFIG_SPL_USB_SDP_SUPPORT=y
+CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
+# CONFIG_CMD_CPU is not set
+CONFIG_CMD_TLV_EEPROM=y
+CONFIG_SYS_BOOTM_LEN=0xa000000
+CONFIG_CMD_EEPROM=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPIO_READ=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_GPT_RENAME=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_BKOPS_ENABLE=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_PART=y
+# CONFIG_CMD_SCSI is not set
+CONFIG_CMD_USB=y
+CONFIG_CMD_DHCP=y
+CONFIG_SYS_DISABLE_AUTOLOAD=y
+CONFIG_CMD_PXE=y
+CONFIG_CMD_BMP=y
+CONFIG_CMD_SYSBOOT=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_CMD_MTDPARTS_SPREAD=y
+CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES=y
+CONFIG_MTDIDS_DEFAULT="nor0=spi-nor,spi-nand0=spi-nand"
+CONFIG_MTDPARTS_DEFAULT="spi-nor:384K@640K(opensbi),2M@1M(uboot);spi-nand:384K@640K(opensbi),2M@1M(uboot)"
+CONFIG_SPACEMIT_FLASH=y
+CONFIG_SPL_FASTBOOT=y
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_MULTI_DTB_FIT=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_IS_NOWHERE=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_SYS_MMC_ENV_DEV=1
+# CONFIG_SPL_ENV_IS_NOWHERE is not set
+CONFIG_PROT_UDP=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_IP_DEFRAG=y
+CONFIG_KEEP_SERVERADDR=y
+CONFIG_BOOTP_SERVERIP=y
+CONFIG_REGMAP=y
+CONFIG_DEVRES=y
+# CONFIG_SCSI_AHCI is not set
+CONFIG_SPL_CLK=y
+CONFIG_SPL_CLK_CCF=y
+CONFIG_SPACEMIT_K1X_CCU=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DMA=y
+CONFIG_DMA_CHANNELS=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x40000000
+CONFIG_FASTBOOT_BUF_SIZE=0x10000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_MULTI_FLASH_OPTION=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=2
+CONFIG_FASTBOOT_MMC_BOOT_SUPPORT=y
+CONFIG_FASTBOOT_MMC_BOOT1_NAME="fsbl"
+CONFIG_FASTBOOT_MMC_BOOT2_NAME="fsbl_1"
+CONFIG_FASTBOOT_CMD_OEM_READ=y
+CONFIG_FASTBOOT_SUPPORT_BLOCK_DEV=y
+CONFIG_FASTBOOT_CMD_OEM_CONFIG_ACCESS=y
+CONFIG_FASTBOOT_CMD_OEM_ENV_ACCESS=y
+CONFIG_SPL_FASTBOOT_CMD_OEM_ENV_ACCESS=y
+CONFIG_K1X_GPIO=y
+CONFIG_DM_I2C=y
+# CONFIG_SPL_DM_I2C is not set
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_SPACEMIT=y
+CONFIG_SPL_SYS_I2C_SPACEMIT=y
+CONFIG_I2C_MUX=y
+# CONFIG_INPUT is not set
+CONFIG_MISC=y
+CONFIG_I2C_EEPROM=y
+CONFIG_SPACEMIT_ONBOARD_USB_HUB=y
+CONFIG_SPACEMIT_K1X_EFUSE=y
+CONFIG_SPL_SPACEMIT_K1X_EFUSE=y
+CONFIG_MMC=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_HS400_ES_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+# CONFIG_MMC_VERBOSE is not set
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ADMA=y
+CONFIG_MMC_SDHCI_K1X=y
+CONFIG_DM_MTD=y
+# CONFIG_MTD_NOR_FLASH is not set
+CONFIG_MTD_SPI_NAND=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHY_REALTEK=y
+CONFIG_SPACEMIT_K1X_EMAC=y
+CONFIG_NVME_PCI=y
+CONFIG_PCIE_DW_K1X=y
+CONFIG_PHY=y
+CONFIG_PHY_SPACEMIT_K1X_USB2=y
+CONFIG_PHY_SPACEMIT_K1X_COMBPHY=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_SINGLE=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_K1X_POWER_DOMAIN=y
+CONFIG_DM_PMIC=y
+# CONFIG_SPL_DM_PMIC is not set
+CONFIG_PMIC_SPM8XX=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_SPM8XX=y
+CONFIG_SPL_SPACEMIT_POWER=y
+CONFIG_RESET_SPACEMIT_K1X=y
+# CONFIG_SCSI is not set
+# CONFIG_DM_SCSI is not set
+CONFIG_SYS_NS16550_IER=0x40
+# CONFIG_HTIF_CONSOLE is not set
+# CONFIG_SIFIVE_SERIAL is not set
+CONFIG_SPI=y
+CONFIG_K1X_QSPI=y
+# CONFIG_SYSRESET_SBI is not set
+# CONFIG_SYSRESET_SYSCON is not set
+CONFIG_SYSRESET_SPACEMIT=y
+CONFIG_TIMER_EARLY=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3=y
+# CONFIG_USB_DWC3_GADGET is not set
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_VENDOR_NUM=0x361C
+CONFIG_USB_GADGET_PRODUCT_NUM=0x1001
+CONFIG_USB2_K1X_CI=y
+CONFIG_DM_VIDEO=y
+CONFIG_VIDEO_PCI_DEFAULT_FB_SIZE=0x8000000
+CONFIG_VIDEO_COPY=y
+CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_DISPLAY=y
+CONFIG_SPLASH_SCREEN=y
+CONFIG_SPLASH_SCREEN_ALIGN=y
+CONFIG_SPLASH_SOURCE=y
+CONFIG_VIDEO_BMP_RLE8=y
+CONFIG_BMP_16BPP=y
+CONFIG_BMP_24BPP=y
+CONFIG_BMP_32BPP=y
+CONFIG_VIDEO_SPACEMIT=y
+CONFIG_DISPLAY_SPACEMIT_HDMI=y
+CONFIG_IMAGE_SPARSE_TRANSFER_BLK_NUM=0x3000
+# CONFIG_SPL_USE_TINY_PRINTF is not set
+# CONFIG_RSA is not set
+# CONFIG_SPL_SHA1 is not set
+# CONFIG_SPL_SHA256 is not set

disk/part.c

@@ -131,7 +131,7 @@ void dev_print (struct blk_desc *dev_desc)
 
 	switch (dev_desc->if_type) {
 	case IF_TYPE_SCSI:
-		printf ("(%d:%d) Vendor: %s Prod.: %s Rev: %s\n",
+		PRINTF ("(%d:%d) Vendor: %s Prod.: %s Rev: %s\n",
 			dev_desc->target,dev_desc->lun,
 			dev_desc->vendor,
 			dev_desc->product,
@@ -140,7 +140,7 @@ void dev_print (struct blk_desc *dev_desc)
 	case IF_TYPE_ATAPI:
 	case IF_TYPE_IDE:
 	case IF_TYPE_SATA:
-		printf ("Model: %s Firm: %s Ser#: %s\n",
+		PRINTF ("Model: %s Firm: %s Ser#: %s\n",
 			dev_desc->vendor,
 			dev_desc->revision,
 			dev_desc->product);
@@ -151,13 +151,13 @@ void dev_print (struct blk_desc *dev_desc)
 	case IF_TYPE_NVME:
 	case IF_TYPE_PVBLOCK:
 	case IF_TYPE_HOST:
-		printf ("Vendor: %s Rev: %s Prod: %s\n",
+		PRINTF ("Vendor: %s Rev: %s Prod: %s\n",
 			dev_desc->vendor,
 			dev_desc->revision,
 			dev_desc->product);
 		break;
 	case IF_TYPE_VIRTIO:
-		printf("%s VirtIO Block Device\n", dev_desc->vendor);
+		PRINTF("%s VirtIO Block Device\n", dev_desc->vendor);
 		break;
 	case IF_TYPE_DOC:
 		puts("device type DOC\n");
@@ -166,7 +166,7 @@ void dev_print (struct blk_desc *dev_desc)
 		puts("device type unknown\n");
 		return;
 	default:
-		printf("Unhandled device type: %i\n", dev_desc->if_type);
+		PRINTF("Unhandled device type: %i\n", dev_desc->if_type);
 		return;
 	}
 	puts ("            Type: ");
@@ -186,7 +186,7 @@ void dev_print (struct blk_desc *dev_desc)
 		puts ("Tape");
 		break;
 	default:
-		printf ("# %02X #", dev_desc->type & 0x1F);
+		PRINTF ("# %02X #", dev_desc->type & 0x1F);
 		break;
 	}
 	puts ("\n");
@@ -208,17 +208,18 @@ void dev_print (struct blk_desc *dev_desc)
 		gb_quot	= gb / 10;
 		gb_rem	= gb - (10 * gb_quot);
 #ifdef CONFIG_LBA48
-		if (dev_desc->lba48)
-			printf ("            Supports 48-bit addressing\n");
+		if (dev_desc->lba48){
+			PRINTF ("            Supports 48-bit addressing\n");
+		}
 #endif
 #if defined(CONFIG_SYS_64BIT_LBA)
-		printf ("            Capacity: %lu.%lu MB = %lu.%lu GB (%llu x %lu)\n",
+		PRINTF ("            Capacity: %lu.%lu MB = %lu.%lu GB (%llu x %lu)\n",
 			mb_quot, mb_rem,
 			gb_quot, gb_rem,
 			lba,
 			dev_desc->blksz);
 #else
-		printf ("            Capacity: %lu.%lu MB = %lu.%lu GB (%lu x %lu)\n",
+		PRINTF ("            Capacity: %lu.%lu MB = %lu.%lu GB (%lu x %lu)\n",
 			mb_quot, mb_rem,
 			gb_quot, gb_rem,
 			(ulong)lba,
@@ -303,7 +304,7 @@ static void print_part_header(const char *type, struct blk_desc *dev_desc)
 		puts("UNKNOWN");
 		break;
 	}
-	printf (" device %d  --   Partition Type: %s\n\n",
+	PRINTF (" device %d  --   Partition Type: %s\n\n",
 			dev_desc->devnum, type);
 #endif /* any CONFIG_..._PARTITION */
 }
@@ -314,7 +315,7 @@ void part_print(struct blk_desc *dev_desc)
 
 	drv = part_driver_lookup_type(dev_desc);
 	if (!drv) {
-		printf("## Unknown partition table type %x\n",
+		PRINTF("## Unknown partition table type %x\n",
 		       dev_desc->part_type);
 		return;
 	}
@@ -401,7 +402,7 @@ int blk_get_device_by_str(const char *ifname, const char *dev_hwpart_str,
 
 	dev = hextoul(dev_str, &ep);
 	if (*ep) {
-		printf("** Bad device specification %s %s **\n",
+		PRINTF("** Bad device specification %s %s **\n",
 		       ifname, dev_str);
 		dev = -EINVAL;
 		goto cleanup;
@@ -410,7 +411,7 @@ int blk_get_device_by_str(const char *ifname, const char *dev_hwpart_str,
 	if (hwpart_str) {
 		hwpart = hextoul(hwpart_str, &ep);
 		if (*ep) {
-			printf("** Bad HW partition specification %s %s **\n",
+			PRINTF("** Bad HW partition specification %s %s **\n",
 			    ifname, hwpart_str);
 			dev = -EINVAL;
 			goto cleanup;
@@ -486,7 +487,7 @@ int blk_get_device_part_str(const char *ifname, const char *dev_part_str,
 	 */
 	if (0 == strcmp(ifname, "ubi")) {
 		if (!ubifs_is_mounted()) {
-			printf("UBIFS not mounted, use ubifsmount to mount volume first!\n");
+			PRINTF("UBIFS not mounted, use ubifsmount to mount volume first!\n");
 			return -EINVAL;
 		}
 
@@ -508,7 +509,7 @@ int blk_get_device_part_str(const char *ifname, const char *dev_part_str,
 
 	/* If still no dev_part_str, it's an error */
 	if (!dev_part_str) {
-		printf("** No device specified **\n");
+		PRINTF("** No device specified **\n");
 		ret = -ENODEV;
 		goto cleanup;
 	}
@@ -527,7 +528,7 @@ int blk_get_device_part_str(const char *ifname, const char *dev_part_str,
 	/* Look up the device */
 	dev = blk_get_device_by_str(ifname, dev_str, dev_desc);
 	if (dev < 0) {
-		printf("** Bad device specification %s %s **\n",
+		PRINTF("** Bad device specification %s %s **\n",
 		       ifname, dev_str);
 		ret = dev;
 		goto cleanup;
@@ -546,7 +547,7 @@ int blk_get_device_part_str(const char *ifname, const char *dev_part_str,
 		 * or request for whole device, but caller requires partition.
 		 */
 		if (*ep || (part == 0 && !allow_whole_dev)) {
-			printf("** Bad partition specification %s %s **\n",
+			PRINTF("** Bad partition specification %s %s **\n",
 			    ifname, dev_part_str);
 			ret = -ENOENT;
 			goto cleanup;
@@ -560,7 +561,7 @@ int blk_get_device_part_str(const char *ifname, const char *dev_part_str,
 	if (((*dev_desc)->part_type == PART_TYPE_UNKNOWN) ||
 	    (part == 0)) {
 		if (!(*dev_desc)->lba) {
-			printf("** Bad device size - %s %s **\n", ifname,
+			PRINTF("** Bad device size - %s %s **\n", ifname,
 			       dev_str);
 			ret = -EINVAL;
 			goto cleanup;
@@ -572,7 +573,7 @@ int blk_get_device_part_str(const char *ifname, const char *dev_part_str,
 		 * it's an error.
 		 */
 		if ((part > 0) || (!allow_whole_dev)) {
-			printf("** No partition table - %s %s **\n", ifname,
+			PRINTF("** No partition table - %s %s **\n", ifname,
 			       dev_str);
 			ret = -EPROTONOSUPPORT;
 			goto cleanup;
@@ -600,7 +601,7 @@ int blk_get_device_part_str(const char *ifname, const char *dev_part_str,
 	if (part != PART_AUTO) {
 		ret = part_get_info(*dev_desc, part, info);
 		if (ret) {
-			printf("** Invalid partition %d **\n", part);
+			PRINTF("** Invalid partition %d **\n", part);
 			goto cleanup;
 		}
 	} else {
@@ -642,12 +643,12 @@ int blk_get_device_part_str(const char *ifname, const char *dev_part_str,
 			if (p == MAX_SEARCH_PARTITIONS + 1)
 				*info = tmpinfo;
 		} else {
-			printf("** No valid partitions found **\n");
+			PRINTF("** No valid partitions found **\n");
 			goto cleanup;
 		}
 	}
 	if (strncmp((char *)info->type, BOOT_PART_TYPE, sizeof(info->type)) != 0) {
-		printf("** Invalid partition type \"%.32s\""
+		PRINTF("** Invalid partition type \"%.32s\""
 			" (expect \"" BOOT_PART_TYPE "\")\n",
 			info->type);
 		ret  = -EINVAL;
@@ -746,8 +747,9 @@ static int part_get_info_by_dev_and_name(const char *dev_iface,
 		goto cleanup;
 
 	ret = part_get_info_by_name(*dev_desc, part_str, part_info);
-	if (ret < 0)
-		printf("Could not find \"%s\" partition\n", part_str);
+	if (ret < 0){
+		PRINTF("Could not find \"%s\" partition\n", part_str);
+	}
 
 cleanup:
 	free(dup_str);
@@ -773,9 +775,10 @@ int part_get_info_by_dev_and_name_or_num(const char *dev_iface,
 	 */
 	ret = blk_get_device_part_str(dev_iface, dev_part_str,
 				      dev_desc, part_info, allow_whole_dev);
-	if (ret < 0)
-		printf("Couldn't find partition %s %s\n",
+	if (ret < 0){
+		PRINTF("Couldn't find partition %s %s\n",
 		       dev_iface, dev_part_str);
+	}
 	return ret;
 }
 

disk/part_dos.c

@@ -55,7 +55,7 @@ static void print_one_part(dos_partition_t *p, lbaint_t ext_part_sector,
 	lbaint_t lba_start = ext_part_sector + get_unaligned_le32(p->start4);
 	lbaint_t lba_size  = get_unaligned_le32(p->size4);
 
-	printf("%3d\t%-10" LBAFlength "u\t%-10" LBAFlength
+	pr_debug("%3d\t%-10" LBAFlength "u\t%-10" LBAFlength
 		"u\t%08x-%02x\t%02x%s%s\n",
 		part_num, lba_start, lba_size, disksig, part_num, p->sys_ind,
 		(is_extended(p->sys_ind) ? " Extd" : ""),
@@ -144,18 +144,18 @@ static void print_partition_extended(struct blk_desc *dev_desc,
 	/* set a maximum recursion level */
 	if (part_num > MAX_EXT_PARTS)
 	{
-		printf("** Nested DOS partitions detected, stopping **\n");
+		pr_err("** Nested DOS partitions detected, stopping **\n");
 		return;
     }
 
 	if (blk_dread(dev_desc, ext_part_sector, 1, (ulong *)buffer) != 1) {
-		printf ("** Can't read partition table on %d:" LBAFU " **\n",
+		pr_err ("** Can't read partition table on %d:" LBAFU " **\n",
 			dev_desc->devnum, ext_part_sector);
 		return;
 	}
 	i=test_block_type(buffer);
 	if (i != DOS_MBR) {
-		printf ("bad MBR sector signature 0x%02x%02x\n",
+		pr_err ("bad MBR sector signature 0x%02x%02x\n",
 			buffer[DOS_PART_MAGIC_OFFSET],
 			buffer[DOS_PART_MAGIC_OFFSET + 1]);
 		return;
@@ -216,18 +216,18 @@ static int part_get_info_extended(struct blk_desc *dev_desc,
 	/* set a maximum recursion level */
 	if (part_num > MAX_EXT_PARTS)
 	{
-		printf("** Nested DOS partitions detected, stopping **\n");
+		pr_err("** Nested DOS partitions detected, stopping **\n");
 		return -1;
     }
 
 	if (blk_dread(dev_desc, ext_part_sector, 1, (ulong *)buffer) != 1) {
-		printf ("** Can't read partition table on %d:" LBAFU " **\n",
+		pr_err ("** Can't read partition table on %d:" LBAFU " **\n",
 			dev_desc->devnum, ext_part_sector);
 		return -1;
 	}
 	if (buffer[DOS_PART_MAGIC_OFFSET] != 0x55 ||
 		buffer[DOS_PART_MAGIC_OFFSET + 1] != 0xaa) {
-		printf ("bad MBR sector signature 0x%02x%02x\n",
+		pr_err ("bad MBR sector signature 0x%02x%02x\n",
 			buffer[DOS_PART_MAGIC_OFFSET],
 			buffer[DOS_PART_MAGIC_OFFSET + 1]);
 		return -1;
@@ -305,7 +305,7 @@ static int part_get_info_extended(struct blk_desc *dev_desc,
 
 static void __maybe_unused part_print_dos(struct blk_desc *dev_desc)
 {
-	printf("Part\tStart Sector\tNum Sectors\tUUID\t\tType\n");
+	pr_debug("Part\tStart Sector\tNum Sectors\tUUID\t\tType\n");
 	print_partition_extended(dev_desc, 0, 0, 1, 0);
 }
 
@@ -381,14 +381,14 @@ int write_mbr_partitions(struct blk_desc *dev,
 	}
 
 	if (i < count && !ext_part_start) {
-		printf("%s: extended partition is needed for more than 4 partitions\n",
+		pr_err("%s: extended partition is needed for more than 4 partitions\n",
 		        __func__);
 		return -1;
 	}
 
 	/* write MBR */
 	if (blk_dwrite(dev, 0, 1, buffer) != 1) {
-		printf("%s: failed writing 'MBR' (1 blks at 0x0)\n",
+		pr_err("%s: failed writing 'MBR' (1 blks at 0x0)\n",
 		       __func__);
 		return -1;
 	}
@@ -416,7 +416,7 @@ int write_mbr_partitions(struct blk_desc *dev,
 
 		/* write EBR */
 		if (blk_dwrite(dev, ext_part_sect, 1, buffer) != 1) {
-			printf("%s: failed writing 'EBR' (1 blks at 0x%lx)\n",
+			pr_err("%s: failed writing 'EBR' (1 blks at 0x%lx)\n",
 			       __func__, ext_part_sect);
 			return -1;
 		}
@@ -499,7 +499,7 @@ int write_mbr_sector(struct blk_desc *dev_desc, void *buf)
 
 	/* write MBR */
 	if (blk_dwrite(dev_desc, 0, 1, buf) != 1) {
-		printf("%s: failed writing '%s' (1 blks at 0x0)\n",
+		pr_err("%s: failed writing '%s' (1 blks at 0x0)\n",
 		       __func__, "MBR");
 		return 1;
 	}

disk/part_efi.c

@@ -96,7 +96,7 @@ static int validate_gpt_header(gpt_header *gpt_h, lbaint_t lba,
 
 	/* Check the GPT header signature */
 	if (le64_to_cpu(gpt_h->signature) != GPT_HEADER_SIGNATURE_UBOOT) {
-		printf("%s signature is wrong: 0x%llX != 0x%llX\n",
+		pr_err("%s signature is wrong: 0x%llX != 0x%llX\n",
 		       "GUID Partition Table Header",
 		       le64_to_cpu(gpt_h->signature),
 		       GPT_HEADER_SIGNATURE_UBOOT);
@@ -113,7 +113,7 @@ static int validate_gpt_header(gpt_header *gpt_h, lbaint_t lba,
 	memcpy(&gpt_h->header_crc32, &crc32_backup, sizeof(crc32_backup));
 
 	if (calc_crc32 != le32_to_cpu(crc32_backup)) {
-		printf("%s CRC is wrong: 0x%x != 0x%x\n",
+		pr_err("%s CRC is wrong: 0x%x != 0x%x\n",
 		       "GUID Partition Table Header",
 		       le32_to_cpu(crc32_backup), calc_crc32);
 		return -1;
@@ -123,7 +123,7 @@ static int validate_gpt_header(gpt_header *gpt_h, lbaint_t lba,
 	 * Check that the my_lba entry points to the LBA that contains the GPT
 	 */
 	if (le64_to_cpu(gpt_h->my_lba) != lba) {
-		printf("GPT: my_lba incorrect: %llX != " LBAF "\n",
+		pr_err("GPT: my_lba incorrect: %llX != " LBAF "\n",
 		       le64_to_cpu(gpt_h->my_lba),
 		       lba);
 		return -1;
@@ -134,12 +134,12 @@ static int validate_gpt_header(gpt_header *gpt_h, lbaint_t lba,
 	 * within the disk.
 	 */
 	if (le64_to_cpu(gpt_h->first_usable_lba) > lastlba) {
-		printf("GPT: first_usable_lba incorrect: %llX > " LBAF "\n",
+		pr_err("GPT: first_usable_lba incorrect: %llX > " LBAF "\n",
 		       le64_to_cpu(gpt_h->first_usable_lba), lastlba);
 		return -1;
 	}
 	if (le64_to_cpu(gpt_h->last_usable_lba) > lastlba) {
-		printf("GPT: last_usable_lba incorrect: %llX > " LBAF "\n",
+		pr_err("GPT: last_usable_lba incorrect: %llX > " LBAF "\n",
 		       le64_to_cpu(gpt_h->last_usable_lba), lastlba);
 		return -1;
 	}
@@ -161,7 +161,7 @@ static int validate_gpt_entries(gpt_header *gpt_h, gpt_entry *gpt_e)
 		le32_to_cpu(gpt_h->sizeof_partition_entry));
 
 	if (calc_crc32 != le32_to_cpu(gpt_h->partition_entry_array_crc32)) {
-		printf("%s: 0x%x != 0x%x\n",
+		pr_err("%s: 0x%x != 0x%x\n",
 		       "GUID Partition Table Entry Array CRC is wrong",
 		       le32_to_cpu(gpt_h->partition_entry_array_crc32),
 		       calc_crc32);
@@ -229,28 +229,28 @@ void part_print_efi(struct blk_desc *dev_desc)
 
 	debug("%s: gpt-entry at %p\n", __func__, gpt_pte);
 
-	printf("Part\tStart LBA\tEnd LBA\t\tName\n");
-	printf("\tAttributes\n");
-	printf("\tType GUID\n");
-	printf("\tPartition GUID\n");
+	pr_debug("Part\tStart LBA\tEnd LBA\t\tName\n");
+	pr_debug("\tAttributes\n");
+	pr_debug("\tType GUID\n");
+	pr_debug("\tPartition GUID\n");
 
 	for (i = 0; i < le32_to_cpu(gpt_head->num_partition_entries); i++) {
 		/* Skip invalid PTE */
 		if (!is_pte_valid(&gpt_pte[i]))
 			continue;
 
-		printf("%3d\t0x%08llx\t0x%08llx\t\"%s\"\n", (i + 1),
+		pr_debug("%3d\t0x%08llx\t0x%08llx\t\"%s\"\n", (i + 1),
 			le64_to_cpu(gpt_pte[i].starting_lba),
 			le64_to_cpu(gpt_pte[i].ending_lba),
 			print_efiname(&gpt_pte[i]));
-		printf("\tattrs:\t0x%016llx\n", gpt_pte[i].attributes.raw);
+		pr_debug("\tattrs:\t0x%016llx\n", gpt_pte[i].attributes.raw);
 		uuid = (unsigned char *)gpt_pte[i].partition_type_guid.b;
 		if (CONFIG_IS_ENABLED(PARTITION_TYPE_GUID))
-			printf("\ttype:\t%pUl\n\t\t(%pUs)\n", uuid, uuid);
+			pr_debug("\ttype:\t%pUl\n\t\t(%pUs)\n", uuid, uuid);
 		else
-			printf("\ttype:\t%pUl\n", uuid);
+			pr_debug("\ttype:\t%pUl\n", uuid);
 		uuid = (unsigned char *)gpt_pte[i].unique_partition_guid.b;
-		printf("\tguid:\t%pUl\n", uuid);
+		pr_debug("\tguid:\t%pUl\n", uuid);
 	}
 
 	/* Remember to free pte */
@@ -266,7 +266,7 @@ int part_get_info_efi(struct blk_desc *dev_desc, int part,
 
 	/* "part" argument must be at least 1 */
 	if (part < 1) {
-		printf("%s: Invalid Argument(s)\n", __func__);
+		pr_err("%s: Invalid Argument(s)\n", __func__);
 		return -1;
 	}
 
@@ -333,7 +333,7 @@ static int set_protective_mbr(struct blk_desc *dev_desc)
 	/* Setup the Protective MBR */
 	ALLOC_CACHE_ALIGN_BUFFER_PAD(legacy_mbr, p_mbr, 1, dev_desc->blksz);
 	if (p_mbr == NULL) {
-		printf("%s: calloc failed!\n", __func__);
+		pr_err("%s: calloc failed!\n", __func__);
 		return -1;
 	}
 
@@ -355,7 +355,7 @@ static int set_protective_mbr(struct blk_desc *dev_desc)
 
 	/* Write MBR sector to the MMC device */
 	if (blk_dwrite(dev_desc, 0, 1, p_mbr) != 1) {
-		printf("** Can't write to device %d **\n",
+		pr_err("** Can't write to device %d **\n",
 			dev_desc->devnum);
 		return -1;
 	}
@@ -407,7 +407,7 @@ int write_gpt_table(struct blk_desc *dev_desc,
 	return 0;
 
  err:
-	printf("** Can't write to device %d **\n", dev_desc->devnum);
+	pr_err("** Can't write to device %d **\n", dev_desc->devnum);
 	return -1;
 }
 
@@ -454,14 +454,14 @@ int gpt_fill_pte(struct blk_desc *dev_desc,
 		 */
 		if (((start < hdr_end && hdr_start < (start + size)) ||
 		     (start < pte_end && pte_start < (start + size)))) {
-			printf("Partition overlap\n");
+			pr_err("Partition overlap\n");
 			return -1;
 		}
 
 		gpt_e[i].starting_lba = cpu_to_le64(start);
 
 		if (offset > (last_usable_lba + 1)) {
-			printf("Partitions layout exceds disk size\n");
+			pr_err("Partitions layout exceds disk size\n");
 			return -1;
 		}
 		/* partition ending lba */
@@ -477,7 +477,7 @@ int gpt_fill_pte(struct blk_desc *dev_desc,
 		if (strlen(str_type_guid)) {
 			if (uuid_str_to_bin(str_type_guid, bin_type_guid,
 					    UUID_STR_FORMAT_GUID)) {
-				printf("Partition no. %d: invalid type guid: %s\n",
+				pr_err("Partition no. %d: invalid type guid: %s\n",
 				       i, str_type_guid);
 				return -1;
 			}
@@ -497,7 +497,7 @@ int gpt_fill_pte(struct blk_desc *dev_desc,
 		bin_uuid = gpt_e[i].unique_partition_guid.b;
 
 		if (uuid_str_to_bin(str_uuid, bin_uuid, UUID_STR_FORMAT_GUID)) {
-			printf("Partition no. %d: invalid guid: %s\n",
+			pr_err("Partition no. %d: invalid guid: %s\n",
 				i, str_uuid);
 			return -1;
 		}
@@ -611,7 +611,7 @@ int gpt_restore(struct blk_desc *dev_desc, char *str_disk_guid,
 	size = PAD_TO_BLOCKSIZE(sizeof(gpt_header), dev_desc);
 	gpt_h = malloc_cache_aligned(size);
 	if (gpt_h == NULL) {
-		printf("%s: calloc failed!\n", __func__);
+		pr_err("%s: calloc failed!\n", __func__);
 		return -1;
 	}
 	memset(gpt_h, 0, size);
@@ -620,7 +620,7 @@ int gpt_restore(struct blk_desc *dev_desc, char *str_disk_guid,
 				dev_desc);
 	gpt_e = malloc_cache_aligned(size);
 	if (gpt_e == NULL) {
-		printf("%s: calloc failed!\n", __func__);
+		pr_err("%s: calloc failed!\n", __func__);
 		free(gpt_h);
 		return -1;
 	}
@@ -678,7 +678,7 @@ int gpt_verify_headers(struct blk_desc *dev_desc, gpt_header *gpt_head,
 	if (is_gpt_valid(dev_desc,
 			 GPT_PRIMARY_PARTITION_TABLE_LBA,
 			 gpt_head, gpt_pte) != 1) {
-		printf("%s: *** ERROR: Invalid GPT ***\n",
+		pr_err("%s: *** ERROR: Invalid GPT ***\n",
 		       __func__);
 		return -1;
 	}
@@ -690,14 +690,14 @@ int gpt_verify_headers(struct blk_desc *dev_desc, gpt_header *gpt_head,
 	 * Check that the alternate_lba entry points to the last LBA
 	 */
 	if (le64_to_cpu(gpt_head->alternate_lba) != (dev_desc->lba - 1)) {
-		printf("%s: *** ERROR: Misplaced Backup GPT ***\n",
+		pr_err("%s: *** ERROR: Misplaced Backup GPT ***\n",
 		       __func__);
 		return -1;
 	}
 
 	if (is_gpt_valid(dev_desc, (dev_desc->lba - 1),
 			 gpt_head, gpt_pte) != 1) {
-		printf("%s: *** ERROR: Invalid Backup GPT ***\n",
+		pr_err("%s: *** ERROR: Invalid Backup GPT ***\n",
 		       __func__);
 		return -1;
 	}
@@ -916,7 +916,7 @@ int write_mbr_and_gpt_partitions(struct blk_desc *dev_desc, void *buf)
 	lba = 0;	/* MBR is always at 0 */
 	cnt = 1;	/* MBR (1 block) */
 	if (blk_dwrite(dev_desc, lba, cnt, buf) != cnt) {
-		printf("%s: failed writing '%s' (%d blks at 0x" LBAF ")\n",
+		pr_err("%s: failed writing '%s' (%d blks at 0x" LBAF ")\n",
 		       __func__, "MBR", cnt, lba);
 		return 1;
 	}
@@ -925,7 +925,7 @@ int write_mbr_and_gpt_partitions(struct blk_desc *dev_desc, void *buf)
 	lba = GPT_PRIMARY_PARTITION_TABLE_LBA;
 	cnt = 1;	/* GPT Header (1 block) */
 	if (blk_dwrite(dev_desc, lba, cnt, gpt_h) != cnt) {
-		printf("%s: failed writing '%s' (%d blks at 0x" LBAF ")\n",
+		pr_err("%s: failed writing '%s' (%d blks at 0x" LBAF ")\n",
 		       __func__, "Primary GPT Header", cnt, lba);
 		return 1;
 	}
@@ -933,7 +933,7 @@ int write_mbr_and_gpt_partitions(struct blk_desc *dev_desc, void *buf)
 	lba = le64_to_cpu(gpt_h->partition_entry_lba);
 	cnt = gpt_e_blk_cnt;
 	if (blk_dwrite(dev_desc, lba, cnt, gpt_e) != cnt) {
-		printf("%s: failed writing '%s' (%d blks at 0x" LBAF ")\n",
+		pr_err("%s: failed writing '%s' (%d blks at 0x" LBAF ")\n",
 		       __func__, "Primary GPT Entries", cnt, lba);
 		return 1;
 	}
@@ -944,7 +944,7 @@ int write_mbr_and_gpt_partitions(struct blk_desc *dev_desc, void *buf)
 	lba = le64_to_cpu(gpt_h->partition_entry_lba);
 	cnt = gpt_e_blk_cnt;
 	if (blk_dwrite(dev_desc, lba, cnt, gpt_e) != cnt) {
-		printf("%s: failed writing '%s' (%d blks at 0x" LBAF ")\n",
+		pr_err("%s: failed writing '%s' (%d blks at 0x" LBAF ")\n",
 		       __func__, "Backup GPT Entries", cnt, lba);
 		return 1;
 	}
@@ -952,7 +952,7 @@ int write_mbr_and_gpt_partitions(struct blk_desc *dev_desc, void *buf)
 	lba = le64_to_cpu(gpt_h->my_lba);
 	cnt = 1;	/* GPT Header (1 block) */
 	if (blk_dwrite(dev_desc, lba, cnt, gpt_h) != cnt) {
-		printf("%s: failed writing '%s' (%d blks at 0x" LBAF ")\n",
+		pr_err("%s: failed writing '%s' (%d blks at 0x" LBAF ")\n",
 		       __func__, "Backup GPT Header", cnt, lba);
 		return 1;
 	}
@@ -1020,7 +1020,7 @@ static int is_gpt_valid(struct blk_desc *dev_desc, u64 lba,
 {
 	/* Confirm valid arguments prior to allocation. */
 	if (!dev_desc || !pgpt_head) {
-		printf("%s: Invalid Argument(s)\n", __func__);
+		pr_err("%s: Invalid Argument(s)\n", __func__);
 		return 0;
 	}
 
@@ -1028,13 +1028,13 @@ static int is_gpt_valid(struct blk_desc *dev_desc, u64 lba,
 
 	/* Read MBR Header from device */
 	if (blk_dread(dev_desc, 0, 1, (ulong *)mbr) != 1) {
-		printf("*** ERROR: Can't read MBR header ***\n");
+		pr_err("*** ERROR: Can't read MBR header ***\n");
 		return 0;
 	}
 
 	/* Read GPT Header from device */
 	if (blk_dread(dev_desc, (lbaint_t)lba, 1, pgpt_head) != 1) {
-		printf("*** ERROR: Can't read GPT header ***\n");
+		pr_err("*** ERROR: Can't read GPT header ***\n");
 		return 0;
 	}
 
@@ -1091,18 +1091,20 @@ static int find_valid_gpt(struct blk_desc *dev_desc, gpt_header *gpt_head,
 			 pgpt_pte);
 
 	if (r != 1) {
-		if (r != 2)
-			printf("%s: *** ERROR: Invalid GPT ***\n", __func__);
+		if (r != 2){
+			pr_err("%s: *** ERROR: Invalid GPT ***\n", __func__);
+		}
 
 		if (is_gpt_valid(dev_desc, (dev_desc->lba - 1), gpt_head,
 				 pgpt_pte) != 1) {
-			printf("%s: *** ERROR: Invalid Backup GPT ***\n",
+			pr_err("%s: *** ERROR: Invalid Backup GPT ***\n",
 			       __func__);
 			return 0;
 		}
-		if (r != 2)
-			printf("%s: ***        Using Backup GPT ***\n",
+		if (r != 2){
+			pr_err("%s: ***        Using Backup GPT ***\n",
 			       __func__);
+		}
 	}
 	return 1;
 }
@@ -1124,7 +1126,7 @@ static gpt_entry *alloc_read_gpt_entries(struct blk_desc *dev_desc,
 	gpt_entry *pte = NULL;
 
 	if (!dev_desc || !pgpt_head) {
-		printf("%s: Invalid Argument(s)\n", __func__);
+		pr_err("%s: Invalid Argument(s)\n", __func__);
 		return NULL;
 	}
 
@@ -1143,7 +1145,7 @@ static gpt_entry *alloc_read_gpt_entries(struct blk_desc *dev_desc,
 	}
 
 	if (count == 0 || pte == NULL) {
-		printf("%s: ERROR: Can't allocate %#lX bytes for GPT Entries\n",
+		pr_err("%s: ERROR: Can't allocate %#lX bytes for GPT Entries\n",
 		       __func__, (ulong)count);
 		return NULL;
 	}
@@ -1152,7 +1154,7 @@ static gpt_entry *alloc_read_gpt_entries(struct blk_desc *dev_desc,
 	blk = le64_to_cpu(pgpt_head->partition_entry_lba);
 	blk_cnt = BLOCK_CNT(count, dev_desc);
 	if (blk_dread(dev_desc, blk, (lbaint_t)blk_cnt, pte) != blk_cnt) {
-		printf("*** ERROR: Can't read GPT Entries ***\n");
+		pr_err("*** ERROR: Can't read GPT Entries ***\n");
 		free(pte);
 		return NULL;
 	}
@@ -1170,7 +1172,7 @@ static int is_pte_valid(gpt_entry * pte)
 	efi_guid_t unused_guid;
 
 	if (!pte) {
-		printf("%s: Invalid Argument(s)\n", __func__);
+		pr_err("%s: Invalid Argument(s)\n", __func__);
 		return 0;
 	}
 

drivers/Makefile

@@ -61,6 +61,8 @@ obj-$(CONFIG_OMAP_USB_PHY) += usb/phy/
 obj-$(CONFIG_SPL_SATA) += ata/ scsi/
 obj-$(CONFIG_HAVE_BLOCK_DEVICE) += block/
 obj-$(CONFIG_SPL_THERMAL) += thermal/
+obj-$(CONFIG_SPL_FASTBOOT) += fastboot/
+obj-$(CONFIG_SPL_FASTBOOT) += core/
 
 endif
 endif
@@ -121,4 +123,5 @@ obj-$(CONFIG_DM_HWSPINLOCK) += hwspinlock/
 obj-$(CONFIG_DM_RNG) += rng/
 endif
 
+obj-$(CONFIG_TARGET_SPACEMIT_K1X) += ddr/spacemit/k1x/
 obj-y += soc/

drivers/block/blk-uclass.c

@@ -32,6 +32,7 @@ static const char *if_typename_str[IF_TYPE_COUNT] = {
 	[IF_TYPE_EFI_LOADER]	= "efiloader",
 	[IF_TYPE_VIRTIO]	= "virtio",
 	[IF_TYPE_PVBLOCK]	= "pvblock",
+	[IF_TYPE_NOR]		= "nor",
 };
 
 static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
@@ -49,6 +50,7 @@ static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
 	[IF_TYPE_EFI_LOADER]	= UCLASS_EFI_LOADER,
 	[IF_TYPE_VIRTIO]	= UCLASS_VIRTIO,
 	[IF_TYPE_PVBLOCK]	= UCLASS_PVBLOCK,
+	[IF_TYPE_NOR]		= UCLASS_SPI,
 };
 
 static enum if_type if_typename_to_iftype(const char *if_typename)

drivers/clk/Kconfig

@@ -239,5 +239,6 @@ source "drivers/clk/stm32/Kconfig"
 source "drivers/clk/tegra/Kconfig"
 source "drivers/clk/ti/Kconfig"
 source "drivers/clk/uniphier/Kconfig"
+source "drivers/clk/spacemit/Kconfig"
 
 endmenu

drivers/clk/Makefile

@@ -53,3 +53,4 @@ obj-$(CONFIG_MACH_PIC32) += clk_pic32.o
 obj-$(CONFIG_SANDBOX_CLK_CCF) += clk_sandbox_ccf.o
 obj-$(CONFIG_SANDBOX) += clk_sandbox.o
 obj-$(CONFIG_SANDBOX) += clk_sandbox_test.o
+obj-y += spacemit/

drivers/clk/clk-uclass.c

@@ -54,10 +54,10 @@ int clk_get_by_phandle(struct udevice *dev, const struct phandle_1_arg *cells,
 static int clk_of_xlate_default(struct clk *clk,
 				struct ofnode_phandle_args *args)
 {
-	debug("%s(clk=%p)\n", __func__, clk);
+	pr_debug("%s(clk=%p)\n", __func__, clk);
 
 	if (args->args_count > 1) {
-		debug("Invalid args_count: %d\n", args->args_count);
+		pr_debug("Invalid args_count: %d\n", args->args_count);
 		return -EINVAL;
 	}
 
@@ -86,7 +86,7 @@ static int clk_get_by_index_tail(int ret, ofnode node,
 
 	ret = uclass_get_device_by_ofnode(UCLASS_CLK, args->node, &dev_clk);
 	if (ret) {
-		debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
+		pr_debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
 		      __func__, ret);
 		return log_msg_ret("get", ret);
 	}
@@ -100,13 +100,13 @@ static int clk_get_by_index_tail(int ret, ofnode node,
 	else
 		ret = clk_of_xlate_default(clk, args);
 	if (ret) {
-		debug("of_xlate() failed: %d\n", ret);
+		pr_debug("of_xlate() failed: %d\n", ret);
 		return log_msg_ret("xlate", ret);
 	}
 
 	return clk_request(dev_clk, clk);
 err:
-	debug("%s: Node '%s', property '%s', failed to request CLK index %d: %d\n",
+	pr_debug("%s: Node '%s', property '%s', failed to request CLK index %d: %d\n",
 	      __func__, ofnode_get_name(node), list_name, index, ret);
 
 	return log_msg_ret("prop", ret);
@@ -118,7 +118,7 @@ static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
 	int ret;
 	struct ofnode_phandle_args args;
 
-	debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
+	pr_debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
 
 	assert(clk);
 	clk->dev = NULL;
@@ -126,7 +126,7 @@ static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
 	ret = dev_read_phandle_with_args(dev, prop_name, "#clock-cells", 0,
 					 index, &args);
 	if (ret) {
-		debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
+		pr_debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
 		      __func__, ret);
 		return log_ret(ret);
 	}
@@ -180,7 +180,7 @@ int clk_get_bulk(struct udevice *dev, struct clk_bulk *bulk)
 bulk_get_err:
 	err = clk_release_all(bulk->clks, bulk->count);
 	if (err)
-		debug("%s: could release all clocks for %p\n",
+		pr_debug("%s: could release all clocks for %p\n",
 		      __func__, dev);
 
 	return ret;
@@ -194,7 +194,7 @@ static struct clk *clk_set_default_get_by_id(struct clk *clk)
 		int ret = clk_get_by_id(clk->id, &c);
 
 		if (ret) {
-			debug("%s(): could not get parent clock pointer, id %lu\n",
+			pr_debug("%s(): could not get parent clock pointer, id %lu\n",
 			      __func__, clk->id);
 			ERR_PTR(ret);
 		}
@@ -214,7 +214,7 @@ static int clk_set_default_parents(struct udevice *dev,
 	num_parents = dev_count_phandle_with_args(dev, "assigned-clock-parents",
 						  "#clock-cells", 0);
 	if (num_parents < 0) {
-		debug("%s: could not read assigned-clock-parents for %p\n",
+		pr_debug("%s: could not read assigned-clock-parents for %p\n",
 		      __func__, dev);
 		return 0;
 	}
@@ -227,7 +227,7 @@ static int clk_set_default_parents(struct udevice *dev,
 			continue;
 
 		if (ret) {
-			debug("%s: could not get parent clock %d for %s\n",
+			pr_debug("%s: could not get parent clock %d for %s\n",
 			      __func__, index, dev_read_name(dev));
 			return ret;
 		}
@@ -248,7 +248,7 @@ static int clk_set_default_parents(struct udevice *dev,
 		}
 
 		if (ret) {
-			debug("%s: could not get assigned clock %d for %s\n",
+			pr_debug("%s: could not get assigned clock %d for %s\n",
 			      __func__, index, dev_read_name(dev));
 			return ret;
 		}
@@ -277,7 +277,7 @@ static int clk_set_default_parents(struct udevice *dev,
 			continue;
 
 		if (ret < 0) {
-			debug("%s: failed to reparent clock %d for %s\n",
+			pr_debug("%s: failed to reparent clock %d for %s\n",
 			      __func__, index, dev_read_name(dev));
 			return ret;
 		}
@@ -378,7 +378,7 @@ int clk_set_defaults(struct udevice *dev, enum clk_defaults_stage stage)
 		if (stage != CLK_DEFAULTS_POST_FORCE)
 			return 0;
 
-	debug("%s(%s)\n", __func__, dev_read_name(dev));
+	pr_debug("%s(%s)\n", __func__, dev_read_name(dev));
 
 	ret = clk_set_default_parents(dev, stage);
 	if (ret)
@@ -399,16 +399,18 @@ int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
 
 int clk_get_by_name_nodev(ofnode node, const char *name, struct clk *clk)
 {
-	int index;
+	int index = 0;
 
-	debug("%s(node=%p, name=%s, clk=%p)\n", __func__,
+	pr_debug("%s(node=%p, name=%s, clk=%p)\n", __func__,
 		ofnode_get_name(node), name, clk);
 	clk->dev = NULL;
 
-	index = ofnode_stringlist_search(node, "clock-names", name);
-	if (index < 0) {
-		debug("fdt_stringlist_search() failed: %d\n", index);
-		return index;
+	if (name) {
+		index = ofnode_stringlist_search(node, "clock-names", name);
+		if (index < 0) {
+			pr_debug("fdt_stringlist_search() failed: %d\n", index);
+			return index;
+		}
 	}
 
 	return clk_get_by_index_nodev(node, index, clk);
@@ -419,7 +421,7 @@ int clk_release_all(struct clk *clk, int count)
 	int i, ret;
 
 	for (i = 0; i < count; i++) {
-		debug("%s(clk[%d]=%p)\n", __func__, i, &clk[i]);
+		pr_debug("%s(clk[%d]=%p)\n", __func__, i, &clk[i]);
 
 		/* check if clock has been previously requested */
 		if (!clk[i].dev)
@@ -439,7 +441,7 @@ int clk_request(struct udevice *dev, struct clk *clk)
 {
 	const struct clk_ops *ops;
 
-	debug("%s(dev=%p, clk=%p)\n", __func__, dev, clk);
+	pr_debug("%s(dev=%p, clk=%p)\n", __func__, dev, clk);
 	if (!clk)
 		return 0;
 	ops = clk_dev_ops(dev);
@@ -456,7 +458,7 @@ void clk_free(struct clk *clk)
 {
 	const struct clk_ops *ops;
 
-	debug("%s(clk=%p)\n", __func__, clk);
+	pr_debug("%s(clk=%p)\n", __func__, clk);
 	if (!clk_valid(clk))
 		return;
 	ops = clk_dev_ops(clk->dev);
@@ -469,9 +471,8 @@ void clk_free(struct clk *clk)
 ulong clk_get_rate(struct clk *clk)
 {
 	const struct clk_ops *ops;
-	int ret;
 
-	debug("%s(clk=%p)\n", __func__, clk);
+	pr_debug("%s(clk=%p)\n", __func__, clk);
 	if (!clk_valid(clk))
 		return 0;
 	ops = clk_dev_ops(clk->dev);
@@ -479,11 +480,7 @@ ulong clk_get_rate(struct clk *clk)
 	if (!ops->get_rate)
 		return -ENOSYS;
 
-	ret = ops->get_rate(clk);
-	if (ret)
-		return log_ret(ret);
-
-	return 0;
+	return ops->get_rate(clk);
 }
 
 struct clk *clk_get_parent(struct clk *clk)
@@ -491,7 +488,7 @@ struct clk *clk_get_parent(struct clk *clk)
 	struct udevice *pdev;
 	struct clk *pclk;
 
-	debug("%s(clk=%p)\n", __func__, clk);
+	pr_debug("%s(clk=%p)\n", __func__, clk);
 	if (!clk_valid(clk))
 		return NULL;
 
@@ -505,12 +502,12 @@ struct clk *clk_get_parent(struct clk *clk)
 	return pclk;
 }
 
-long long clk_get_parent_rate(struct clk *clk)
+ulong clk_get_parent_rate(struct clk *clk)
 {
 	const struct clk_ops *ops;
 	struct clk *pclk;
 
-	debug("%s(clk=%p)\n", __func__, clk);
+	pr_debug("%s(clk=%p)\n", __func__, clk);
 	if (!clk_valid(clk))
 		return 0;
 
@@ -533,7 +530,7 @@ ulong clk_round_rate(struct clk *clk, ulong rate)
 {
 	const struct clk_ops *ops;
 
-	debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
+	pr_debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
 	if (!clk_valid(clk))
 		return 0;
 
@@ -544,6 +541,19 @@ ulong clk_round_rate(struct clk *clk, ulong rate)
 	return ops->round_rate(clk, rate);
 }
 
+static void clk_get_priv(struct clk *clk, struct clk **clkp)
+{
+	*clkp = clk;
+
+	/* get private clock struct associated to the provided clock */
+	if (CONFIG_IS_ENABLED(CLK_CCF)) {
+		/* Take id 0 as a non-valid clk, such as dummy */
+		if (clk->id)
+			clk_get_by_id(clk->id, clkp);
+	}
+}
+
+/* clean cache, called with private clock struct */
 static void clk_clean_rate_cache(struct clk *clk)
 {
 	struct udevice *child_dev;
@@ -563,8 +573,9 @@ static void clk_clean_rate_cache(struct clk *clk)
 ulong clk_set_rate(struct clk *clk, ulong rate)
 {
 	const struct clk_ops *ops;
+	struct clk *clkp;
 
-	debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
+	pr_debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
 	if (!clk_valid(clk))
 		return 0;
 	ops = clk_dev_ops(clk->dev);
@@ -572,8 +583,10 @@ ulong clk_set_rate(struct clk *clk, ulong rate)
 	if (!ops->set_rate)
 		return -ENOSYS;
 
+	/* get private clock struct used for cache */
+	clk_get_priv(clk, &clkp);
 	/* Clean up cached rates for us and all child clocks */
-	clk_clean_rate_cache(clk);
+	clk_clean_rate_cache(clkp);
 
 	return ops->set_rate(clk, rate);
 }
@@ -581,9 +594,11 @@ ulong clk_set_rate(struct clk *clk, ulong rate)
 int clk_set_parent(struct clk *clk, struct clk *parent)
 {
 	const struct clk_ops *ops;
+	struct clk *clkp;
+	struct clk *parentp;
 	int ret;
 
-	debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent);
+	pr_debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent);
 	if (!clk_valid(clk))
 		return 0;
 	ops = clk_dev_ops(clk->dev);
@@ -595,8 +610,15 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
 	if (ret)
 		return ret;
 
+	/* get private clock struct used for cache */
+	clk_get_priv(clk, &clkp);
+	clk_get_priv(parent, &parentp);
+
 	if (CONFIG_IS_ENABLED(CLK_CCF))
-		ret = device_reparent(clk->dev, parent->dev);
+		ret = device_reparent(clkp->dev, parentp->dev);
+
+	/* Clean up cached rates for us and all child clocks */
+	clk_clean_rate_cache(clkp);
 
 	return ret;
 }
@@ -607,7 +629,7 @@ int clk_enable(struct clk *clk)
 	struct clk *clkp = NULL;
 	int ret;
 
-	debug("%s(clk=%p)\n", __func__, clk);
+	pr_debug("%s(clk=%p)\n", __func__, clk);
 	if (!clk_valid(clk))
 		return 0;
 	ops = clk_dev_ops(clk->dev);
@@ -623,7 +645,7 @@ int clk_enable(struct clk *clk)
 			    device_get_uclass_id(clkp->dev->parent) == UCLASS_CLK) {
 				ret = clk_enable(dev_get_clk_ptr(clkp->dev->parent));
 				if (ret) {
-					printf("Enable %s failed\n",
+					pr_debug("Enable %s failed\n",
 					       clkp->dev->parent->name);
 					return ret;
 				}
@@ -633,7 +655,7 @@ int clk_enable(struct clk *clk)
 		if (ops->enable) {
 			ret = ops->enable(clk);
 			if (ret) {
-				printf("Enable %s failed\n", clk->dev->name);
+				pr_debug("Enable %s failed\n", clk->dev->name);
 				return ret;
 			}
 		}
@@ -667,7 +689,7 @@ int clk_disable(struct clk *clk)
 	struct clk *clkp = NULL;
 	int ret;
 
-	debug("%s(clk=%p)\n", __func__, clk);
+	pr_debug("%s(clk=%p)\n", __func__, clk);
 	if (!clk_valid(clk))
 		return 0;
 	ops = clk_dev_ops(clk->dev);
@@ -678,7 +700,7 @@ int clk_disable(struct clk *clk)
 				return 0;
 
 			if (clkp->enable_count == 0) {
-				printf("clk %s already disabled\n",
+				pr_debug("clk %s already disabled\n",
 				       clkp->dev->name);
 				return 0;
 			}
@@ -697,7 +719,7 @@ int clk_disable(struct clk *clk)
 		    device_get_uclass_id(clkp->dev->parent) == UCLASS_CLK) {
 			ret = clk_disable(dev_get_clk_ptr(clkp->dev->parent));
 			if (ret) {
-				printf("Disable %s failed\n",
+				pr_debug("Disable %s failed\n",
 				       clkp->dev->parent->name);
 				return ret;
 			}

drivers/clk/spacemit/Kconfig

@@ -0,0 +1,18 @@
+# SPDX-License-Identifier: GPL-2.0
+# common clock support for SPACEMIT SoC family.
+
+config SPACEMIT_K1PRO_CCU
+	tristate "Clock support for Spacemit k1pro SoCs"
+	depends on CLK
+        depends on CLK_CCF
+	help
+	  Build the driver for Spacemit K1pro Clock Driver.
+
+config SPACEMIT_K1X_CCU
+        tristate "Clock support for Spacemit k1x SoCs"
+        select CLK
+        select CLK_CCF
+        help
+          Build the driver for Spacemit K1x Clock Driver.
+
+

drivers/clk/spacemit/Makefile

@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0
+#
+# Spacemit Clock specific Makefile
+#
+#SoC support
+obj-$(CONFIG_SPACEMIT_K1PRO_CCU) += ccu-k1pro.o ccu-pll-k1pro.o
+obj-$(CONFIG_SPACEMIT_K1X_CCU) += ccu-k1x.o ccu_pll.o ccu_ddn.o ccu_mix.o