Update for v1.0beta3.1

arch/riscv/cpu/start.S

@@ -41,6 +41,12 @@ secondary_harts_relocation_error:
 .globl _start
 _start:
 #if CONFIG_IS_ENABLED(RISCV_MMODE)
+#ifdef CONFIG_RISCV_ISA_DOUBLE_FLOAT
+	csrr	a0, CSR_MSTATUS
+	li		t0, 3<<13
+	xor		a0, a0, t0
+	csrw	CSR_MSTATUS, a0
+#endif
 	csrr	a0, CSR_MHARTID
 #endif
 

arch/riscv/cpu/u-boot-spl.lds

@@ -71,6 +71,12 @@ SECTIONS
 
 	. = ALIGN(4);
 
+	. = DDR_TRAINING_DATA_BASE;
+	.ddr_training : {
+		KEEP(*(.ddr_training))
+		. = ALIGN(8);
+	}
+
 	_end = .;
 	_image_binary_end = .;
 

arch/riscv/dts/Makefile

@@ -8,7 +8,7 @@ dtb-$(CONFIG_TARGET_SIFIVE_UNLEASHED) += hifive-unleashed-a00.dtb
 dtb-$(CONFIG_TARGET_SIFIVE_UNMATCHED) += hifive-unmatched-a00.dtb
 dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb
 dtb-$(CONFIG_TARGET_SPACEMIT_K1PRO) += k1-pro_qemu.dtb k1-pro_sim.dtb k1-pro_fpga.dtb
-dtb-$(CONFIG_TARGET_SPACEMIT_K1X) += k1-x_evb.dtb k1-x_deb2.dtb k1-x_deb1.dtb k1-x_hs450.dtb k1-x_spl.dtb k1-x_mingo.dtb
+dtb-$(CONFIG_TARGET_SPACEMIT_K1X) += k1-x_evb.dtb k1-x_deb2.dtb k1-x_deb1.dtb k1-x_hs450.dtb k1-x_kx312.dtb k1-x_MINI-PC.dtb k1-x_mingo.dtb k1-x_spl.dtb
 
 include $(srctree)/scripts/Makefile.dts
 

arch/riscv/dts/k1-x_MINI-PC.dts

@@ -0,0 +1,261 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/* Copyright (c) 2023 Spacemit, Inc */
+
+/dts-v1/;
+
+#include "k1-x.dtsi"
+#include "k1-x_pinctrl.dtsi"
+#include "k1-x_spm8821.dtsi"
+
+/ {
+	model = "spacemit k1-x MINI-PC board";
+
+	aliases {
+		efuse_power = &ldo_31;
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
+	};
+
+	chosen {
+		bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&cpu_0 {
+	/* boot frequency for cluster-0, should be 1600000, 1228000, 819000, or 614000 */
+	boot_freq_cluster0 = <1228000>;
+	/* boot frequency for cluster-1, should be 1600000, 1228000, 819000, or 614000 */
+	boot_freq_cluster1 = <1228000>;
+};
+
+&dramc {
+	/* dram data rate, should be 1200, 1600, or 2400 */
+	datarate = <2400>;
+};
+
+&cpus {
+	timebase-frequency = <24000000>;
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&i2c0 {
+	status = "disabled";
+};
+
+&i2c1 {
+	status = "disabled";
+};
+
+&i2c2 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c2_0>;
+	status = "okay";
+
+	eeprom@50{
+		compatible = "atmel,24c02";
+		reg = <0x50>;
+		vin-supply-names = "eeprom_1v8";
+		status = "okay";
+	};
+};
+
+&i2c3 {
+	status = "disabled";
+};
+
+&i2c4 {
+	clock-frequency = <400000>;
+	status = "okay";
+};
+
+&i2c5 {
+	status = "disabled";
+};
+
+&i2c6 {
+	status = "disabled";
+};
+
+&i2c7 {
+	status = "disabled";
+};
+
+&pinctrl {
+	pinctrl-single,gpio-range = <
+		&range GPIO_49  2 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_3V_DS4)
+		&range GPIO_58  1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_63  2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_65  1 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
+		&range GPIO_66  2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range PRI_TDI  2 (MUX_MODE1 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
+		&range PRI_TCK  1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range PRI_TDO  1 (MUX_MODE1 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
+		&range GPIO_74  1 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
+		&range GPIO_80  1 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_3V_DS4)
+		&range GPIO_81  3 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
+		&range GPIO_90  1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_91  2 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
+		&range DVL0     2 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_114 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_115 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_124 1 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
+		&range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+	>;
+
+	usbp1_vbus: usbp1_vbus {
+		pinctrl-single,pins =<
+			K1X_PADCONF(GPIO_66, MUX_MODE0, (EDGE_NONE | PULL_UP | PAD_1V8_DS2))    /* drive_vbus1_iso */
+		>;
+	};
+
+	gpio80_pmx_func0: gpio80_pmx_func0 {
+		pinctrl-single,pins = <
+			K1X_PADCONF(GPIO_80, MUX_MODE0, (EDGE_BOTH | PULL_UP | PAD_3V_DS4))  /* mmc cd */
+		>;
+	};
+};
+
+&gpio{
+	gpio-ranges = <
+		&pinctrl 49 GPIO_49 2
+		&pinctrl 58 GPIO_58 1
+		&pinctrl 63 GPIO_63 5
+		&pinctrl 70 PRI_TDI 4
+		&pinctrl 74 GPIO_74 1
+		&pinctrl 80 GPIO_80 4
+		&pinctrl 90 GPIO_90 3
+		&pinctrl 96 DVL0 2
+		&pinctrl 110 GPIO_110 1
+		&pinctrl 114 GPIO_114 3
+		&pinctrl 123 GPIO_123 5
+	>;
+};
+
+&udc {
+	status = "okay";
+};
+
+&usb2phy {
+	status = "okay";
+};
+
+&combphy {
+	status = "okay";
+};
+
+&usb3hub {
+	usb-gpios = <&gpio 97 0>;	/* gpio_97 for usb3 pwren */
+	hub-gpios = <&gpio 123 0>;	/* usb3 hub en */
+	reset-gpios = <&gpio 124 0>;	/* usb3 hub rst*/
+	status = "okay";
+};
+
+&usbdrd3 {
+	status = "okay";
+	dwc3@c0a00000 {
+		dr_mode = "host";
+		phy_type = "utmi";
+		snps,dis_enblslpm_quirk;
+		snps,dis-u2-freeclk-exists-quirk;
+		snps,dis-del-phy-power-chg-quirk;
+		snps,dis_u2_susphy_quirk;
+		snps,dis_u3_susphy_quirk;
+	};
+};
+
+/* eMMC */
+&sdhci2 {
+	bus-width = <8>;
+	non-removable;
+	mmc-hs400-1_8v;
+	mmc-hs400-enhanced-strobe;
+	sdh-phy-module = <1>;
+	status = "okay";
+};
+
+&eth0 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_gmac0>;
+
+	phy-reset-pin = <110>;
+
+	clk_tuning_enable;
+	clk-tuning-by-delayline;
+	tx-phase = <90>;
+	rx-phase = <73>;
+
+	phy-mode = "rgmii";
+	phy-addr = <1>;
+	phy-handle = <&rgmii>;
+
+	ref-clock-from-phy;
+
+	mdio {
+		#address-cells = <0x1>;
+		#size-cells = <0x0>;
+		rgmii: phy@0 {
+			compatible = "ethernet-phy-id001c.c916";
+			device_type = "ethernet-phy";
+			reg = <0x1>;
+		};
+	};
+};
+
+&pcie1_rc {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pcie1_3>;
+	status = "okay";
+};
+
+&qspi {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_qspi>;
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <26500000>;
+		m25p,fast-read;
+		broken-flash-reset;
+		status = "okay";
+	};
+};
+
+&efuse {
+	status = "okay";
+};
+
+&dpu {
+	status = "okay";
+};
+
+&hdmi {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_hdmi_0>;
+	status = "okay";
+};
+
+&mipi_dsi {
+	status = "disabled";
+};
+
+&panel {
+	dcp-gpios = <&gpio 82 0>;
+	dcn-gpios = <&gpio 83 0>;
+	bl-gpios = <&gpio 44 0>;
+	reset-gpios = <&gpio 81 0>;
+	status = "disabled";
+};

arch/riscv/dts/k1-x_deb1.dts

@@ -104,11 +104,12 @@
 		&range GPIO_81  3 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
 		&range GPIO_90  1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
 		&range GPIO_91  2 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
-		&range DVL0     2 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range DVL0     1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range DVL1     1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS0)
 		&range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
 		&range GPIO_114 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
 		&range GPIO_115 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
-		&range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS0)
 		&range GPIO_124 1 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
 		&range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
 	>;
@@ -182,6 +183,7 @@
 	cd-inverted;
 	cap-sd-highspeed;
 	sdh-phy-module = <0>;
+	clk-src-freq = <204800000>;
 	status = "okay";
 };
 
@@ -192,6 +194,7 @@
 	mmc-hs400-1_8v;
 	mmc-hs400-enhanced-strobe;
 	sdh-phy-module = <1>;
+	clk-src-freq = <375000000>;
 	status = "okay";
 };
 

arch/riscv/dts/k1-x_deb2.dts

@@ -181,6 +181,7 @@
 	cd-inverted;
 	cap-sd-highspeed;
 	sdh-phy-module = <0>;
+	clk-src-freq = <204800000>;
 	status = "okay";
 };
 
@@ -191,6 +192,7 @@
 	mmc-hs400-1_8v;
 	mmc-hs400-enhanced-strobe;
 	sdh-phy-module = <1>;
+	clk-src-freq = <375000000>;
 	status = "okay";
 };
 

arch/riscv/dts/k1-x_evb.dts

@@ -136,6 +136,7 @@
 	cd-inverted;
 	cap-sd-highspeed;
 	sdh-phy-module = <0>;
+	clk-src-freq = <204800000>;
 	status = "okay";
 };
 
@@ -146,6 +147,7 @@
 	mmc-hs400-1_8v;
 	mmc-hs400-enhanced-strobe;
 	sdh-phy-module = <1>;
+	clk-src-freq = <375000000>;
 	status = "okay";
 };
 

arch/riscv/dts/k1-x_fpga.dts

@@ -1,127 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/* Copyright (c) 2023 Spacemit, Inc */
-
-/dts-v1/;
-
-#include "k1-x.dtsi"
-
-/ {
-	model = "spacemit k1-x fpga board";
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
-		u-boot,dm-spl;
-	};
-
-	chosen {
-		bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
-		stdout-path = "serial0:115200n8";
-		u-boot,dm-spl;
-	};
-};
-
-&uart0 {
-	status = "okay";
-};
-
-&i2c0 {
-	status = "disabled";
-};
-
-&i2c1 {
-	status = "disabled";
-};
-
-&i2c2 {
-	status = "disabled";
-};
-
-&i2c3 {
-	/* SEC_I2C */
-	status = "disabled";
-};
-
-&i2c4 {
-	clock-frequency = <400000>;
-	status = "okay";
-};
-
-&i2c5 {
-	status = "disabled";
-};
-
-&i2c6 {
-	status = "disabled";
-};
-
-&i2c7 {
-	status = "disabled";
-};
-
-&i2c8 {
-	/* PWR_I2C */
-	status = "okay";
-};
-
-&udc {
-	status = "disabled";
-};
-
-&usbdrd3 {
-	status = "disabled";
-	dwc3@c0a00000 {
-		maximum-speed = "high-speed";
-		dr_mode = "peripheral";
-		phy_type = "utmi_wide";
-		snps,dis_enblslpm_quirk;
-	};
-};
-
-&sdhci0 {
-	bus-width = <4>;
-	broken-cd;
-	cap-sd-highspeed;
-	sdh-phy-module = <0>;
-	status = "okay";
-};
-
-/* eMMC */
-&sdhci2 {
-	bus-width = <8>;
-	non-removable;
-	cap-mmc-highspeed;
-	sdh-phy-module = <1>;
-	status = "disabled";
-};
-
-&eth0 {
-	status = "okay";
-
-	phy-reset-pin = <40>;
-
-	clk_tuning_enable;
-	clk-tuning-by-reg;
-	tx-phase = <0x1>;
-	rx-phase = <0x5>;
-
-	phy-mode = "rgmii";
-	phy-addr = <0>;
-	phy-handle = <&rgmii>;
-
-	ref-clock-from-phy;
-
-	mdio {
-		#address-cells = <0x1>;
-		#size-cells = <0x0>;
-		rgmii: phy@0 {
-			compatible = "ethernet-phy-ieee802.3-c22";
-			device_type = "ethernet-phy";
-			reg = <0x0>;
-		};
-	};
-};
-
-&pcie0_rc {
-	status = "disabled";
-};

arch/riscv/dts/k1-x_fpga_1x4.dts

@@ -1,220 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/* Copyright (c) 2023 Spacemit, Inc */
-
-/dts-v1/;
-/ {
-	model = "spacemit k1-x fpga board";
-	compatible = "spacemit,k1x", "riscv";
-	#address-cells = <2>;
-	#size-cells = <2>;
-
-	aliases {
-		serial0 = &uart0;
-	};
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x00000000 0x00000000 0x00000000 0x70000000>;
-		u-boot,dm-spl;
-	};
-
-	chosen {
-		bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
-		stdout-path = "serial0:115200n8";
-		u-boot,dm-spl;
-	};
-
-	cpus: cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		timebase-frequency = <10000000>;
-		u-boot,dm-spl;
-		cpu_0: cpu@0 {
-			device_type = "cpu";
-			reg = <0>;
-			status = "okay";
-			compatible = "riscv";
-			riscv,isa = "rv64imafdcvsu_zicsr_zifencei_zicbom_zihintpause_zba_zbb_zbc_zbs_svpbmt";
-			riscv,cbom-block-size = <64>;
-			mmu-type = "riscv,sv39";
-			cpu-freq = "1.848Ghz";
-			cpu-icache = "64KB";
-			cpu-dcache = "64KB";
-			cpu-l2cache = "1MB";
-			cpu-tlb = "1024 4-ways";
-			cpu-cacheline = "64Bytes";
-			cpu-vector = "0.7.1";
-			u-boot,dm-spl;
-			cpu0_intc: interrupt-controller {
-				#interrupt-cells = <1>;
-				compatible = "riscv,cpu-intc";
-				interrupt-controller;
-				u-boot,dm-spl;
-			};
-		};
-		cpu_1: cpu@1 {
-			device_type = "cpu";
-			reg = <1>;
-			status = "okay";
-			compatible = "riscv";
-			riscv,isa = "rv64imafdcvsu_zicsr_zifencei_zicbom_zihintpause_zba_zbb_zbc_zbs_svpbmt";
-			riscv,cbom-block-size = <64>;
-			mmu-type = "riscv,sv39";
-			cpu-freq = "1.848Ghz";
-			cpu-icache = "64KB";
-			cpu-dcache = "64KB";
-			cpu-l2cache = "1MB";
-			cpu-tlb = "1024 4-ways";
-			cpu-cacheline = "64Bytes";
-			cpu-vector = "0.7.1";
-			u-boot,dm-spl;
-
-			cpu1_intc: interrupt-controller {
-				#interrupt-cells = <1>;
-				compatible = "riscv,cpu-intc";
-				interrupt-controller;
-				u-boot,dm-spl;
-			};
-		};
-		cpu_2: cpu@2 {
-			device_type = "cpu";
-			reg = <2>;
-			status = "okay";
-			compatible = "riscv";
-			riscv,isa = "rv64imafdcvsu_zicsr_zifencei_zicbom_zihintpause_zba_zbb_zbc_zbs_svpbmt";
-			riscv,cbom-block-size = <64>;
-			mmu-type = "riscv,sv39";
-			cpu-freq = "1.848Ghz";
-			cpu-icache = "64KB";
-			cpu-dcache = "64KB";
-			cpu-l2cache = "1MB";
-			cpu-tlb = "1024 4-ways";
-			cpu-cacheline = "64Bytes";
-			cpu-vector = "0.7.1";
-			u-boot,dm-spl;
-
-			cpu2_intc: interrupt-controller {
-				#interrupt-cells = <1>;
-				compatible = "riscv,cpu-intc";
-				interrupt-controller;
-				u-boot,dm-spl;
-			};
-		};
-		cpu_3: cpu@3 {
-			device_type = "cpu";
-			reg = <3>;
-			status = "okay";
-			compatible = "riscv";
-			riscv,isa = "rv64imafdcvsu_zicsr_zifencei_zicbom_zihintpause_zba_zbb_zbc_zbs_svpbmt";
-			riscv,cbom-block-size = <64>;
-			mmu-type = "riscv,sv39";
-			cpu-freq = "1.848Ghz";
-			cpu-icache = "64KB";
-			cpu-dcache = "64KB";
-			cpu-l2cache = "1MB";
-			cpu-tlb = "1024 4-ways";
-			cpu-cacheline = "64Bytes";
-			cpu-vector = "0.7.1";
-			u-boot,dm-spl;
-
-			cpu3_intc: interrupt-controller {
-				#interrupt-cells = <1>;
-				compatible = "riscv,cpu-intc";
-				interrupt-controller;
-				u-boot,dm-spl;
-			};
-		};
-	};
-
-	clocks {
-		#address-cells = <0x2>;
-		#size-cells = <0x2>;
-		ranges;
-	};
-
-	soc {
-		compatible = "simple-bus";
-		#address-cells = <2>;
-		#size-cells = <2>;
-		ranges;
-		u-boot,dm-spl;
-
-		clint0: clint@e4000000 {
-			compatible = "riscv,clint0";
-			interrupts-extended = <
-				&cpu0_intc  3 &cpu0_intc  7
-				&cpu1_intc  3 &cpu1_intc  7
-				&cpu2_intc  3 &cpu2_intc  7
-				&cpu3_intc  3 &cpu3_intc  7
-			>;
-			reg = <0x0 0xE4000000 0x0 0x00010000>;
-			clint,has-no-64bit-mmio;
-			u-boot,dm-spl;
-		};
-
-		intc: interrupt-controller@e0000000 {
-			#interrupt-cells = <1>;
-			compatible = "riscv,plic0";
-			interrupt-controller;
-			interrupts-extended = <
-				&cpu0_intc 0xffffffff &cpu0_intc 9
-				&cpu1_intc 0xffffffff &cpu1_intc 9
-				&cpu2_intc 0xffffffff &cpu2_intc 9
-				&cpu3_intc 0xffffffff &cpu3_intc 9
-			>;
-			reg = <0x0 0xE0000000 0x0 0x04000000>;
-			reg-names = "control";
-			riscv,max-priority = <7>;
-			riscv,ndev = <159>;
-		};
-
-		uart0: uart@d4017000 {
-			u-boot,dm-spl;
-			compatible = "ns16550";
-			reg = <0x00000000 0xD4017000 0x00000000 0x00000100>;
-			reg-shift = <2>;
-			reg-io-width = <4>;
-			clock-frequency = <14000000>;
-			status = "okay";
-		};
-
-		ddr@c0000000 {
-			u-boot,dm-spl;
-			compatible = "spacemit,ddr-ctl";
-			reg = <0x00000000 0xC0000000 0x00000000 0x00400000>;
-		};
-
-		eth0: ethernet@cac80000 {
-			compatible = "spacemit,k1x-emac";
-			reg = <0x00000000 0xCAC80000 0x00000000 0x00000420>;
-			ctrl-reg = <0x3e4>;
-			dline-reg = <0x3e8>;
-			status = "okay";
-
-			phy-reset-pin = <40>;
-
-			clk_tuning_enable;
-			clk-tuning-by-reg;
-			tx-phase = <0x0>;
-			rx-phase = <0x1>;
-
-			phy-mode = "rgmii";
-			phy-addr = <0>;
-			phy-handle = <&rgmii>;
-
-			ref-clock-from-phy;
-
-			mdio {
-				#address-cells = <0x1>;
-				#size-cells = <0x0>;
-				rgmii: phy@0 {
-					compatible = "ethernet-phy-ieee802.3-c22";
-					device_type = "ethernet-phy";
-					reg = <0x0>;
-				};
-			};
-
-		};
-	};
-};
-

arch/riscv/dts/k1-x_fpga_2x2.dts

@@ -1,221 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/* Copyright (c) 2023 Spacemit, Inc */
-
-/dts-v1/;
-/ {
-	model = "spacemit k1-x fpga board";
-	compatible = "spacemit,k1x", "riscv";
-	#address-cells = <2>;
-	#size-cells = <2>;
-
-	aliases {
-		serial0 = &uart0;
-	};
-
-	memory@0 {
-		device_type = "memory";
-		reg = <0x00000000 0x00000000 0x00000000 0x70000000>;
-		u-boot,dm-spl;
-	};
-
-	chosen {
-		bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
-		stdout-path = "serial0:115200n8";
-		u-boot,dm-spl;
-	};
-
-	cpus: cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		timebase-frequency = <10000000>;
-		u-boot,dm-spl;
-		cpu_0: cpu@0 {
-			device_type = "cpu";
-			reg = <0>;
-			status = "okay";
-			compatible = "riscv";
-			riscv,isa = "rv64imafdcvsu_zicsr_zifencei_zicbom_zihintpause_zba_zbb_zbc_zbs_svpbmt";
-			riscv,cbom-block-size = <64>;
-			mmu-type = "riscv,sv39";
-			cpu-freq = "1.848Ghz";
-			cpu-icache = "64KB";
-			cpu-dcache = "64KB";
-			cpu-l2cache = "1MB";
-			cpu-tlb = "1024 4-ways";
-			cpu-cacheline = "64Bytes";
-			cpu-vector = "0.7.1";
-			u-boot,dm-spl;
-			cpu0_intc: interrupt-controller {
-				#interrupt-cells = <1>;
-				compatible = "riscv,cpu-intc";
-				interrupt-controller;
-				u-boot,dm-spl;
-			};
-		};
-		cpu_1: cpu@1 {
-			device_type = "cpu";
-			reg = <1>;
-			status = "okay";
-			compatible = "riscv";
-			riscv,isa = "rv64imafdcvsu_zicsr_zifencei_zicbom_zihintpause_zba_zbb_zbc_zbs_svpbmt";
-			riscv,cbom-block-size = <64>;
-			mmu-type = "riscv,sv39";
-			cpu-freq = "1.848Ghz";
-			cpu-icache = "64KB";
-			cpu-dcache = "64KB";
-			cpu-l2cache = "1MB";
-			cpu-tlb = "1024 4-ways";
-			cpu-cacheline = "64Bytes";
-			cpu-vector = "0.7.1";
-			u-boot,dm-spl;
-
-			cpu1_intc: interrupt-controller {
-				#interrupt-cells = <1>;
-				compatible = "riscv,cpu-intc";
-				interrupt-controller;
-				u-boot,dm-spl;
-			};
-		};
-		cpu_2: cpu@2 {
-			device_type = "cpu";
-			reg = <4>;
-			status = "okay";
-			compatible = "riscv";
-			riscv,isa = "rv64imafdcvsu_zicsr_zifencei_zicbom_zihintpause_zba_zbb_zbc_zbs_svpbmt";
-			riscv,cbom-block-size = <64>;
-			mmu-type = "riscv,sv39";
-			cpu-freq = "1.848Ghz";
-			cpu-icache = "64KB";
-			cpu-dcache = "64KB";
-			cpu-l2cache = "1MB";
-			cpu-tlb = "1024 4-ways";
-			cpu-cacheline = "64Bytes";
-			cpu-vector = "0.7.1";
-			u-boot,dm-spl;
-
-			cpu2_intc: interrupt-controller {
-				#interrupt-cells = <1>;
-				compatible = "riscv,cpu-intc";
-				interrupt-controller;
-				u-boot,dm-spl;
-			};
-		};
-		cpu_3: cpu@3 {
-			device_type = "cpu";
-			reg = <5>;
-			status = "okay";
-			compatible = "riscv";
-			riscv,isa = "rv64imafdcvsu_zicsr_zifencei_zicbom_zihintpause_zba_zbb_zbc_zbs_svpbmt";
-			riscv,cbom-block-size = <64>;
-			mmu-type = "riscv,sv39";
-			cpu-freq = "1.848Ghz";
-			cpu-icache = "64KB";
-			cpu-dcache = "64KB";
-			cpu-l2cache = "1MB";
-			cpu-tlb = "1024 4-ways";
-			cpu-cacheline = "64Bytes";
-			cpu-vector = "0.7.1";
-			u-boot,dm-spl;
-
-			cpu3_intc: interrupt-controller {
-				#interrupt-cells = <1>;
-				compatible = "riscv,cpu-intc";
-				interrupt-controller;
-				u-boot,dm-spl;
-			};
-		};
-	};
-
-	clocks {
-		#address-cells = <0x2>;
-		#size-cells = <0x2>;
-		ranges;
-	};
-
-	soc {
-		compatible = "simple-bus";
-		#address-cells = <2>;
-		#size-cells = <2>;
-		ranges;
-		u-boot,dm-spl;
-
-		clint0: clint@e4000000 {
-			compatible = "riscv,clint0";
-			interrupts-extended = <
-				&cpu0_intc  3 &cpu0_intc  7
-				&cpu1_intc  3 &cpu1_intc  7
-				&cpu2_intc  3 &cpu2_intc  7
-				&cpu3_intc  3 &cpu3_intc  7
-			>;
-			reg = <0x0 0xE4000000 0x0 0x00010000>;
-			clint,has-no-64bit-mmio;
-			u-boot,dm-spl;
-		};
-
-		intc: interrupt-controller@e0000000 {
-			#interrupt-cells = <1>;
-			compatible = "riscv,plic0";
-			interrupt-controller;
-			interrupts-extended = <
-				&cpu0_intc 0xffffffff &cpu0_intc 9
-				&cpu1_intc 0xffffffff &cpu1_intc 9
-				&cpu2_intc 0xffffffff &cpu2_intc 9
-				&cpu3_intc 0xffffffff &cpu3_intc 9
-			>;
-			reg = <0x0 0xE0000000 0x0 0x04000000>;
-			reg-names = "control";
-			riscv,max-priority = <7>;
-			riscv,ndev = <159>;
-		};
-
-		uart0: uart@d4017000 {
-			u-boot,dm-spl;
-			compatible = "ns16550";
-			reg = <0x00000000 0xD4017000 0x00000000 0x00000100>;
-			reg-shift = <2>;
-			reg-io-width = <4>;
-			clock-frequency = <14000000>;
-			status = "okay";
-		};
-
-		ddr@c0000000 {
-			u-boot,dm-spl;
-			compatible = "spacemit,ddr-ctl";
-			reg = <0x00000000 0xC0000000 0x00000000 0x00400000>;
-		};
-
-		eth0: ethernet@cac80000 {
-			compatible = "spacemit,k1x-emac";
-			reg = <0x00000000 0xCAC80000 0x00000000 0x00000420>;
-			ctrl-reg = <0x3e4>;
-			dline-reg = <0x3e8>;
-			status = "okay";
-
-			phy-reset-pin = <40>;
-
-			clk_tuning_enable;
-			clk-tuning-by-reg;
-			tx-phase = <0x0>;
-			rx-phase = <0x1>;
-
-			phy-mode = "rgmii";
-			phy-addr = <0>;
-			phy-handle = <&rgmii>;
-
-			ref-clock-from-phy;
-
-			mdio {
-				#address-cells = <0x1>;
-				#size-cells = <0x0>;
-				rgmii: phy@0 {
-					compatible = "ethernet-phy-ieee802.3-c22";
-					device_type = "ethernet-phy";
-					reg = <0x0>;
-				};
-			};
-
-		};
-
-	};
-};
-

arch/riscv/dts/k1-x_hs450.dts

@@ -136,6 +136,7 @@
 	cd-inverted;
 	cap-sd-highspeed;
 	sdh-phy-module = <0>;
+	clk-src-freq = <204800000>;
 	status = "okay";
 };
 
@@ -146,6 +147,7 @@
 	mmc-hs400-1_8v;
 	mmc-hs400-enhanced-strobe;
 	sdh-phy-module = <1>;
+	clk-src-freq = <375000000>;
 	status = "okay";
 };
 

arch/riscv/dts/k1-x_kx312.dts

@@ -0,0 +1,182 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/* Copyright (c) 2023 Spacemit, Inc */
+
+/dts-v1/;
+
+#include "k1-x.dtsi"
+#include "k1-x_pinctrl.dtsi"
+#include "k1-x_spm8821.dtsi"
+
+/ {
+	model = "spacemit k1-x kx312 board";
+
+	aliases {
+		efuse_power = &ldo_31;
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
+	};
+
+	chosen {
+		bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&cpu_0 {
+	/* boot frequency for cluster-0, should be 1600000, 1228000, 819000, or 614000 */
+	boot_freq_cluster0 = <1228000>;
+	/* boot frequency for cluster-1, should be 1600000, 1228000, 819000, or 614000 */
+	boot_freq_cluster1 = <1228000>;
+};
+
+&dramc {
+	/* dram data rate, should be 1200, 1600, or 2400 */
+	datarate = <2400>;
+};
+
+&cpus {
+	timebase-frequency = <24000000>;
+};
+
+&ccu {
+	pll2-freq = <2800000000>;
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&i2c2 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c2_0>;
+	status = "okay";
+
+	eeprom@50{
+		compatible = "atmel,24c02";
+		reg = <0x50>;
+		vin-supply-names = "eeprom_1v8";
+		status = "okay";
+	};
+};
+
+&i2c4 {
+	clock-frequency = <400000>;
+	status = "okay";
+};
+
+&pinctrl {
+	pinctrl-single,gpio-range = <
+		&range GPIO_49  2 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_3V_DS4)
+		&range GPIO_58  1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_63  2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_65  1 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
+		&range GPIO_66  2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range PRI_TDI  2 (MUX_MODE1 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
+		&range PRI_TCK  1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range PRI_TDO  1 (MUX_MODE1 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
+		&range GPIO_74  1 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
+		&range GPIO_80  1 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_3V_DS4)
+		&range GPIO_81  3 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
+		&range GPIO_90  1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_91  2 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
+		&range DVL0     2 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_114 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_115 2 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+		&range GPIO_124 1 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_1V8_DS2)
+		&range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
+	>;
+
+	gpio80_pmx_func0: gpio80_pmx_func0 {
+		pinctrl-single,pins = <
+			K1X_PADCONF(GPIO_80, MUX_MODE0, (EDGE_BOTH | PULL_UP | PAD_3V_DS4))  /* mmc cd */
+		>;
+	};
+};
+
+&gpio{
+	gpio-ranges = <
+		&pinctrl 49 GPIO_49 2
+		&pinctrl 58 GPIO_58 1
+		&pinctrl 63 GPIO_63 5
+		&pinctrl 70 PRI_TDI 4
+		&pinctrl 74 GPIO_74 1
+		&pinctrl 80 GPIO_80 4
+		&pinctrl 90 GPIO_90 3
+		&pinctrl 96 DVL0 2
+		&pinctrl 110 GPIO_110 1
+		&pinctrl 114 GPIO_114 3
+		&pinctrl 123 GPIO_123 5
+	>;
+};
+
+&udc {
+	status = "okay";
+};
+
+&usb2phy {
+	status = "okay";
+};
+
+&sdhci0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_mmc1 &gpio80_pmx_func0>;
+	bus-width = <4>;
+	cd-gpios = <&gpio 80 0>;
+	cd-inverted;
+	cap-sd-highspeed;
+	sdh-phy-module = <0>;
+	status = "okay";
+};
+
+/* eMMC */
+&sdhci2 {
+	bus-width = <8>;
+	non-removable;
+	mmc-hs400-1_8v;
+	mmc-hs400-enhanced-strobe;
+	sdh-phy-module = <1>;
+	status = "okay";
+};
+
+&pcie2_rc {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pcie2_4>;
+	status = "okay";
+};
+
+&qspi {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_qspi>;
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <26500000>;
+		m25p,fast-read;
+		broken-flash-reset;
+		status = "okay";
+	};
+};
+
+&efuse {
+	status = "okay";
+};
+
+&dpu {
+	status = "okay";
+};
+
+&hdmi {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_hdmi_0>;
+	status = "okay";
+};
+

arch/riscv/dts/k1-x_mingo.dts

@@ -45,14 +45,6 @@
 	status = "okay";
 };
 
-&i2c0 {
-	status = "disabled";
-};
-
-&i2c1 {
-	status = "disabled";
-};
-
 &i2c2 {
 	#address-cells = <1>;
 	#size-cells = <0>;
@@ -68,27 +60,11 @@
 	};
 };
 
-&i2c3 {
-	status = "disabled";
-};
-
 &i2c4 {
 	clock-frequency = <400000>;
 	status = "okay";
 };
 
-&i2c5 {
-	status = "disabled";
-};
-
-&i2c6 {
-	status = "disabled";
-};
-
-&i2c7 {
-	status = "disabled";
-};
-
 &pinctrl {
 	pinctrl-single,gpio-range = <
 		&range GPIO_49  2 (MUX_MODE0 | EDGE_NONE | PULL_UP   | PAD_3V_DS4)
@@ -113,12 +89,6 @@
 		&range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2)
 	>;
 
-	usbp1_vbus: usbp1_vbus {
-		pinctrl-single,pins =<
-			K1X_PADCONF(GPIO_66, MUX_MODE0, (EDGE_NONE | PULL_UP | PAD_1V8_DS2))    /* drive_vbus1_iso */
-		>;
-	};
-
 	gpio80_pmx_func0: gpio80_pmx_func0 {
 		pinctrl-single,pins = <
 			K1X_PADCONF(GPIO_80, MUX_MODE0, (EDGE_BOTH | PULL_UP | PAD_3V_DS4))  /* mmc cd */
@@ -224,10 +194,6 @@
 	};
 };
 
-&pcie0_rc {
-	status = "disabled";
-};
-
 &pcie1_rc {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pcie1_3>;
@@ -253,24 +219,3 @@
 	status = "okay";
 };
 
-&dpu {
-	status = "okay";
-};
-
-&hdmi {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_hdmi_0>;
-	status = "okay";
-};
-
-&mipi_dsi {
-	status = "disabled";
-};
-
-&panel {
-	dcp-gpios = <&gpio 82 0>;
-	dcn-gpios = <&gpio 83 0>;
-	bl-gpios = <&gpio 44 0>;
-	reset-gpios = <&gpio 81 0>;
-	status = "disabled";
-};

arch/riscv/dts/k1-x_spl.dts

@@ -11,14 +11,7 @@
 / {
 	model = "spacemit k1-x spl";
 
-	memory@0 {
-		device_type = "memory";
-		reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
-		u-boot,dm-spl;
-	};
-
 	chosen {
-		bootargs = "earlycon=sbi console=ttyS0,115200 debug loglevel=8,initcall_debug=1 rdinit=/init.tmp";
 		stdout-path = "serial0:115200n8";
 		u-boot,dm-spl;
 	};
@@ -110,25 +103,6 @@
 		u-boot,dm-spl;
 	};
 
-	twsi6@d4018800 {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_i2c6_1>;
-		status = "okay";
-		u-boot,dm-spl;
-
-		eeprom@50{
-			compatible = "atmel,24c02";
-			u-boot,dm-spl;
-			reg = <0x50>;
-			bus = <6>;
-			#address-cells = <1>;
-			#size-cells = <1>;
-			status = "okay";
-		};
-	};
-
 	spi@d420c000 {
 		status = "okay";
 		pinctrl-names = "default";

arch/riscv/lib/bootm.c

@@ -67,11 +67,11 @@ static void boot_prep_linux(bootm_headers_t *images)
 	if (CONFIG_IS_ENABLED(OF_LIBFDT) && CONFIG_IS_ENABLED(LMB) && images->ft_len) {
 		debug("using: FDT\n");
 		if (image_setup_linux(images)) {
-			printf("FDT creation failed! hanging...");
+			pr_info("FDT creation failed! hanging...");
 			hang();
 		}
 	} else {
-		printf("Device tree not found or missing FDT support\n");
+		pr_info("Device tree not found or missing FDT support\n");
 		hang();
 	}
 }

arch/riscv/lib/fdt_fixup.c

@@ -51,7 +51,7 @@ int riscv_fdt_copy_resv_mem_node(const void *src, void *dst)
 	 */
 	err = fdt_open_into(dst, dst, fdt_totalsize(dst) + 1024);
 	if (err < 0) {
-		printf("Device Tree can't be expanded to accommodate new node");
+		pr_info("Device Tree can't be expanded to accommodate new node");
 		return err;
 	}
 
@@ -213,6 +213,9 @@ int arch_fixup_fdt(void *blob)
 	} while(nodeoffset >= 0);
 
 	for (int bank_index = CONFIG_NR_DRAM_BANKS - 1; bank_index >= 0; bank_index--){
+		if (0 == gd->bd->bi_dram[bank_index].size)
+			continue;
+
 		memset(memstart, 0, 32);
 		sprintf(memstart, "memory@%llx", gd->bd->bi_dram[bank_index].start);
 
@@ -224,7 +227,7 @@ int arch_fixup_fdt(void *blob)
 		err = fdt_setprop(blob, nodeoffset, "device_type", "memory",
 				sizeof("memory"));
 		if (err < 0) {
-			printf("WARNING: could not set %s %s.\n", "device_type",
+			pr_info("WARNING: could not set %s %s.\n", "device_type",
 					fdt_strerror(err));
 			return err;
 		}
@@ -233,7 +236,7 @@ int arch_fixup_fdt(void *blob)
 
 		err = fdt_setprop(blob, nodeoffset, "reg", tmp, len);
 		if (err < 0) {
-			printf("WARNING: could not set %s %s.\n",
+			pr_info("WARNING: could not set %s %s.\n",
 					"reg", fdt_strerror(err));
 			return err;
 		}

arch/riscv/lib/interrupts.c

@@ -28,25 +28,25 @@ static void show_efi_loaded_images(uintptr_t epc)
 static void show_regs(struct pt_regs *regs)
 {
 #ifdef CONFIG_SHOW_REGS
-	printf("\nSP:  " REG_FMT " GP:  " REG_FMT " TP:  " REG_FMT "\n",
+	pr_crit("\nSP:  " REG_FMT " GP:  " REG_FMT " TP:  " REG_FMT "\n",
 	       regs->sp, regs->gp, regs->tp);
-	printf("T0:  " REG_FMT " T1:  " REG_FMT " T2:  " REG_FMT "\n",
+	pr_crit("T0:  " REG_FMT " T1:  " REG_FMT " T2:  " REG_FMT "\n",
 	       regs->t0, regs->t1, regs->t2);
-	printf("S0:  " REG_FMT " S1:  " REG_FMT " A0:  " REG_FMT "\n",
+	pr_crit("S0:  " REG_FMT " S1:  " REG_FMT " A0:  " REG_FMT "\n",
 	       regs->s0, regs->s1, regs->a0);
-	printf("A1:  " REG_FMT " A2:  " REG_FMT " A3:  " REG_FMT "\n",
+	pr_crit("A1:  " REG_FMT " A2:  " REG_FMT " A3:  " REG_FMT "\n",
 	       regs->a1, regs->a2, regs->a3);
-	printf("A4:  " REG_FMT " A5:  " REG_FMT " A6:  " REG_FMT "\n",
+	pr_crit("A4:  " REG_FMT " A5:  " REG_FMT " A6:  " REG_FMT "\n",
 	       regs->a4, regs->a5, regs->a6);
-	printf("A7:  " REG_FMT " S2:  " REG_FMT " S3:  " REG_FMT "\n",
+	pr_crit("A7:  " REG_FMT " S2:  " REG_FMT " S3:  " REG_FMT "\n",
 	       regs->a7, regs->s2, regs->s3);
-	printf("S4:  " REG_FMT " S5:  " REG_FMT " S6:  " REG_FMT "\n",
+	pr_crit("S4:  " REG_FMT " S5:  " REG_FMT " S6:  " REG_FMT "\n",
 	       regs->s4, regs->s5, regs->s6);
-	printf("S7:  " REG_FMT " S8:  " REG_FMT " S9:  " REG_FMT "\n",
+	pr_crit("S7:  " REG_FMT " S8:  " REG_FMT " S9:  " REG_FMT "\n",
 	       regs->s7, regs->s8, regs->s9);
-	printf("S10: " REG_FMT " S11: " REG_FMT " T3:  " REG_FMT "\n",
+	pr_crit("S10: " REG_FMT " S11: " REG_FMT " T3:  " REG_FMT "\n",
 	       regs->s10, regs->s11, regs->t3);
-	printf("T4:  " REG_FMT " T5:  " REG_FMT " T6:  " REG_FMT "\n",
+	pr_crit("T4:  " REG_FMT " T5:  " REG_FMT " T6:  " REG_FMT "\n",
 	       regs->t4, regs->t5, regs->t6);
 #endif
 }
@@ -75,12 +75,14 @@ static void show_code(ulong epc)
 	u16 *pos = (u16 *)(epc & ~1UL);
 	int i, len = instr_len(*pos);
 
-	printf("\nCode: ");
-	for (i = -8; i; ++i)
-		printf("%04x ", pos[i]);
-	printf("(");
-	for (i = 0; i < len; ++i)
-		printf("%04x%s", pos[i], i + 1 == len ? ")\n" : " ");
+	pr_crit("\nCode: ");
+	for (i = -8; i; ++i){
+		pr_crit("%04x ", pos[i]);
+	}
+	pr_crit("(");
+	for (i = 0; i < len; ++i){
+		pr_crit("%04x%s", pos[i], i + 1 == len ? ")\n" : " ");
+	}
 }
 
 static void _exit_trap(ulong code, ulong epc, ulong tval, struct pt_regs *regs)
@@ -104,17 +106,20 @@ static void _exit_trap(ulong code, ulong epc, ulong tval, struct pt_regs *regs)
 		"Store/AMO page fault",
 	};
 
-	if (code < ARRAY_SIZE(exception_code))
-		printf("Unhandled exception: %s\n", exception_code[code]);
-	else
-		printf("Unhandled exception code: %ld\n", code);
+	if (code < ARRAY_SIZE(exception_code)){
+		pr_crit("Unhandled exception: %s\n", exception_code[code]);
+	}
+	else{
+		pr_crit("Unhandled exception code: %ld\n", code);
+	}
 
-	printf("EPC: " REG_FMT " RA: " REG_FMT " TVAL: " REG_FMT "\n",
+	pr_crit("EPC: " REG_FMT " RA: " REG_FMT " TVAL: " REG_FMT "\n",
 	       epc, regs->ra, tval);
 	/* Print relocation adjustments, but only if gd is initialized */
-	if (gd && gd->flags & GD_FLG_RELOC)
-		printf("EPC: " REG_FMT " RA: " REG_FMT " reloc adjusted\n",
+	if (gd && gd->flags & GD_FLG_RELOC){
+		pr_crit("EPC: " REG_FMT " RA: " REG_FMT " reloc adjusted\n",
 		       epc - gd->reloc_off, regs->ra - gd->reloc_off);
+	}
 
 	show_regs(regs);
 	show_code(epc);

arch/riscv/lib/reset.c

@@ -9,9 +9,9 @@
 
 int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
-	printf("resetting ...\n");
+	pr_info("resetting ...\n");
 
-	printf("reset not supported yet\n");
+	pr_info("reset not supported yet\n");
 	hang();
 
 	return 0;

board/spacemit/k1-x/config.mk

@@ -9,19 +9,19 @@ cmd_build_spl_platform = \
 	cp $(srctree)/$3 \
 		$(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/ && \
 	python3 $(srctree)/tools/build_binary_file.py \
-		-c $(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/configs/fsbl.yml \
+		-c $(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/configs/fsbl.json \
 		-o $(srctree)/FSBL.bin; \
 	python3 $(srctree)/tools/build_binary_file.py \
-		-c $(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/configs/bootinfo_spinor.yml \
+		-c $(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/configs/bootinfo_spinor.json \
 		-o $(srctree)/bootinfo_spinor.bin; \
 	python3 $(srctree)/tools/build_binary_file.py \
-		-c $(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/configs/bootinfo_spinand.yml \
+		-c $(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/configs/bootinfo_spinand.json \
 		-o $(srctree)/bootinfo_spinand.bin; \
 	python3 $(srctree)/tools/build_binary_file.py \
-		-c $(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/configs/bootinfo_emmc.yml \
+		-c $(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/configs/bootinfo_emmc.json \
 		-o $(srctree)/bootinfo_emmc.bin; \
 	python3 $(srctree)/tools/build_binary_file.py \
-		-c $(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/configs/bootinfo_sd.yml \
+		-c $(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/configs/bootinfo_sd.json \
 		-o $(srctree)/bootinfo_sd.bin && \
 	rm -f $(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/u-boot-spl.bin
 
@@ -39,9 +39,15 @@ cmd_build_itb = \
 	rm -rf $(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/dtb && \
 	rm -f $(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/u-boot-nodtb.bin
 
+quiet_cmd_build_default_env = BUILD   $2
+cmd_build_default_env = \
+	$(srctree)/scripts/get_default_envs.sh $(srctree) > $(srctree)/u-boot-env-default.txt && \
+	$(srctree)/tools/mkenvimage -s $(CONFIG_ENV_SIZE) -o $(srctree)/u-boot-env-default.bin \
+		$(srctree)/u-boot-env-default.txt
+
 MRPROPER_FILES += $(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/u-boot-nodtb.bin
 MRPROPER_FILES += $(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/u-boot-spl.bin
-MRPROPER_FILES += u-boot.itb FSBL.bin
+MRPROPER_FILES += u-boot.itb FSBL.bin u-boot-env-default.*
 MRPROPER_FILES += bootinfo_spinor.bin bootinfo_spinand.bin bootinfo_emmc.bin bootinfo_sd.bin
 MRPROPER_FILES += k1-x_evb.dtb k1-x_deb2.dtb k1-x_deb1.dtb k1-x_spl.dtb
 MRPROPER_DIRS += $(srctree)/board/$(CONFIG_SYS_VENDOR)/$(CONFIG_SYS_BOARD)/dtb
@@ -54,4 +60,8 @@ INPUTS-y += FSBL.bin
 
 FSBL.bin: spl/u-boot-spl.bin FORCE
 	$(call if_changed,build_spl_platform,$@,$<)
+else
+INPUTS-y += u-boot-env-default.bin
+u-boot-env-default.bin: u-boot-nodtb.bin FORCE
+	$(call if_changed,build_default_env,$@)
 endif

board/spacemit/k1-x/configs/bootinfo_emmc.json

@@ -0,0 +1,50 @@
+{
+  "_comment": {
+    "info": "bootinfo build configuration script",
+    "key word": {
+      "image": "image definition",
+      "module": "image module definition",
+      "data": "image item data config"
+    }
+  },
+  "info": {
+    "arch": "RISCV64",
+    "description": "spacemit k1x eMMC bootinfo image"
+  },
+  "image": [
+    {
+      "module": "bootinfo",
+      "data": [
+        {
+          "structure": [
+            "name, header, 0",
+            "magic, 0xB00714F0, 4",
+            "version, 0x00010001, 4",
+            "flash_type, eMMC, 4",
+            "mid, 0, 1",
+            "reserved, 0, 1",
+            "did, 0, 2",
+            "page_size, 512, 4",
+            "block_size, 0x10000, 4",
+            "total_size, 0x10000000, 4",
+            "multi_plane, 0, 1",
+            "reserved, 0, 3",
+            "spl0_offset, 0x200, 4",
+            "spl1_offset, 0x00000, 4",
+            "spl_size_limit, 0x36000, 4",
+            "partitiontable0_offset, 0, 4",
+            "partitiontable1_offset, 0, 4",
+            "reserved, 0, 12"
+          ]
+        },
+        {
+          "structure": [
+            "name, crc32_sum, 0",
+            "crc, crc32(header), 4",
+            "pad, 0, 12"
+          ]
+        }
+      ]
+    }
+  ]
+}

board/spacemit/k1-x/configs/bootinfo_emmc.yml

@@ -1,41 +0,0 @@
-# bootinfo build configuration script
-# key word
-# image       -- image definition
-#   module    -- image module define
-#   data      -- image item data config
-info:
-  arch: RISCV64
-  description: spacemit k1x eMMC bootinfo image
-image:
-  - module: bootinfo
-    data:
-      - structure:
-      # only structure support nest data type
-      # item name, item value or method, item size
-        - name, header, 0
-        - magic, 0xB00714F0, 4
-        - version, 0x00010001, 4
-
-        - flash_type, eMMC, 4
-        - mid, 0, 1
-        - reserved, 0, 1
-        - did, 0, 2
-        - page_size, 512, 4
-        - block_size, 0x10000, 4
-        - total_size, 0x10000000, 4
-        - multi_plane, 0, 1
-        - reserved, 0, 3
-
-        - spl0_offset, 0x200, 4
-        - spl1_offset, 0x00000, 4
-        - spl_size_limit, 0x36000, 4
-
-        - partitiontable0_offset, 0, 4
-        - partitiontable1_offset, 0, 4
-        - reserved, 0, 12
-
-      - structure:
-        - name, crc32_sum, 0
-        - crc, crc32(header), 4
-        - pad, 0, 12
-

board/spacemit/k1-x/configs/bootinfo_sd.json

@@ -0,0 +1,50 @@
+{
+  "_comment": {
+    "info": "bootinfo build configuration script",
+    "key word": {
+      "image": "image definition",
+      "module": "image module definition",
+      "data": "image item data config"
+    }
+  },
+  "info": {
+    "arch": "RISCV64",
+    "description": "spacemit k1x sdcard bootinfo image"
+  },
+  "image": [
+    {
+      "module": "bootinfo",
+      "data": [
+        {
+          "structure": [
+            "name, header, 0",
+            "magic, 0xB00714F0, 4",
+            "version, 0x00010001, 4",
+            "flash_type, SDC, 4",
+            "mid, 0, 1",
+            "reserved, 0, 1",
+            "did, 0, 2",
+            "page_size, 512, 4",
+            "block_size, 0x10000, 4",
+            "total_size, 0x10000000, 4",
+            "multi_plane, 0, 1",
+            "reserved, 0, 3",
+            "spl0_offset, 0x20000, 4",
+            "spl1_offset, 0x80000, 4",
+            "spl_size_limit, 0x36000, 4",
+            "partitiontable0_offset, 0, 4",
+            "partitiontable1_offset, 0, 4",
+            "reserved, 0, 12"
+          ]
+        },
+        {
+          "structure": [
+            "name, crc32_sum, 0",
+            "crc, crc32(header), 4",
+            "pad, 0, 12"
+          ]
+        }
+      ]
+    }
+  ]
+}

board/spacemit/k1-x/configs/bootinfo_sd.yml

@@ -1,40 +0,0 @@
-# bootinfo build configuration script
-# key word
-# image       -- image definition
-#   module    -- image module define
-#   data      -- image item data config
-info:
-  arch: RISCV64
-  description: spacemit k1x sdcard bootinfo image
-image:
-  - module: bootinfo
-    data:
-      - structure:
-      # only structure support nest data type
-      # item name, item value or method, item size
-        - name, header, 0
-        - magic, 0xB00714F0, 4
-        - version, 0x00010001, 4
-
-        - flash_type, SDC, 4
-        - mid, 0, 1
-        - reserved, 0, 1
-        - did, 0, 2
-        - page_size, 512, 4
-        - block_size, 0x10000, 4
-        - total_size, 0x10000000, 4
-        - multi_plane, 0, 1
-        - reserved, 0, 3
-
-        - spl0_offset, 0x40000, 4
-        - spl1_offset, 0x80000, 4
-        - spl_size_limit, 0x36000, 4
-
-        - partitiontable0_offset, 0, 4
-        - partitiontable1_offset, 0, 4
-        - reserved, 0, 12
-
-      - structure:
-        - name, crc32_sum, 0
-        - crc, crc32(header), 4
-        - pad, 0, 12

board/spacemit/k1-x/configs/bootinfo_spinand.json

@@ -0,0 +1,50 @@
+{
+  "_comment": {
+    "info": "bootinfo build configuration script",
+    "key word": {
+      "image": "image definition",
+      "module": "image module definition",
+      "data": "image item data config"
+    }
+  },
+  "info": {
+    "arch": "RISCV64",
+    "description": "spacemit k1x spinand bootinfo image"
+  },
+  "image": [
+    {
+      "module": "bootinfo",
+      "data": [
+        {
+          "structure": [
+            "name, header, 0",
+            "magic, 0xB00714F0, 4",
+            "version, 0x00010001, 4",
+            "flash_type, NAND, 4",
+            "mid, 0, 1",
+            "reserved, 0, 1",
+            "did, 0, 2",
+            "page_size, 2048, 4",
+            "block_size, 0x20000, 4",
+            "total_size, 0x10000000, 4",
+            "multi_plane, 0, 1",
+            "reserved, 0, 3",
+            "spl0_offset, 0x20000, 4",
+            "spl1_offset, 0x80000, 4",
+            "spl_size_limit, 0x36000, 4",
+            "partitiontable0_offset, 0, 4",
+            "partitiontable1_offset, 0, 4",
+            "reserved, 0, 12"
+          ]
+        },
+        {
+          "structure": [
+            "name, crc32_sum, 0",
+            "crc, crc32(header), 4",
+            "pad, 0, 12"
+          ]
+        }
+      ]
+    }
+  ]
+}

board/spacemit/k1-x/configs/bootinfo_spinand.yml

@@ -1,40 +0,0 @@
-# bootinfo build configuration script
-# key word
-# image       -- image definition
-#   module    -- image module define
-#   data      -- image item data config
-info:
-  arch: RISCV64
-  description: spacemit k1x spinand bootinfo image
-image:
-  - module: bootinfo
-    data:
-      - structure:
-      # only structure support nest data type
-      # item name, item value or method, item size
-        - name, header, 0
-        - magic, 0xB00714F0, 4
-        - version, 0x00010001, 4
-
-        - flash_type, NAND, 4
-        - mid, 0, 1
-        - reserved, 0, 1
-        - did, 0, 2
-        - page_size, 2048, 4
-        - block_size, 0x20000, 4
-        - total_size, 0x10000000, 4
-        - multi_plane, 0, 1
-        - reserved, 0, 3
-
-        - spl0_offset, 0x40000, 4
-        - spl1_offset, 0x80000, 4
-        - spl_size_limit, 0x36000, 4
-
-        - partitiontable0_offset, 0, 4
-        - partitiontable1_offset, 0, 4
-        - reserved, 0, 12
-
-      - structure:
-        - name, crc32_sum, 0
-        - crc, crc32(header), 4
-        - pad, 0, 12

board/spacemit/k1-x/configs/bootinfo_spinor.json

@@ -0,0 +1,50 @@
+{
+  "_comment": {
+    "info": "bootinfo build configuration script",
+    "key word": {
+      "image": "image definition",
+      "module": "image module definition",
+      "data": "image item data config"
+    }
+  },
+  "info": {
+    "arch": "RISCV64",
+    "description": "spacemit k1x spinor bootinfo image"
+  },
+  "image": [
+    {
+      "module": "bootinfo",
+      "data": [
+        {
+          "structure": [
+            "name, header, 0",
+            "magic, 0xB00714F0, 4",
+            "version, 0x00010001, 4",
+            "flash_type, NORF, 4",
+            "mid, 0, 1",
+            "reserved, 0, 1",
+            "did, 0, 2",
+            "page_size, 256, 4",
+            "block_size, 0x10000, 4",
+            "total_size, 0x100000, 4",
+            "multi_plane, 0, 1",
+            "reserved, 0, 3",
+            "spl0_offset, 0x20000, 4",
+            "spl1_offset, 0x70000, 4",
+            "spl_size_limit, 0x36000, 4",
+            "partitiontable0_offset, 0, 4",
+            "partitiontable1_offset, 0, 4",
+            "reserved, 0, 12"
+          ]
+        },
+        {
+          "structure": [
+            "name, crc32_sum, 0",
+            "crc, crc32(header), 4",
+            "pad, 0, 12"
+          ]
+        }
+      ]
+    }
+  ]
+}

board/spacemit/k1-x/configs/bootinfo_spinor.yml

@@ -1,40 +0,0 @@
-# bootinfo build configuration script
-# key word
-# image       -- image definition
-#   module    -- image module define
-#   data      -- image item data config
-info:
-  arch: RISCV64
-  description: spacemit k1x spinor bootinfo image
-image:
-  - module: bootinfo
-    data:
-      - structure:
-      # only structure support nest data type
-      # item name, item value or method, item size
-        - name, header, 0
-        - magic, 0xB00714F0, 4
-        - version, 0x00010001, 4
-
-        - flash_type, NORF, 4
-        - mid, 0, 1
-        - reserved, 0, 1
-        - did, 0, 2
-        - page_size, 256, 4
-        - block_size, 0x10000, 4
-        - total_size, 0x100000, 4
-        - multi_plane, 0, 1
-        - reserved, 0, 3
-
-        - spl0_offset, 0x10000, 4
-        - spl1_offset, 0x50000, 4
-        - spl_size_limit, 0x36000, 4
-
-        - partitiontable0_offset, 0, 4
-        - partitiontable1_offset, 0, 4
-        - reserved, 0, 12
-
-      - structure:
-        - name, crc32_sum, 0
-        - crc, crc32(header), 4
-        - pad, 0, 12

board/spacemit/k1-x/configs/fsbl.json

@@ -0,0 +1,196 @@
+{
+  "_comment": {
+    "info": "bootinfo build configuration script",
+    "key word": {
+      "image": "image definition",
+      "module": "image module definition",
+      "data": "image item data config"
+    }
+  },
+  "info": {
+    "arch": "RISCV64",
+    "description": "spacemit k1x fsbl image"
+  },
+  "image": [
+    {
+      "module": "ROTPK",
+      "data": [
+        {
+          "pubkey": {
+            "name": "rsakeypair0",
+            "algorithm": "RSA2048",
+            "source": "key/rsakeypair0_prv.key",
+            "align": 256
+          }
+        }
+      ]
+    },
+    {
+      "module": "image_header",
+      "data": [
+        {
+          "structure": [
+            "name, header0, 0",
+            "magic, AIHD, 4",
+            "version, 1, 1",
+            "secure, 0, 1",
+            "reserved, 0, 2",
+            "imgsize, 0x1000, 8",
+            "load_addr, 0, 8",
+            "pad, 0xA5, 8"
+          ]
+        }
+      ]
+    },
+    {
+      "module": "image_config",
+      "data": [
+        {
+          "structure": [
+            "name, keydata, 0",
+            "key_default, 0, 4",
+            "table_num, 4, 4",
+            {
+              "structure": [
+                "name, keytable0, 0",
+                "key_name, spl, 16",
+                "key_id, 0, 4"
+              ]
+            },
+            {
+              "structure": [
+                "name, keytable1, 0",
+                "key_name, uboot, 16",
+                "key_id, 1, 4"
+              ]
+            },
+            {
+              "structure": [
+                "name, keytable2, 0",
+                "key_name, kernel, 16",
+                "key_id, 2, 4"
+              ]
+            },
+            {
+              "structure": [
+                "name, keytable3, 0",
+                "key_name, rootfs, 16",
+                "key_id, 3, 4"
+              ]
+            },
+            "reserved, 0, 320",
+            {
+              "hash": {
+                "name": "rotpk_hash",
+                "algorithm": "SHA256",
+                "source": "rsakeypair0",
+                "align": 32
+              }
+            },
+            "pad, 0, 40"
+          ]
+        }
+      ]
+    },
+    {
+      "module": "oem_pubkey",
+      "data": [
+        {
+          "structure": [
+            "name, oem_key, 0",
+            {
+              "pubkey": {
+                "name": "spl_pubkey",
+                "algorithm": "RSA2048",
+                "source": "key/spl_pubkey_prv.key",
+                "align": 256
+              }
+            },
+            {
+              "pubkey": {
+                "name": "uboot_pubkey",
+                "algorithm": "RSA2048",
+                "source": "key/uboot_pubkey_pub.key",
+                "align": 256
+              }
+            },
+            {
+              "pubkey": {
+                "name": "kernel_pubkey",
+                "algorithm": "RSA2048",
+                "source": "key/kernel_pubkey_pub.key",
+                "align": 256
+              }
+            },
+            {
+              "pubkey": {
+                "name": "rootfs_pubkey",
+                "algorithm": "RSA2048",
+                "source": "key/rootfs_pubkey_pub.key",
+                "align": 256
+              }
+            },
+            "reserved, 0, 1024"
+          ]
+        }
+      ]
+    },
+    {
+      "module": "cert0",
+      "data": [
+        {
+          "signature": {
+            "name": "signature0",
+            "algorithm": "SHA256+RSA2048",
+            "key": "rsakeypair0",
+            "source": "header0 + keydata + oem_key",
+            "align": 256
+          }
+        }
+      ]
+    },
+    {
+      "module": "padding",
+      "data": [
+        {
+          "structure": [
+            "pad, 0, 992"
+          ]
+        }
+      ]
+    },
+    {
+      "module": "spl",
+      "data": [
+        {
+          "structure": [
+            "name, header1, 0",
+            "magic, AIHD, 4",
+            "version, 1, 1",
+            "secure, 0, 1",
+            "reserved, 0, 2",
+            "imgsize, sizeof(fsbl), 8",
+            "load_addr, 0, 8",
+            "pad, 0xA5, 8"
+          ]
+        },
+        {
+          "file": {
+            "name": "fsbl",
+            "source": "../u-boot-spl.bin",
+            "align": 32
+          }
+        },
+        {
+          "signature": {
+            "name": "signature1",
+            "algorithm": "SHA256+RSA2048",
+            "key": "spl_pubkey",
+            "source": "header1 + fsbl",
+            "align": 256
+          }
+        }
+      ]
+    }
+  ]
+}

board/spacemit/k1-x/configs/fsbl.yml

@@ -1,118 +0,0 @@
-# fspl build configuration script
-# key word
-# image       -- image definition
-#   module    -- image module define
-#   data      -- image item data config
-info:
-  arch: RISCV64
-  description: spacemit k1x fsbl image
-image:
-  - module: ROTPK
-    data:
-      - pubkey:
-          name: rsakeypair0
-          algorithm: RSA2048
-          source: key/rsakeypair0_prv.key
-          align: 256
-  - module: image_header
-    data:
-      - structure:
-      # only structure support nest data type
-      # item name, item value or method, item size
-        - name, header0, 0
-        - magic, AIHD, 4
-        - version, 1, 1
-        - secure, 0, 1
-        - reserved, 0, 2
-        - imgsize, 0x1000, 8
-        - load_addr, 0, 8
-        - pad, 0xA5, 8
-  - module: image_config
-    data:
-      - structure:
-        - name, keydata, 0
-        - key_default, 0, 4
-        - table_num, 4, 4
-        - structure:
-          - name, keytable0, 0
-          - key_name, spl, 16
-          - key_id, 0, 4
-        - structure:
-          - name, keytable1, 0
-          - key_name, uboot, 16
-          - key_id, 1, 4
-        - structure:
-          - name, keytable2, 0
-          - key_name, kernel, 16
-          - key_id, 2, 4
-        - structure:
-          - name, keytable3, 0
-          - key_name, rootfs, 16
-          - key_id, 3, 4
-        - reserved, 0, 320
-        - hash:
-            name: rotpk_hash
-            algorithm: SHA256
-            source: rsakeypair0
-            align: 32
-        - pad, 0, 40
-  - module: oem_pubkey
-    data:
-      - structure:
-        - name, oem_key, 0
-        - pubkey:
-            name: spl_pubkey
-            algorithm: RSA2048
-            source: key/spl_pubkey_prv.key
-            align: 256
-        - pubkey:
-            name: uboot_pubkey
-            algorithm: RSA2048
-            source: key/uboot_pubkey_pub.key
-            align: 256
-        - pubkey:
-            name: kernel_pubkey
-            algorithm: RSA2048
-            source: key/kernel_pubkey_pub.key
-            align: 256
-        - pubkey:
-            name: rootfs_pubkey
-            algorithm: RSA2048
-            source: key/rootfs_pubkey_pub.key
-            align: 256
-        - reserved, 0, 1024
-  - module: cert0
-    data:
-      - signature:
-          name: signature0
-          algorithm: SHA256+RSA2048
-          key: rsakeypair0
-          # signature source MUST has the same order within file
-          source: header0 + keydata + oem_key
-          align: 256
-  - module: padding
-    data:
-      - structure:
-        - pad, 0, 992
-  - module: spl
-    data:
-      - structure:
-        - name, header1, 0
-        - magic, AIHD, 4
-        - version, 1, 1
-        - secure, 0, 1
-        - reserved, 0, 2
-        - imgsize, sizeof(fsbl), 8
-        - load_addr, 0, 8
-        - pad, 0xA5, 8
-      - file:
-          name: fsbl
-          source: ../u-boot-spl.bin
-          align: 32
-      - signature:
-          name: signature1
-          algorithm: SHA256+RSA2048
-          key: spl_pubkey
-          # signature source MUST has the same order within file
-          source: header1 + fsbl
-          align: 256

board/spacemit/k1-x/configs/uboot_fdt.its

@@ -55,15 +55,33 @@
                                 algo = "crc32";
                         };
                 };
-		fdt_5 {
-			description = "k1_mingo";
+                fdt_5 {
+                        description = "k1_kx312";
+                        type = "flat_dt";
+                        compression = "none";
+                        data = /incbin/("../dtb/k1-x_kx312.dtb");
+                        hash-1 {
+                                algo = "crc32";
+                        };
+                };
+		fdt_6 {
+			description = "k1_MINI-PC";
 			type = "flat_dt";
 			compression = "none";
-			data = /incbin/("../dtb/k1-x_mingo.dtb");
+			data = /incbin/("../dtb/k1-x_MINI-PC.dtb");
 			hash-1 {
 				algo = "crc32";
 			};
 		};
+		fdt_7 {
+                        description = "k1_mingo";
+                        type = "flat_dt";
+                        compression = "none";
+                        data = /incbin/("../dtb/k1-x_mingo.dtb");
+                        hash-1 {
+                                algo = "crc32";
+                        };
+                };
 	};
 
 	configurations {
@@ -88,10 +106,20 @@
                         loadables = "uboot";
                         fdt = "fdt_4";
                 };
-		conf_5 {
-			description = "k1_mingo";
+                conf_5 {
+                        description = "k1_kx312";
+                        loadables = "uboot";
+                        fdt = "fdt_5";
+                };
+		conf_6 {
+			description = "k1_MINI-PC";
 			loadables = "uboot";
-			fdt = "fdt_5";
+			fdt = "fdt_6";
 		};
+		conf_7 {
+                        description = "k1_mingo";
+                        loadables = "uboot";
+                        fdt = "fdt_7";
+                };
 	};
 };

board/spacemit/k1-x/k1-x.env

@@ -0,0 +1,165 @@
+// Common parameter
+earlycon=sbi
+console=ttyS0,115200
+init=/init
+bootdelay=0
+baudrate=115200
+loglevel=8
+stderr=serial
+stdin=serial,usbkbd
+stdout=serial
+
+//partitions/mtdparts/mtdids would set while flashing env.bin
+
+// Nor flash rootfs device
+nor_root=/dev/mtdblock6
+nor_rootfstype=squashfs
+
+// eMMC/SDCard rootfs device
+mmc_rootfstype=ext4
+
+// Get "rootfs" partition number in decimal, and set var "mmc_root"
+// Variable "boot_devnum" is set during board_lat_init()
+set_mmc_root=part number mmc ${boot_devnum} rootfs rootfs_part; \
+             setexpr rootfs_part ${rootfs_part} + 0; \
+             setenv mmc_root "/dev/mmcblk${boot_devnum}p${rootfs_part}";
+
+set_nvme_root=part number nvme ${boot_devnum} rootfs rootfs_part; \
+             setexpr rootfs_part ${rootfs_part} + 0; \
+             setenv nvme_root "/dev/nvme${boot_devnum}n1p${rootfs_part}";
+
+//override here, otherwise gen random addr and save to eeprom by uboot
+//ethaddr=fe:fe:fe:22:22:01
+//eth1addr=fe:fe:fe:22:22:02
+
+ipaddr=10.0.92.100
+netmask=255.255.255.0
+serverip=10.0.92.134
+gatewayip=10.0.92.1
+net_data_path=net_flash_file/net_flash_file/
+
+preboot=
+kernel_addr_r=0x10000000
+ramdisk_addr=0x20000000
+ramdisk_size=-
+ramdisk_combo=-
+knl_name=Image.itb
+ramdisk_name=initramfs-generic.img
+dtb_dir=
+dtb_name=k1-x_evb.dtb
+dtb_addr=0x1F000000
+splashfile=bianbu.bmp
+mdio_intf=
+phyaddr0=1
+phy_link_time=10000
+netdev=eth0
+
+// Common boot args
+commonargs=setenv bootargs earlycon=${earlycon} earlyprintk console=tty1 console=${console} loglevel=${loglevel} swiotlb=65536 rdinit=${init}
+
+//detect product_name from env and select dtb file to load
+dtb_env=if test -n "${product_name}"; then \
+                if test "${product_name}" = k1_evb; then \
+                    setenv dtb_name ${dtb_dir}/k1-x_evb.dtb; \
+                elif test "${product_name}" = k1_deb1; then \
+                    setenv dtb_name ${dtb_dir}/k1-x_deb1.dtb; \
+                elif test "${product_name}" = k1_deb2; then \
+                    setenv dtb_name ${dtb_dir}/k1-x_deb2.dtb; \
+                elif test "${product_name}" = k1_hs450; then \
+                    setenv dtb_name ${dtb_dir}/k1-x_hs450.dtb; \
+                elif test "${product_name}" = k1_kx312; then \
+                    setenv dtb_name ${dtb_dir}/k1-x_kx312.dtb; \
+                elif test "${product_name}" = k1_mingo; then \
+                    setenv dtb_name ${dtb_dir}/k1-x_mingo.dtb; \
+                elif test "${product_name}" = k1_MINI-PC; then \
+                    setenv dtb_name ${dtb_dir}/k1-x_MINI-PC.dtb; \
+                else \
+                    echo "falling to default dtb: ${dtb_dir}/${product_name}.dtb"; \
+                    setenv dtb_name  ${dtb_dir}/${product_name}.dtb; \
+                fi; \
+            fi;
+
+detect_dtb=echo "product_name: ${product_name}"; run dtb_env; echo "select ${dtb_name} to load";
+
+loadknl=echo "Loading kernel..."; \
+            load ${bootfs_devname} ${boot_devnum}:${bootfs_part} ${kernel_addr_r} ${knl_name};
+
+loadramdisk=echo "Loading ramdisk ..."; \
+            if load ${bootfs_devname} ${boot_devnum}:${bootfs_part} ${ramdisk_addr} ${ramdisk_name}; then \
+                size ${bootfs_devname} ${boot_devnum}:${bootfs_part} ${ramdisk_name}; \
+                setenv ramdisk_size ${filesize}; \
+                setenv ramdisk_combo ${ramdisk_addr}:${ramdisk_size}; \
+            else \
+                echo "load ramdisk from bootfs fail, use built-in ramdisk"; \
+                setenv ramdisk_addr -; \
+            fi;
+
+loaddtb=echo "Loading dtb..."; \
+            if load ${bootfs_devname} ${boot_devnum}:${bootfs_part} ${dtb_addr} ${dtb_name}; then \
+            else \
+                echo "load dtb from bootfs fail, use built-in dtb"; \
+                setenv dtb_addr ""; \
+            fi;
+
+// Nor+ssd boot combo
+set_nor_args=setenv bootargs ${bootargs} mtdparts=${mtdparts} root=${nvme_root} rootfstype=ext4
+nor_boot=echo "Try to boot from NVMe ..."; \
+         run commonargs; \
+         run set_nvme_root; \
+         run set_nor_args; \
+         run detect_dtb; \
+         run loadknl; \
+         run loaddtb; \
+         run loadramdisk; \
+         bootm ${kernel_addr_r} ${ramdisk_combo} ${dtb_addr}; \
+         echo "########### boot kernel failed by default config, check your boot config #############"
+
+//##############################################################################
+// eMMC/SDCard boot
+//##############################################################################
+set_mmc_args=setenv bootargs "${bootargs}" root=${mmc_root} rootwait rootfstype=${mmc_rootfstype};
+
+mmc_boot=echo "Try to boot from MMC${boot_devnum} ..."; \
+         run commonargs; \
+         run set_mmc_root; \
+         run set_mmc_args; \
+         run detect_dtb; \
+         run loadknl; \
+         run loaddtb; \
+         run loadramdisk; \
+         bootm ${kernel_addr_r} ${ramdisk_combo} ${dtb_addr}; \
+         echo "########### boot kernel failed by default config, check your boot config #############"
+
+// Variable "boot_device" is set during board_late_init()
+autoboot=if test ${boot_device} = nand; then \
+                run nand_boot; \
+        elif test ${boot_device} = nor; then \
+                run nor_boot; \
+        elif test ${boot_device} = mmc; then \
+                run mmc_boot; \
+        fi;
+
+bootcmd=run autoboot; echo "run autoboot"
+
+// Boot menu definitions
+boot_default=echo "Current Boot Device: ${boot_device}"
+flash_default=echo "Returning to Boot Menu..."
+flash_from_usb=echo "recovery from usb...... "; \
+					  flash_image usb;
+flash_from_mmc=echo "recovery from mmc...... " \
+					  flash_image mmc;
+flash_from_net=echo "recovery from net...... " \
+					  flash_image net;
+
+bootmenu_delay=5
+bootmenu_0="-------- Boot Options --------"=run boot_default
+bootmenu_1="Boot from Nor"=run nor_boot
+bootmenu_2="Boot from Nand"=run nand_boot
+bootmenu_3="Boot from MMC"=run mmc_boot
+bootmenu_4="Autoboot"=run autoboot
+bootmenu_5="Show current Boot Device"=run boot_default
+bootmenu_6="-------- Flash Options --------"=run flash_default
+bootmenu_7="recovery from usb"=run flash_from_usb
+bootmenu_8="recovery from mmc"=run flash_from_mmc
+bootmenu_9="recovery from net"=run flash_from_net
+

board/spacemit/k1-x/k1x-i2c-eeprom.c

@@ -8,23 +8,40 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define MUX_MODE0	0			/* func 0 */
-#define MUX_MODE1	BIT(0)			/* func 1 */
-#define MUX_MODE2	BIT(1)			/* func 2 */
+#define MUX_MODE0	0					/* func 0 */
+#define MUX_MODE1	BIT(0)				/* func 1 */
+#define MUX_MODE2	BIT(1)				/* func 2 */
 #define MUX_MODE3	BIT(0) | BIT(1)		/* func 3 */
-#define MUX_MODE4	BIT(2)			/* func 4 */
+#define MUX_MODE4	BIT(2)				/* func 4 */
 #define MUX_MODE5	BIT(0) | BIT(2)		/* func 5 */
-#define EDGE_NONE	BIT(6)			/* edge-detection is unabled */
-#define PAD_1V8_DS2	BIT(12)			/* voltage:1.8v, driver strength: 2 */
-#define PULL_UP       	BIT(14) | BIT(15)	/* pull-up */
+#define EDGE_NONE	BIT(6)				/* edge-detection is unabled */
+#define PAD_1V8_DS2	BIT(12)				/* voltage:1.8v, driver strength: 2 */
+#define PULL_UP		BIT(14) | BIT(15)	/* pull-up */
+
+#define I2C_PIN_CONFIG(x)	((x) | EDGE_NONE | PULL_UP | PAD_1V8_DS2)
 
 char *spacemit_i2c_eeprom[] = {
 	"atmel,24c02",
 };
 
 struct tlv_eeprom {
-	u8    type;
-	u8  length;
+	uint8_t type;
+	uint8_t length;
+};
+
+struct eeprom_config {
+	uint8_t bus;
+	uint16_t addr;
+	uint8_t pin_function;
+	uint32_t scl_pin_reg;
+	uint32_t sda_pin_reg;
+};
+
+const struct eeprom_config eeprom_info[] = {
+	// eeprom @deb1 & deb2: I2C2, pin group(GPIO_84, GPIO_85)
+	{2, 0x50, MUX_MODE4, 0xd401e154, 0xd401e158},
+	// eeprom @evb: I2C6, pin group(GPIO_118, GPIO_119)
+	{6, 0x50, MUX_MODE2, 0xd401e228, 0xd401e22c},
 };
 
 int spacemit_eeprom_read(uint8_t chip, uint8_t *buffer, uint8_t id)
@@ -33,8 +50,8 @@ int spacemit_eeprom_read(uint8_t chip, uint8_t *buffer, uint8_t id)
 	int ret;
 	uint8_t buf[1] = {0};
 	uint8_t len[1] = {0};
-    	u16 i = 0;
-	u8 j;
+	uint16_t i = 0;
+	uint8_t j;
 
 	tlv.type = 0;
 	tlv.length = 0;
@@ -64,78 +81,44 @@ int spacemit_eeprom_read(uint8_t chip, uint8_t *buffer, uint8_t id)
 	return -2;
 }
 
-void i2c_set_pinctrl(int bus, int pin)
+static void i2c_set_pinctrl(uint32_t value, uint32_t reg_addr)
 {
-	if ((bus == 2) && (pin == 0)) {
-		//gpio84
-		writel(MUX_MODE4 | EDGE_NONE | PULL_UP | PAD_1V8_DS2, (void __iomem *)0xd401e154);
-		//gpio85
-		writel(MUX_MODE4 | EDGE_NONE | PULL_UP | PAD_1V8_DS2, (void __iomem *)0xd401e158);
-	} else if ((bus == 6) && (pin == 1)) {
-		//gpio118
-		writel(MUX_MODE2 | EDGE_NONE | PULL_UP | PAD_1V8_DS2, (void __iomem *)0xd401e228);
-		//gpio119
-		writel(MUX_MODE2 | EDGE_NONE | PULL_UP | PAD_1V8_DS2, (void __iomem *)0xd401e22c);
-	}else
-		pr_err("bus or pinctrl wrong\n");
+	writel(value, (void __iomem *)(size_t)reg_addr);
 }
 
-const uint8_t eeprom_config[][2] = {
-	// eeprom in evb: I2C6, pin group1(GPIO_118, GPIO_119)
-	{2, 0},
-	// eeprom in deb1 & deb2: I2C2, pin group0(GPIO_84, GPIO_85)
-	{6, 1},
-};
+static uint32_t i2c_get_pinctrl(uint32_t reg_addr)
+{
+	return readl((void __iomem *)(size_t)reg_addr);
+}
 
 int k1x_eeprom_init(void)
 {
-	int offset, ret, saddr, i;
-	char *name;
-	uint8_t bus, pin;
+	static int saddr = -1, i;
+	uint8_t bus;
+	uint32_t scl_pin_backup, sda_pin_backup;
 
-	for(i = 0; i < ARRAY_SIZE(spacemit_i2c_eeprom); i++){
-		name = spacemit_i2c_eeprom[i];
-		offset = fdt_node_offset_by_compatible(gd->fdt_blob, -1, name);
-		if(offset > 0){
-			pr_info("Get %s node \n", name);
-			break;
-		}
-	}
-
-	if (offset < 0) {
-		pr_err("%s Get eeprom node error\n", __func__);
-		return -EINVAL;
-	}
-
-	saddr = fdtdec_get_uint(gd->fdt_blob, offset, "reg", 0);
-	if (!saddr) {
-		pr_err("%s: %s Node has no reg\n", __func__, name);
-		return -EINVAL;
-	}
-
-	for (i = 0; i < ARRAY_SIZE(eeprom_config); i++) {
-		bus = eeprom_config[i][0];
-		pin = eeprom_config[i][1];
-		i2c_set_pinctrl(bus, pin);
-
-		ret = i2c_set_bus_num(bus);
-		if (ret < 0) {
-			pr_err("%s: %s set i2c bus number error\n", __func__, name);
-			continue;
-		}
-
-		ret = i2c_probe(saddr);
-		if (ret < 0) {
-			pr_err("%s: %s probe i2c(%d) failed\n", __func__, name, bus);
-			continue;
-		}
-		break;
-	}
-
-	if (i >= ARRAY_SIZE(eeprom_config))
-		return -EINVAL;
-	else {
-		pr_info("find eeprom in bus %d, address %d\n", eeprom_config[i][0], saddr);
+	if (saddr >= 0)
 		return saddr;
+
+	for (i = 0; i < ARRAY_SIZE(eeprom_info); i++) {
+		bus = eeprom_info[i].bus;
+		saddr = eeprom_info[i].addr;
+
+		scl_pin_backup = i2c_get_pinctrl(eeprom_info[i].scl_pin_reg);;
+		sda_pin_backup = i2c_get_pinctrl(eeprom_info[i].sda_pin_reg);;
+		i2c_set_pinctrl(I2C_PIN_CONFIG(eeprom_info[i].pin_function), eeprom_info[i].scl_pin_reg);
+		i2c_set_pinctrl(I2C_PIN_CONFIG(eeprom_info[i].pin_function), eeprom_info[i].sda_pin_reg);
+
+		if ((i2c_set_bus_num(bus) < 0) || (i2c_probe(saddr) < 0)) {
+			pr_err("%s: probe i2c(%d) @eeprom %d failed\n", __func__, bus, saddr);
+			i2c_set_pinctrl(scl_pin_backup, eeprom_info[i].scl_pin_reg);
+			i2c_set_pinctrl(sda_pin_backup, eeprom_info[i].sda_pin_reg);
+		}
+		else {
+			pr_info("find eeprom in bus %d, address %d\n", bus, saddr);
+			return saddr;
+		}
 	}
+
+	return -EINVAL;
 }

board/spacemit/k1-x/k1x.c

@@ -30,12 +30,16 @@
 #include <i2c.h>
 #include <linux/delay.h>
 #include <tlv_eeprom.h>
+#include <u-boot/crc.h>
+#include <fb_mtd.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 static char found_partition[64] = {0};
 #ifdef CONFIG_DISPLAY_SPACEMIT_HDMI
 extern int is_hdmi_connected;
 #endif
+void refresh_config_info(u8 *eeprom_data);
+int mac_read_from_buffer(u8 *eeprom_data);
 
 void set_boot_mode(enum board_boot_mode boot_mode)
 {
@@ -95,6 +99,16 @@ enum board_boot_mode get_boot_mode(void)
 	return get_boot_pin_select();
 }
 
+enum board_boot_mode get_boot_storage(void)
+{
+	enum board_boot_mode boot_storage = get_boot_mode();
+
+	// save to card only when boot from card
+	if (BOOT_MODE_SD != boot_storage)
+		boot_storage =  get_boot_pin_select();
+
+	return boot_storage;
+}
 
 int mmc_get_env_dev(void)
 {
@@ -108,6 +122,86 @@ int mmc_get_env_dev(void)
 		return MMC_DEV_SD;
 }
 
+static bool write_boot_storage_emmc(ulong byte_addr, ulong byte_size, void *buff)
+{
+	struct blk_desc *dev_desc = blk_get_dev("mmc", MMC_DEV_EMMC);
+
+	if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
+		pr_err("invalid mmc device\n");
+		return false;
+	}
+
+	blk_dselect_hwpart(dev_desc, 0);
+	pr_info("write %ldbyte to emmc address %ld\n", byte_size, byte_addr);
+	blk_dwrite(dev_desc,
+		byte_addr / dev_desc->blksz,
+		byte_size / dev_desc->blksz, buff);
+	return true;
+}
+
+static bool write_boot_storage_sdcard(ulong byte_addr, ulong byte_size, void *buff)
+{
+	struct blk_desc *dev_desc = blk_get_dev("mmc", MMC_DEV_SD);
+
+	if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
+		pr_err("invalid sd device\n");
+		return false;
+	}
+
+	pr_info("write %ldbyte to sdcard address %ld\n", byte_size, byte_addr);
+	blk_dwrite(dev_desc,
+		byte_addr / dev_desc->blksz,
+		byte_size / dev_desc->blksz, buff);
+	return true;
+}
+
+static bool write_boot_storage_spinor(ulong byte_addr, ulong byte_size, void *buff)
+{
+	struct mtd_info *mtd;
+	const char* part = "private";
+
+	mtd_probe_devices();
+	mtd = get_mtd_device_nm(part);
+	if ((NULL != mtd) && (0 == _fb_mtd_erase(mtd, byte_size))
+		&& (0 == _fb_mtd_write(mtd, buff, byte_addr, byte_size, NULL))) {
+		pr_info("write %ldbyte to spinor partition %s @offset %ld\n", byte_size, part, byte_addr);
+		return true;
+	}
+	else
+		return false;
+}
+
+static const struct boot_storage_op storage_write[] = {
+	{BOOT_MODE_EMMC, 0x10000, NULL, write_boot_storage_emmc},
+	{BOOT_MODE_SD, 0x10000, NULL, write_boot_storage_sdcard},
+	{BOOT_MODE_NOR, 0, NULL, write_boot_storage_spinor},
+};
+
+static bool write_training_info(void *buff, ulong byte_size)
+{
+	int i;
+	// save data to boot storage
+	enum board_boot_mode boot_storage = get_boot_storage();
+
+	for (i = 0; i < ARRAY_SIZE(storage_write); i++) {
+		if (boot_storage == storage_write[i].boot_storage)
+			return storage_write[i].write(storage_write[i].address, byte_size, buff);
+	}
+
+	return false;
+}
+
+static void save_ddr_training_info(void)
+{
+	struct ddr_training_info_t *info;
+	info = (struct ddr_training_info_t*)map_sysmem(DDR_TRAINING_INFO_BUFF, 0);
+
+	if ((DDR_TRAINING_INFO_MAGIC == info->magic) &&
+		(info->crc32 == crc32(0, (const uchar *)info->para, sizeof(*info) - 8))) {
+		// save DDR training info to boot storage
+		write_training_info(info, sizeof(*info));
+	}
+}
 
 void run_fastboot_command(void)
 {
@@ -116,11 +210,16 @@ void run_fastboot_command(void)
 	/*if define BOOT_MODE_USB flag in BOOT_CIU_DEBUG_REG0, it would excute fastboot*/
 	u32 cui_flasg = readl((void *)BOOT_CIU_DEBUG_REG0);
 	if (boot_mode == BOOT_MODE_USB || cui_flasg == BOOT_MODE_USB){
+		/* show flash log*/
+		env_set("stdout", env_get("stdout_flash"));
 		/*would reset debug_reg0*/
 		writel(0, (void *)BOOT_CIU_DEBUG_REG0);
 
 		char *cmd_para = "fastboot 0";
 		run_command(cmd_para, 0);
+
+		/*read from eeprom and update info to env*/
+		refresh_config_info(NULL);
 	}
 }
 
@@ -165,7 +264,8 @@ void _load_env_from_blk(struct blk_desc *dev_desc, const char *dev_name, int dev
 	env_set("bootfs_devname", dev_name);
 
 	/*load env.txt and import to uboot*/
-	sprintf(cmd, "fatload %s %d:%d 0x%x env_%s.txt", dev_name,
+	memset((void *)CONFIG_SPL_LOAD_FIT_ADDRESS, 0, CONFIG_ENV_SIZE);
+	sprintf(cmd, "load %s %d:%d 0x%x env_%s.txt", dev_name,
 			dev, part, CONFIG_SPL_LOAD_FIT_ADDRESS, CONFIG_SYS_CONFIG_NAME);
 	pr_debug("cmd:%s\n", cmd);
 	if (run_command(cmd, 0))
@@ -242,6 +342,7 @@ void import_env_from_bootfs(void)
 			return;
 		}
 
+		memset((void *)CONFIG_SPL_LOAD_FIT_ADDRESS, 0, CONFIG_ENV_SIZE);
 		sprintf(cmd, "ubifsload 0x%x env_%s.txt", CONFIG_SPL_LOAD_FIT_ADDRESS, CONFIG_SYS_CONFIG_NAME);
 		if (run_command(cmd, 0)) {
 			pr_err("Failed to load env_%s.txt from bootfs\n", CONFIG_SYS_CONFIG_NAME);
@@ -331,8 +432,11 @@ void run_cardfirmware_flash_command(void)
 	/*check if flash config file is in sd card*/
 	sprintf(cmd, "fatsize mmc %d:%d %s", MMC_DEV_SD, part_dev, FLASH_CONFIG_FILE_NAME);
 	pr_debug("cmd:%s\n", cmd);
-	if (!run_command(cmd, 0))
-		run_command("spacemit_flashing mmc", 0);
+	if (!run_command(cmd, 0)){
+		/* show flash log*/
+		env_set("stdout", env_get("stdout_flash"));
+		run_command("flash_image mmc", 0);
+	}
 #endif
 	return;
 }
@@ -358,6 +462,10 @@ void setenv_boot_mode(void)
 		env_set("boot_device", "mmc");
 		env_set("boot_devnum", simple_itoa(MMC_DEV_SD));
 		break;
+	case BOOT_MODE_USB:
+		// for fastboot image download and run test
+		env_set("bootcmd", CONFIG_BOOTCOMMAND);
+		break;
 	default:
 		env_set("boot_device", "");
 		break;
@@ -394,17 +502,104 @@ void read_from_eeprom(struct tlvinfo_tlv **tlv_data, u8 tcode)
 	return;
 }
 
-void set_env_ethaddr(void)
+struct tlvinfo_tlv *find_tlv_in_buffer(u8 *eeprom_data, u8 tcode)
 {
-	int ret = 0, ethaddr_valid = 0, eth1addr_valid = 0;
+	struct tlvinfo_header *hdr = (struct tlvinfo_header *)eeprom_data;
+	int total_length = be16_to_cpu(hdr->totallen);
+	u8 *tlv_end = eeprom_data + sizeof(struct tlvinfo_header) + total_length;
+	u8 *ptr = eeprom_data + sizeof(struct tlvinfo_header);
+
+	while (ptr < tlv_end) {
+		struct tlvinfo_tlv *tlv = (struct tlvinfo_tlv *)ptr;
+
+		if (tlv->type == tcode) {
+			return tlv;
+		}
+
+		ptr += sizeof(struct tlvinfo_tlv) + tlv->length;
+	}
+
+	return NULL;
+}
+
+int mac_read_from_buffer(u8 *eeprom_data) {
+	unsigned int i;
+	struct tlvinfo_tlv *mac_size_tlv;
+	struct tlvinfo_tlv *mac_base_tlv;
+	int maccount;
+	u8 macbase[6];
+	struct tlvinfo_header *eeprom_hdr = (struct tlvinfo_header *)eeprom_data;
+
+	pr_info("EEPROM: ");
+
+	mac_size_tlv = find_tlv_in_buffer(eeprom_data, TLV_CODE_MAC_SIZE);
+	maccount = 1;
+	if (mac_size_tlv) {
+		maccount = (mac_size_tlv->value[0] << 8) | mac_size_tlv->value[1];
+	}
+
+	mac_base_tlv = find_tlv_in_buffer(eeprom_data, TLV_CODE_MAC_BASE);
+	if (mac_base_tlv) {
+		memcpy(macbase, mac_base_tlv->value, 6);
+	} else {
+		memset(macbase, 0, sizeof(macbase));
+	}
+
+	for (i = 0; i < maccount; i++) {
+		if (is_valid_ethaddr(macbase)) {
+			char ethaddr[18];
+			char enetvar[11];
+
+			sprintf(ethaddr, "%02X:%02X:%02X:%02X:%02X:%02X",
+				macbase[0], macbase[1], macbase[2],
+				macbase[3], macbase[4], macbase[5]);
+			sprintf(enetvar, i ? "eth%daddr" : "ethaddr", i);
+			/* Only initialize environment variables that are blank
+			 * (i.e. have not yet been set)
+			 */
+			if (!env_get(enetvar))
+				env_set(enetvar, ethaddr);
+
+			macbase[5]++;
+			if (macbase[5] == 0) {
+				macbase[4]++;
+				if (macbase[4] == 0) {
+					macbase[3]++;
+					if (macbase[3] == 0) {
+						macbase[0] = 0;
+						macbase[1] = 0;
+						macbase[2] = 0;
+					}
+				}
+			}
+		}
+	}
+
+	printf("%s v%u len=%u\n", eeprom_hdr->signature, eeprom_hdr->version,
+	       be16_to_cpu(eeprom_hdr->totallen));
+
+	return 0;
+}
+
+void set_env_ethaddr(u8 *eeprom_data) {
+	int ethaddr_valid = 0, eth1addr_valid = 0;
 	uint8_t mac_addr[6], mac1_addr[6];
 	char cmd_str[128] = {0};
 
-	/* get mac address from eeprom */
-	ret = mac_read_from_eeprom();
-	if (ret < 0) {
-		pr_err("read mac address from eeprom failed!\n");
-		return ;
+	/* Determine source of MAC address and attempt to read it */
+	if (eeprom_data != NULL) {
+		// Attempt to read MAC address from buffer
+
+		if (mac_read_from_buffer(eeprom_data) < 0) {
+			pr_err("Failed to set MAC addresses from EEPROM buffer.\n");
+			return;
+		}
+	} else {
+		// Attempt to read MAC address from EEPROM
+		if (mac_read_from_eeprom() < 0) {
+			pr_err("Read MAC address from EEPROM failed!\n");
+			return;
+		}
 	}
 
 	/* check ethaddr valid */
@@ -444,7 +639,7 @@ void set_env_ethaddr(void)
 	run_command(cmd_str, 0);
 }
 
-void set_dev_serial_no(void)
+void set_dev_serial_no(uint8_t *eeprom_data)
 {
 	u8 sn[6] = {0};
 	char cmd_str[128] = {0};
@@ -452,15 +647,19 @@ void set_dev_serial_no(void)
 	int i = 0;
 	unsigned int seed = 0;
 
-	read_from_eeprom(&tlv_entry, TLV_CODE_SERIAL_NUMBER);
+	// Decide where to read the serial number from
+	if (eeprom_data != NULL) {
+		tlv_entry = find_tlv_in_buffer(eeprom_data, TLV_CODE_SERIAL_NUMBER);
+	} else {
+		read_from_eeprom(&tlv_entry, TLV_CODE_SERIAL_NUMBER);
+	}
 	if (tlv_entry && tlv_entry->length == 12) {
-			if (tlv_entry->value[0] | tlv_entry->value[1] | tlv_entry->value[2] |
-				tlv_entry->value[3] | tlv_entry->value[4] | tlv_entry->value[5] |
-				tlv_entry->value[6] | tlv_entry->value[7] | tlv_entry->value[8] |
-				tlv_entry->value[9] | tlv_entry->value[10] | tlv_entry->value[11]) {
+		for (i = 0; i < 12; i++) {
+			if (tlv_entry->value[i] != 0) {
 				pr_err("Serial number is valid.\n");
-				return ;
+				return;
 			}
+		}
 	}
 
 	pr_info("Generate rand serial number:\n");
@@ -487,51 +686,51 @@ struct code_desc_info {
 	char	*m_name;
 };
 
-void refresh_config_info(void)
-{
+void refresh_config_info(u8 *eeprom_data) {
 	struct tlvinfo_tlv *tlv_info = NULL;
 	char *strval;
 	int i;
 
-	struct code_desc_info info[] = {
+	struct code_desc_info {
+		u8    m_code;
+		char *m_name;
+	} info[] = {
 		{ TLV_CODE_PRODUCT_NAME,   "product_name"},
 		{ TLV_CODE_SERIAL_NUMBER,  "serial#"},
 		{ TLV_CODE_MANUF_DATE,     "manufacture_date"},
 		{ TLV_CODE_MANUF_NAME,     "manufacturer"},
-	};
-
-	for (i = 0; i < ARRAY_SIZE(info); i++){
-		read_from_eeprom(&tlv_info, info[i].m_code);
-		if (tlv_info == NULL){
-			pr_err("can not find tlv data:%s\n", info[i].m_name);
-			continue;
-		}
-
-		strval = malloc(tlv_info->length + 1);
-		memset(strval, 0, tlv_info->length + 1);
-		strncpy(strval, tlv_info->value, tlv_info->length);
-		env_set(info[i].m_name, strval);
-		free(strval);
-	}
-
-	struct code_desc_info version[] = {
 		{ TLV_CODE_DEVICE_VERSION, "device_version"},
 		{ 0x40,                    "sdk_version"},
 	};
 
-	strval = malloc(64);
-	for (i = 0; i < ARRAY_SIZE(version); i++){
-		read_from_eeprom(&tlv_info, version[i].m_code);
-		if (tlv_info == NULL){
-			pr_err("can not find tlv data:%s\n", version[i].m_name);
-			continue;
+	for (i = 0; i < ARRAY_SIZE(info); i++) {
+		if (eeprom_data != NULL) {
+			tlv_info = find_tlv_in_buffer(eeprom_data, info[i].m_code);
+		} else {
+			read_from_eeprom(&tlv_info, info[i].m_code);
 		}
 
-		memset(strval, 0, 64);
-		sprintf(strval, "%d", *tlv_info->value);
-		env_set(version[i].m_name, strval);
+		if (tlv_info != NULL) {
+			if (info[i].m_code == TLV_CODE_DEVICE_VERSION || info[i].m_code == 0x40) {
+				// Convert the numeric value to string
+				strval = malloc(64);
+				int num = 0;
+				for (int j = 0; j < tlv_info->length && j < sizeof(num); j++) {
+					num = (num << 8) | tlv_info->value[j];
+				}
+				sprintf(strval, "%d", num);
+			} else {
+				// Copy the value directly as string
+				strval = malloc(tlv_info->length + 1);
+				memcpy(strval, tlv_info->value, tlv_info->length);
+				strval[tlv_info->length] = '\0';
+			}
+			env_set(info[i].m_name, strval);
+			free(strval);
+		} else {
+			pr_err("Cannot find TLV data: %s\n", info[i].m_name);
+		}
 	}
-	free(strval);
 }
 
 int board_init(void)
@@ -552,16 +751,36 @@ int board_late_init(void)
 	ofnode chosen_node;
 	char ram_size_str[16] = {"\0"};
 	int ret;
+	u8 *eeprom_data;
+	struct tlvinfo_header *tlv_hdr = NULL;
+	struct tlvinfo_tlv *first_entry = NULL;
 
+	save_ddr_training_info();
 	if (IS_ENABLED(CONFIG_SYSRESET_SPACEMIT))
 		device_bind_driver(gd->dm_root, "spacemit_sysreset",
 					"spacemit_sysreset", NULL);
 
-	set_env_ethaddr();
-	set_dev_serial_no();
+	// it MAY be NULL when did NOT load build-in env and eeprom is empty
+	if (NULL == env_get("product_name"))
+		env_set("product_name", DEFAULT_PRODUCT_NAME);
 
-	/*read from eeprom and update info to env*/
-	refresh_config_info();
+	eeprom_data = memalign(ARCH_DMA_MINALIGN, TLV_INFO_MAX_LEN);
+	if (!eeprom_data) {
+		pr_err("Failed to allocate memory for EEPROM data\n");
+		return -ENOMEM;
+	}
+	if (read_tlvinfo_tlv_eeprom(eeprom_data, &tlv_hdr, &first_entry, 0) < 0) {
+		pr_err("Failed to read all EEPROM data\n");
+	}
+	if (tlv_hdr != NULL && first_entry != NULL && is_valid_tlvinfo_header(tlv_hdr)) {
+		set_env_ethaddr(eeprom_data);
+		set_dev_serial_no(eeprom_data);
+		refresh_config_info(eeprom_data);
+	} else {
+		set_env_ethaddr(NULL);
+		set_dev_serial_no(NULL);
+		refresh_config_info(NULL);
+	}
 
 	run_fastboot_command();
 
@@ -584,9 +803,6 @@ int board_late_init(void)
 
 	setenv_boot_mode();
 
-	/*read from eeprom and update info to env*/
-	refresh_config_info();
-
 	/*save ram size to env, transfer to MB*/
 	sprintf(ram_size_str, "mem=%dMB", (int)(gd->ram_size / SZ_1MB));
 	env_set("ram_size", ram_size_str);
@@ -661,12 +877,21 @@ int misc_init_r(void)
 {
 #ifdef CONFIG_DYNAMIC_DDR_CLK_FREQ
 	int ret;
+	char cmd[32];
 
 	ret = ddr_freq_max();
 	if(ret < 0) {
 		pr_debug("%s: Try to adjust ddr freq failed!\n", __func__);
 		return ret;
 	}
+
+	// change DDR data rate to 2400MT/s and set
+	sprintf(cmd, "ddrfreq %d", 6);
+	pr_debug("cmd:%s\n", cmd);
+	if (run_command(cmd, 0)) {
+			pr_err("DDR frequency change fail\n");
+			return -1;
+	}
 #endif
 
 	return 0;
@@ -686,15 +911,16 @@ int dram_init_banksize(void)
 {
 	u64 dram_size = (u64)ddr_get_density() * SZ_1MB;
 
+	memset(gd->bd->bi_dram, 0, sizeof(gd->bd->bi_dram));
 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 	if(dram_size > SZ_2GB) {
 		gd->bd->bi_dram[0].size = SZ_2G;
-		gd->bd->bi_dram[1].start = 0x100000000;
-		gd->bd->bi_dram[1].size = dram_size - SZ_2G;
+		if (CONFIG_NR_DRAM_BANKS > 1) {
+			gd->bd->bi_dram[1].start = 0x100000000;
+			gd->bd->bi_dram[1].size = dram_size - SZ_2G;
+		}
 	} else {
 		gd->bd->bi_dram[0].size = dram_size;
-		gd->bd->bi_dram[1].start = 0;
-		gd->bd->bi_dram[1].size = 0;
 	}
 
 	return 0;

board/spacemit/k1-x/spl.c

@@ -10,6 +10,7 @@
 #include <misc.h>
 #include <log.h>
 #include <i2c.h>
+#include <cpu.h>
 #include <linux/io.h>
 #include <linux/delay.h>
 #include <linux/io.h>
@@ -20,6 +21,10 @@
 #include <fb_spacemit.h>
 #include <tlv_eeprom.h>
 #include <stdlib.h>
+#include <u-boot/crc.h>
+#include <cpu_func.h>
+#include <dt-bindings/soc/spacemit-k1x.h>
+#include <display_options.h>
 
 #define GEN_CNT			(0xD5001000)
 #define STORAGE_API_P_ADDR	(0xC0838498)
@@ -75,6 +80,9 @@
 
 extern int k1x_eeprom_init(void);
 extern int spacemit_eeprom_read(uint8_t chip, uint8_t *buffer, uint8_t id);
+extern bool get_mac_address(uint64_t *mac_addr);
+extern enum board_boot_mode get_boot_storage(void);
+extern int spl_mtd_read(struct mtd_info *mtd, ulong sector, ulong count, void *buf);
 char *product_name;
 
 int timer_init(void)
@@ -91,7 +99,7 @@ int timer_init(void)
 	return 0;
 }
 
-enum board_boot_mode get_boot_storage(void)
+enum board_boot_mode __get_boot_storage(void)
 {
 	size_t *api = (size_t*)STORAGE_API_P_ADDR;
 	size_t address = *api;
@@ -105,7 +113,7 @@ enum board_boot_mode get_boot_storage(void)
 void fix_boot_mode(void)
 {
 	if (0 == readl((void *)BOOT_DEV_FLAG_REG))
-		set_boot_mode(get_boot_storage());
+		set_boot_mode(__get_boot_storage());
 }
 
 void board_pinctrl_setup(void)
@@ -119,6 +127,80 @@ void board_pinctrl_setup(void)
 	writel(MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_3V_DS4, (void __iomem *)MFPR_MMC1_BASE + MMC1_CLK_OFFSET);
 }
 
+static uint32_t adjust_cpu_freq(uint64_t cluster, uint32_t freq)
+{
+	uint32_t freq_act=freq, val;
+
+	/* switch cpu clock source */
+	val = readl((void __iomem *)(K1X_APMU_BASE + 0x38c + cluster*4));
+	val &= ~(0x07 | BIT(13));
+	switch(freq) {
+	case 1600000:
+		val |= 0x07;
+		break;
+
+	case 1228000:
+		val |= 0x04;
+		break;
+
+	case 819000:
+		val |= 0x01;
+		break;
+
+	case 614000:
+	default:
+		freq_act = 614000;
+		val |= 0x00;
+		break;
+	}
+	writel(val, (void __iomem *)(K1X_APMU_BASE + 0x38c + cluster*4));
+
+	/* set cluster frequency change request, and wait done */
+	val = readl((void __iomem *)(K1X_APMU_BASE + 0x38c + cluster*4));
+	val |= BIT(12);
+	writel(val, (void __iomem *)(K1X_APMU_BASE + 0x38c + cluster*4));
+	while(readl((void __iomem *)(K1X_APMU_BASE + 0x38c + cluster*4)) & BIT(12));
+
+	return freq_act;
+}
+
+void raise_cpu_frequency(void)
+{
+	uint32_t val, cpu_freq;
+	struct udevice *cpu;
+
+	writel(0x2dffff, (void __iomem *)0xd4051024);
+
+	/* enable CLK_1228M */
+	val = readl((void __iomem *)(K1X_MPMU_BASE + 0x1024));
+	val |= BIT(16) | BIT(15) | BIT(14) | BIT(13);
+	writel(val, (void __iomem *)(K1X_MPMU_BASE + 0x1024));
+
+	/* enable PLL3(3200Mhz) */
+	val = readl((void __iomem *)(K1X_APB_SPARE_BASE + 0x12C));
+	val |= BIT(31);
+	writel(val, (void __iomem *)(K1X_APB_SPARE_BASE + 0x12C));
+	/* enable PLL3_DIV2 */
+	val = readl((void __iomem *)(K1X_APB_SPARE_BASE + 0x128));
+	val |= BIT(1);
+	writel(val, (void __iomem *)(K1X_APB_SPARE_BASE + 0x128));
+
+	cpu = cpu_get_current_dev();
+	if(dev_read_u32u(cpu, "boot_freq_cluster0", &cpu_freq)) {
+		pr_info("boot_freq_cluster0 not configured, use 1228000 as default!\n");
+		cpu_freq = 1228000;
+	}
+	cpu_freq = adjust_cpu_freq(0, cpu_freq);
+	pr_info("adjust cluster-0 frequency to %u ...	[done]\n", cpu_freq);
+
+	if(dev_read_u32u(cpu, "boot_freq_cluster1", &cpu_freq)) {
+		pr_info("boot_freq_cluster1 not configured, use 1228000 as default!\n");
+		cpu_freq = 614000;
+	}
+	cpu_freq = adjust_cpu_freq(1, cpu_freq);
+	pr_info("adjust cluster-1 frequency to %u ...	[done]\n", cpu_freq);
+}
+
 #if CONFIG_IS_ENABLED(SPACEMIT_K1X_EFUSE)
 int load_board_config_from_efuse(int *eeprom_i2c_index,
 				 int *eeprom_pin_group, int *pmic_type)
@@ -147,6 +229,36 @@ int load_board_config_from_efuse(int *eeprom_i2c_index,
 
 	return ret;
 }
+
+int load_chipid_from_efuse(uint64_t *chipid)
+{
+	struct udevice *dev;
+	uint8_t fuses[32];
+	int ret;
+
+	/* retrieve the device */
+	ret = uclass_get_device_by_driver(UCLASS_MISC,
+			DM_DRIVER_GET(spacemit_k1x_efuse), &dev);
+	if (ret) {
+		return ret;
+	}
+
+	// read from efuse, each bank has 32byte efuse data
+	ret = misc_read(dev, 7 * 32 + 0, fuses, sizeof(fuses));
+	if (0 == ret) {
+		// bit191~251 is chipid
+		// 1. get bit 192~251
+		// 2. left shift 1bit, and merge with efuse_bank[7].bit191
+		*chipid = 0;
+		memcpy(chipid, &fuses[24], 8);
+		*chipid <<= 4;
+		*chipid >>= 3;
+		*chipid |= (fuses[23] & 0x80) >> 7;
+		pr_debug("Get chipid %llx\n", *chipid);
+	}
+
+	return ret;
+}
 #endif
 
 static void load_default_board_config(int *eeprom_i2c_index,
@@ -191,10 +303,132 @@ void load_board_config(int *eeprom_i2c_index, int *eeprom_pin_group, int *pmic_t
 	pr_debug("pmic_type :%d\n", *pmic_type);
 }
 
+static ulong read_boot_storage_emmc(ulong byte_addr, ulong byte_size, void *buff)
+{
+	ulong ret;
+	//select mmc device(MUST be align with spl.dts): 0:sd, 1:emmc
+	struct blk_desc *dev_desc = blk_get_dev("mmc", 1);
+	if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
+		pr_err("invalid mmc device\n");
+		return 0;
+	}
+
+	blk_dselect_hwpart(dev_desc, 0);
+	ret = blk_dread(dev_desc,
+		byte_addr / dev_desc->blksz,
+		byte_size / dev_desc->blksz, buff);
+	return dev_desc->blksz * ret;
+}
+
+static ulong read_boot_storage_sdcard(ulong byte_addr, ulong byte_size, void *buff)
+{
+	ulong ret;
+	//select sdcard device(MUST be align with spl.dts): 0:sd, 1:emmc
+	struct blk_desc *dev_desc = blk_get_dev("mmc", 0);
+	if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
+		pr_err("invalid sdcard device\n");
+		return 0;
+	}
+
+	ret = blk_dread(dev_desc,
+		byte_addr / dev_desc->blksz,
+		byte_size / dev_desc->blksz, buff);
+	return dev_desc->blksz * ret;
+}
+
+static ulong read_boot_storage_spinor(ulong byte_addr, ulong byte_size, void *buff)
+{
+	struct mtd_info *mtd;
+	const char* part = "private";
+
+	mtd_probe_devices();
+	mtd = get_mtd_device_nm(part);
+	if ((NULL != mtd) && (0 == spl_mtd_read(mtd, byte_addr, byte_size, buff))) {
+		// print_buffer(0, buff, 1, byte_size, 16);
+		return byte_size;
+	}
+	else
+		return 0;
+}
+
+static const struct boot_storage_op storage_read[] = {
+	{BOOT_MODE_EMMC, 0x10000, read_boot_storage_emmc, NULL},
+	{BOOT_MODE_SD, 0x10000, read_boot_storage_sdcard, NULL},
+	{BOOT_MODE_NOR, 0, read_boot_storage_spinor, NULL},
+};
+
+static ulong read_training_info(void *buff, ulong byte_size)
+{
+	int i;
+	// read data from boot storage
+	enum board_boot_mode boot_storage = get_boot_storage();
+
+	for (i = 0; i < ARRAY_SIZE(storage_read); i++) {
+		if (boot_storage == storage_read[i].boot_storage)
+			return storage_read[i].read(storage_read[i].address, byte_size, buff);
+	}
+
+	return 0;
+}
+
+bool restore_ddr_training_info(uint64_t chipid, uint64_t mac_addr)
+{
+	bool success = true;
+	struct ddr_training_info_t *info;
+	ulong flush_start, flush_lenth;
+
+	pr_debug("chipid %llx\n", chipid);
+	pr_debug("mac_addr %llx\n", mac_addr);
+
+	info = (struct ddr_training_info_t*)map_sysmem(DDR_TRAINING_INFO_BUFF, 0);
+	if ((sizeof(*info) != read_training_info(info, sizeof(*info))) ||
+		(DDR_TRAINING_INFO_MAGIC != info->magic) ||
+		(chipid != info->chipid) ||
+		(mac_addr != info->mac_addr) ||
+		(DDR_TRAINING_INFO_VER != info->version) ||
+		(info->crc32 != crc32(0, (const uchar *)info->para, sizeof(*info) - 8))) {
+		// clear magic, set invalid
+		memset(info, 0, sizeof(*info));
+		success = false;
+	}
+
+	flush_start = round_down((size_t)info, CONFIG_RISCV_CBOM_BLOCK_SIZE);
+	flush_lenth = round_up(sizeof(*info), CONFIG_RISCV_CBOM_BLOCK_SIZE);
+	flush_dcache_range(flush_start, flush_start + flush_lenth);
+	return success;
+}
+
+void update_ddr_training_info(uint64_t chipid, uint64_t mac_addr)
+{
+	struct ddr_training_info_t *info;
+	// ulong flush_start, flush_lenth;
+
+	info = (struct ddr_training_info_t*)map_sysmem(DDR_TRAINING_INFO_BUFF, 0);
+	if ((DDR_TRAINING_INFO_MAGIC == info->magic) &&
+		(info->crc32 == crc32(0, (const uchar *)info->para, sizeof(*info) - 8))) {
+		// NO need to save ddr trainig info
+		info->magic = 0;
+		}
+	else {
+		// first time to do ddr training or ddr training info is update
+		info->magic = DDR_TRAINING_INFO_MAGIC;
+		info->chipid = chipid;
+		info->mac_addr = mac_addr;
+		info->version = DDR_TRAINING_INFO_VER;
+		info->crc32 = crc32(0, (const uchar *)info->para, sizeof(*info) - 8);
+	}
+
+	// flush_start = round_down((size_t)info, CONFIG_RISCV_CBOM_BLOCK_SIZE);
+	// flush_lenth = round_up(sizeof(*info), CONFIG_RISCV_CBOM_BLOCK_SIZE);
+	// flush_dcache_range(flush_start, flush_start + flush_lenth);
+}
+
 int spl_board_init_f(void)
 {
 	int ret;
 	struct udevice *dev;
+	bool flag;
+	uint64_t chipid = 0, mac_addr = 0;
 
 #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
 	/* init i2c */
@@ -205,6 +439,21 @@ int spl_board_init_f(void)
 	board_pmic_init();
 #endif
 
+	raise_cpu_frequency();
+#if CONFIG_IS_ENABLED(SPACEMIT_K1X_EFUSE)
+	load_chipid_from_efuse(&chipid);
+#endif
+	get_mac_address(&mac_addr);
+
+	// restore prevous saved ddr training info data
+	flag = restore_ddr_training_info(chipid, mac_addr);
+	if (!flag) {
+		// flush data and stack
+		flush_dcache_range(CONFIG_SPL_BSS_START_ADDR, CONFIG_SPL_STACK);
+		icache_disable();
+		dcache_disable();
+	}
+
 	/* DDR init */
 	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
 	if (ret) {
@@ -212,6 +461,12 @@ int spl_board_init_f(void)
 		return ret;
 	}
 
+	if (!flag) {
+		icache_enable();
+		dcache_enable();
+	}
+
+	update_ddr_training_info(chipid, mac_addr);
 	timer_init();
 
 	return 0;
@@ -248,7 +503,7 @@ int board_fit_config_name_match(const char *name)
 
 	buildin_name = product_name;
 	if (NULL == buildin_name)
-		buildin_name = env_get("product_name");
+		buildin_name = DEFAULT_PRODUCT_NAME;
 
 	if ((NULL != buildin_name) && (0 == strcmp(buildin_name, name))) {
 		pr_debug("Boot from fit configuration %s\n", name);
@@ -344,6 +599,20 @@ static void spl_load_env(void)
 	}
 }
 
+bool get_mac_address(uint64_t *mac_addr)
+{
+	int eeprom_addr;
+
+	eeprom_addr = k1x_eeprom_init();
+	if ((eeprom_addr >= 0) && (NULL != mac_addr) && (0 == spacemit_eeprom_read(
+		eeprom_addr, (uint8_t*)mac_addr, TLV_CODE_MAC_BASE))) {
+		pr_info("Get mac address %llx from eeprom\n", *mac_addr);
+		return true;
+	}
+
+	return false;
+}
+
 char *get_product_name(void)
 {
 	char *name = NULL;
@@ -360,7 +629,7 @@ char *get_product_name(void)
 	if (NULL != name)
 		free(name);
 
-	pr_debug("Use default product name %s\n", env_get("product_name"));
+	pr_debug("Use default product name %s\n", DEFAULT_PRODUCT_NAME);
 	return NULL;
 }
 

board/spacemit/k1-x/splash.c

@@ -9,14 +9,16 @@
 
 #if defined(CONFIG_SPLASH_SCREEN) && defined(CONFIG_CMD_BMP)
 
-void set_emmc_splash_location(struct splash_location *locations) {
+int set_emmc_splash_location(struct splash_location *locations) {
 	int dev_index = mmc_get_env_dev();
 	int part_index;
 	char devpart_str[16];
+	int err;
 
-	if (get_partition_index_by_name(BOOTFS_NAME, &part_index) < 0) {
+	err = get_partition_index_by_name(BOOTFS_NAME, &part_index);
+	if (err) {
 		pr_err("Failed to get partition index for %s\n", BOOTFS_NAME);
-		return;
+		return -1;
 	}
 
 	snprintf(devpart_str, sizeof(devpart_str), "%d:%d", dev_index, part_index);
@@ -25,16 +27,19 @@ void set_emmc_splash_location(struct splash_location *locations) {
 	locations[0].storage = SPLASH_STORAGE_MMC;
 	locations[0].flags = SPLASH_STORAGE_FS;
 	locations[0].devpart = strdup(devpart_str);
+	return 0;
 }
 
-void set_mmc_splash_location(struct splash_location *locations) {
+int set_mmc_splash_location(struct splash_location *locations) {
 	int dev_index = mmc_get_env_dev();
 	int part_index;
 	char devpart_str[16];
+	int err;
 
-	if (get_partition_index_by_name(BOOTFS_NAME, &part_index) < 0) {
+	err = get_partition_index_by_name(BOOTFS_NAME, &part_index);
+	if (err) {
 		pr_err("Failed to get partition index for %s\n", BOOTFS_NAME);
-		return;
+		return -1;
 	}
 
 	snprintf(devpart_str, sizeof(devpart_str), "%d:%d", dev_index, part_index);
@@ -43,9 +48,10 @@ void set_mmc_splash_location(struct splash_location *locations) {
 	locations[0].storage = SPLASH_STORAGE_MMC;
 	locations[0].flags = SPLASH_STORAGE_FS;
 	locations[0].devpart = strdup(devpart_str);
+	return 0;
 }
 
-void set_nor_splash_location(struct splash_location *locations) {
+int set_nor_splash_location(struct splash_location *locations) {
 	struct blk_desc *dev_desc;
 	struct disk_partition info;
 	int err;
@@ -54,13 +60,13 @@ void set_nor_splash_location(struct splash_location *locations) {
 
 	if (run_command("nvme scan", 0)) {
 		pr_err("Cannot scan NVMe devices!\n");
-		return;
+		return -1;
 	}
 
 	dev_desc = blk_get_dev("nvme", CONFIG_FASTBOOT_SUPPORT_BLOCK_DEV_INDEX);
 	if (!dev_desc) {
 		pr_err("Cannot find NVMe device\n");
-		return;
+		return -1;
 	}
 
 	for (part = 1; part <= MAX_SEARCH_PARTITIONS; part++) {
@@ -76,7 +82,7 @@ void set_nor_splash_location(struct splash_location *locations) {
 
 	if (part > MAX_SEARCH_PARTITIONS) {
 		pr_err("Failed to find bootfs on NOR\n");
-		return;
+		return -1;
 	}
 
 	snprintf(devpart_str, sizeof(devpart_str), "%d:%d", CONFIG_FASTBOOT_SUPPORT_BLOCK_DEV_INDEX, part);
@@ -85,9 +91,10 @@ void set_nor_splash_location(struct splash_location *locations) {
 	locations[0].storage = SPLASH_STORAGE_NVME;
 	locations[0].flags = SPLASH_STORAGE_FS;
 	locations[0].devpart = strdup(devpart_str);
+	return 0;
 }
 
-void set_nand_splash_location(struct splash_location *locations)
+int set_nand_splash_location(struct splash_location *locations)
 {
 	char *nand_part = parse_mtdparts_and_find_bootfs();
 	if (nand_part) {
@@ -96,12 +103,15 @@ void set_nand_splash_location(struct splash_location *locations)
 		locations[0].flags = SPLASH_STORAGE_FS;
 		locations[0].mtdpart = strdup(nand_part);
 		locations[0].ubivol = strdup(BOOTFS_NAME);
+		return 0;
 	} else {
 		pr_err("Failed to find bootfs on NAND\n");
+		return -1;
 	}
 }
 
 int load_splash_screen(void) {
+	int ret;
 	enum board_boot_mode boot_mode = get_boot_mode();
 	struct splash_location splash_locations[1];
 
@@ -109,21 +119,23 @@ int load_splash_screen(void) {
 
 	switch (boot_mode) {
 		case BOOT_MODE_EMMC:
-			set_emmc_splash_location(splash_locations);
+			ret = set_emmc_splash_location(splash_locations);
 			break;
 		case BOOT_MODE_SD:
-			set_mmc_splash_location(splash_locations);
+			ret = set_mmc_splash_location(splash_locations);
 			break;
 		case BOOT_MODE_NAND:
-			set_nand_splash_location(splash_locations);
+			ret = set_nand_splash_location(splash_locations);
 			break;
 		case BOOT_MODE_NOR:
-			set_nor_splash_location(splash_locations);
+			ret = set_nor_splash_location(splash_locations);
 			break;
 		default:
 			pr_err("Unsupported boot mode for splash screen\n");
 			break;
 	}
+	if(ret)
+		return -1;
 
 	if (CONFIG_IS_ENABLED(SPLASH_SOURCE))
 		return splash_source_load(splash_locations, ARRAY_SIZE(splash_locations));

cmd/Kconfig

@@ -2405,16 +2405,23 @@ config JFFS2_DEV
 	help
 	  The default device to use with the jffs2 command.
 
+config JFFS2_MTDPARTS
+    bool "Enable JFFS2 MTD partition options"
+    depends on CMD_JFFS2
+    help
+      Enable specifying default offset and size for JFFS2 partition
+      through configuration.
+
 config JFFS2_PART_OFFSET
 	hex "Default offset within flash to locate the JFFS2 image"
-	depends on CMD_JFFS2
+	depends on JFFS2_MTDPARTS
 	default 0x0
 	help
 	  The default offset within flash to locate the JFFS2 image.
 
 config JFFS2_PART_SIZE
 	hex "Default size of JFFS2 partition"
-	depends on CMD_JFFS2
+	depends on JFFS2_MTDPARTS
 	default 0xFFFFFFFF
 	help
 	  The default size of the JFFS2 partition

cmd/bootmenu.c

@@ -600,6 +600,8 @@ int menu_show(int bootdelay)
 		return 0;
 #endif
 
+	env_set("stdout","serial,vidconsole");
+
 	while (1) {
 		ret = bootmenu_show(bootdelay);
 		bootdelay = -1;

cmd/jffs2.c

@@ -83,6 +83,7 @@
 #include <linux/list.h>
 #include <linux/ctype.h>
 #include <cramfs/cramfs_fs.h>
+#include <linux/mtd/mtd.h>
 
 #if defined(CONFIG_CMD_NAND)
 #include <linux/mtd/rawnand.h>
@@ -122,14 +123,15 @@
 #define MTD_WRITEABLE_CMD		1
 
 /* current active device and partition number */
-#ifdef CONFIG_CMD_MTDPARTS
+#ifdef CONFIG_JFFS2_MTDPARTS
+/* Use local ones */
+static struct mtd_device *current_mtd_dev = NULL;
+static u8 current_mtd_partnum = 0;
+struct mtd_info *get_spi_flash(void);
+#else
 /* Use the ones declared in cmd_mtdparts.c */
 extern struct mtd_device *current_mtd_dev;
 extern u8 current_mtd_partnum;
-#else
-/* Use local ones */
-struct mtd_device *current_mtd_dev = NULL;
-u8 current_mtd_partnum = 0;
 #endif
 
 #if defined(CONFIG_CMD_CRAMFS)
@@ -146,7 +148,7 @@ extern int cramfs_info (struct part_info *info);
 #define cramfs_info(x)		(0)
 #endif
 
-#ifndef CONFIG_CMD_MTDPARTS
+#ifdef CONFIG_JFFS2_MTDPARTS
 /**
  * Check device number to be within valid range for given device type.
  *
@@ -235,7 +237,7 @@ static int mtd_id_parse(const char *id, const char **ret_id, u8 *dev_type, u8 *d
 }
 
 /*
- * 'Static' version of command line mtdparts_init() routine. Single partition on
+ * 'Static' version of command line jffs2_mtdparts_init() routine. Single partition on
  * a single device configuration.
  */
 
@@ -258,39 +260,17 @@ static inline u32 get_part_sector_size_nand(struct mtdids *id)
 #endif
 }
 
-static inline u32 get_part_sector_size_nor(struct mtdids *id, struct part_info *part)
+static u32 get_part_sector_size_nor(struct part_info *part)
 {
-#if defined(CONFIG_CMD_FLASH)
-	u32 end_phys, start_phys, sector_size = 0, size = 0;
-	int i;
-	flash_info_t *flash;
+	struct mtd_info *mtd;
 
-	flash = &flash_info[id->num];
-
-	start_phys = flash->start[0] + part->offset;
-	end_phys = start_phys + part->size - 1;
-
-	for (i = 0; i < flash->sector_count; i++) {
-		if (flash->start[i] >= end_phys)
-			break;
-
-		if (flash->start[i] >= start_phys) {
-			if (i == flash->sector_count - 1) {
-				size = flash->start[0] + flash->size - flash->start[i];
-			} else {
-				size = flash->start[i+1] - flash->start[i];
-			}
-
-			if (sector_size < size)
-				sector_size = size;
-		}
+	mtd = get_spi_flash();
+	if (!mtd) {
+		pr_err("Failed to get MTD device for SPI NOR\n");
+		return 0;
 	}
-
-	return sector_size;
-#else
-	BUG();
-	return 0;
-#endif
+	part->sector_size = mtd->erasesize;
+	return mtd->erasesize;
 }
 
 static inline u32 get_part_sector_size_onenand(void)
@@ -312,7 +292,7 @@ static inline u32 get_part_sector_size(struct mtdids *id, struct part_info *part
 	if (id->type == MTD_DEV_TYPE_NAND)
 		return get_part_sector_size_nand(id);
 	else if (id->type == MTD_DEV_TYPE_NOR)
-		return get_part_sector_size_nor(id, part);
+		return get_part_sector_size_nor(part);
 	else if (id->type == MTD_DEV_TYPE_ONENAND)
 		return get_part_sector_size_onenand();
 	else
@@ -325,18 +305,18 @@ static inline u32 get_part_sector_size(struct mtdids *id, struct part_info *part
  * Parse and initialize global mtdids mapping and create global
  * device/partition list.
  *
- * 'Static' version of command line mtdparts_init() routine. Single partition on
+ * 'Static' version of command line jffs2_mtdparts_init() routine. Single partition on
  * a single device configuration.
  *
  * Return: 0 on success, 1 otherwise
  */
-int mtdparts_init(void)
+int jffs2_mtdparts_init(void)
 {
 	static int initialized = 0;
 	u32 size;
 	char *dev_name;
 
-	DEBUGF("\n---mtdparts_init---\n");
+	DEBUGF("\n---jffs2_mtdparts_init---\n");
 	if (!initialized) {
 		struct mtdids *id;
 		struct part_info *part;
@@ -370,11 +350,11 @@ int mtdparts_init(void)
 		id->size = size;
 		INIT_LIST_HEAD(&id->link);
 
-		DEBUGF("dev id: type = %d, num = %d, size = 0x%08lx, mtd_id = %s\n",
+		DEBUGF("dev id: type = %d, num = %d, size = 0x%08llx, mtd_id = %s\n",
 				id->type, id->num, id->size, id->mtd_id);
 
 		/* partition */
-		part->name = "static";
+		part->name = "jffs2";
 		part->auto_name = 0;
 
 		part->size = CONFIG_JFFS2_PART_SIZE;
@@ -390,7 +370,7 @@ int mtdparts_init(void)
 
 		part->sector_size = get_part_sector_size(id, part);
 
-		DEBUGF("part  : name = %s, size = 0x%08lx, offset = 0x%08lx\n",
+		DEBUGF("part  : name = %s, size = 0x%08llx, offset = 0x%08llx\n",
 				part->name, part->size, part->offset);
 
 		/* device */
@@ -403,7 +383,7 @@ int mtdparts_init(void)
 
 	return 0;
 }
-#endif /* #ifndef CONFIG_CMD_MTDPARTS */
+#endif /* #ifdef CONFIG_JFFS2_MTDPARTS */
 
 /**
  * Return pointer to the partition of a requested number from a requested
@@ -483,9 +463,15 @@ int do_jffs2_fsload(struct cmd_tbl *cmdtp, int flag, int argc,
 		filename = argv[2];
 	}
 
+#ifdef CONFIG_JFFS2_MTDPARTS
+	/* make sure we are in sync with env variables */
+	if (jffs2_mtdparts_init() !=0)
+		return 1;
+#else
 	/* make sure we are in sync with env variables */
 	if (mtdparts_init() !=0)
 		return 1;
+#endif
 
 	if ((part = jffs2_part_info(current_mtd_dev, current_mtd_partnum))){
 
@@ -532,9 +518,15 @@ int do_jffs2_ls(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 	if (argc == 2)
 		filename = argv[1];
 
+#ifdef CONFIG_JFFS2_MTDPARTS
+	/* make sure we are in sync with env variables */
+	if (jffs2_mtdparts_init() !=0)
+		return 1;
+#else
 	/* make sure we are in sync with env variables */
 	if (mtdparts_init() !=0)
 		return 1;
+#endif
 
 	if ((part = jffs2_part_info(current_mtd_dev, current_mtd_partnum))){
 
@@ -568,9 +560,15 @@ int do_jffs2_fsinfo(struct cmd_tbl *cmdtp, int flag, int argc,
 	char *fsname;
 	int ret;
 
+#ifdef CONFIG_JFFS2_MTDPARTS
+	/* make sure we are in sync with env variables */
+	if (jffs2_mtdparts_init() !=0)
+		return 1;
+#else
 	/* make sure we are in sync with env variables */
 	if (mtdparts_init() !=0)
 		return 1;
+#endif
 
 	if ((part = jffs2_part_info(current_mtd_dev, current_mtd_partnum))){
 

cmd/spacemit_flash.c

@@ -33,6 +33,8 @@ static int dev_emmc_num = -1;
 static int dev_sdio_num = -1;
 static u32 bootfs_part_index = 0;
 
+void recovery_show_result(struct flash_dev *fdev, int ret);
+
 static void free_flash_dev(struct flash_dev *fdev)
 {
 	for (int i = 0; i < MAX_PARTITION_NUM; i++){
@@ -234,6 +236,80 @@ int download_file_via_tftp(char *file_name, char *load_addr) {
 	return 0;
 }
 
+static int _find_partition_file(struct flash_dev *fdev, char *tmp_file, char *temp_fname, u32 temp_fname_size)
+{
+	if (strlen(FLASH_IMG_FOLDER) > 0){
+		strcpy(temp_fname, FLASH_IMG_FOLDER);
+		strcat(temp_fname, "/");
+		strcat(temp_fname, tmp_file);
+	}else{
+		strcpy(temp_fname, tmp_file);
+	}
+	if (!run_commandf("fatsize %s %d:%d %s", fdev->device_name, fdev->dev_index,
+										bootfs_part_index, temp_fname)){
+		/*has find partition file name*/
+		return 0;
+	}else{
+		memset(tmp_file, '\0', 30);
+		memset(temp_fname, '\0', temp_fname_size);
+	}
+	return -1;
+}
+
+static int find_mtd_partition_file(struct flash_dev *fdev, char *temp_fname, u32 temp_fname_size)
+{
+	char tmp_file[30] = {"\0"};
+	u32 mtd_size = fdev->mtdinfo.size;
+	bool nand_flag = false;
+	memset(temp_fname, '\0', temp_fname_size);
+
+	switch (fdev->mtdinfo.size_type) {
+	case MTD_SIZE_G:
+		while (mtd_size/2){
+			mtd_size /= 2;
+			sprintf(tmp_file, "partition_%dG.json", mtd_size);
+			if (!_find_partition_file(fdev, tmp_file, temp_fname, temp_fname_size))
+				return 0;
+		}
+
+		/*retry to find until 64M*/
+		mtd_size = 1024;
+
+		/*if can not find at type G, try to find type M, should not break*/
+		/*break;*/
+	case MTD_SIZE_M:
+		if (mtd_size >= 64)
+			nand_flag = true;
+
+		while (mtd_size/2){
+			mtd_size /= 2;
+			if (nand_flag && mtd_size < 64){
+				pr_err("can not find suitable nand partition file\n");
+				return -1;
+			}
+			sprintf(tmp_file, "partition_%dM.json", mtd_size);
+			if (!_find_partition_file(fdev, tmp_file, temp_fname, temp_fname_size))
+				return 0;
+		}
+
+		/*retry to find type K patition file*/
+		mtd_size = 1024;
+		/*break;*/
+	case MTD_SIZE_K:
+		while (mtd_size/2){
+			mtd_size /= 2;
+			sprintf(tmp_file, "partition_%dK.json", mtd_size);
+			if (!_find_partition_file(fdev, tmp_file, temp_fname, temp_fname_size))
+				return 0;
+		}
+
+	default:
+		pr_err("undefine mtd size type, return fail\n");
+		return -1;
+	}
+}
+
+
 static int load_from_device(struct cmd_tbl *cmdtp, char *load_str,
 			int device_type, struct flash_dev *fdev)
 {
@@ -247,7 +323,7 @@ static int load_from_device(struct cmd_tbl *cmdtp, char *load_str,
 			retval = RESULT_FAIL;
 			break;
 		}
-		fdev->dev_str = strdup(simple_itoa((ulong)dev_sdio_num));
+		fdev->dev_index = dev_sdio_num;
 		fdev->device_name = strdup("mmc");
 		break;
 #endif //CONFIG_MMC
@@ -263,7 +339,7 @@ static int load_from_device(struct cmd_tbl *cmdtp, char *load_str,
 				retval = RESULT_FAIL;
 				break;
 			}
-			fdev->dev_str = strdup(simple_itoa((ulong)device_number));
+			fdev->dev_index = device_number;
 			fdev->device_name = strdup("usb");
 			usb_init_flag = true;
 
@@ -314,29 +390,38 @@ static int load_from_device(struct cmd_tbl *cmdtp, char *load_str,
 	}
 
 	debug("device_name: %s\n", fdev->device_name);
-	debug("dev_str: %s\n", fdev->dev_str);
+	debug("dev_index: %d\n", fdev->dev_index);
 
-	/*
-		TODO:should get partition.json name by searching the folder, and match
-		to the storage type.
-	*/
-	char *temp_fname = malloc(strlen(fdev->mtd_partition_file) + strlen(FLASH_IMG_FOLDER) + 2);
+	u32 temp_fname_size = strlen(fdev->partition_file_name) + strlen(FLASH_IMG_FOLDER) + 2;
+	char *temp_fname = malloc(temp_fname_size);
 	if (!temp_fname){
 		printf("malloc file_name fail\n");
 		return RESULT_FAIL;
 	}
-	memset(temp_fname, '\0', strlen(fdev->mtd_partition_file) + strlen(FLASH_IMG_FOLDER) + 2);
+	memset(temp_fname, '\0', temp_fname_size);
 	if (strlen(FLASH_IMG_FOLDER) > 0){
 		strcpy(temp_fname, FLASH_IMG_FOLDER);
 		strcat(temp_fname, "/");
-		strcat(temp_fname, fdev->mtd_partition_file);
+		strcat(temp_fname, fdev->partition_file_name);
 	}else{
-		strcpy(temp_fname, fdev->mtd_partition_file);
+		strcpy(temp_fname, fdev->partition_file_name);
 	}
 
 	if (strcmp(fdev->device_name, "mmc") == 0 || strcmp(fdev->device_name, "usb") == 0) {
 
-		sprintf(blk_dev_str, "%s:%d", fdev->dev_str, bootfs_part_index);
+		/*would try to detect mtd partition file exists or not*/
+		if (strcmp(FLASH_CONFIG_FILE_NAME, fdev->partition_file_name) &&
+			run_commandf("fatsize %s %d:%d %s", fdev->device_name, fdev->dev_index,
+                                                bootfs_part_index, temp_fname)) {
+			/*can not find mtd partition file, would try to find suitable file*/
+			if (find_mtd_partition_file(fdev, temp_fname, temp_fname_size)){
+				pr_err("can not find suitable partition file\n");
+				recovery_show_result(fdev, RESULT_FAIL);
+			}
+			printf("find temp_fname:%s\n", temp_fname);
+		}
+
+		sprintf(blk_dev_str, "%d:%d", fdev->dev_index, bootfs_part_index);
 		char *fat_argv[] = {"fatload", fdev->device_name, blk_dev_str, load_str, temp_fname};
 
 		if (do_load(cmdtp, 0, 5, fat_argv, FS_TYPE_FAT)) {
@@ -486,7 +571,7 @@ void specific_flash_mmc_opt(struct cmd_tbl *cmdtp, struct flash_dev *fdev)
 	char file_name[50] = {"\0"};
 	u32 image_size = 0;
 	void *load_addr = (void *)map_sysmem(RECOVERY_LOAD_IMG_ADDR, 0);
-	sprintf(blk_dev_str, "%s:%d", fdev->dev_str, bootfs_part_index);
+	sprintf(blk_dev_str, "%d:%d", fdev->dev_index, bootfs_part_index);
 
 	/*flash emmc info to boot0*/
 	fastboot_oem_flash_bootinfo(NULL, load_addr, image_size, NULL, fdev);
@@ -552,13 +637,13 @@ int load_and_flash_file(struct cmd_tbl *cmdtp, struct flash_dev *fdev, char *fil
 	uint64_t image_size = 0;
 	uint64_t byte_remain = 0;
 	uint64_t download_offset, download_bytes, bytes_read;
-	u32 crc_value = 0;
+	u64 compare_value = 0;
 	int div_times, data_source;
 
 	memset(load_str, 0, sizeof(load_str));
 	memset(offset_str, 0, sizeof(offset_str));
 	strcpy(load_str, simple_xtoa((ulong)load_addr));
-	sprintf(blk_dev_str, "%s:%d", fdev->dev_str, bootfs_part_index);
+	sprintf(blk_dev_str, "%d:%d", fdev->dev_index, bootfs_part_index);
 
 	if (strcmp(fdev->device_name, "mmc") == 0 || strcmp(fdev->device_name, "usb") == 0) {
 		// load data from fat disk
@@ -572,7 +657,7 @@ int load_and_flash_file(struct cmd_tbl *cmdtp, struct flash_dev *fdev, char *fil
 		image_size = env_get_hex("filesize", 0);
 		byte_remain = image_size;
 		div_times = (image_size + RECOVERY_LOAD_IMG_SIZE - 1) / RECOVERY_LOAD_IMG_SIZE;
-		debug("\n\ndev_times:%d\n", div_times);
+		pr_info("\n\ndev_times:%d\n", div_times);
 	} else if (strcmp(fdev->device_name, "net") == 0) {
 		// load data from net with tftp
 		data_source = 1;
@@ -600,7 +685,7 @@ int load_and_flash_file(struct cmd_tbl *cmdtp, struct flash_dev *fdev, char *fil
 	}
 
 	download_offset = 0;
-	crc_value = 0;
+	compare_value = 0;
 	info.start += *partition_offset;
 
 	/* save the partition start cnt */
@@ -632,7 +717,8 @@ int load_and_flash_file(struct cmd_tbl *cmdtp, struct flash_dev *fdev, char *fil
 			image_size = download_bytes = env_get_hex("filesize", 0);
 		}
 
-		crc_value = crc32_wd(crc_value, (const uchar *)load_addr, download_bytes, CHUNKSZ_CRC32);
+		// compare_value = crc32_wd(compare_value, (const uchar *)load_addr, download_bytes, CHUNKSZ_CRC32);
+		compare_value += checksum64(load_addr, download_bytes);
 		info.size = (download_bytes + (info.blksz - 1)) / info.blksz;
 		printf("write storage at block: 0x%lx, size: %lx\n", info.start, info.size);
 
@@ -657,12 +743,12 @@ int load_and_flash_file(struct cmd_tbl *cmdtp, struct flash_dev *fdev, char *fil
 #if CONFIG_IS_ENABLED(FASTBOOT_FLASH_MMC) || CONFIG_IS_ENABLED(FASTBOOT_MULTI_FLASH_OPTION_MMC)
 
 	if (fdev->blk_write){
-		if (check_blk_image_crc(fdev->dev_desc, crc_value, part_start_addr, info.blksz, image_size)) {
+		if (compare_blk_image_val(fdev->dev_desc, compare_value, part_start_addr, info.blksz, image_size)) {
 			printf("check image crc32 fail, \n");
 			return RESULT_FAIL;
 		}
 	}else{
-		if (check_mtd_image_crc(mtd, crc_value, image_size)) {
+		if (compare_mtd_image_val(mtd, compare_value, image_size)) {
 			printf("check image crc32 fail, \n");
 			return RESULT_FAIL;
 		}
@@ -671,6 +757,49 @@ int load_and_flash_file(struct cmd_tbl *cmdtp, struct flash_dev *fdev, char *fil
 	return RESULT_OK;
 }
 
+int flash_volume_from_file(struct cmd_tbl *cmdtp, struct flash_dev *fdev, const char *volume_name, const char *file_name, const char *partition, uint64_t *partition_offset) {
+	char blk_dev_str[32];
+	uint64_t image_size = 0;
+	void *load_addr = (void *)map_sysmem(RECOVERY_LOAD_IMG_ADDR, 0);
+    char cmd_buf[256];
+
+	sprintf(blk_dev_str, "%d:%d", fdev->dev_index, bootfs_part_index);
+
+	sprintf(cmd_buf, "fatload %s %s %lx %s", fdev->device_name, blk_dev_str, (ulong)load_addr, file_name);
+	if (run_command(cmd_buf, 0) != 0) {
+		printf("Failed to load file %s\n", file_name);
+		return RESULT_FAIL;
+	}
+
+	image_size = env_get_hex("filesize", 0);
+	printf("Loaded %s, size: %llu bytes\n", file_name, image_size);
+
+	printf("Creating and writing to UBI volume: %s\n", volume_name);
+
+	sprintf(cmd_buf, "ubi part %s", partition);
+	if (run_command(cmd_buf, 0) != 0) {
+		printf("Failed to select MTD partition %s\n", partition);
+		return RESULT_FAIL;
+	}
+
+	sprintf(cmd_buf, "ubi check %s", volume_name);
+	if (run_command(cmd_buf, 0) != 0) {
+		sprintf(cmd_buf, "ubi create %s %llx dynamic", volume_name, image_size);
+		if (run_command(cmd_buf, 0) != 0) {
+			printf("Failed to create UBI volume %s\n", volume_name);
+			return RESULT_FAIL;
+		}
+	}
+
+	sprintf(cmd_buf, "ubi write %lx %s %llx", (ulong)load_addr, volume_name, image_size);
+	if (run_command(cmd_buf, 0) != 0) {
+		printf("Failed to write to UBI volume %s\n", volume_name);
+		return RESULT_FAIL;
+	}
+
+	return RESULT_OK;
+}
+
 static int flash_image(struct cmd_tbl *cmdtp, struct flash_dev *fdev)
 {
 	int ret = RESULT_OK, i, j;
@@ -688,49 +817,67 @@ static int flash_image(struct cmd_tbl *cmdtp, struct flash_dev *fdev)
 			break;
 		}
 
-		if (file_name == NULL || strlen(file_name) == 0) {
+		if ((file_name == NULL || strlen(file_name) == 0) && (fdev->parts_info[i].volume_images_count == 0)) {
 			/* if not file not exists, it mean not to flash */
 			printf("file name is null, not to flashing, continue\n");
 			continue;
 		}
 
-		partition_offset = 0;
-		printf("\n\nflash img %s, part_name:%s\n", file_name, part_name);
-		// big rootfs image(larger than 4GB) will split to multi files
-		sprintf(blk_dev_str, "%s:%d", fdev->dev_str, bootfs_part_index);
-		if ((0 == strcmp(part_name, BIG_IMG_PARTNAME))
-			&& (strcmp(fdev->device_name, "mmc") == 0 || strcmp(fdev->device_name, "usb") == 0)
-			&& !file_exists(fdev->device_name, blk_dev_str, file_name, FS_TYPE_FAT)) {
-				split_file_name = malloc(strlen(file_name) + 8);
-				extension = file_name;
-				// MUST has only 1 "." inside file name
-				name = strsep(&extension, ".");
-				j = 1;
-				while (1) {
-					sprintf(split_file_name, "%s_%d.%s", name, j, extension);
-					if (file_exists(fdev->device_name, blk_dev_str, split_file_name, FS_TYPE_FAT)) {
-						printf("write %s to device %s\n", split_file_name, fdev->device_name);
-						ret = load_and_flash_file(cmdtp, fdev, split_file_name, part_name, &partition_offset);
-						if (RESULT_OK != ret)
+		if (fdev->parts_info[i].volume_images_count == 0) {
+			partition_offset = 0;
+			printf("\n\nFlashing part: %s, file:%s\n", part_name, file_name);
+			// big rootfs image(larger than 4GB) will split to multi files except flash to nand.
+			sprintf(blk_dev_str, "%d:%d", fdev->dev_index, bootfs_part_index);
+			if ((0 == strcmp(part_name, BIG_IMG_PARTNAME))
+				&& (strcmp(fdev->device_name, "mmc") == 0 || strcmp(fdev->device_name, "usb") == 0)
+				&& !file_exists(fdev->device_name, blk_dev_str, file_name, FS_TYPE_FAT)) {
+					split_file_name = malloc(strlen(file_name) + 8);
+					extension = file_name;
+					// MUST has only 1 "." inside file name
+					name = strsep(&extension, ".");
+					j = 1;
+					while (1) {
+						sprintf(split_file_name, "%s_%d.%s", name, j, extension);
+						if (file_exists(fdev->device_name, blk_dev_str, split_file_name, FS_TYPE_FAT)) {
+							printf("write %s to device %s\n", split_file_name, fdev->device_name);
+							ret = load_and_flash_file(cmdtp, fdev, split_file_name, part_name, &partition_offset);
+							if (RESULT_OK != ret)
+								break;
+							j++;
+						}
+						else
 							break;
-						j++;
 					}
-					else
-						break;
+
+					free(split_file_name);
+				}
+			else{
+				ret = load_and_flash_file(cmdtp, fdev, file_name, part_name, &partition_offset);
+			}
+
+			if (RESULT_OK != ret) {
+				printf("Write %s to partition %s fail(%d)\n", file_name, part_name, ret);
+				break;
+			}
+			time_start_flash = get_timer(time_start_flash);
+			printf("finish image %s flash, consume %lld ms\n", file_name, time_start_flash);
+		} else if (fdev->parts_info[i].volume_images_count > 0) {
+			for (j = 0; j < fdev->parts_info[i].volume_images_count; ++j) {
+				const char *volume_name = fdev->parts_info[i].volume_images[j].name;
+				char *volume_file_name = fdev->parts_info[i].volume_images[j].file_name;
+
+				printf("\n\nFlashing volume %s with file %s\n", volume_name, volume_file_name);
+				ret = flash_volume_from_file(cmdtp, fdev, volume_name, volume_file_name, part_name, &partition_offset);
+				if (ret != RESULT_OK) {
+					printf("Failed to flash volume %s from file %s\n", volume_name, volume_file_name);
+					break;
 				}
 
-				free(split_file_name);				
+				time_start_flash = get_timer(time_start_flash);
+				printf("finish image %s flash, consume %lld ms\n", file_name, time_start_flash);
 			}
-		else
-			ret = load_and_flash_file(cmdtp, fdev, file_name, part_name, &partition_offset);
-
-		if (RESULT_OK != ret) {
-			printf("Write %s to partition %s fail(%d)\n", file_name, part_name, ret);
-			break;
 		}
 
-		time_start_flash = get_timer(time_start_flash);
-		printf("finish image %s flash, consume %lld ms\n", file_name, time_start_flash);
 	}
 
 	return ret;
@@ -760,7 +907,7 @@ static int parse_flash_config(struct flash_dev *fdev)
 	}
 
 	/*set partition to env*/
-	if (_update_partinfo_to_env(load_addr, 0, fdev)){
+	if (_clear_env_part(load_addr, 0, fdev)){
 		printf("update part info to env fail\n");
 		return -1;
 	}
@@ -802,7 +949,6 @@ static int perform_flash_operations(struct cmd_tbl *cmdtp, struct flash_dev *fde
 	switch(boot_mode){
 #ifdef CONFIG_FASTBOOT_SUPPORT_BLOCK_DEV_NAME
 	case BOOT_MODE_NOR:
-	case BOOT_MODE_NAND:
 		/*nvme devices need scan at first*/
 		if (!strncmp("nvme", CONFIG_FASTBOOT_SUPPORT_BLOCK_DEV_NAME, 4)){
 			run_command("nvme scan", 0);
@@ -822,6 +968,13 @@ static int perform_flash_operations(struct cmd_tbl *cmdtp, struct flash_dev *fde
 		break;
 #endif //CONFIG_FASTBOOT_SUPPORT_BLOCK_DEV_NAME
 
+	case BOOT_MODE_NAND:
+		if (flash_image(cmdtp, fdev)) {
+			return RESULT_FAIL;
+		}
+
+		break;
+
 	case BOOT_MODE_EMMC:
 	case BOOT_MODE_SD:
 #ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV
@@ -847,8 +1000,7 @@ static int perform_flash_operations(struct cmd_tbl *cmdtp, struct flash_dev *fde
 	return RESULT_OK;
 }
 
-
-void get_mtd_partition_file(char *file_name)
+void get_mtd_partition_file(struct flash_dev *fdev)
 {
 	char tmp_file[30] = {"\0"};
 
@@ -864,15 +1016,21 @@ void get_mtd_partition_file(char *file_name)
 			if (!mtd_is_partition(mtd)) {
 				if (mtd->size / 0x40000000){
 					sprintf(tmp_file, "partition_%lldG.json", mtd->size / 0x40000000);
+					fdev->mtdinfo.size_type = MTD_SIZE_G;
+					fdev->mtdinfo.size = mtd->size / 0x40000000;
 				} else if (mtd->size / 0x100000){
 					sprintf(tmp_file, "partition_%lldM.json", mtd->size / 0x100000);
+					fdev->mtdinfo.size_type = MTD_SIZE_M;
+					fdev->mtdinfo.size = mtd->size / 0x100000;
 				} else if (mtd->size / 0x400){
 					sprintf(tmp_file, "partition_%lldK.json", mtd->size / 0x400);
+					fdev->mtdinfo.size_type = MTD_SIZE_K;
+					fdev->mtdinfo.size = mtd->size / 0x400;
 				}
 			}
 		}
-		printf("get mtd partition file name:%s, \n", tmp_file);
-		strcpy(file_name, tmp_file);
+		pr_info("get mtd partition file name:%s, \n", tmp_file);
+		strcpy(fdev->partition_file_name, tmp_file);
 		return;
 #endif
 	default:
@@ -900,10 +1058,11 @@ void get_blk_partition_file(char *file_name)
 
 		dev_desc = blk_get_devnum_by_typename(blk_name, blk_index);
 		if (dev_desc != NULL)
-			strcpy(file_name, "partition_universal.json");
+			strcpy(file_name, FLASH_CONFIG_FILE_NAME);
 		return;
 #endif //CONFIG_FASTBOOT_SUPPORT_BLOCK_DEV_NAME
-
+	case BOOT_MODE_NAND:
+		return;
 	case BOOT_MODE_EMMC:
 	case BOOT_MODE_SD:
 #ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV
@@ -911,7 +1070,7 @@ void get_blk_partition_file(char *file_name)
 		blk_index = CONFIG_FASTBOOT_FLASH_MMC_DEV;
 		dev_desc = blk_get_devnum_by_typename(blk_name, blk_index);
 		if (dev_desc != NULL)
-			strcpy(file_name, "partition_universal.json");
+			strcpy(file_name, FLASH_CONFIG_FILE_NAME);
 		return;
 #endif //CONFIG_FASTBOOT_FLASH_MMC_DEV
 
@@ -941,21 +1100,21 @@ static int do_flash_image(struct cmd_tbl *cmdtp, int flag, int argc, char *const
 		printf("can not malloc fdev->mtd_table\n");
 
 	memset(fdev, 0, sizeof(struct flash_dev));
-	memset(fdev->mtd_partition_file, '\0', sizeof(fdev->mtd_partition_file));
+	memset(fdev->partition_file_name, '\0', sizeof(fdev->partition_file_name));
 
 	/*start flash*/
 	unsigned long time_start_flash = get_timer(0);
 
-	get_mtd_partition_file(fdev->mtd_partition_file);
-	if (strlen(fdev->mtd_partition_file) > 0){
+	get_mtd_partition_file(fdev);
+	if (strlen(fdev->partition_file_name) > 0){
 		/*flash image to mtd dev*/
-		printf("partition file:%s\n", fdev->mtd_partition_file);
+		printf("partition file:%s\n", fdev->partition_file_name);
 
 		/*only one write method.*/
 		fdev->mtd_write = mtd_write_raw_image;
 		fdev->blk_write = NULL;
 
-		/*Load flash_config.cfg file*/
+		/*Load partitino.json file*/
 		int result = load_recovery_file(cmdtp, fdev, argc, argv);
 		if (result != RESULT_OK) {
 			recovery_show_result(fdev, RESULT_FAIL);
@@ -977,11 +1136,11 @@ static int do_flash_image(struct cmd_tbl *cmdtp, int flag, int argc, char *const
 		}
 	}
 
-	memset(fdev->mtd_partition_file, '\0', sizeof(fdev->mtd_partition_file));
-	get_blk_partition_file(fdev->mtd_partition_file);
-	if (strlen(fdev->mtd_partition_file) > 0){
+	memset(fdev->partition_file_name, '\0', sizeof(fdev->partition_file_name));
+	get_blk_partition_file(fdev->partition_file_name);
+	if (strlen(fdev->partition_file_name) > 0){
 		/*flash image to blk dev*/
-		printf("partition file:%s\n", fdev->mtd_partition_file);
+		printf("partition file:%s\n", fdev->partition_file_name);
 
 		/*clear parts infomation*/
 		for (int i = 0; i < MAX_PARTITION_NUM; i++){
@@ -998,7 +1157,7 @@ static int do_flash_image(struct cmd_tbl *cmdtp, int flag, int argc, char *const
 		fdev->mtd_write = NULL;
 		fdev->blk_write = blk_write_raw_image;
 
-		/*Load flash_config.cfg file*/
+		/*Load partition.json file*/
 		int result = load_recovery_file(cmdtp, fdev, argc, argv);
 		if (result != RESULT_OK) {
 			recovery_show_result(fdev, RESULT_FAIL);
@@ -1027,7 +1186,7 @@ static int do_flash_image(struct cmd_tbl *cmdtp, int flag, int argc, char *const
 }
 
 U_BOOT_CMD(
-	spacemit_flashing, 2, 1, do_flash_image,
+	flash_image, 2, 1, do_flash_image,
 	"flash image from specified source",
 	"<source>\n"
 	"    - <source>: mmc | usb | net\n"

common/spl/spl_fit.c

@@ -545,7 +545,7 @@ static void *spl_get_fit_load_buffer(size_t size)
 {
 	void *buf;
 
-	buf = malloc(size);
+	buf = memalign(ARCH_DMA_MINALIGN, size);
 	if (!buf) {
 		pr_err("Could not get FIT buffer of %lu bytes\n", (ulong)size);
 		pr_err("\tcheck CONFIG_SYS_SPL_MALLOC_SIZE\n");

common/spl/spl_mtd.c

@@ -30,7 +30,7 @@ static bool mtd_is_aligned_with_block_size(struct mtd_info *mtd, u64 size)
 	return !do_div(size, mtd->erasesize);
 }
 
-static int spl_mtd_read(struct mtd_info *mtd, ulong sector, ulong count, void *buf)
+int spl_mtd_read(struct mtd_info *mtd, ulong sector, ulong count, void *buf)
 {
 	bool read, raw, woob, has_pages = false;
 	u64 start_off, off, len, remaining;

configs/k1_defconfig

@@ -1,21 +1,21 @@
 CONFIG_RISCV=y
 CONFIG_SYS_TEXT_BASE=0x00200000
-CONFIG_SYS_MALLOC_LEN=0x800000
+CONFIG_SYS_MALLOC_LEN=0x1000000
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_ENV_SIZE=0x4000
-CONFIG_ENV_OFFSET=0x80000
+CONFIG_ENV_OFFSET=0x60000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_DM_SPI=y
 CONFIG_DEFAULT_DEVICE_TREE="k1-x_spl"
 CONFIG_SPL_TEXT_BASE=0xC0801000
 CONFIG_SPL_MMC=y
 CONFIG_SPL_DRIVERS_MISC=y
-CONFIG_SPL_SIZE_LIMIT=0x33000
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x6000
+CONFIG_SPL_SIZE_LIMIT=0x34F00
 CONFIG_SPL=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI=y
 CONFIG_SYS_LOAD_ADDR=0x200000
-CONFIG_ENV_ADDR=0x80000
 # CONFIG_AHCI is not set
 CONFIG_TARGET_SPACEMIT_K1X=y
 CONFIG_SPL_OPENSBI_LOAD_ADDR=0x0
@@ -30,7 +30,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000000
 CONFIG_STACK_SIZE=0x100000
 CONFIG_FIT=y
 CONFIG_SPL_FIT_SIGNATURE=y
-CONFIG_SPL_LOAD_FIT_ADDRESS=0x40000000
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x20000000
 # CONFIG_BOOTSTD is not set
 CONFIG_LEGACY_IMAGE_FORMAT=y
 CONFIG_SUPPORT_RAW_INITRD=y
@@ -38,7 +38,9 @@ CONFIG_BOOTDELAY=0
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_STOP_STR="s"
 CONFIG_USE_BOOTCOMMAND=y
-CONFIG_BOOTCOMMAND="bootm 0x40000000"
+CONFIG_BOOTCOMMAND="bootm 0x20000000"
+CONFIG_LOGLEVEL=7
+CONFIG_SPL_LOGLEVEL=1
 # CONFIG_SYS_DEVICE_NULLDEV is not set
 CONFIG_DISPLAY_CPUINFO=y
 CONFIG_DISPLAY_BOARDINFO=y
@@ -58,7 +60,6 @@ CONFIG_SYS_SPL_MALLOC_SIZE=0x2000000
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
-CONFIG_SPL_MMC_TINY=y
 CONFIG_SPL_MTD_SUPPORT=y
 CONFIG_SPL_DM_SPI_FLASH=y
 CONFIG_SPL_DM_RESET=y
@@ -81,6 +82,7 @@ CONFIG_SYS_PBSIZE=276
 CONFIG_CMD_TLV_EEPROM=y
 CONFIG_SYS_BOOTM_LEN=0xa000000
 CONFIG_CMD_EEPROM=y
+CONFIG_CMD_CLK=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPIO_READ=y
 CONFIG_CMD_GPT=y
@@ -93,17 +95,30 @@ CONFIG_CMD_PART=y
 # CONFIG_CMD_SCSI is not set
 CONFIG_CMD_USB=y
 CONFIG_CMD_DHCP=y
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_TFTPSRV=y
 CONFIG_SYS_DISABLE_AUTOLOAD=y
 CONFIG_CMD_PXE=y
 CONFIG_CMD_BMP=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_GETTIME=y
+CONFIG_CMD_TIMER=y
 CONFIG_CMD_SYSBOOT=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_SQUASHFS=y
+CONFIG_CMD_JFFS2=y
+CONFIG_JFFS2_MTDPARTS=y
+CONFIG_JFFS2_PART_OFFSET=0x700000
+CONFIG_JFFS2_PART_SIZE=0x100000
 CONFIG_CMD_MTDPARTS=y
 CONFIG_CMD_MTDPARTS_SPREAD=y
 CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES=y
-CONFIG_MTDIDS_DEFAULT="nor0=spi-nor,spi-nand0=spi-nand"
-CONFIG_MTDPARTS_DEFAULT="spi-nor:384K@640K(opensbi),2M@1M(uboot);spi-nand:384K@640K(opensbi),2M@1M(uboot)"
+CONFIG_MTDIDS_DEFAULT="nor0=spi-nor"
+CONFIG_MTDPARTS_DEFAULT="spi-nor:64K@0(bootinfo),64K@64K(private),256K@128K(fsbl),64K@384K(env),192K@448K(opensbi),-@640K(uboot)"
+CONFIG_CMD_UBI=y
 CONFIG_SPACEMIT_FLASH=y
 CONFIG_SPL_FASTBOOT=y
+CONFIG_ENABLE_SET_NUM_PART_SEARCH=y
 CONFIG_PARTITION_TYPE_GUID=y
 CONFIG_MULTI_DTB_FIT=y
 CONFIG_ENV_OVERWRITE=y
@@ -127,7 +142,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y
 CONFIG_DMA=y
 CONFIG_DMA_CHANNELS=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_FASTBOOT_BUF_ADDR=0x40000000
+CONFIG_FASTBOOT_BUF_ADDR=0x20000000
 CONFIG_FASTBOOT_BUF_SIZE=0x10000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_MULTI_FLASH_OPTION=y
@@ -156,15 +171,19 @@ CONFIG_SPL_SPACEMIT_K1X_EFUSE=y
 CONFIG_MMC=y
 CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_MMC_HS400_ES_SUPPORT=y
+CONFIG_SPL_MMC_HS400_ES_SUPPORT=y
 CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_SPL_MMC_HS400_SUPPORT=y
 # CONFIG_MMC_VERBOSE is not set
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ADMA=y
+CONFIG_SPL_MMC_SDHCI_ADMA=y
 CONFIG_MMC_SDHCI_K1X=y
 CONFIG_DM_MTD=y
 # CONFIG_MTD_NOR_FLASH is not set
 CONFIG_MTD_SPI_NAND=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPINOR_BLOCK_SUPPORT=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_SPI_FLASH_MTD=y
 CONFIG_PHY_REALTEK=y
@@ -204,6 +223,7 @@ CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GENERIC=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
+CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_VENDOR_NUM=0x361C
 CONFIG_USB_GADGET_PRODUCT_NUM=0x1001
@@ -222,8 +242,12 @@ CONFIG_BMP_24BPP=y
 CONFIG_BMP_32BPP=y
 CONFIG_VIDEO_SPACEMIT=y
 CONFIG_DISPLAY_SPACEMIT_HDMI=y
+CONFIG_JFFS2_NOR=y
+CONFIG_JFFS2_USE_MTD_READ=y
+CONFIG_UBIFS_SILENCE_MSG=y
 CONFIG_IMAGE_SPARSE_TRANSFER_BLK_NUM=0x3000
 # CONFIG_SPL_USE_TINY_PRINTF is not set
 # CONFIG_RSA is not set
 # CONFIG_SPL_SHA1 is not set
 # CONFIG_SPL_SHA256 is not set
+CONFIG_ZSTD=y

debian/.gitignore

@@ -0,0 +1 @@
+changelog

debian/control

@@ -0,0 +1,39 @@
+Source: u-boot-spacemit
+Section: admin
+Priority: optional
+Maintainer: 李伟智  <weizhi.li@spacemit.com>
+Build-Depends: bc,
+ bison,
+ debhelper-compat (= 13),
+ flex,
+ libpython3-dev:native [linux-any],
+ libssl-dev,
+ python3:any [linux-any],
+ python3-pyelftools [linux-any],
+ python3-setuptools [linux-any],
+ swig [linux-any],
+ device-tree-compiler,
+ hart-payload-generator [riscv64],
+ libgnutls28-dev,
+ libncurses-dev,
+ libncurses-dev:native,
+ libssl-dev:native,
+ opensbi (>= 1.0-2~) [riscv64],
+ uuid-dev,
+Rules-Requires-Root: no
+Standards-Version: 4.6.2
+Homepage: https://www.denx.de/wiki/U-Boot/
+Vcs-Browser: https://salsa.debian.org/debian/u-boot
+Vcs-Git: https://salsa.debian.org/debian/u-boot.git
+
+Package: u-boot-spacemit
+Architecture: all
+Multi-Arch: foreign
+Depends: ${misc:Depends}
+Built-Using: ${u-boot-spacemit:Built-Using}
+Description: A boot loader for SpacemiT systems
+ Das U-Boot is a cross-platform bootloader for embedded systems,
+ used as the default boot loader by several board vendors.  It is
+ intended to be easy to port and to debug, and runs on many
+ supported architectures, including PPC, ARM, MIPS, x86, m68k,
+ NIOS, and Microblaze.

debian/copyright

@@ -0,0 +1,369 @@
+Format: https://www.debian.org/doc/packaging-manuals/copyright-format/1.0/
+Upstream-Name: Das U-Boot
+Source: https://www.denx.de/wiki/U-Boot
+Files-Excluded:
+  drivers/dma/MCD_tasks.c
+
+Files: *
+Copyright: 2000-2013 Wolfgang Denk <wd@denx.de>
+ 1995-2002 Russell King
+ 1996-1998 Russell King
+ 1996-1999 Russell King
+ 1996-2000 Russell King
+ 1996 Russell King
+ 1997-1999 Russell King
+ 1999-2002 Vojtech Pavlik
+ 1999 Linus Torvalds / 2000-2002 Transmeta Corporation
+ 1999 Russell King
+ 2000-2002 Russell King
+ 2000-2010 David Woodhouse <dwmw2@infradead.org>
+ 2000 Steven J. Hill (sjhill@realitydiluted.com)
+ 2001, 2002, 2003 / 2004 Gary Jennejohn garyj@denx.de
+ 2002-2007 Aleph One Ltd
+ 2002-2011 Aleph One Ltd
+ 2002 Thomas Gleixner (tglx@linutronix.de)
+ 2003 Kai-Uwe Bloem / 2000-2002 Transmeta Corporation / 1999 Linus Torvalds
+ 2004 by David Brownell
+ 2004 Nokia Corporation
+ 2004 Thomas Gleixner (tglx@linutronix.de)
+ 2005-2006 by Texas Instruments
+ 2005-2006 by Texas Instruments / 2005 Mentor Graphics Corporation / 2006-2007 Nokia Corporation
+ 2005-2007 Samsung Electronics
+ 2005-2007 Samsung Electronics / Samsung Electronics, 2009 / Nokia Corporation, 2007
+ 2005-2008 Samsung Electronics
+ 2005 Mentor Graphics Corporation / 2005-2006 by Texas Instruments / 2006-2007 Nokia Corporation
+ 2005 Mentor Graphics Corporation / 2005-2006 by Texas Instruments / 2008-2009 MontaVista Software, Inc. <source@mvista.com> / 2006-2007 Nokia Corporation
+ 2005, Seagate Technology LLC / 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering
+ 2006-2007 Nokia Corporation / 2005-2006 by Texas Instruments / 2005 Mentor Graphics Corporation
+ 2006-2007 Nokia Corporation / 2005 Mentor Graphics Corporation / 2005-2006 by Texas Instruments
+ 2006-2007 Nokia Corporation / 2005 Mentor Graphics Corporation / 2005-2006 by Texas Instruments / 2008-2009 MontaVista Software, Inc. <source@mvista.com>
+ 2006, 2007 University of Szeged, Hungary / 2006-2008 Nokia Corporation
+ 2006-2008 Nokia Corporation
+ 2006,2009 Freescale Semiconductor, Inc
+ 2006-2009 Solarflare Communications Inc
+ 2006 Freescale Semiconductor, Inc
+ 2006 Nokia Corporation / 2005-2007 by Texas Instruments
+ 2006 Pavel Pisa, PiKRON <ppisa@pikron.com> / 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de> / 2009 Ilya Yanok, <yanok@emcraft.com>
+ 2006 Thomas Gleixner <tglx@linutronix.de>
+ 2007-2011 Freescale Semiconductor, Inc
+ 2007 Freescale Semiconductor, Inc
+ 2008-2009 / 2006-2008 Nokia Corporation
+ 2008-2009 Freescale Semiconductor, Inc
+ 2008-2009, MontaVista Software, Inc. <source@mvista.com> / 2010, by Texas Instruments
+ 2008,2009 STMicroelectronics / 2010 Joakim Axelsson <joakim.axelsson AT stericsson.com> / 2009 Alessandro Rubini <rubini@unipv.it>
+ 2008-2010 / 2006-2008 Nokia Corporation
+ 2008-2011 Freescale Semiconductor, Inc
+ 2008, 2011 Freescale Semiconductor, Inc
+ 2008,2011 Freescale Semiconductor, Inc
+ 2008-2012 Freescale Semiconductor, Inc
+ 2008 Altera Corporation / 2010 Thomas Chou <thomas@wytron.com.tw>
+ 2008 Atmel Corporation / 2013 Jagannadha Sutradharudu Teki, Xilinx Inc
+ 2008 by Texas Instruments / 2008 Mentor Graphics Corporation
+ 2008 Dave S.r.l. <www.dave.eu>
+ 2008 Extreme Engineering Solutions, Inc
+ 2008 Freescale Semiconductor, Inc
+ 2008 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> / 2004-2007 ARM Limited
+ 2008 Kim B. Heino / 2009
+ 2008 Qstreams Networks, Inc
+ 2008 Samsung Electronics / 2008-2009 Stefan Roese <sr@denx.de>, DENX Software Engineering
+ 2008 STMicroelectronics / 2010 Joakim Axelsson <joakim.axelsson AT stericsson.com> / 2009 Alessandro Rubini <rubini@unipv.it>
+ 2008 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+ 2009-2010 eXMeritus, A Boeing Company / 2008-2009 Freescale Semiconductor, Inc
+ 2009-2010 Freescale Semiconductor, Inc
+ 2009-2010 Texas Instruments, Inc
+ 2009-2011 Freescale Semiconductor, Inc
+ 2009 coresystems GmbH
+ 2009 Freescale Semiconductor, Inc
+ 2009 Micrel Inc / 2011 Bticino s.p.a, Roberto Cerati <roberto.cerati@bticino.it>
+ 2009 MontaVista Software, Inc. <source@mvista.com> / 2006-2007 Nokia Corporation / 2005-2006 by Texas Instruments / 2005 Mentor Graphics Corporation
+ 2010-2011 Freescale Semiconductor, Inc
+ 2010-2011 NVIDIA Corporation
+ 2010-2012 NVIDIA Corporation
+ 2010-2013 NVIDIA Corporation
+ 2010 Broadcom / 2012 Oleksandr Tymoshenko / 2012 Stephen Warren
+ 2010 NISHIMOTO Hiroki / 2010 Renesas Solutions Corp
+ 2010 Thomas Chou <thomas@wytron.com.tw>
+ 2010, Thomas Chou <thomas@wytron.com.tw>
+ 2010 Thomas Chou <thomas@wytron.com.tw> / 2008-2009 Avionic Design GmbH / 2007-2008 Avionic Design Development GmbH
+ 2010 Thomas Chou <thomas@wytron.com.tw> / 2008 Altera Corporation
+ 2011-2012 Renesas Solutions Corp
+ 2011 - 2012 Samsung Electronics / 2003-2006, Cluster File Systems, Inc, info@clusterfs.com
+ 2011 Analog Devices Inc
+ 2011 Freescale Semiconductor, Inc
+ 2011 Infineon Technologies
+ 2011 Ivan Djelic <ivan.djelic@parrot.com>
+ 2011 Macpaul Lin (macpaul@andestech.com) / 2011 Andes Technology Corporation / 1995-2002 Russell King / 2010 Shawn Lin (nobuhiro@andestech.com)
+ 2011 Macpaul Lin (macpaul@andestech.com) / 2011 Andes Technology Corporation / 1996-1998 Russell King / 2010 Shawn Lin (nobuhiro@andestech.com)
+ 2011 Macpaul Lin (macpaul@andestech.com) / 2011 Andes Technology Corporation / 2010 Shawn Lin (nobuhiro@andestech.com)
+ 2011 Maxim Integrated Products
+ 2011 Parrot S.A
+ 2011 Renesas Solutions Corp
+ 2011 Renesas Solutions Corp / 2011 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+ 2011 The ChromiumOS Authors. All rights reserved
+ 2012-2013 Stephen Warren
+ 2012, by Texas Instruments
+ 2012, Google Inc
+ 2012 Renesas Solutions Corp
+ 2012 Samsung Electronics Co., Ltd
+ 2012 Stephen Warren
+ 2012 Texas Instruments Incorporated - http://www.ti.com/
+ 2013 Synopsys, Inc. (www.synopsys.com)
+License: GPL-2
+
+Files: 
+ drivers/tpm/tpm_atmel_twi.c
+ drivers/gpio/tca642x.c
+ include/splash.h
+ include/linux/libfdt.h
+ include/configs/mxs.h
+ include/tca642x.h
+ board/gdsys/common/dp501.h
+ common/splash.c
+ fs/jffs2/compr_lzo.c
+ arch/arm/include/asm/arch-am33xx/hardware_ti816x.h
+ arch/arm/mach-exynos/dmc_init_exynos4.c
+ arch/arm/mach-exynos/lowlevel_init.c
+ arch/arm/mach-exynos/clock_init_exynos4.c
+ arch/arm/mach-exynos/common_setup.h
+ arch/arm/mach-omap2/am33xx/clock_ti816x.c
+Copyright: 
+  2013 Texas Instruments, Inc
+  2013, Boundary Devices <info@boundarydevices.com>
+  2006 David Gibson, IBM Corporation 
+  2012 Kim Phillips, Freescale Semiconductor
+  2010-2013 Freescale Semiconductor, Inc
+  2013 Marek Vasut <marex@denx.de>
+  2010-2011 Freescale Semiconductor, Inc
+  2004 Patrik Kluba
+  1996-2002 Markus Franz Xaver Johannes Oberhumer
+  2013 NVIDIA Corporation
+  2011 The Chromium OS Authors
+  2013 Samsung Electronics
+  2013, Adeneo Embedded <www.adeneo-embedded.com> 
+  2009, Texas Instruments, Incorporated
+License: GPL-2+
+
+Files: debian/*
+Copyright: Clint Adams <clint@debian.org>
+ Joey Hess <joeyh@debian.org>
+ Marc Singer <elf@debian.org>
+ Per Andersson <avtobiff@gmail.com>
+ Vagrant Cascadian <vagrant@debian.org>
+ Loïc Minier <lool@debian.org>
+ Adam Borowski <kilobyte@angband.pl>
+License: GPL-2+
+
+Files: fs/yaffs2/yaffs_allocator.h
+ fs/yaffs2/yaffs_verify.h
+ fs/yaffs2/yaffs_packedtags1.h
+ fs/yaffs2/yaffs_yaffs1.h
+ fs/yaffs2/ydirectenv.h
+ fs/yaffs2/yaffs_yaffs2.h
+ fs/yaffs2/yaffsfs.h
+ fs/yaffs2/yaffs_osglue.h
+ fs/yaffs2/yaffs_flashif.h
+ fs/yaffs2/yaffs_nand.h
+ fs/yaffs2/yportenv.h
+ fs/yaffs2/yaffs_packedtags2.h
+ fs/yaffs2/yaffs_attribs.h
+ fs/yaffs2/yaffs_ecc.h
+ fs/yaffs2/yaffs_trace.h
+ fs/yaffs2/yaffs_guts.h
+ fs/yaffs2/yaffs_getblockinfo.h
+ fs/yaffs2/yaffs_bitmap.h
+ fs/yaffs2/yaffs_nameval.h
+ fs/yaffs2/yaffscfg.h
+ fs/yaffs2/yaffs_nandemul2k.h
+ fs/yaffs2/yaffs_mtdif2.h
+ fs/yaffs2/yaffs_flashif2.h
+ fs/yaffs2/yaffs_checkptrw.h
+ fs/yaffs2/yaffs_tagscompat.h
+ fs/yaffs2/yaffs_nandif.h
+ fs/yaffs2/yaffs_summary.h
+ fs/yaffs2/yaffs_mtdif.h
+Copyright: Copyright (C) 2002-2011 Aleph One Ltd.
+License: LGPL-2.1
+
+Files: lib/sha1.c
+Copyright: Copyright (C) 2003-2006  Christophe Devine
+License: LGPL-2.1
+
+Files: include/bzlib.h
+ lib/bzip2/*
+Copyright: Copyright (C) 1996-2002 Julian R Seward.  All rights reserved.
+License: bzlib-BSD-3
+
+Files: drivers/usb/musb-new/musb_host.h
+ drivers/usb/musb-new/musb_core.h
+ drivers/usb/musb-new/musb_core.c
+ drivers/usb/musb-new/musb_gadget.c
+ drivers/usb/musb-new/musb_gadget.h
+ drivers/usb/musb-new/musb_dma.h
+ drivers/usb/musb-new/musb_regs.h
+ drivers/usb/musb-new/musb_debug.h
+ drivers/usb/musb-new/musb_host.c
+ drivers/usb/musb-new/musb_gadget_ep0.c
+ drivers/usb/musb-new/musb_io.h
+Copyright: Copyright 2005 Mentor Graphics Corporation
+ Copyright (C) 2005-2006 by Texas Instruments
+ Copyright (C) 2006-2007 Nokia Corporation
+ Copyright (C) 2008-2009 MontaVista Software, Inc. <source@mvista.com>
+License: GPL-2
+
+Files: net/dns.c
+ include/slre.h
+ lib/slre.c
+Copyright: 2008 Pieter Voorthuijsen <pieter.voorthuijsen@prodrive.nl>
+ 2004-2005 Sergey Lyubka <valenok@gmail.com>
+ 2009 Robin Getz <rgetz@blackfin.uclinux.org>]
+License: Beerware
+
+Files: scripts/dtc/libfdt/*
+Copyright: 2006 David Gibson, IBM Corporation
+ 2012 Kim Phillips, Freescale Semiconductor
+License: libfdt-BSD-GPL
+
+License: libfdt-BSD-GPL
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+License: Beerware
+ "THE BEER-WARE LICENSE" (Revision 42):
+ Sergey Lyubka wrote this file.  As long as you retain this notice you
+ can do whatever you want with this stuff. If we meet some day, and you think
+ this stuff is worth it, you can buy me a beer in return.
+
+License: GPL-2
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License
+ version 2 as published by the Free Software Foundation.
+ .
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ .
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ 02110-1301 USA
+ .
+ On Debian systems, the full text of the GNU General Public
+ License version 2 can be found in the file
+ `/usr/share/common-licenses/GPL-2'.
+
+License: bzlib-BSD-3
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions
+  are met:
+  .
+  1. Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+  .
+  2. The origin of this software must not be misrepresented; you must
+     not claim that you wrote the original software.  If you use this
+     software in a product, an acknowledgment in the product
+     documentation would be appreciated but is not required.
+  .
+  3. Altered source versions must be plainly marked as such, and must
+     not be misrepresented as being the original software.
+  .
+  4. The name of the author may not be used to endorse or promote
+     products derived from this software without specific prior written
+     permission.
+  .
+  THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+  OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+  WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+  ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+  DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+  GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+  WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+License: GPL-2+
+ This program is free software; you can redistribute it
+ and/or modify it under the terms of the GNU General Public
+ License as published by the Free Software Foundation; either
+ version 2 of the License, or (at your option) any later
+ version.
+ .
+ This program is distributed in the hope that it will be
+ useful, but WITHOUT ANY WARRANTY; without even the implied
+ warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
+ PURPOSE.  See the GNU General Public License for more
+ details.
+ .
+ You should have received a copy of the GNU General Public
+ License along with this package; if not, write to the Free
+ Software Foundation, Inc., 51 Franklin St, Fifth Floor,
+ Boston, MA  02110-1301 USA
+ .
+ On Debian systems, the full text of the GNU General Public
+ License version 2 can be found in the file
+ `/usr/share/common-licenses/GPL-2'.
+
+License: LGPL-2.1
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU Lesser General Public License version 2.1 as
+ published by the Free Software Foundation.
+ .
+ This library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ Lesser General Public License for more details.
+ . 
+ You should have received a copy of the GNU Lesser General Public
+ License along with this library; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ MA  02110-1301  USA
+ .
+ On Debian systems, the full text of the GNU General Public
+ License version 2 can be found in the file
+ `/usr/share/common-licenses/LGPL-2.1'.

debian/env_k1-x.txt

@@ -0,0 +1,10 @@
+# Common parameter
+console=ttyS0,115200
+init=/init
+bootdelay=0
+baudrate=115200
+loglevel=8
+
+knl_name=vmlinuz-6.1.15
+ramdisk_name=initrd.img-6.1.15
+dtb_dir=spacemit

debian/rules

@@ -0,0 +1,13 @@
+#!/usr/bin/make -f
+# Always set CROSS_COMPILE, which also works for native builds.
+export CROSS_COMPILE=riscv64-unknown-linux-gnu-
+export ARCH=riscv
+%:
+	dh $@
+
+override_dh_auto_build:
+	make k1_defconfig
+	make -j$(nproc)
+	cp -f u-boot-env-default.bin env.bin
+
+override_dh_auto_test-indep:

debian/source/format

@@ -0,0 +1 @@
+3.0 (quilt)

debian/u-boot-spacemit.install

@@ -0,0 +1,6 @@
+u-boot.itb usr/lib/u-boot/spacemit
+FSBL.bin usr/lib/u-boot/spacemit
+bootinfo*.bin usr/lib/u-boot/spacemit
+env.bin usr/lib/u-boot/spacemit
+debian/env_k1-x.txt boot
+tools/logos/bianbu.bmp boot

debian/u-boot-spacemit.postinst

@@ -0,0 +1,74 @@
+#!/bin/sh
+set -e
+
+case "$1" in
+configure)
+    target=""
+    if grep -q '^spacemit' /sys/firmware/devicetree/base/model; then
+        target="spacemit"
+    else
+        exit 0
+    fi
+
+    for x in $(cat /proc/cmdline); do
+        case $x in
+        root=*)
+            ROOT=${x#root=}
+            ;;
+        esac
+    done
+
+    if [ -n $ROOT ]; then
+        case $ROOT in
+        "/dev/mmcblk0"*)
+            BOOTINFO_FILE=bootinfo_sd.bin
+            BOOTINFO=/dev/mmcblk0
+            FSBL=/dev/mmcblk0p1
+            FSBL_SEEK=0
+            ENV=/dev/mmcblk0p2
+            UBOOT=/dev/mmcblk0p4
+            ;;
+        "/dev/mmcblk2"*)
+            BOOTINFO_FILE=bootinfo_emmc.bin
+            BOOTINFO=/dev/mmcblk2boot0
+            FSBL=/dev/mmcblk2boot0
+            FSBL_SEEK=512
+            ENV=/dev/mmcblk2p2
+            UBOOT=/dev/mmcblk2p4
+            if [ -e $BOOTINFO ]; then
+                echo 0 | tee /sys/block/mmcblk2boot0/force_ro
+            else
+                exit 0
+            fi
+            ;;
+        *)
+            echo "Unsupported root=$ROOT"
+            exit 0
+            ;;
+        esac
+    else
+        echo "Missing root= in cmdline"
+        exit 0
+    fi
+
+    BIN_DIR="/usr/lib/u-boot/$target"
+    # 待检查文件/分区列表
+    files="${BIN_DIR}/${BOOTINFO_FILE} ${BIN_DIR}/FSBL.bin ${BIN_DIR}/env.bin ${BIN_DIR}/u-boot.itb $BOOTINFO $FSBL $ENV $UBOOT"
+    for file in $files; do
+        if [ ! -e "$file" ]; then
+            # 任意不存在则退出
+            echo "Missing $file"
+            exit 0
+        fi
+    done
+
+    # 此前已经做了所有检查
+    dd if=/usr/lib/u-boot/$target/$BOOTINFO_FILE of=$BOOTINFO && sync
+    dd if=/usr/lib/u-boot/$target/FSBL.bin of=$FSBL seek=$FSBL_SEEK bs=1 && sync
+    dd if=/usr/lib/u-boot/$target/env.bin of=$ENV bs=1 && sync
+    dd if=/usr/lib/u-boot/$target/u-boot.itb of=$UBOOT bs=1M && sync
+
+    ;;
+esac
+
+exit 0

disk/Kconfig

@@ -89,6 +89,27 @@ config SPL_AMIGA_PARTITION
 	default y if AMIGA_PARTITION
 	select SPL_PARTITIONS
 
+config ENABLE_SET_NUM_PART_SEARCH
+	bool "Enable custom maximum partition search limit"
+	default n
+	help
+	  Enable this to specify a custom maximum number of partitions
+	  that U-Boot will search on a block device. Disabling this
+	  will use the default maximum search limit.
+
+config MAX_SEARCH_PARTITIONS
+	int "Maximum number of partitions to search"
+	depends on ENABLE_SET_NUM_PART_SEARCH
+	default 16
+	help
+	  Specifies the maximum number of partitions that U-Boot will
+	  search on a block device when ENABLE_MAX_PART_SEARCH is enabled.
+	  Reducing this number can speed up the boot process by limiting
+	  the number of partitions that U-Boot scans during boot. The
+	  maximum supported value is 128.
+
+	  If unsure, leave at the default value of 16.
+
 config EFI_PARTITION
 	bool "Enable EFI GPT partition table"
 	default y if DISTRO_DEFAULTS

disk/part.c

@@ -125,13 +125,13 @@ void dev_print (struct blk_desc *dev_desc)
 	lba512_t lba512; /* number of blocks if 512bytes block size */
 
 	if (dev_desc->type == DEV_TYPE_UNKNOWN) {
-		puts ("not available\n");
+		pr_crit ("not available\n");
 		return;
 	}
 
 	switch (dev_desc->if_type) {
 	case IF_TYPE_SCSI:
-		PRINTF ("(%d:%d) Vendor: %s Prod.: %s Rev: %s\n",
+		pr_crit ("(%d:%d) Vendor: %s Prod.: %s Rev: %s\n",
 			dev_desc->target,dev_desc->lun,
 			dev_desc->vendor,
 			dev_desc->product,
@@ -140,7 +140,7 @@ void dev_print (struct blk_desc *dev_desc)
 	case IF_TYPE_ATAPI:
 	case IF_TYPE_IDE:
 	case IF_TYPE_SATA:
-		PRINTF ("Model: %s Firm: %s Ser#: %s\n",
+		pr_crit ("Model: %s Firm: %s Ser#: %s\n",
 			dev_desc->vendor,
 			dev_desc->revision,
 			dev_desc->product);
@@ -151,45 +151,45 @@ void dev_print (struct blk_desc *dev_desc)
 	case IF_TYPE_NVME:
 	case IF_TYPE_PVBLOCK:
 	case IF_TYPE_HOST:
-		PRINTF ("Vendor: %s Rev: %s Prod: %s\n",
+		pr_crit ("Vendor: %s Rev: %s Prod: %s\n",
 			dev_desc->vendor,
 			dev_desc->revision,
 			dev_desc->product);
 		break;
 	case IF_TYPE_VIRTIO:
-		PRINTF("%s VirtIO Block Device\n", dev_desc->vendor);
+		pr_crit("%s VirtIO Block Device\n", dev_desc->vendor);
 		break;
 	case IF_TYPE_DOC:
-		puts("device type DOC\n");
+		pr_crit("device type DOC\n");
 		return;
 	case IF_TYPE_UNKNOWN:
-		puts("device type unknown\n");
+		pr_crit("device type unknown\n");
 		return;
 	default:
-		PRINTF("Unhandled device type: %i\n", dev_desc->if_type);
+		pr_crit("Unhandled device type: %i\n", dev_desc->if_type);
 		return;
 	}
-	puts ("            Type: ");
+	pr_crit ("            Type: ");
 	if (dev_desc->removable)
-		puts ("Removable ");
+		pr_crit ("Removable ");
 	switch (dev_desc->type & 0x1F) {
 	case DEV_TYPE_HARDDISK:
-		puts ("Hard Disk");
+		pr_crit ("Hard Disk");
 		break;
 	case DEV_TYPE_CDROM:
-		puts ("CD ROM");
+		pr_crit ("CD ROM");
 		break;
 	case DEV_TYPE_OPDISK:
-		puts ("Optical Device");
+		pr_crit ("Optical Device");
 		break;
 	case DEV_TYPE_TAPE:
-		puts ("Tape");
+		pr_crit ("Tape");
 		break;
 	default:
-		PRINTF ("# %02X #", dev_desc->type & 0x1F);
+		pr_crit ("# %02X #", dev_desc->type & 0x1F);
 		break;
 	}
-	puts ("\n");
+	pr_crit ("\n");
 	if (dev_desc->lba > 0L && dev_desc->blksz > 0L) {
 		ulong mb, mb_quot, mb_rem, gb, gb_quot, gb_rem;
 		lbaint_t lba;
@@ -209,24 +209,24 @@ void dev_print (struct blk_desc *dev_desc)
 		gb_rem	= gb - (10 * gb_quot);
 #ifdef CONFIG_LBA48
 		if (dev_desc->lba48){
-			PRINTF ("            Supports 48-bit addressing\n");
+			pr_crit ("            Supports 48-bit addressing\n");
 		}
 #endif
 #if defined(CONFIG_SYS_64BIT_LBA)
-		PRINTF ("            Capacity: %lu.%lu MB = %lu.%lu GB (%llu x %lu)\n",
+		pr_crit ("            Capacity: %lu.%lu MB = %lu.%lu GB (%llu x %lu)\n",
 			mb_quot, mb_rem,
 			gb_quot, gb_rem,
 			lba,
 			dev_desc->blksz);
 #else
-		PRINTF ("            Capacity: %lu.%lu MB = %lu.%lu GB (%lu x %lu)\n",
+		pr_crit ("            Capacity: %lu.%lu MB = %lu.%lu GB (%lu x %lu)\n",
 			mb_quot, mb_rem,
 			gb_quot, gb_rem,
 			(ulong)lba,
 			dev_desc->blksz);
 #endif
 	} else {
-		puts ("            Capacity: not available\n");
+		pr_crit ("            Capacity: not available\n");
 	}
 }
 #endif
@@ -262,49 +262,49 @@ static void print_part_header(const char *type, struct blk_desc *dev_desc)
 	CONFIG_IS_ENABLED(ISO_PARTITION) || \
 	CONFIG_IS_ENABLED(AMIGA_PARTITION) || \
 	CONFIG_IS_ENABLED(EFI_PARTITION)
-	puts ("\nPartition Map for ");
+	pr_crit ("\nPartition Map for ");
 	switch (dev_desc->if_type) {
 	case IF_TYPE_IDE:
-		puts ("IDE");
+		pr_crit ("IDE");
 		break;
 	case IF_TYPE_SATA:
-		puts ("SATA");
+		pr_crit ("SATA");
 		break;
 	case IF_TYPE_SCSI:
-		puts ("SCSI");
+		pr_crit ("SCSI");
 		break;
 	case IF_TYPE_ATAPI:
-		puts ("ATAPI");
+		pr_crit ("ATAPI");
 		break;
 	case IF_TYPE_USB:
-		puts ("USB");
+		pr_crit ("USB");
 		break;
 	case IF_TYPE_DOC:
-		puts ("DOC");
+		pr_crit ("DOC");
 		break;
 	case IF_TYPE_MMC:
-		puts ("MMC");
+		pr_crit ("MMC");
 		break;
 	case IF_TYPE_HOST:
-		puts ("HOST");
+		pr_crit ("HOST");
 		break;
 	case IF_TYPE_NVME:
-		puts ("NVMe");
+		pr_crit ("NVMe");
 		break;
 	case IF_TYPE_PVBLOCK:
-		puts("PV BLOCK");
+		pr_crit("PV BLOCK");
 		break;
 	case IF_TYPE_VIRTIO:
-		puts("VirtIO");
+		pr_crit("VirtIO");
 		break;
 	case IF_TYPE_EFI_MEDIA:
-		puts("EFI");
+		pr_crit("EFI");
 		break;
 	default:
-		puts("UNKNOWN");
+		pr_crit("UNKNOWN");
 		break;
 	}
-	PRINTF (" device %d  --   Partition Type: %s\n\n",
+	pr_crit (" device %d  --   Partition Type: %s\n\n",
 			dev_desc->devnum, type);
 #endif /* any CONFIG_..._PARTITION */
 }
@@ -315,7 +315,7 @@ void part_print(struct blk_desc *dev_desc)
 
 	drv = part_driver_lookup_type(dev_desc);
 	if (!drv) {
-		PRINTF("## Unknown partition table type %x\n",
+		pr_crit("## Unknown partition table type %x\n",
 		       dev_desc->part_type);
 		return;
 	}
@@ -411,7 +411,7 @@ int blk_get_device_by_str(const char *ifname, const char *dev_hwpart_str,
 	if (hwpart_str) {
 		hwpart = hextoul(hwpart_str, &ep);
 		if (*ep) {
-			PRINTF("** Bad HW partition specification %s %s **\n",
+			pr_err("** Bad HW partition specification %s %s **\n",
 			    ifname, hwpart_str);
 			dev = -EINVAL;
 			goto cleanup;
@@ -487,7 +487,7 @@ int blk_get_device_part_str(const char *ifname, const char *dev_part_str,
 	 */
 	if (0 == strcmp(ifname, "ubi")) {
 		if (!ubifs_is_mounted()) {
-			PRINTF("UBIFS not mounted, use ubifsmount to mount volume first!\n");
+			pr_err("UBIFS not mounted, use ubifsmount to mount volume first!\n");
 			return -EINVAL;
 		}
 
@@ -509,7 +509,7 @@ int blk_get_device_part_str(const char *ifname, const char *dev_part_str,
 
 	/* If still no dev_part_str, it's an error */
 	if (!dev_part_str) {
-		PRINTF("** No device specified **\n");
+		pr_err("** No device specified **\n");
 		ret = -ENODEV;
 		goto cleanup;
 	}
@@ -547,7 +547,7 @@ int blk_get_device_part_str(const char *ifname, const char *dev_part_str,
 		 * or request for whole device, but caller requires partition.
 		 */
 		if (*ep || (part == 0 && !allow_whole_dev)) {
-			PRINTF("** Bad partition specification %s %s **\n",
+			pr_err("** Bad partition specification %s %s **\n",
 			    ifname, dev_part_str);
 			ret = -ENOENT;
 			goto cleanup;
@@ -561,7 +561,7 @@ int blk_get_device_part_str(const char *ifname, const char *dev_part_str,
 	if (((*dev_desc)->part_type == PART_TYPE_UNKNOWN) ||
 	    (part == 0)) {
 		if (!(*dev_desc)->lba) {
-			PRINTF("** Bad device size - %s %s **\n", ifname,
+			pr_err("** Bad device size - %s %s **\n", ifname,
 			       dev_str);
 			ret = -EINVAL;
 			goto cleanup;
@@ -573,7 +573,7 @@ int blk_get_device_part_str(const char *ifname, const char *dev_part_str,
 		 * it's an error.
 		 */
 		if ((part > 0) || (!allow_whole_dev)) {
-			PRINTF("** No partition table - %s %s **\n", ifname,
+			pr_err("** No partition table - %s %s **\n", ifname,
 			       dev_str);
 			ret = -EPROTONOSUPPORT;
 			goto cleanup;
@@ -601,7 +601,7 @@ int blk_get_device_part_str(const char *ifname, const char *dev_part_str,
 	if (part != PART_AUTO) {
 		ret = part_get_info(*dev_desc, part, info);
 		if (ret) {
-			PRINTF("** Invalid partition %d **\n", part);
+			pr_err("** Invalid partition %d **\n", part);
 			goto cleanup;
 		}
 	} else {
@@ -643,12 +643,12 @@ int blk_get_device_part_str(const char *ifname, const char *dev_part_str,
 			if (p == MAX_SEARCH_PARTITIONS + 1)
 				*info = tmpinfo;
 		} else {
-			PRINTF("** No valid partitions found **\n");
+			pr_err("** No valid partitions found **\n");
 			goto cleanup;
 		}
 	}
 	if (strncmp((char *)info->type, BOOT_PART_TYPE, sizeof(info->type)) != 0) {
-		PRINTF("** Invalid partition type \"%.32s\""
+		pr_err("** Invalid partition type \"%.32s\""
 			" (expect \"" BOOT_PART_TYPE "\")\n",
 			info->type);
 		ret  = -EINVAL;
@@ -748,7 +748,7 @@ static int part_get_info_by_dev_and_name(const char *dev_iface,
 
 	ret = part_get_info_by_name(*dev_desc, part_str, part_info);
 	if (ret < 0){
-		PRINTF("Could not find \"%s\" partition\n", part_str);
+		pr_crit("Could not find \"%s\" partition\n", part_str);
 	}
 
 cleanup:
@@ -776,7 +776,7 @@ int part_get_info_by_dev_and_name_or_num(const char *dev_iface,
 	ret = blk_get_device_part_str(dev_iface, dev_part_str,
 				      dev_desc, part_info, allow_whole_dev);
 	if (ret < 0){
-		PRINTF("Couldn't find partition %s %s\n",
+		pr_err("Couldn't find partition %s %s\n",
 		       dev_iface, dev_part_str);
 	}
 	return ret;

disk/part_dos.c

@@ -55,7 +55,7 @@ static void print_one_part(dos_partition_t *p, lbaint_t ext_part_sector,
 	lbaint_t lba_start = ext_part_sector + get_unaligned_le32(p->start4);
 	lbaint_t lba_size  = get_unaligned_le32(p->size4);
 
-	pr_debug("%3d\t%-10" LBAFlength "u\t%-10" LBAFlength
+	pr_info("%3d\t%-10" LBAFlength "u\t%-10" LBAFlength
 		"u\t%08x-%02x\t%02x%s%s\n",
 		part_num, lba_start, lba_size, disksig, part_num, p->sys_ind,
 		(is_extended(p->sys_ind) ? " Extd" : ""),
@@ -305,7 +305,7 @@ static int part_get_info_extended(struct blk_desc *dev_desc,
 
 static void __maybe_unused part_print_dos(struct blk_desc *dev_desc)
 {
-	pr_debug("Part\tStart Sector\tNum Sectors\tUUID\t\tType\n");
+	pr_info("Part\tStart Sector\tNum Sectors\tUUID\t\tType\n");
 	print_partition_extended(dev_desc, 0, 0, 1, 0);
 }
 

disk/part_efi.c

@@ -229,28 +229,28 @@ void part_print_efi(struct blk_desc *dev_desc)
 
 	debug("%s: gpt-entry at %p\n", __func__, gpt_pte);
 
-	pr_debug("Part\tStart LBA\tEnd LBA\t\tName\n");
-	pr_debug("\tAttributes\n");
-	pr_debug("\tType GUID\n");
-	pr_debug("\tPartition GUID\n");
+	pr_info("Part\tStart LBA\tEnd LBA\t\tName\n");
+	pr_info("\tAttributes\n");
+	pr_info("\tType GUID\n");
+	pr_info("\tPartition GUID\n");
 
 	for (i = 0; i < le32_to_cpu(gpt_head->num_partition_entries); i++) {
 		/* Skip invalid PTE */
 		if (!is_pte_valid(&gpt_pte[i]))
 			continue;
 
-		pr_debug("%3d\t0x%08llx\t0x%08llx\t\"%s\"\n", (i + 1),
+		pr_info("%3d\t0x%08llx\t0x%08llx\t\"%s\"\n", (i + 1),
 			le64_to_cpu(gpt_pte[i].starting_lba),
 			le64_to_cpu(gpt_pte[i].ending_lba),
 			print_efiname(&gpt_pte[i]));
-		pr_debug("\tattrs:\t0x%016llx\n", gpt_pte[i].attributes.raw);
+		pr_info("\tattrs:\t0x%016llx\n", gpt_pte[i].attributes.raw);
 		uuid = (unsigned char *)gpt_pte[i].partition_type_guid.b;
 		if (CONFIG_IS_ENABLED(PARTITION_TYPE_GUID))
-			pr_debug("\ttype:\t%pUl\n\t\t(%pUs)\n", uuid, uuid);
+			pr_info("\ttype:\t%pUl\n\t\t(%pUs)\n", uuid, uuid);
 		else
-			pr_debug("\ttype:\t%pUl\n", uuid);
+			pr_info("\ttype:\t%pUl\n", uuid);
 		uuid = (unsigned char *)gpt_pte[i].unique_partition_guid.b;
-		pr_debug("\tguid:\t%pUl\n", uuid);
+		pr_info("\tguid:\t%pUl\n", uuid);
 	}
 
 	/* Remember to free pte */

drivers/clk/Kconfig

@@ -114,6 +114,13 @@ config CLK_ICS8N3QV01
 	  Crystal Oscillator). The output frequency can be programmed via an
 	  I2C interface.
 
+config CLK_IMX
+	bool "Enable clock driver for imx"
+	depends on CLK
+	default n
+	help
+	  This provides very basic support for clocks on imx SoCs.
+
 config CLK_INTEL
 	bool "Enable clock driver for Intel x86"
 	depends on CLK && X86

drivers/clk/Makefile

@@ -12,7 +12,7 @@ obj-$(CONFIG_$(SPL_TPL_)CLK_CCF) += clk-fixed-factor.o
 obj-$(CONFIG_$(SPL_TPL_)CLK_COMPOSITE_CCF) += clk-composite.o
 
 obj-y += analogbits/
-obj-y += imx/
+obj-$(CONFIG_CLK_IMX) += imx/
 obj-y += tegra/
 obj-y += ti/
 obj-$(CONFIG_$(SPL_TPL_)CLK_INTEL) += intel/

drivers/clk/clk-uclass.c

@@ -596,6 +596,7 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
 	const struct clk_ops *ops;
 	struct clk *clkp;
 	struct clk *parentp;
+	struct clk *cur_parent;
 	int ret;
 
 	pr_debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent);
@@ -613,7 +614,23 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
 	/* get private clock struct used for cache */
 	clk_get_priv(clk, &clkp);
 	clk_get_priv(parent, &parentp);
+	if (CONFIG_IS_ENABLED(CLK_CCF)) {
+		if (clkp->enable_count)
+			clk_enable(parent);
+		if (clkp->dev->parent) {
+			cur_parent = dev_get_clk_ptr(clkp->dev->parent);
+			if (clkp->enable_count && cur_parent->enable_count) {
+				if (device_get_uclass_id(clkp->dev->parent) == UCLASS_CLK) {
+					ret = clk_disable(cur_parent);
+					if (ret) {
+						pr_debug("Disable %s failed\n", clkp->dev->parent->name);
+						return ret;
+					}
+				}
+			}
 
+		}
+	}
 	if (CONFIG_IS_ENABLED(CLK_CCF))
 		ret = device_reparent(clkp->dev, parentp->dev);
 

drivers/clk/spacemit/Makefile

@@ -4,4 +4,5 @@
 #
 #SoC support
 obj-$(CONFIG_SPACEMIT_K1PRO_CCU) += ccu-k1pro.o ccu-pll-k1pro.o
-obj-$(CONFIG_SPACEMIT_K1X_CCU) += ccu-k1x.o ccu_pll.o ccu_ddn.o ccu_mix.o
+obj-$(CONFIG_SPACEMIT_K1X_CCU) += ccu-k1x.o ccu_mix.o
+obj-$(CONFIG_$(SPL_TPL_)SPACEMIT_K1X_CCU) += ccu_ddn.o ccu_pll.o

drivers/clk/spacemit/ccu-k1x.c

@@ -165,8 +165,7 @@
 struct spacemit_k1x_clk k1x_clock_controller;
 struct clk vctcxo_24, vctcxo_3, vctcxo_1, pll1_vco, clk_32k, clk_dummy;
 
-#if IS_ENABLED(CONFIG_SPL_BUILD)
-
+#ifdef CONFIG_SPL_BUILD
 //apbs
 static SPACEMIT_CCU_FACTOR(pll1_2457p6_vco, "pll1_2457p6_vco", "pll1_vco",
 	1, 100);
@@ -184,11 +183,19 @@ static SPACEMIT_CCU_GATE_FACTOR(pll1_d6, "pll1_d6", "pll1_2457p6_vco",
 	BASE_TYPE_APBS, APB_SPARE2_REG,
 	BIT(5), BIT(5), 0x0,
 	6, 1, 0);
+static SPACEMIT_CCU_GATE_FACTOR(pll1_d8, "pll1_d8", "pll1_2457p6_vco",
+	BASE_TYPE_APBS, APB_SPARE2_REG,
+	BIT(7), BIT(7), 0x0,
+	8, 1, 0);
 static SPACEMIT_CCU_GATE_FACTOR(pll1_d23_106p8, "pll1_d23_106p8", "pll1_2457p6_vco",
 	BASE_TYPE_APBS, APB_SPARE2_REG,
 	BIT(20), BIT(20), 0x0,
 	23, 1, 0);
 //pll1_d6
+static SPACEMIT_CCU_GATE_FACTOR(pll1_d12_204p8, "pll1_d12_204p8", "pll1_d6",
+	BASE_TYPE_MPMU, MPMU_ACGR,
+	BIT(5), BIT(5), 0x0,
+	2, 1, 0);
 static SPACEMIT_CCU_GATE(pll1_d6_409p6, "pll1_d6_409p6", "pll1_d6",
 	BASE_TYPE_MPMU, MPMU_ACGR,
 	BIT(0), BIT(0), 0x0,
@@ -203,7 +210,11 @@ static SPACEMIT_CCU_GATE(pll1_d2_1228p8, "pll1_d2_1228p8", "pll1_d2",
 	BASE_TYPE_MPMU, MPMU_ACGR,
 	BIT(16), BIT(16), 0x0,
 	0);
-
+//pll1_d8
+static SPACEMIT_CCU_GATE_FACTOR(pll1_d24_102p4, "pll1_d24_102p4", "pll1_d8",
+	BASE_TYPE_MPMU, MPMU_ACGR,
+	BIT(12), BIT(12), 0x0,
+	3, 1, 0);
 //apbc
 static const char *twsi_parent_names[] = {
 	"pll1_d78_31p5",
@@ -223,21 +234,14 @@ static SPACEMIT_CCU_GATE_NO_PARENT(sdh_axi_aclk, "sdh_axi_aclk", NULL,
 static const char * const sdh01_parent_names[] = {
 	"pll1_d6_409p6",
  };
-
 static SPACEMIT_CCU_DIV_FC_MUX_GATE(sdh0_clk, "sdh0_clk", sdh01_parent_names,
 	BASE_TYPE_APMU, APMU_SDH0_CLK_RES_CTRL,
 	8, 3, BIT(11),
 	5, 3, BIT(4), BIT(4), 0x0,
 	0);
-static SPACEMIT_CCU_DIV_FC_MUX_GATE(sdh1_clk, "sdh1_clk", sdh01_parent_names,
-	BASE_TYPE_APMU, APMU_SDH1_CLK_RES_CTRL,
-	8, 3, BIT(11),
-	5, 3, BIT(4), BIT(4), 0x0,
-	0);
 static const char * const sdh2_parent_names[] = {
 	"pll1_d6_409p6",
 };
-
 static SPACEMIT_CCU_DIV_FC_MUX_GATE(sdh2_clk, "sdh2_clk", sdh2_parent_names,
 	BASE_TYPE_APMU, APMU_SDH2_CLK_RES_CTRL,
 	8, 3, BIT(11),
@@ -266,48 +270,68 @@ static SPACEMIT_CCU_GATE_NO_PARENT(qspi_bus_clk, "qspi_bus_clk", NULL,
 	BASE_TYPE_APMU, APMU_QSPI_CLK_RES_CTRL,
 	BIT(3), BIT(3), 0x0,
 	0);
-static const char * const emmc_parent_names[] = {
-	"pll1_d6_409p6",
+static const char * const aes_parent_names[] = {
+	"clk_dummy", "pll1_d24_102p4"
 };
-static SPACEMIT_CCU_DIV_FC_MUX_GATE(emmc_clk, "emmc_clk", emmc_parent_names,
-	BASE_TYPE_APMU, APMU_PMUA_EM_CLK_RES_CTRL,
-	8, 3, BIT(11),
-	6, 2,
-	0x18, 0x18, 0x0,
-	0);
-static SPACEMIT_CCU_DIV_GATE(emmc_x_clk, "emmc_x_clk", "pll1_d2_1228p8",
-	BASE_TYPE_APMU, APMU_PMUA_EM_CLK_RES_CTRL,
-	12, 3, BIT(15), BIT(15), 0x0,
+static SPACEMIT_CCU_MUX_GATE(aes_clk, "aes_clk", aes_parent_names,
+	BASE_TYPE_APMU, APMU_AES_CLK_RES_CTRL,
+	6, 1, BIT(5), BIT(5), 0x0,
 	0);
 
+static u32 transfer_to_spl_list[][2] = {
+	{CLK_TWSI6, CLK_TWSI6_SPL},
+	{CLK_TWSI8, CLK_TWSI8_SPL},
+	{CLK_SDH_AXI, CLK_SDH_AXI_SPL},
+	{CLK_SDH0, CLK_SDH0_SPL},
+	{CLK_SDH2, CLK_SDH2_SPL},
+	{CLK_USB_P1, CLK_USB_P1_SPL},
+	{CLK_USB_AXI, CLK_USB_AXI_SPL},
+	{CLK_USB30, CLK_USB30_SPL},
+	{CLK_QSPI, CLK_QSPI_SPL},
+	{CLK_QSPI_BUS, CLK_QSPI_BUS_SPL},
+	{CLK_AES, CLK_AES_SPL},
+};
+
 static struct spacemit_clk_table spacemit_k1x_clks = {
 	.clks	= {
-		[CLK_PLL1_2457P6]	= &pll1_2457p6_vco.common.clk,
-		[CLK_PLL1_D2]		= &pll1_d2.common.clk,
-		[CLK_PLL1_D4]		= &pll1_d4.common.clk,
-		[CLK_PLL1_D6]		= &pll1_d6.common.clk,
-		[CLK_PLL1_D23]		= &pll1_d23_106p8.common.clk,
-		[CLK_PLL1_409P6]	= &pll1_d6_409p6.common.clk,
-		[CLK_PLL1_31P5]		= &pll1_d78_31p5.common.clk,
-		[CLK_PLL1_1228]		= &pll1_d2_1228p8.common.clk,
-		[CLK_TWSI6]		= &twsi6_clk.common.clk,
-		[CLK_TWSI8]		= &twsi8_clk.common.clk,
-		[CLK_SDH_AXI]		= &sdh_axi_aclk.common.clk,
-		[CLK_SDH0] 		= &sdh0_clk.common.clk,
-		[CLK_SDH1]		= &sdh1_clk.common.clk,
-		[CLK_SDH2]		= &sdh2_clk.common.clk,
-		[CLK_USB_P1]		= &usb_p1_aclk.common.clk,
-		[CLK_USB_AXI]		= &usb_axi_clk.common.clk,
-		[CLK_USB30]		= &usb30_clk.common.clk,
-		[CLK_QSPI]		= &qspi_clk.common.clk,
-		[CLK_QSPI_BUS]		= &qspi_bus_clk.common.clk,
-		[CLK_EMMC]		= &emmc_clk.common.clk,
-		[CLK_EMMC_X]		= &emmc_x_clk.common.clk,
-
+		[CLK_PLL1_2457P6_SPL]    = &pll1_2457p6_vco.common.clk,
+		[CLK_PLL1_D2_SPL]        = &pll1_d2.common.clk,
+		[CLK_PLL1_D4_SPL]        = &pll1_d4.common.clk,
+		[CLK_PLL1_D6_SPL]        = &pll1_d6.common.clk,
+		[CLK_PLL1_D23_SPL]       = &pll1_d23_106p8.common.clk,
+		[CLK_PLL1_409P6_SPL] = &pll1_d6_409p6.common.clk,
+		[CLK_PLL1_D8_SPL]		= &pll1_d8.common.clk,
+		[CLK_PLL1_31P5_SPL]      = &pll1_d78_31p5.common.clk,
+		[CLK_PLL1_1228_SPL]      = &pll1_d2_1228p8.common.clk,
+		[CLK_TWSI6_SPL]      = &twsi6_clk.common.clk,
+		[CLK_TWSI8_SPL]      = &twsi8_clk.common.clk,
+		[CLK_SDH_AXI_SPL]        = &sdh_axi_aclk.common.clk,
+		[CLK_SDH0_SPL]       = &sdh0_clk.common.clk,
+		[CLK_SDH2_SPL]       = &sdh2_clk.common.clk,
+		[CLK_USB_P1_SPL]     = &usb_p1_aclk.common.clk,
+		[CLK_USB_AXI_SPL]        = &usb_axi_clk.common.clk,
+		[CLK_USB30_SPL]      = &usb30_clk.common.clk,
+		[CLK_QSPI_SPL]       = &qspi_clk.common.clk,
+		[CLK_QSPI_BUS_SPL]       = &qspi_bus_clk.common.clk,
+		[CLK_PLL1_204P8_SPL]	= &pll1_d12_204p8.common.clk,
+		[CLK_PLL1_102P4_SPL]	= &pll1_d24_102p4.common.clk,
+		[CLK_AES_SPL]		= &aes_clk.common.clk,
 	},
-	.num = CLK_MAX_NO,
+	.num = CLK_MAX_NO_SPL,
 };
 
+ulong transfer_clk_id_to_spl(ulong id)
+{
+	u32 listsize = ARRAY_SIZE(transfer_to_spl_list);
+
+	for (int i = 0; i < listsize; i++){
+		if (id == transfer_to_spl_list[i][0]){
+			pr_info("id:%ld, %d,\n", id, transfer_to_spl_list[i][1]);
+			return transfer_to_spl_list[i][1];
+		}
+	}
+	return id;
+}
 #else
 
 //apbs
@@ -318,6 +342,7 @@ static const struct ccu_pll_rate_tbl pll2_rate_tbl[] = {
 	PLL_RATE(3000000000UL, 0x66, 0xdd, 0x50, 0x00, 0x3f, 0xe00000),
 	PLL_RATE(3200000000UL, 0x67, 0xdd, 0x50, 0x00, 0x43, 0xeaaaab),
 	PLL_RATE(2457600000UL, 0x64, 0xdd, 0x50, 0x00, 0x33, 0x0ccccd),
+	PLL_RATE(2800000000UL, 0x66, 0xdd, 0x50, 0x00, 0x3a, 0x155555),
 };
 
 static const struct ccu_pll_rate_tbl pll3_rate_tbl[] = {
@@ -1007,7 +1032,7 @@ static SPACEMIT_CCU_GATE_NO_PARENT(usb30_clk, "usb30_clk", NULL,
 	0);
 static const char * const qspi_parent_names[] = {"pll1_d6_409p6", "pll2_d8", "pll1_d8_307p2",
 		"pll1_d10_245p76", "pll1_d11_223p4", "pll1_d23_106p8", "pll1_d5_491p52", "pll1_d13_189"};
-static SPACEMIT_CCU_DIV_FC_MUX_GATE(qspi_clk, "qspi_clk", qspi_parent_names,
+static SPACEMIT_CCU_DIV_MFC_MUX_GATE(qspi_clk, "qspi_clk", qspi_parent_names,
 	BASE_TYPE_APMU, APMU_QSPI_CLK_RES_CTRL,
 	9, 3, BIT(12),
 	6, 3, BIT(4), BIT(4), 0x0,
@@ -1404,8 +1429,14 @@ static struct spacemit_clk_table spacemit_k1x_clks = {
 #endif
 
 struct spacemit_clk_init_rate init_rate_tbl[] = {
+#ifdef CONFIG_SPL_BUILD
+	{CLK_PMUA_ACLK_SPL, 307200000},
+	{CLK_APB_SPL,	102400000},
+#else
 	{CLK_PMUA_ACLK, 307200000},
 	{CLK_APB,	102400000},
+	{CLK_SLOW_UART1, 14745600},
+#endif
 };
 
 static inline const struct clk_ops *ccu_clk_dev_ops(struct udevice *dev)
@@ -1413,6 +1444,7 @@ static inline const struct clk_ops *ccu_clk_dev_ops(struct udevice *dev)
 	return (const struct clk_ops *)dev->driver->ops;
 }
 
+#ifndef CONFIG_SPL_BUILD
 ulong ccu_clk_get_rate(struct clk *clk)
 {
 	const struct clk_ops *ops;
@@ -1437,21 +1469,10 @@ ulong ccu_clk_round_rate(struct clk *clk, unsigned long rate)
 	return 0;
 }
 
-ulong ccu_clk_set_rate(struct clk *clk, unsigned long rate)
-{
-	const struct clk_ops *ops;
-	struct clk *c = spacemit_k1x_clks.clks[clk->id];
-	if (!clk_valid(c))
-		return 0;
-	ops = ccu_clk_dev_ops(c->dev);
-	if(ops->set_rate)
-		return ops->set_rate(c, rate);
-	return 0;
-}
-
 int ccu_clk_set_parent(struct clk *clk, struct clk *parent)
 {
 	const struct clk_ops *ops;
+
 	struct clk *c = spacemit_k1x_clks.clks[clk->id];
 	struct clk *p = spacemit_k1x_clks.clks[parent->id];
 	if (!clk_valid(c))
@@ -1461,22 +1482,15 @@ int ccu_clk_set_parent(struct clk *clk, struct clk *parent)
 		return ops->set_parent(c, p);
 	return 0;
 }
-
-int ccu_clk_enable(struct clk *clk)
-{
-	const struct clk_ops *ops;
-	struct clk *c = spacemit_k1x_clks.clks[clk->id];
-	if (!clk_valid(c))
-		return 0;
-	ops = ccu_clk_dev_ops(c->dev);
-	if(ops->enable)
-		return ops->enable(c);
-	return 0;
-}
+#endif
 
 int ccu_clk_disable(struct clk *clk)
 {
 	const struct clk_ops *ops;
+
+#ifdef CONFIG_SPL_BUILD
+	clk->id = transfer_clk_id_to_spl(clk->id);
+#endif
 	struct clk *c = spacemit_k1x_clks.clks[clk->id];
 	if (!clk_valid(c))
 		return 0;
@@ -1486,13 +1500,49 @@ int ccu_clk_disable(struct clk *clk)
 	return 0;
 }
 
+ulong ccu_clk_set_rate(struct clk *clk, unsigned long rate)
+{
+	const struct clk_ops *ops;
+
+#ifdef CONFIG_SPL_BUILD
+	clk->id = transfer_clk_id_to_spl(clk->id);
+#endif
+	struct clk *c = spacemit_k1x_clks.clks[clk->id];
+
+	if (!clk_valid(c))
+		return 0;
+	ops = ccu_clk_dev_ops(c->dev);
+	if(ops->set_rate)
+		return ops->set_rate(c, rate);
+	return 0;
+}
+
+int ccu_clk_enable(struct clk *clk)
+{
+	const struct clk_ops *ops;
+
+#ifdef CONFIG_SPL_BUILD
+	clk->id = transfer_clk_id_to_spl(clk->id);
+#endif
+	struct clk *c = spacemit_k1x_clks.clks[clk->id];
+
+	if (!clk_valid(c))
+		return 0;
+	ops = ccu_clk_dev_ops(c->dev);
+	if(ops->enable)
+		return ops->enable(c);
+	return 0;
+}
+
 const struct clk_ops ccu_clk_ops = {
-	.set_rate = ccu_clk_set_rate,
+#ifndef CONFIG_SPL_BUILD
 	.get_rate = ccu_clk_get_rate,
 	.round_rate = ccu_clk_round_rate,
 	.set_parent = ccu_clk_set_parent,
-	.enable = ccu_clk_enable,
+#endif
 	.disable = ccu_clk_disable,
+	.set_rate = ccu_clk_set_rate,
+	.enable = ccu_clk_enable,
 };
 
 int ccu_common_init(struct clk * clk, struct spacemit_k1x_clk *clk_info, struct spacemit_clk_table *clks)
@@ -1517,6 +1567,7 @@ int ccu_common_init(struct clk * clk, struct spacemit_k1x_clk *clk_info, struct
 	case BASE_TYPE_APBS:
 		common->base = clk_info->apbs_base;
 		break;
+#ifndef CONFIG_SPL_BUILD
 	case BASE_TYPE_CIU:
 		common->base = clk_info->ciu_base;
 		break;
@@ -1532,6 +1583,7 @@ int ccu_common_init(struct clk * clk, struct spacemit_k1x_clk *clk_info, struct
 	case BASE_TYPE_APBC2:
 		common->base = clk_info->apbc2_base;
 		break;
+#endif
 	default:
 		common->base = clk_info->apbc_base;
 		break;
@@ -1553,16 +1605,34 @@ int spacemit_ccu_probe(struct spacemit_k1x_clk *clk_info,
 		    struct spacemit_clk_table *clks)
 {
 	int i;
-	for (i = 0; i < clks->num ; i++) {
+
+#ifdef CONFIG_SPL_BUILD
+	for (i = CLK_PLL1_2457P6_SPL; i < clks->num ; i++) {
+#else
+	for (i = CLK_PLL1_2457P6; i < clks->num ; i++) {
+#endif
 		struct clk *clk = clks->clks[i];
 		if (!clk)
 			continue;
 
+#ifdef CONFIG_SPL_BUILD
+		if(clk->id >= CLK_VCTCXO_24_SPL)
+#else
 		if(clk->id >= CLK_VCTCXO_24)
+#endif
 			continue;
+
 		clk->id = i;
 		ccu_common_init(clk, clk_info, clks);
 	}
+#ifndef CONFIG_SPL_BUILD
+	//init pll2 freq
+	if (clk_info->pll2_freq) {
+		struct clk *clk =clks->clks[CLK_PLL2];
+		if (clk)
+			clk_set_rate(clk, clk_info->pll2_freq);
+	}
+#endif
 	//init clk default rate
 	for (i = 0; i < ARRAY_SIZE(init_rate_tbl); i++) {
 		struct clk *clk =clks->clks[init_rate_tbl[i].clk_id];
@@ -1578,6 +1648,10 @@ int spacemit_ccu_probe(struct spacemit_k1x_clk *clk_info,
 static inline void ccu_clk_dm(ulong id, struct clk *clk)
 {
 	if (!IS_ERR(clk)){
+
+#ifdef CONFIG_SPL_BUILD
+		id = transfer_clk_id_to_spl(id);
+#endif
 		clk->id = id;
 		spacemit_k1x_clks.clks[id] = clk;
 	}
@@ -1639,6 +1713,20 @@ static int spacemit_k1x_ccu_probe(struct udevice *dev)
 		goto out;
 	}
 
+#ifdef CONFIG_SPL_BUILD
+	clk_get_by_name(dev, "vctcxo_24", &vctcxo_24);
+	ccu_clk_dm(CLK_VCTCXO_24_SPL, dev_get_clk_ptr(vctcxo_24.dev));
+	clk_get_by_name(dev, "vctcxo_3", &vctcxo_3);
+	ccu_clk_dm(CLK_VCTCXO_3_SPL, dev_get_clk_ptr(vctcxo_3.dev));
+	clk_get_by_name(dev, "vctcxo_1", &vctcxo_1);
+	ccu_clk_dm(CLK_VCTCXO_1_SPL, dev_get_clk_ptr(vctcxo_1.dev));
+	clk_get_by_name(dev, "pll1_vco", &pll1_vco);
+	ccu_clk_dm(CLK_PLL1_SPL, dev_get_clk_ptr(pll1_vco.dev));
+	clk_get_by_name(dev, "clk_32k", &clk_32k);
+	ccu_clk_dm(CLK_32K_SPL, dev_get_clk_ptr(clk_32k.dev));
+	clk_get_by_name(dev, "clk_dummy", &clk_dummy);
+	ccu_clk_dm(CLK_DUMMY_SPL, dev_get_clk_ptr(clk_dummy.dev));
+#else
 	clk_get_by_name(dev, "vctcxo_24", &vctcxo_24);
 	ccu_clk_dm(CLK_VCTCXO_24, dev_get_clk_ptr(vctcxo_24.dev));
 	clk_get_by_name(dev, "vctcxo_3", &vctcxo_3);
@@ -1651,7 +1739,9 @@ static int spacemit_k1x_ccu_probe(struct udevice *dev)
 	ccu_clk_dm(CLK_32K, dev_get_clk_ptr(clk_32k.dev));
 	clk_get_by_name(dev, "clk_dummy", &clk_dummy);
 	ccu_clk_dm(CLK_DUMMY, dev_get_clk_ptr(clk_dummy.dev));
+#endif
 
+	clk_info->pll2_freq = dev_read_u32_default(dev, "pll2-freq", 0);
 	ret = spacemit_ccu_probe(clk_info, clks);
 	pr_debug("init clock finish ret=%d \n", ret);
 	if (!ret)

drivers/clk/spacemit/ccu-k1x.h

@@ -63,10 +63,53 @@ struct spacemit_k1x_clk {
 	void __iomem *ddrc_base;
 	void __iomem *audio_ctrl_base;
 	void __iomem *apbc2_base;
+	u32 pll2_freq;
+};
+
+/* u-boot-spl would used this clk */
+enum {
+	CLK_PLL1_2457P6_SPL = 0,
+	CLK_PLL1_D2_SPL,
+	CLK_PLL1_D4_SPL,
+	CLK_PLL1_D6_SPL,
+	CLK_PLL1_D8_SPL,
+	CLK_PLL1_D23_SPL,
+	CLK_PLL1_102P4_SPL,
+	CLK_PLL1_409P6_SPL,
+	CLK_PLL1_204P8_SPL,
+	CLK_PLL1_31P5_SPL,
+	CLK_PLL1_1228_SPL,
+	CLK_TWSI6_SPL,
+	CLK_TWSI8_SPL,
+	CLK_SDH_AXI_SPL,
+	CLK_SDH0_SPL,
+	CLK_SDH2_SPL,
+	CLK_USB_P1_SPL,
+	CLK_USB_AXI_SPL,
+	CLK_USB30_SPL,
+	CLK_QSPI_SPL,
+	CLK_QSPI_BUS_SPL,
+	CLK_AES_SPL,
+
+	CLK_PMUA_ACLK_SPL,
+	CLK_APB_SPL,
+
+	CLK_VCTCXO_24_SPL,
+	CLK_VCTCXO_3_SPL,
+	CLK_VCTCXO_1_SPL,
+	CLK_PLL1_SPL,
+	CLK_32K_SPL,
+	CLK_DUMMY_SPL,
+
+	CLK_MAX_NO_SPL,
 };
 
 struct spacemit_clk_table{
+#ifdef CONFIG_SPL_BUILD
+	struct clk* clks[CLK_MAX_NO_SPL];
+#else
 	struct clk* clks[CLK_MAX_NO];
+#endif
 	unsigned int num;
 };
 
@@ -83,4 +126,6 @@ static inline struct ccu_common *clk_to_ccu_common(struct clk *clk)
 int spacemit_ccu_probe(struct spacemit_k1x_clk *clk_info,
 		    struct spacemit_clk_table *clks);
 
+ulong transfer_clk_id_to_spl(ulong id);
+
 #endif /* _CCU_SPACEMIT_K1X_H_ */

drivers/clk/spacemit/ccu_mix.c

@@ -23,6 +23,57 @@
 
 #define TIMEOUT_LIMIT (20000) /* max timeout 10000us */
 static int twsi8_reg_val = 0x04;
+
+static int ccu_mix_trigger_fc(struct clk *clk)
+{
+#ifdef CONFIG_SPL_BUILD
+	return 0;
+#else
+	struct ccu_mix *mix = clk_to_ccu_mix(clk);
+	struct ccu_common * common = &mix->common;
+	unsigned long val = 0;
+
+	int ret = 0, timeout = 50;
+
+	if (common->reg_type == CLK_DIV_TYPE_1REG_FC_V2
+		|| common->reg_type == CLK_DIV_TYPE_2REG_FC_V4
+		|| common->reg_type == CLK_DIV_TYPE_1REG_FC_DIV_V5
+		|| common->reg_type == CLK_DIV_TYPE_1REG_FC_MUX_V6) {
+
+		timeout = 50;
+		val = readl(common->base + common->reg_ctrl);
+		val |= common->fc;
+		writel(val, common->base + common->reg_ctrl);
+
+		do {
+			val = readl(common->base + common->reg_ctrl);
+			timeout--;
+			if (!(val & (common->fc)))
+				break;
+		} while (timeout);
+
+		if (timeout == 0) {
+			timeout = 5000;
+			do {
+				val = readl(common->base + common->reg_ctrl);
+				timeout--;
+				if (!(val & (common->fc)))
+					break;
+			} while (timeout);
+			if (timeout != 0) {
+				ret = 0;
+
+			} else {
+				ret = -1;
+			}
+		}
+	}
+
+	return ret;
+#endif
+}
+
+#ifndef CONFIG_SPL_BUILD
 static int ccu_mix_disable(struct clk *clk)
 {
 	struct ccu_mix *mix = clk_to_ccu_mix(clk);
@@ -33,7 +84,11 @@ static int ccu_mix_disable(struct clk *clk)
 	if (!gate)
 		return 0;
 
+#ifdef CONFIG_SPL_BUILD
+	if (clk->id == CLK_TWSI8_SPL){
+#else
 	if (clk->id == CLK_TWSI8){
+#endif
 		twsi8_reg_val &= ~0x7;
 		twsi8_reg_val |= 0x4;
 		tmp = twsi8_reg_val;
@@ -68,8 +123,84 @@ static int ccu_mix_disable(struct clk *clk)
 	return 0;
 }
 
+static ulong ccu_mix_round_rate(struct clk *clk, ulong rate)
+{
+	return rate;
+}
+
+static int ccu_mix_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct ccu_mix *mix = clk_to_ccu_mix(clk);
+	struct ccu_common * common = &mix->common;
+	struct ccu_mux_config *mux = mix->mux;
+	int index;
+	u32 reg, i;
+	int ret;
+
+	if (!parent)
+		return -EINVAL;
+
+	for (i = 0; i < common->num_parents; i++) {
+		if (!strcmp(parent->dev->name, common->parent_names[i])){
+			index = i;
+			break;
+		}
+	}
+
+	if (index < 0) {
+		pr_info("Could not fetch index\n");
+		return index;
+	}
+
+#ifdef CONFIG_SPL_BUILD
+	if (clk->id == CLK_TWSI8_SPL){
+#else
+	if (clk->id == CLK_TWSI8){
+#endif
+		twsi8_reg_val &= ~GENMASK(mux->width + mux->shift - 1, mux->shift);
+		twsi8_reg_val |= (index << mux->shift);
+		reg = twsi8_reg_val;
+		if (common->reg_type == CLK_DIV_TYPE_2REG_NOFC_V3
+			|| common->reg_type == CLK_DIV_TYPE_2REG_FC_V4)
+			writel(reg, common->base + common->reg_sel);
+		else
+			writel(reg, common->base + common->reg_ctrl);
+
+		return 0;
+	}
+
+	if (common->reg_type == CLK_DIV_TYPE_2REG_NOFC_V3
+		|| common->reg_type == CLK_DIV_TYPE_2REG_FC_V4)
+		reg = readl(common->base + common->reg_sel);
+	else
+		reg = readl(common->base + common->reg_ctrl);
+
+	reg &= ~GENMASK(mux->width + mux->shift - 1, mux->shift);
+
+	if (common->reg_type == CLK_DIV_TYPE_2REG_NOFC_V3
+		|| common->reg_type == CLK_DIV_TYPE_2REG_FC_V4)
+		writel(reg | (index << mux->shift), common->base + common->reg_sel);
+	else
+		writel(reg | (index << mux->shift), common->base + common->reg_ctrl);
+
+	if (common->reg_type == CLK_DIV_TYPE_1REG_FC_V2
+		|| common->reg_type == CLK_DIV_TYPE_2REG_FC_V4
+		|| common->reg_type == CLK_DIV_TYPE_1REG_FC_MUX_V6) {
+
+		ret = ccu_mix_trigger_fc(clk);
+		if(ret)
+			pr_info("%s of %s timeout\n", __func__, clk->dev->name);
+	}
+
+	return 0;
+}
+#endif
+
 static int ccu_mix_enable(struct clk *clk)
 {
+#ifdef CONFIG_SPL_BUILD
+	clk->id = transfer_clk_id_to_spl(clk->id);
+#endif
 	struct ccu_mix *mix = clk_to_ccu_mix(clk);
 	struct ccu_common * common = &mix->common;
 	struct ccu_gate_config *gate = mix->gate;
@@ -80,7 +211,11 @@ static int ccu_mix_enable(struct clk *clk)
 	if (!gate)
 		return 0;
 
+#ifdef CONFIG_SPL_BUILD
+	if (clk->id == CLK_TWSI8_SPL){
+#else
 	if (clk->id == CLK_TWSI8){
+#endif
 		twsi8_reg_val &= ~0x7;
 		twsi8_reg_val |= 0x3;
 		tmp = twsi8_reg_val;
@@ -126,10 +261,10 @@ static int ccu_mix_enable(struct clk *clk)
 
 	if (timeout_power > 1) {
 		if (val == tmp)
-			pr_err("write clk_gate %s timeout occur, read pass after %d us delay\n",
+			pr_info("write clk_gate %s timeout occur, read pass after %d us delay\n",
 			clk_hw_get_name(&common->clk), timeout_power);
 		else
-			pr_err("write clk_gate  %s timeout after %d us!\n", clk_hw_get_name(&common->clk), timeout_power);
+			pr_info("write clk_gate  %s timeout after %d us!\n", clk_hw_get_name(&common->clk), timeout_power);
 	}
 
 	if (gate->flags & SPACEMIT_CLK_GATE_NEED_DELAY) {
@@ -141,6 +276,9 @@ static int ccu_mix_enable(struct clk *clk)
 
 static ulong ccu_mix_get_rate(struct clk *clk)
 {
+#ifdef CONFIG_SPL_BUILD
+	clk->id = transfer_clk_id_to_spl(clk->id);
+#endif
 	struct ccu_mix *mix = clk_to_ccu_mix(clk);
 	struct ccu_common * common = &mix->common;
 	struct ccu_div_config *div = mix->div;
@@ -148,7 +286,11 @@ static ulong ccu_mix_get_rate(struct clk *clk)
 	unsigned long val;
 	u32 reg;
 
+#ifdef CONFIG_SPL_BUILD
+	if (clk->id == CLK_TWSI8_SPL){
+#else
 	if (clk->id == CLK_TWSI8){
+#endif
 		val = parent_rate;
 		return val;
 	}
@@ -175,57 +317,6 @@ static ulong ccu_mix_get_rate(struct clk *clk)
 	return val;
 }
 
-static ulong ccu_mix_round_rate(struct clk *clk, ulong rate)
-{
-	return rate;
-}
-
-static int ccu_mix_trigger_fc(struct clk *clk)
-{
-	struct ccu_mix *mix = clk_to_ccu_mix(clk);
-	struct ccu_common * common = &mix->common;
-	unsigned long val = 0;
-
-	int ret = 0, timeout = 50;
-
-	if (common->reg_type == CLK_DIV_TYPE_1REG_FC_V2
-		|| common->reg_type == CLK_DIV_TYPE_2REG_FC_V4
-		|| common->reg_type == CLK_DIV_TYPE_1REG_FC_DIV_V5
-		|| common->reg_type == CLK_DIV_TYPE_1REG_FC_MUX_V6) {
-
-		timeout = 50;
-		val = readl(common->base + common->reg_ctrl);
-		val |= common->fc;
-		writel(val, common->base + common->reg_ctrl);
-
-		do {
-			val = readl(common->base + common->reg_ctrl);
-			timeout--;
-			if (!(val & (common->fc)))
-				break;
-		} while (timeout);
-
-		if (timeout == 0) {
-			timeout = 5000;
-			do {
-				val = readl(common->base + common->reg_ctrl);
-				timeout--;
-				if (!(val & (common->fc)))
-					break;
-			} while (timeout);
-			if (timeout != 0) {
-				ret = 0;
-
-			} else {
-				ret = -1;
-			}
-		}
-	}
-
-	return ret;
-
-}
-
 unsigned long ccu_mix_calc_best_rate(struct clk *clk, unsigned long rate,
 u32 *mux_val, u32 *div_val, u32 *parent_id)
 {
@@ -282,6 +373,9 @@ u32 *mux_val, u32 *div_val, u32 *parent_id)
 
 static ulong ccu_mix_set_rate(struct clk *clk, unsigned long rate)
 {
+#ifdef CONFIG_SPL_BUILD
+	clk->id = transfer_clk_id_to_spl(clk->id);
+#endif
 	struct ccu_mix *mix = clk_to_ccu_mix(clk);
 	struct ccu_common * common = &mix->common;
 	struct ccu_div_config *div_config = mix->div? mix->div: NULL;
@@ -293,7 +387,11 @@ static ulong ccu_mix_set_rate(struct clk *clk, unsigned long rate)
 	u32 reg;
 	int ret;
 
+#ifdef CONFIG_SPL_BUILD
+	if (clk->id == CLK_TWSI8_SPL)
+#else
 	if (clk->id == CLK_TWSI8)
+#endif
 		return 0;
 
 	if(!div_config && !mux_config){
@@ -349,7 +447,7 @@ static ulong ccu_mix_set_rate(struct clk *clk, unsigned long rate)
 
 		ret = ccu_mix_trigger_fc(clk);
 		if(ret)
-			pr_err("%s of %s timeout\n", __func__, clk->dev->name);
+			pr_info("%s of %s timeout\n", __func__, clk->dev->name);
 	}
 	return 0;
 
@@ -366,7 +464,11 @@ unsigned int ccu_mix_get_parent(struct clk *clk)
 	if(!mux)
 		return 0;
 
+#ifdef CONFIG_SPL_BUILD
+	if (clk->id == CLK_TWSI8_SPL){
+#else
 	if (clk->id == CLK_TWSI8){
+#endif
 		parent = (twsi8_reg_val >> 4) & 0x7;
 		return parent;
 	}
@@ -391,76 +493,15 @@ unsigned int ccu_mix_get_parent(struct clk *clk)
 	return parent;
 }
 
-static int ccu_mix_set_parent(struct clk *clk, struct clk *parent)
-{
-	struct ccu_mix *mix = clk_to_ccu_mix(clk);
-	struct ccu_common * common = &mix->common;
-	struct ccu_mux_config *mux = mix->mux;
-	int index;
-	u32 reg, i;
-	int ret;
-
-	if (!parent)
-		return -EINVAL;
-
-	for (i = 0; i < common->num_parents; i++) {
-		if (!strcmp(parent->dev->name, common->parent_names[i])){
-			index = i;
-			break;
-		}
-	}
-
-	if (index < 0) {
-		pr_err("Could not fetch index\n");
-		return index;
-	}
-
-	if (clk->id == CLK_TWSI8){
-		twsi8_reg_val &= ~GENMASK(mux->width + mux->shift - 1, mux->shift);
-		twsi8_reg_val |= (index << mux->shift);
-		reg = twsi8_reg_val;
-		if (common->reg_type == CLK_DIV_TYPE_2REG_NOFC_V3
-			|| common->reg_type == CLK_DIV_TYPE_2REG_FC_V4)
-			writel(reg, common->base + common->reg_sel);
-		else
-			writel(reg, common->base + common->reg_ctrl);
-
-		return 0;
-	}
-
-	if (common->reg_type == CLK_DIV_TYPE_2REG_NOFC_V3
-		|| common->reg_type == CLK_DIV_TYPE_2REG_FC_V4)
-		reg = readl(common->base + common->reg_sel);
-	else
-		reg = readl(common->base + common->reg_ctrl);
-
-	reg &= ~GENMASK(mux->width + mux->shift - 1, mux->shift);
-
-	if (common->reg_type == CLK_DIV_TYPE_2REG_NOFC_V3
-		|| common->reg_type == CLK_DIV_TYPE_2REG_FC_V4)
-		writel(reg | (index << mux->shift), common->base + common->reg_sel);
-	else
-		writel(reg | (index << mux->shift), common->base + common->reg_ctrl);
-
-	if (common->reg_type == CLK_DIV_TYPE_1REG_FC_V2
-		|| common->reg_type == CLK_DIV_TYPE_2REG_FC_V4
-		|| common->reg_type == CLK_DIV_TYPE_1REG_FC_MUX_V6) {
-
-		ret = ccu_mix_trigger_fc(clk);
-		if(ret)
-			pr_err("%s of %s timeout\n", __func__, clk->dev->name);
-	}
-
-	return 0;
-}
-
 const struct clk_ops ccu_mix_ops = {
+#ifndef CONFIG_SPL_BUILD
 	.disable 	= ccu_mix_disable,
-	.enable 	= ccu_mix_enable,
+	.round_rate 	= ccu_mix_round_rate,
 	.set_parent 	= ccu_mix_set_parent,
+#endif
+	.enable 	= ccu_mix_enable,
 	.get_rate	= ccu_mix_get_rate,
 	.set_rate 	= ccu_mix_set_rate,
-	.round_rate 	= ccu_mix_round_rate,
 };
 
 U_BOOT_DRIVER(ccu_clk_mix) = {

drivers/clk/spacemit/ccu_pll.c

@@ -125,7 +125,7 @@ static ulong __get_vco_freq(struct clk *clk)
 			return freq_pll_regs_table[i].rate;
     }
 
-	pr_err("Unknown rate for clock\n");
+	pr_info("Unknown rate for clock\n");
 	return 0;
 }
 
@@ -189,7 +189,7 @@ static ulong ccu_pll_set_rate(struct clk *clk, ulong rate)
 	bool found = false;
 
 	if (ccu_pll_is_enabled(clk)) {
-		pr_err("%s is enabled, ignore the setrate!\n", clk->dev->name);
+		pr_info("%s is enabled, ignore the setrate!\n", clk->dev->name);
 		return 0;
 	}
 
@@ -258,7 +258,7 @@ static ulong ccu_pll_round_rate(struct clk *clk, ulong rate)
 			}
 		}
 	} else {
-		pr_err("don't find freq table for pll\n");
+		pr_info("don't find freq table for pll\n");
 	}
 	return max_rate;
 }

drivers/ddr/spacemit/k1x/ddr_freq.c

@@ -97,21 +97,6 @@ enum DCLK_BYPASS_sel {
 #define DCLK_BYPASS_CLK_FC		23
 #define DCLK_BYPASS_MASK		(0x3 << DCLK_BYPASS_SHIFT)
 
-static struct dfc_level_config freq_levels[MAX_FREQ_LV] = 
-{
-/*	freq_lv, timing, pll, pll_div, data_rate, high_freq, vol_lv */
-/*	fp 0 == fp 1 just fill in the blanks */
-	{0, 0, DPLL_PLL1, DPLL_DIV4, DPLL_DIV1,  600, 0, 0},
-	{1, 0, DPLL_PLL1, DPLL_DIV4, DPLL_DIV1,  600, 0, 0},
-	{2, 0, DPLL_PLL1, DPLL_DIV3, DPLL_DIV1,  800, 0, 0},
-	{3, 0, DPLL_PLL2, DPLL_DIV3, DPLL_DIV1, 1066, 0, 0},
-	{4, 0, DPLL_PLL1, DPLL_DIV2, DPLL_DIV1, 1200, 0, 1},
-	{5, 1, DPLL_PLL2, DPLL_DIV2, DPLL_DIV1, 1600, 0, 2},
-	{6, 2, DPLL_PLL1, DPLL_DIV1, DPLL_DIV1, 2400, 1, 3},
-	{7, 3, DPLL_PLL2, DPLL_DIV1, DPLL_DIV1, 3200, 1, 3},
-};
-
-
 #define DDR_CONS		4
 #define KHZ			1000
 #define FREQ_MAX		~(0U)
@@ -194,7 +179,7 @@ u32 ddr_get_density(void)
 	cs1_size += mr8_cs11 ? format_size(((mr8_cs11 >> 2) & 0xf), io_width_cs11) : 0;
 
 	ddr_size = cs0_size + cs1_size;
-	pr_debug("DDR size = %d MB\n", ddr_size);
+	pr_info("DDR size = %d MB\n", ddr_size);
 
 	return ddr_size;
 }
@@ -204,7 +189,7 @@ uint32_t get_manufacture_id(void)
 	uint32_t mr5;
 
 	mr5 = mode_register_read(5, 0, 0);
-	pr_debug("MR5 = 0x%x\n",mr5);
+	pr_info("MR5 = 0x%x\n",mr5);
 	return (mr5&0xff);
 }
 
@@ -213,9 +198,35 @@ uint32_t get_ddr_rev_id(void)
 	uint32_t mr6;
 
 	mr6 = mode_register_read(6, 0, 0);
-	pr_debug("MR6 = 0x%x\n",mr6);
+	pr_info("MR6 = 0x%x\n",mr6);
 	return (mr6&0xff);
 }
+
+
+/* adjust ddr frequency to the max value */
+int ddr_freq_max(void)
+{
+//	return ddr_freq_change(MAX_FREQ_LV - 1);
+	return 0;
+}
+
+#ifndef CONFIG_SPL_BUILD
+
+static struct dfc_level_config freq_levels[MAX_FREQ_LV] =
+{
+/*	freq_lv, timing, pll, pll_div, data_rate, high_freq, vol_lv */
+/*	fp 0 == fp 1 just fill in the blanks */
+	{0, 0, DPLL_PLL1, DPLL_DIV4, DPLL_DIV1,  600, 0, 0},
+	{1, 0, DPLL_PLL1, DPLL_DIV4, DPLL_DIV1,  600, 0, 0},
+	{2, 0, DPLL_PLL1, DPLL_DIV3, DPLL_DIV1,  800, 0, 0},
+	{3, 0, DPLL_PLL2, DPLL_DIV3, DPLL_DIV1, 1066, 0, 0},
+	{4, 0, DPLL_PLL1, DPLL_DIV2, DPLL_DIV1, 1200, 0, 1},
+	{5, 1, DPLL_PLL2, DPLL_DIV2, DPLL_DIV1, 1600, 0, 2},
+	{6, 2, DPLL_PLL1, DPLL_DIV1, DPLL_DIV1, 2400, 1, 3},
+	{7, 3, DPLL_PLL2, DPLL_DIV1, DPLL_DIV1, 3200, 1, 3},
+};
+
+
 static int get_cur_freq_level(void)
 {
 	u32 level = readl((void __iomem *)DFC_STATUS);
@@ -478,32 +489,31 @@ static int ddr_freq_change(u32 freq_level)
 	clear_dfc_int_status();
 	enable_dfc_int(false);
 
-	pr_debug("%s: ddr frequency change from level %d to %d\n", __func__, freq_curr, get_cur_freq_level());
+	pr_info("%s: ddr frequency change from level %d to %d\n", __func__, freq_curr, get_cur_freq_level());
 
 	return 0;
 }
 
-/* adjust ddr frequency to the max value */
-int ddr_freq_max(void)
-{
-//	return ddr_freq_change(MAX_FREQ_LV - 1);
-	return 0;
-}
-
 int do_ddr_freq(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[])
 {
 	u32 freq_level;
+	int i;
 
 	if (argc <= 1 || argc > 2) {
 		/* invalid parameter, report error */
 		return CMD_RET_USAGE;
 	}
 
-        if (!strcmp(argv[0], "list")) {
+	if (0 == strcmp(argv[1], "list")) {
 		/* show valid frequency list */
+		pr_info("support frequency list as shown below:\n");
+		for (i = 0; i < ARRAY_SIZE(freq_levels); i++) {
+			pr_info("Frequency level: %d, data rate: %dMT/s\n",
+				freq_levels[i].freq_lv, freq_levels[i].data_rate);
+		}
 
-                return CMD_RET_SUCCESS;
-        }
+		return CMD_RET_SUCCESS;
+	}
 
 	freq_level = simple_strtoul(argv[1], NULL, 0);
 	if(freq_level >= MAX_FREQ_LV) {
@@ -512,7 +522,7 @@ int do_ddr_freq(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[])
 	}
 
 	ddr_freq_change(freq_level);
-	pr_debug("dram frequency level is %u\n", get_cur_freq_level());
+	pr_info("Change DDR data rate to %dMT/s\n", freq_levels[get_cur_freq_level()].data_rate);
 
 	return CMD_RET_SUCCESS;
 }
@@ -520,6 +530,7 @@ int do_ddr_freq(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[])
 U_BOOT_CMD(
 	ddrfreq, CONFIG_SYS_MAXARGS, 1, do_ddr_freq,
 	"Adjusting the DRAM working frequency",
-	"ddrfreq list	- display the valid frequncy points"
+	"ddrfreq list	- display the valid frequncy points\n"
 	"ddrfreq [0~7]	- adjust dram working frequency to level[0~7]"
 );
+#endif

drivers/ddr/spacemit/k1x/ddr_init.c

@@ -12,13 +12,11 @@
 #include <init.h>
 #include <log.h>
 #include <ram.h>
-#include <cpu.h>
 #include <asm/cache.h>
 #include <asm/global_data.h>
 #include <asm/io.h>
 #include <dm/device_compat.h>
 #include <linux/sizes.h>
-#include <dt-bindings/soc/spacemit-k1x.h>
 #ifdef CONFIG_K1_X_BOARD_FPGA
 #include "ddr_init_fpga.h"
 #endif
@@ -66,7 +64,7 @@ static int test_pattern(fdt_addr_t base, fdt_size_t size)
 	for (addr = base; addr < base + size; addr += DDR_CHECK_STEP) {
 		for (offset = 0; offset < DDR_CHECK_CNT; offset += 4) {
 			if (readl((void*)addr + offset) != (uint32_t)(addr + offset)) {
-				pr_debug("ddr check error %x vs %x\n", (uint32_t)(addr + offset), readl((void*)addr + offset));
+				pr_err("ddr check error %x vs %x\n", (uint32_t)(addr + offset), readl((void*)addr + offset));
 				err++;
 				if (err > 10)
 					goto ERR_HANDLE;
@@ -87,7 +85,7 @@ static int test_pattern(fdt_addr_t base, fdt_size_t size)
 	for (addr = base; addr < base + size; addr += DDR_CHECK_STEP) {
 		for (offset = 0; offset < DDR_CHECK_CNT; offset += 4) {
 			if (readl((void*)addr + offset) != (~(uint32_t)(addr + offset))) {
-				pr_debug("ddr check error %x vs %x\n", (uint32_t)(~(addr + offset)), readl((void*)addr + offset));
+				pr_err("ddr check error %x vs %x\n", (uint32_t)(~(addr + offset)), readl((void*)addr + offset));
 				err++;
 				if (err > 10)
 					goto ERR_HANDLE;
@@ -105,7 +103,7 @@ ERR_HANDLE:
 		}
 	}
 	if (err != 0) {
-		log_err("dram pattern test failed!\n");
+		pr_emerg("dram pattern test failed!\n");
 	}
 
 	free(ddr_data);
@@ -117,43 +115,6 @@ ERR_HANDLE:
 extern void lpddr4_silicon_init(uint32_t base, uint32_t data_rate);
 #endif
 
-static uint32_t adjust_cpu_freq(uint64_t cluster, uint32_t freq)
-{
-	uint32_t freq_act=freq, val;
-
-	/* switch cpu clock source */
-	val = readl((void __iomem *)(K1X_APMU_BASE + 0x38c + cluster*4));
-	val &= ~(0x07 | BIT(13));
-	switch(freq) {
-	case 1600000:
-		val |= 0x07;
-		break;
-
-	case 1228000:
-		val |= 0x04;
-		break;
-
-	case 819000:
-		val |= 0x01;
-		break;
-
-	case 614000:
-	default:
-		freq_act = 614000;
-		val |= 0x00;
-		break;
-	}
-	writel(val, (void __iomem *)(K1X_APMU_BASE + 0x38c + cluster*4));
-
-	/* set cluster frequency change request, and wait done */
-	val = readl((void __iomem *)(K1X_APMU_BASE + 0x38c + cluster*4));
-	val |= BIT(12);
-	writel(val, (void __iomem *)(K1X_APMU_BASE + 0x38c + cluster*4));
-	while(readl((void __iomem *)(K1X_APMU_BASE + 0x38c + cluster*4)) & BIT(12));
-
-	return freq_act;
-}
-
 static int spacemit_ddr_probe(struct udevice *dev)
 {
 	int ret;
@@ -161,9 +122,8 @@ static int spacemit_ddr_probe(struct udevice *dev)
 #ifdef CONFIG_K1_X_BOARD_FPGA
 	void (*ddr_init)(void);
 #else
-	uint32_t val, cpu_freq, ddr_datarate;
+	uint32_t ddr_datarate;
 	fdt_addr_t ddrc_base;
-	struct udevice *cpu;
 
 	ddrc_base = dev_read_addr(dev);
 #endif
@@ -172,36 +132,6 @@ static int spacemit_ddr_probe(struct udevice *dev)
 	ddr_init = (void(*)(void))(lpddr4_init_fpga_data + 0x144);
 	ddr_init();
 #else
-	writel(0x2dffff, (void __iomem *)0xd4051024);
-
-	/* enable CLK_1228M */
-	val = readl((void __iomem *)(K1X_MPMU_BASE + 0x1024));
-	val |= BIT(16) | BIT(15) | BIT(14) | BIT(13);
-	writel(val, (void __iomem *)(K1X_MPMU_BASE + 0x1024));
-
-	/* enable PLL3(3200Mhz) */
-	val = readl((void __iomem *)(K1X_APB_SPARE_BASE + 0x12C));
-	val |= BIT(31);
-	writel(val, (void __iomem *)(K1X_APB_SPARE_BASE + 0x12C));
-	/* enable PLL3_DIV2 */
-	val = readl((void __iomem *)(K1X_APB_SPARE_BASE + 0x128));
-	val |= BIT(1);
-	writel(val, (void __iomem *)(K1X_APB_SPARE_BASE + 0x128));
-
-	cpu = cpu_get_current_dev();
-	if(dev_read_u32u(cpu, "boot_freq_cluster0", &cpu_freq)) {
-		pr_debug("boot_freq_cluster0 not configured, use 1228000 as default!\n");
-		cpu_freq = 1228000;
-	}
-	cpu_freq = adjust_cpu_freq(0, cpu_freq);
-	pr_info("adjust cluster-0 frequency to %u ...	[done]\n", cpu_freq);
-
-	if(dev_read_u32u(cpu, "boot_freq_cluster1", &cpu_freq)) {
-		pr_debug("boot_freq_cluster1 not configured, use 1228000 as default!\n");
-		cpu_freq = 614000;
-	}
-	cpu_freq = adjust_cpu_freq(1, cpu_freq);
-	pr_info("adjust cluster-1 frequency to %u ...	[done]\n", cpu_freq);
 
 	/* check if dram data-rate is configued in dts */
 	if(dev_read_u32u(dev, "datarate", &ddr_datarate)) {
@@ -212,15 +142,18 @@ static int spacemit_ddr_probe(struct udevice *dev)
 	}
 
 	/* init dram */
+	uint64_t start = get_timer(0);
 	lpddr4_silicon_init(ddrc_base, ddr_datarate);
+	start = get_timer(start);
+	printf("lpddr4_silicon_init consume %lldms\n", start);
 #endif
 
 	ret = test_pattern(CONFIG_SYS_SDRAM_BASE, DDR_CHECK_SIZE);
 	if (ret < 0) {
-		log_err("dram init failed!\n");
+		pr_err("dram init failed!\n");
 		return -EIO;
 	}
-	pr_debug("dram init done\n");
+	pr_info("dram init done\n");
 
 	return 0;
 }

drivers/ddr/spacemit/k1x/lpddr4_silicon_init.c

@@ -14,12 +14,13 @@
 #include <init.h>
 #include <log.h>
 #include <ram.h>
-#include <asm/cache.h>
 #include <asm/global_data.h>
 #include <asm/io.h>
 #include <dm/device_compat.h>
 #include <linux/sizes.h>
 #include "ddr_init_asic.h"
+#include <mapmem.h>
+#include <u-boot/crc.h>
 
 #define BOOT_PP		0
 #define PMUA_REG_BASE	0xd4282800
@@ -906,7 +907,7 @@ __maybe_unused static int printf_no_output(const char *fmt, ...)
         return 0;
 }
 
-static void top_training_fp_all(u32 ddr_base, u32 cs_num, u32 boot_pp)
+static void top_training_fp_all(u32 ddr_base, u32 cs_num, u32 boot_pp, void *input)
 {
 	u64 to_traning_param[10];
 	int (*func)(const char*, ...) = printf;
@@ -920,6 +921,7 @@ static void top_training_fp_all(u32 ddr_base, u32 cs_num, u32 boot_pp)
 	to_traning_param[1] = cs_num;
 	to_traning_param[2] = boot_pp;
 	to_traning_param[3] = (u64)func;
+	to_traning_param[4] = (u64)input;
 	training = (void (*)(void * param))lpddr4_training_img;
 	training(to_traning_param);
 }
@@ -928,25 +930,29 @@ void lpddr4_silicon_init(u32 ddr_base, u32 data_rate)
 {
 	unsigned fp=0;
 	unsigned cs_num=2;
+	struct ddr_training_info_t *info;
+
+	info = (struct ddr_training_info_t*)map_sysmem(DDR_TRAINING_INFO_BUFF, 0);
 
 	top_Common_config();
 	top_DDR_MC_Phy_Device_Init(ddr_base,cs_num,0);
 	if (ddr_get_density() == 4096) {
 		adjust_mapping(ddr_base);
 	}
-	LogMsg(0,"ddr density: %u \n", ddr_get_density());
+	pr_info("ddr density: %u \n", ddr_get_density());
 
 	ddr_dfc_table_init(0xF0000000);
 	init_table_mc_a0(0xF0000000);
-	top_training_fp_all(ddr_base,cs_num,0);
+
+	top_training_fp_all(ddr_base,cs_num,0, info->para);
 
 	fp=1;
 	ddr_dfc(fp);
-	top_training_fp_all(ddr_base,cs_num,fp);
+	top_training_fp_all(ddr_base,cs_num,fp, info->para);
 
 	fp=2;
 	ddr_dfc(fp);
-	top_training_fp_all(ddr_base,cs_num,fp);
+	top_training_fp_all(ddr_base,cs_num,fp, info->para);
 
 	/* change dram frequency */
 	switch(data_rate) {

drivers/fastboot/fb_blk.c

@@ -179,7 +179,7 @@ void fastboot_blk_flash_write(const char *cmd, void *download_buffer,
 	static struct flash_dev *fdev = NULL;
 	u32 __maybe_unused fsbl_offset = 0;
 	/*save crc value to compare after flash image*/
-	u32 crc_val = 0;
+	u64 compare_val = 0;
 
 	if (fdev == NULL){
 		fdev = malloc(sizeof(struct flash_dev));
@@ -246,8 +246,9 @@ void fastboot_blk_flash_write(const char *cmd, void *download_buffer,
 #ifdef CONFIG_SPACEMIT_FLASH
 		/*if download and flash div to many time, that the crc is not correct*/
 		printf("write_raw_image, \n");
-		crc_val = crc32_wd(crc_val, (const uchar *)download_buffer, download_bytes, CHUNKSZ_CRC32);
-		if (check_blk_image_crc(dev_desc, crc_val, info.start, info.blksz, download_bytes))
+		// compare_val = crc32_wd(compare_val, (const uchar *)download_buffer, download_bytes, CHUNKSZ_CRC32);
+		compare_val += checksum64(download_buffer, download_bytes);
+		if (compare_blk_image_val(dev_desc, compare_val, info.start, info.blksz, download_bytes))
 			fastboot_fail("compare crc fail", response);
 #endif
 	}

drivers/fastboot/fb_command.c

@@ -273,7 +273,7 @@ static void download(char *cmd_parameter, char *response)
 	if (fastboot_bytes_expected > fastboot_buf_size) {
 		fastboot_fail(cmd_parameter, response);
 	} else {
-		pr_debug("Starting download of %d bytes\n",
+		pr_info("Starting download of %d bytes\n",
 		       fastboot_bytes_expected);
 		fastboot_response("DATA", response, "%s", cmd_parameter);
 	}
@@ -304,7 +304,7 @@ static void upload(char *cmd_parameter, char *response)
 	if (fastboot_bytes_expected > fastboot_buf_size) {
 		fastboot_fail(cmd_parameter, response);
 	} else {
-		pr_debug("Starting upload of %d bytes\n",
+		pr_info("Starting upload of %d bytes\n",
 		       fastboot_bytes_expected);
 		fastboot_response("PUSH", response, "%08x", fastboot_bytes_expected);
 	}
@@ -420,7 +420,7 @@ void fastboot_data_complete(char *response)
 {
 	/* Download complete. Respond with "OKAY" */
 	fastboot_okay(NULL, response);
-	pr_debug("\ndownloading/uploading of %d bytes finished\n", fastboot_bytes_received);
+	pr_info("\ndownloading/uploading of %d bytes finished\n", fastboot_bytes_received);
 	image_size = fastboot_bytes_received;
 	env_set_hex("filesize", image_size);
 	fastboot_bytes_expected = 0;
@@ -664,7 +664,7 @@ static void oem_partconf(char *cmd_parameter, char *response)
 	/* execute 'mmc partconfg' command with cmd_parameter arguments*/
 	snprintf(cmdbuf, sizeof(cmdbuf), "mmc partconf %x %s 0",
 		 CONFIG_FASTBOOT_FLASH_MMC_DEV, cmd_parameter);
-	pr_debug("Execute: %s\n", cmdbuf);
+	pr_info("Execute: %s\n", cmdbuf);
 	if (run_command(cmdbuf, 0))
 		fastboot_fail("Cannot set oem partconf", response);
 	else
@@ -691,7 +691,7 @@ static void oem_bootbus(char *cmd_parameter, char *response)
 	/* execute 'mmc bootbus' command with cmd_parameter arguments*/
 	snprintf(cmdbuf, sizeof(cmdbuf), "mmc bootbus %x %s",
 		 CONFIG_FASTBOOT_FLASH_MMC_DEV, cmd_parameter);
-	pr_debug("Execute: %s\n", cmdbuf);
+	pr_info("Execute: %s\n", cmdbuf);
 	if (run_command(cmdbuf, 0))
 		fastboot_fail("Cannot set oem bootbus", response);
 	else
@@ -781,7 +781,7 @@ static void oem_read(char *cmd_parameter, char *response)
 		/* if read data from mtd partition success, it would not try to read from blk dev*/
 		if (fastboot_bytes_expected > 0)
 			return;
-		pr_debug("read data from blk dev\n");
+		pr_info("read data from blk dev\n");
 		fastboot_bytes_expected = fastboot_blk_read(part, off, fastboot_buf_addr, response);
 
 		return;

drivers/fastboot/fb_common.c

@@ -143,7 +143,7 @@ void fastboot_boot(void)
 
 		snprintf(boot_addr_start, sizeof(boot_addr_start) - 1,
 			 "0x%p", fastboot_buf_addr);
-		pr_debug("Booting kernel at %s...\n\n\n", boot_addr_start);
+		pr_info("Booting kernel at %s...\n\n\n", boot_addr_start);
 
 		do_bootm(NULL, 0, 2, bootm_args);
 

drivers/fastboot/fb_getvar.c

@@ -125,29 +125,41 @@ static int getvar_get_part_info(const char *part_name, char *response,
 				size_t *size)
 {
 	int r;
-# if CONFIG_IS_ENABLED(FASTBOOT_FLASH_MMC) || CONFIG_IS_ENABLED(FASTBOOT_MULTI_FLASH_OPTION_MMC)
-	struct blk_desc *dev_desc;
-	struct disk_partition part_info;
+	u32 boot_mode = get_boot_pin_select();
+	switch(boot_mode){
+#if CONFIG_IS_ENABLED(FASTBOOT_FLASH_MTD) || CONFIG_IS_ENABLED(FASTBOOT_MULTI_FLASH_OPTION_MTD)
+	case BOOT_MODE_NOR:
+	case BOOT_MODE_NAND:
+		struct part_info *mtd_part_info;
+		r = fastboot_mtd_get_part_info(part_name, &mtd_part_info, response);
+		if (r >= 0 && size)
+			*size = mtd_part_info->size;
+		break;
+#endif
 
-	r = fastboot_mmc_get_part_info(part_name, &dev_desc, &part_info,
-				       response);
-	if (r >= 0 && size)
-		*size = part_info.size * part_info.blksz;
-# elif CONFIG_IS_ENABLED(FASTBOOT_FLASH_NAND)
+#if CONFIG_IS_ENABLED(FASTBOOT_FLASH_MMC) || CONFIG_IS_ENABLED(FASTBOOT_MULTI_FLASH_OPTION_MMC)
+	case BOOT_MODE_EMMC:
+	case BOOT_MODE_SD:
+		struct blk_desc *dev_desc;
+		struct disk_partition part_info;
+
+		r = fastboot_mmc_get_part_info(part_name, &dev_desc, &part_info,
+						response);
+		if (r >= 0 && size)
+			*size = part_info.size * part_info.blksz;
+		break;
+#endif
+	default:
+		fastboot_fail("this storage is not supported in bootloader", response);
+		r = -ENODEV;
+	}
+
+#if CONFIG_IS_ENABLED(FASTBOOT_FLASH_NAND)
 	struct part_info *part_info;
-
 	r = fastboot_nand_get_part_info(part_name, &part_info, response);
 	if (r >= 0 && size)
 		*size = part_info->size;
-# elif CONFIG_IS_ENABLED(FASTBOOT_FLASH_MTD) || CONFIG_IS_ENABLED(FASTBOOT_MULTI_FLASH_OPTION_MTD)
-	struct part_info *mtd_part_info;
-	r = fastboot_mtd_get_part_info(part_name, &mtd_part_info, response);
-	if (r >= 0 && size)
-		*size = mtd_part_info->size;
-# else
-	fastboot_fail("this storage is not supported in bootloader", response);
-	r = -ENODEV;
-# endif
+#endif
 
 	return r;
 }
@@ -259,6 +271,8 @@ static void getvar_mtd_size(char *var_parameter, char *response)
 
 			}
 		}
+		fastboot_fail("flash to mtd dev but can not get mtd size", response);
+		return;
 #endif
 	default:
 		fastboot_okay("NULL", response);

drivers/fastboot/fb_mmc.c

@@ -521,7 +521,7 @@ void fastboot_mmc_flash_write(const char *cmd, void *download_buffer,
 	static struct flash_dev *fdev = NULL;
 	u32 __maybe_unused fsbl_offset = 0;
 	/*save crc value to compare after flash image*/
-	u32 crc_val = 0;
+	u64 compare_val = 0;
 
 	if (fdev == NULL){
 		fdev = malloc(sizeof(struct flash_dev));
@@ -538,13 +538,13 @@ void fastboot_mmc_flash_write(const char *cmd, void *download_buffer,
 		printf("init fdev success\n");
 	}
 
-	/*flash env*/
-	if (strcmp(cmd, "env") == 0) {
-		printf("flash env to emmc\n");
-		fastboot_oem_flash_env(cmd, fastboot_buf_addr, download_bytes,
-								response, fdev);
-		return;
-	}
+	/* flash env */
+	/*if (strcmp(cmd, "env") == 0) {*/
+	/*	printf("flash env to emmc\n");*/
+	/*	fastboot_oem_flash_env(cmd, fastboot_buf_addr, download_bytes,*/
+	/*							response, fdev);*/
+	/*	return;*/
+	/*}*/
 	if (strcmp(cmd, "bootinfo") == 0) {
 		printf("flash bootinfo\n");
 		fastboot_oem_flash_bootinfo(cmd, fastboot_buf_addr, download_bytes,
@@ -699,8 +699,9 @@ void fastboot_mmc_flash_write(const char *cmd, void *download_buffer,
 #ifdef CONFIG_SPACEMIT_FLASH
 		/*if download and flash div to many time, that the crc is not correct*/
 		printf("write_raw_image end\n");
-		crc_val = crc32_wd(crc_val, (const uchar *)download_buffer, download_bytes, CHUNKSZ_CRC32);
-		if (check_blk_image_crc(dev_desc, crc_val, info.start, info.blksz, download_bytes))
+		// compare_val = crc32_wd(compare_val, (const uchar *)download_buffer, download_bytes, CHUNKSZ_CRC32);
+		compare_val += checksum64(download_buffer, download_bytes);
+		if (compare_blk_image_val(dev_desc, compare_val, info.start, info.blksz, download_bytes))
 			fastboot_fail("compare crc fail", response);
 #endif
 	}

drivers/fastboot/fb_mtd.c

@@ -313,7 +313,7 @@ void fastboot_mtd_flash_write(const char *cmd, void *download_buffer,
 	char *token;
 	char cmd_buf[256];
 	int need_erase = 1;
-	u32 crc_val = 0;
+	u64 compare_val = 0;
 
 	printf("Starting fastboot_mtd_flash_write for %s\n", cmd);
 #ifdef CONFIG_SPACEMIT_FLASH
@@ -364,12 +364,12 @@ void fastboot_mtd_flash_write(const char *cmd, void *download_buffer,
 	}
 
 	/*flash env*/
-	if (strcmp(cmd, "env") == 0) {
-		printf("flash env \n");
-		fastboot_oem_flash_env(cmd, fastboot_buf_addr, download_bytes,
-								response, fdev);
-		return;
-	}
+	/*if (strcmp(cmd, "env") == 0) {*/
+	/*	printf("flash env \n");*/
+	/*	fastboot_oem_flash_env(cmd, fastboot_buf_addr, download_bytes,*/
+	/*							response, fdev);*/
+	/*	return;*/
+	/*}*/
 #endif
 
 	ret = fb_mtd_lookup(cmd, &mtd, &part);
@@ -457,9 +457,10 @@ void fastboot_mtd_flash_write(const char *cmd, void *download_buffer,
 				download_bytes, part->name);
 		}
 
-		printf("check crc\n");
-		crc_val = crc32_wd(crc_val, (const uchar *)download_buffer, download_bytes, CHUNKSZ_CRC32);
-		if (check_mtd_image_crc(mtd, crc_val, download_bytes)){
+		pr_info("compare data valid or not\n");
+		// crc_val = crc32_wd(crc_val, (const uchar *)download_buffer, download_bytes, CHUNKSZ_CRC32);
+		compare_val += checksum64(download_buffer, download_bytes);
+		if (compare_mtd_image_val(mtd, compare_val, download_bytes)){
 			fastboot_fail("compare crc fail", response);
 			return;
 		}

drivers/fastboot/fb_spacemit.c

@@ -95,17 +95,16 @@ static int _write_gpt_partition(struct flash_dev *fdev, char *response)
 	return 0;
 }
 
-int _update_partinfo_to_env(void *download_buffer, u32 download_bytes,
+int _clear_env_part(void *download_buffer, u32 download_bytes,
 								 struct flash_dev *fdev)
 {
 	u32 boot_mode = get_boot_pin_select();
-	char cmdbuf[64] = {"\0"};
 
-
-	sprintf(cmdbuf, "env export -c -s 0x%lx 0x%lx", (ulong)CONFIG_ENV_SIZE, (ulong)download_buffer);
-	if (run_command(cmdbuf, 0)){
-		return -1;
-	}
+	/* char cmdbuf[64] = {"\0"}; */
+	/* sprintf(cmdbuf, "env export -c -s 0x%lx 0x%lx", (ulong)CONFIG_ENV_SIZE, (ulong)download_buffer); */
+	/* if (run_command(cmdbuf, 0)){ */
+	/* 	return -1; */
+	/* } */
 
 	switch(boot_mode){
 #ifdef CONFIG_ENV_IS_IN_MMC
@@ -113,7 +112,9 @@ int _update_partinfo_to_env(void *download_buffer, u32 download_bytes,
 	case BOOT_MODE_SD:
 		/*write to emmc default offset*/
 		debug("write env to mmc offset:%lx\n", (ulong)FLASH_ENV_OFFSET_MMC);
-		//maybe it could just use env save command
+
+		/*should not write env to env part*/
+		memset(download_buffer, 0, CONFIG_ENV_SIZE);
 		fastboot_mmc_flash_offset((u32)FLASH_ENV_OFFSET_MMC, download_buffer, (u32)CONFIG_ENV_SIZE);
 		break;
 #endif
@@ -136,10 +137,12 @@ int _update_partinfo_to_env(void *download_buffer, u32 download_bytes,
 			ret = _fb_mtd_erase(mtd, CONFIG_ENV_SIZE);
 			if (ret)
 				return -1;
-			ret = _fb_mtd_write(mtd, download_buffer, 0, CONFIG_ENV_SIZE, NULL);
-			if (ret){
-				pr_err("can not write env to mtd flash\n");
-			}
+
+			/*should not write env to env part*/
+			/* ret = _fb_mtd_write(mtd, download_buffer, 0, CONFIG_ENV_SIZE, NULL); */
+			/* if (ret){ */
+			/* 	pr_err("can not write env to mtd flash\n"); */
+			/* } */
 		}
 		break;
 #endif
@@ -302,6 +305,24 @@ int _parse_flash_config(struct flash_dev *fdev, void *load_flash_addr)
 			else
 				node_file = "";
 
+			cJSON *cj_volume_images = cJSON_GetObjectItem(arraypart, "volume_images");
+			if (cj_volume_images) {
+				int volume_count = cJSON_GetArraySize(cj_volume_images);
+				fdev->parts_info[part_index].volume_images = malloc(volume_count * sizeof(struct flash_volume_image));
+				fdev->parts_info[part_index].volume_images_count = volume_count;
+
+				int volume_index = 0;
+				cJSON *cj_volume_image = NULL;
+				cJSON_ArrayForEach(cj_volume_image, cj_volume_images) {
+					const char *volume_name = cj_volume_image->string;
+					const char *image_file = cj_volume_image->valuestring;
+
+					fdev->parts_info[part_index].volume_images[volume_index].name = strdup(volume_name);
+					fdev->parts_info[part_index].volume_images[volume_index].file_name = strdup(image_file);
+					volume_index++;
+				}
+			}
+
 			cJSON *cj_offset = cJSON_GetObjectItem(arraypart, "offset");
 			if (cj_offset && cj_offset->type == cJSON_String)
 				node_offset = cj_offset->valuestring;
@@ -385,9 +406,14 @@ int _parse_flash_config(struct flash_dev *fdev, void *load_flash_addr)
 				}
 			}
 
-			pr_info("part info %s, %s\n", \
-				fdev->parts_info[part_index].part_name, \
-				fdev->parts_info[part_index].file_name);
+			pr_info("Part info: %s, %s\n", fdev->parts_info[part_index].part_name, fdev->parts_info[part_index].file_name ? fdev->parts_info[part_index].file_name : "None");
+			if (fdev->parts_info[part_index].volume_images_count > 0) {
+				for (int j = 0; j < fdev->parts_info[part_index].volume_images_count; j++) {
+					pr_info("Volume name: %s, Image file: %s\n",
+						fdev->parts_info[part_index].volume_images[j].name,
+						fdev->parts_info[part_index].volume_images[j].file_name);
+				}
+			}
 			part_index++;
 		}
 	}else{
@@ -443,8 +469,8 @@ void fastboot_oem_flash_gpt(const char *cmd, void *download_buffer, u32 download
 	}
 
 	/*set partition to env*/
-	if (_update_partinfo_to_env(download_buffer, download_bytes, fdev)){
-		fastboot_fail("update part info to env fail", response);
+	if (_clear_env_part(download_buffer, download_bytes, fdev)){
+		fastboot_fail("clear env fail", response);
 		return;
 	}
 
@@ -481,8 +507,8 @@ void fastboot_oem_flash_env(const char *cmd, void *download_buffer, u32 download
 		}
 	}
 
-	if (_update_partinfo_to_env(download_buffer, download_bytes, fdev)){
-		fastboot_fail("update part info to env fail", response);
+	if (_clear_env_part(download_buffer, download_bytes, fdev)){
+		fastboot_fail("clear env fail", response);
 		return;
 	}
 
@@ -541,7 +567,7 @@ int flash_mmc_boot_op(struct blk_desc *dev_desc, void *buffer,
 	}
 
 	if (buffer) { /* flash */
-		pr_debug("%s, %p\n", __func__, buffer);
+		pr_info("%s, %p\n", __func__, buffer);
 		/* determine number of blocks to write */
 		blksz = dev_desc->blksz;
 		blkcnt = ((buff_sz + (blksz - 1)) & ~(blksz - 1));
@@ -565,7 +591,7 @@ int flash_mmc_boot_op(struct blk_desc *dev_desc, void *buffer,
 			return -1;
 		}
 
-		pr_debug("........ wrote %lu bytes to EMMC_BOOT%d\n",
+		pr_info("........ wrote %lu bytes to EMMC_BOOT%d\n",
 			   blkcnt * blksz, hwpart);
 	}
 
@@ -614,24 +640,74 @@ int fastboot_mmc_flash_offset(u32 start_offset, void *download_buffer,
 			return -1;
 	}
 
-	pr_debug("........ wrote 0x%lx sector bytes to blk offset 0x%lx\n", blkcnt, info.start);
+	pr_info("........ wrote 0x%lx sector bytes to blk offset 0x%lx\n", blkcnt, info.start);
 #endif
 	return 0;
 }
 
-int check_blk_image_crc(struct blk_desc *dev_desc, ulong crc_compare, lbaint_t part_start_cnt,
-			ulong blksz, int image_size)
+
+u64 checksum64(u64 *baseaddr, u64 size)
+{
+	u64 sum = 0;
+	u64 i, cachelines;
+	u64 dwords, bytes;
+	u8 *data;
+
+	// each cache line has 64bytes
+	cachelines = size / 64;
+	bytes = size % 64;
+	dwords = bytes / 8;
+	bytes = bytes % 8;
+
+	for (i = 0; i < cachelines; i++) {
+		u64 val1 = *(baseaddr + 0);
+		u64 val2 = *(baseaddr + 1);
+		u64 val3 = *(baseaddr + 2);
+		u64 val4 = *(baseaddr + 3);
+		u64 val5 = *(baseaddr + 4);
+		u64 val6 = *(baseaddr + 5);
+		u64 val7 = *(baseaddr + 6);
+		u64 val8 = *(baseaddr + 7);
+
+		sum += val1;
+		sum += val2;
+		sum += val3;
+		sum += val4;
+		sum += val5;
+		sum += val6;
+		sum += val7;
+		sum += val8;
+		baseaddr += 8;
+	}
+
+	/*calculate the rest of dowrd*/
+	for (i = 0; i < dwords; i++) {
+		sum += *baseaddr;
+		baseaddr++;
+	}
+
+	data = (u8*)baseaddr;
+	/*calculate the rest of byte*/
+	for (i = 0; i < bytes; i++) {
+		sum += data[i];
+	}
+
+	return sum;
+}
+
+int compare_blk_image_val(struct blk_desc *dev_desc, u64 compare_val, lbaint_t part_start_cnt,
+			ulong blksz, uint64_t image_size)
 {
 	void *load_addr = (void *)map_sysmem(RECOVERY_LOAD_IMG_ADDR, 0);
 	u32 div_times = (image_size + RECOVERY_LOAD_IMG_SIZE - 1) / RECOVERY_LOAD_IMG_SIZE;
-	ulong crc = 0;
-	int byte_remain = image_size;
-	int download_bytes = 0;
+	u64 calculate = 0;
+	uint64_t byte_remain = image_size;
+	uint64_t download_bytes = 0;
 	u32 blk_size, n;
 	unsigned long time_start_flash = get_timer(0);
 
-	/*if crc_compare is 0, return 0 directly*/
-	if (!crc_compare)
+	/*if compare_val is 0, return 0 directly*/
+	if (!compare_val)
 		return 0;
 
 	if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
@@ -640,7 +716,7 @@ int check_blk_image_crc(struct blk_desc *dev_desc, ulong crc_compare, lbaint_t p
 	}
 
 	for (int i = 0; i < div_times; i++) {
-		debug("\ndownload and flash div %d\n", i);
+		pr_info("\ndownload and flash div %d\n", i);
 		download_bytes = byte_remain > RECOVERY_LOAD_IMG_SIZE ? RECOVERY_LOAD_IMG_SIZE : byte_remain;
 
 		blk_size = (download_bytes + (blksz - 1)) / blksz;
@@ -649,36 +725,39 @@ int check_blk_image_crc(struct blk_desc *dev_desc, ulong crc_compare, lbaint_t p
 			pr_err("mmc read blk not equal it should be\n");
 			return -1;
 		}
-		crc = crc32_wd(crc, (const uchar *)load_addr, download_bytes, CHUNKSZ_CRC32);
+		// calculate = crc32_wd(crc, (const uchar *)load_addr, download_bytes, CHUNKSZ_CRC32);
+		calculate += checksum64(load_addr, download_bytes);
+
 		part_start_cnt += blk_size;
 		byte_remain -= download_bytes;
 	}
 
-	pr_debug("get crc value:%lx, compare crc:%lx\n", crc, crc_compare);
+	pr_info("get calculate value:%llx, compare calculate:%llx\n", calculate, compare_val);
 	time_start_flash = get_timer(time_start_flash);
-	pr_debug("compare crc32 over, use time:%lu ms\n\n", time_start_flash);
-	return (crc == crc_compare) ? 0 : -1;
+	pr_info("\ncompare over, use time:%lu ms\n\n", time_start_flash);
+	return (calculate == compare_val) ? 0 : -1;
 }
 
-int check_mtd_image_crc(struct mtd_info *mtd, ulong crc_compare, int image_size)
+
+int compare_mtd_image_val(struct mtd_info *mtd, u64 compare_val, uint64_t image_size)
 {
 	void *load_addr = (void *)map_sysmem(RECOVERY_LOAD_IMG_ADDR, 0);
 	u32 div_times = (image_size + RECOVERY_LOAD_IMG_SIZE - 1) / RECOVERY_LOAD_IMG_SIZE;
-	ulong crc = 0;
-	int byte_remain = image_size;
-	int download_bytes = 0;
+	u64 calculate = 0;
+	uint64_t byte_remain = image_size;
+	uint64_t download_bytes = 0;
 	u32 hdr_off = 0;
 	int ret;
 
-	debug("mtd size:%llx, image_size:%x\n", mtd->size, image_size);
+	debug("mtd size:%llx, image_size:%llx\n", mtd->size, image_size);
 	unsigned long time_start_flash = get_timer(0);
 
-	/*if crc_compare is 0, return 0 directly*/
-	if (!crc_compare)
+	/*if compare_val is 0, return 0 directly*/
+	if (!compare_val)
 		return 0;
 
 	for (int i = 0; i < div_times; i++) {
-		debug("\ndownload and flash div %d\n", i);
+		pr_info("\ndownload and flash div %d\n", i);
 		download_bytes = byte_remain > RECOVERY_LOAD_IMG_SIZE ? RECOVERY_LOAD_IMG_SIZE : byte_remain;
 		ret = _fb_mtd_read(mtd, load_addr, hdr_off, download_bytes, NULL);
 		if (ret){
@@ -686,15 +765,16 @@ int check_mtd_image_crc(struct mtd_info *mtd, ulong crc_compare, int image_size)
 			return -1;
 		}
 
-		crc = crc32_wd(crc, (const uchar *)load_addr, download_bytes, CHUNKSZ_CRC32);
+		// calculate = crc32_wd(calculate, (const uchar *)load_addr, download_bytes, CHUNKSZ_CRC32);
+		calculate += checksum64(load_addr, download_bytes);
 		hdr_off += download_bytes;
 		byte_remain -= download_bytes;
 	}
 
-	pr_debug("get crc value:%lx, compare crc:%lx\n", crc, crc_compare);
+	pr_info("get calculate value:%llx, compare calculate:%llx\n", calculate, compare_val);
 	time_start_flash = get_timer(time_start_flash);
-	pr_debug("compare crc32 over, use time:%lu ms\n\n", time_start_flash);
-	return (crc == crc_compare) ? 0 : -1;
+	pr_info("compare over, use time:%lu ms\n\n", time_start_flash);
+	return (calculate == compare_val) ? 0 : -1;
 }
 
 

drivers/i2c/spacemit_i2c.c

@@ -629,7 +629,7 @@ static int spacemit_i2c_probe(struct udevice *bus)
 	priv->base = (void *)devfdt_get_addr_ptr(bus);
 	ret = dev_read_u32(bus, "clock-frequency", &priv->clk_rate);
         if (ret) {
-                pr_debug("Default to 100kHz\n");
+                pr_info("Default to 100kHz\n");
 		/* default clock rate: 100k */
                 priv->clk_rate = 100000;
         }

drivers/mmc/k1x_sdhci.c

@@ -425,7 +425,11 @@ static int spacemit_sdhci_probe(struct udevice *dev)
 	}
 
 	/* Set quirks */
+#if defined(CONFIG_SPL_BUILD)
+	host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD;
+#else
 	host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_32BIT_DMA_ADDR;
+#endif
 	host->host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz;
 	host->max_clk = priv->clk_src_freq;
 

drivers/mmc/mmc-uclass.c

@@ -294,7 +294,7 @@ struct mmc *find_mmc_device(int dev_num)
 
 	if (ret) {
 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
-		pr_debug("MMC Device %d not found\n", dev_num);
+		pr_err("MMC Device %d not found\n", dev_num);
 #endif
 		return NULL;
 	}
@@ -378,7 +378,7 @@ void print_mmc_devices(char separator)
 		struct mmc *m = mmc_get_mmc_dev(dev);
 
 		if (!first) {
-			pr_debug("%c", separator);
+			pr_info("%c", separator);
 			if (separator != '\n')
 				puts(" ");
 		}
@@ -387,7 +387,7 @@ void print_mmc_devices(char separator)
 		else
 			mmc_type = NULL;
 
-		pr_debug("%s: %d", m->cfg->name, mmc_get_blk_desc(m)->devnum);
+		pr_info("%s: %d", m->cfg->name, mmc_get_blk_desc(m)->devnum);
 		if (mmc_type)
 			printf(" (%s)", mmc_type);
 	}

drivers/mmc/mmc.c

@@ -1790,6 +1790,12 @@ static int sd_select_mode_and_width(struct mmc *mmc, uint card_caps)
 		return 0;
 	}
 
+#if CONFIG_IS_ENABLED(MMC_WRITE)
+	err = sd_read_ssr(mmc);
+	if (err)
+		pr_warn("unable to read ssr\n");
+#endif
+
 	/* Restrict card's capabilities by what the host can do */
 	caps = card_caps & mmc->host_caps;
 
@@ -1834,11 +1840,6 @@ static int sd_select_mode_and_width(struct mmc *mmc, uint card_caps)
 				}
 #endif
 
-#if CONFIG_IS_ENABLED(MMC_WRITE)
-				err = sd_read_ssr(mmc);
-				if (err)
-					pr_warn("unable to read ssr\n");
-#endif
 				if (!err)
 					return 0;
 

drivers/mtd/mtd_uboot.c

@@ -169,7 +169,7 @@ static int mtd_del_parts(struct mtd_info *mtd, bool quiet)
 	/* do not delete partitions if they are in use. */
 	if (mtd_partitions_used(mtd)) {
 		if (!quiet){
-			pr_debug("\"%s\" partitions still in use, can't delete them\n",
+			pr_info("\"%s\" partitions still in use, can't delete them\n",
 			       mtd->name);
 		}
 		return -EACCES;
@@ -235,13 +235,13 @@ static int parse_mtdparts(const char *mtdparts, const char *mtdids)
 			colon = NULL;
 
 		if (!colon) {
-			pr_debug("Wrong mtdparts: %s\n", mtdparts);
+			pr_info("Wrong mtdparts: %s\n", mtdparts);
 			return -EINVAL;
 		}
 
 		mtd_name_len = (unsigned int)(colon - mtdparts);
 		if (mtd_name_len + 1 > sizeof(mtd_name)) {
-			pr_debug("MTD name too long: %s\n", mtdparts);
+			pr_info("MTD name too long: %s\n", mtdparts);
 			return -EINVAL;
 		}
 
@@ -269,7 +269,7 @@ static int parse_mtdparts(const char *mtdparts, const char *mtdids)
 			 * pointer forward until the next set of partitions.
 			 */
 			if (ret || IS_ERR_OR_NULL(mtd)) {
-				pr_debug("Could not find a valid device for %s\n",
+				pr_info("Could not find a valid device for %s\n",
 				       mtd_name);
 				mtdparts = mtdparts_next;
 				continue;
@@ -294,7 +294,7 @@ static int parse_mtdparts(const char *mtdparts, const char *mtdids)
 		 */
 		ret = mtd_parse_partitions(mtd, &mtdparts, &parts, &nparts);
 		if (ret) {
-			pr_debug("Could not parse device %s\n", mtd->name);
+			pr_info("Could not parse device %s\n", mtd->name);
 			put_mtd_device(mtd);
 			return -EINVAL;
 		}
@@ -360,7 +360,7 @@ int mtd_probe_devices(void)
 	/* If both mtdparts and mtdids are non-empty, parse */
 	if (mtdparts && mtdids) {
 		if (parse_mtdparts(mtdparts, mtdids) < 0){
-			pr_debug("Failed parsing MTD partitions from mtdparts!\n");
+			pr_info("Failed parsing MTD partitions from mtdparts!\n");
 		}
 	}
 
@@ -368,7 +368,7 @@ int mtd_probe_devices(void)
 	mtd_for_each_device(mtd) {
 		if (list_empty(&mtd->partitions)) {
 			if (add_mtd_partitions_of(mtd) < 0){
-				pr_debug("Failed parsing MTD %s OF partitions!\n",
+				pr_info("Failed parsing MTD %s OF partitions!\n",
 					mtd->name);
 			}
 		}

drivers/mtd/mtdcore.c

@@ -78,7 +78,13 @@ static struct class mtd_class = {
 	.resume = mtd_cls_resume,
 };
 #else
+
+#if defined (CONFIG_SPL_BUILD)
+// NO need to support so many MTD partition during SPL stage
+#define MAX_IDR_ID	16
+#else
 #define MAX_IDR_ID	64
+#endif
 
 struct idr_layer {
 	int	used;
@@ -146,7 +152,17 @@ int idr_alloc(struct idr *idp, void *ptr, int start, int end, gfp_t gfp_mask)
 }
 #endif
 
+
+#if defined (CONFIG_SPL_BUILD)
+// change mtd idr item data from bss to data section, otherwise it will be memset
+// and cause mtd partition parse fail in below scenario
+// board_init_f: mtd_probe_devices, get_mtd_device_nm
+// bss section memset
+// board_init_r: mtd_probe_devices(bypass), get_mtd_device_nm(FAIL)
+__section(".data.mtd_idr") static DEFINE_IDR(mtd_idr);
+#else
 static DEFINE_IDR(mtd_idr);
+#endif
 
 /* These are exported solely for the purpose of mtd_blkdevs.c. You
    should not use them for _anything_ else */

drivers/mtd/mtdpart.c

@@ -110,7 +110,7 @@ static int mtd_parse_partition(const char **_mtdparts,
 	} else {
 		partition->size = ustrtoull(mtdparts, (char **)&mtdparts, 0);
 		if (partition->size < SZ_4K) {
-			pr_debug("Minimum partition size 4kiB, %lldB requested\n",
+			pr_err("Minimum partition size 4kiB, %lldB requested\n",
 			       partition->size);
 			return -EINVAL;
 		}
@@ -128,12 +128,12 @@ static int mtd_parse_partition(const char **_mtdparts,
 		name = ++mtdparts;
 		mtdparts = strchr(name, ')');
 		if (!mtdparts) {
-			pr_debug("No closing ')' found in partition name\n");
+			pr_err("No closing ')' found in partition name\n");
 			return -EINVAL;
 		}
 		name_len = mtdparts - name + 1;
 		if ((name_len - 1) == 0) {
-			pr_debug("Empty partition name\n");
+			pr_err("Empty partition name\n");
 			return -EINVAL;
 		}
 		mtdparts++;
@@ -151,14 +151,14 @@ static int mtd_parse_partition(const char **_mtdparts,
 	/* Check for a potential next partition definition */
 	if (*mtdparts == ',') {
 		if (partition->size == MTD_SIZE_REMAINING) {
-			pr_debug("No partitions allowed after a fill-up\n");
+			pr_err("No partitions allowed after a fill-up\n");
 			return -EINVAL;
 		}
 		++mtdparts;
 	} else if ((*mtdparts == ';') || (*mtdparts == '\0')) {
 		/* NOP */
 	} else {
-		pr_debug("Unexpected character '%c' in mtdparts\n", *mtdparts);
+		pr_err("Unexpected character '%c' in mtdparts\n", *mtdparts);
 		return -EINVAL;
 	}
 
@@ -225,7 +225,7 @@ int mtd_parse_partitions(struct mtd_info *parent, const char **_mtdparts,
 	/* Allocate an array of partitions to give back to the caller */
 	parts = malloc(sizeof(*parts) * nparts);
 	if (!parts) {
-		pr_debug("Not enough space to save partitions meta-data\n");
+		pr_err("Not enough space to save partitions meta-data\n");
 		return -ENOMEM;
 	}
 
@@ -241,7 +241,7 @@ int mtd_parse_partitions(struct mtd_info *parent, const char **_mtdparts,
 
 		sz = parts[idx].size;
 		if (sz < parent->writesize || do_div(sz, parent->writesize)) {
-			pr_debug("Partition size must be a multiple of %d\n",
+			pr_err("Partition size must be a multiple of %d\n",
 			       parent->writesize);
 			return -EINVAL;
 		}
@@ -533,7 +533,7 @@ static int do_del_mtd_partitions(struct mtd_info *master)
 		debug("Deleting %s MTD partition\n", slave->name);
 		ret = del_mtd_device(slave);
 		if (ret < 0) {
-			pr_debug("Error when deleting partition \"%s\" (%d)\n",
+			pr_err("Error when deleting partition \"%s\" (%d)\n",
 			       slave->name, ret);
 			err = ret;
 			continue;

drivers/mtd/spi/spi-nor-core.c

@@ -4016,7 +4016,7 @@ int spi_nor_scan(struct spi_nor *nor)
 	nor->sector_size = mtd->erasesize;
 
 #ifndef CONFIG_SPL_BUILD
-	pr_debug("SF: Detected %s with page size ", nor->name);
+	printf("SF: Detected %s with page size ", nor->name);
 	print_size(nor->page_size, ", erase size ");
 	print_size(nor->erase_size, ", total ");
 	print_size(nor->size, "");

drivers/power/regulator/regulator-uclass.c

@@ -330,15 +330,15 @@ static void regulator_show(struct udevice *dev, int ret)
 
 	uc_pdata = dev_get_uclass_plat(dev);
 
-	printf("%s@%s: ", dev->name, uc_pdata->name);
+	pr_info("%s@%s: ", dev->name, uc_pdata->name);
 	if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UV)
-		printf("set %d uV", uc_pdata->min_uV);
+		pr_info("set %d uV", uc_pdata->min_uV);
 	if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UA)
-		printf("; set %d uA", uc_pdata->min_uA);
-	printf("; enabling");
+		pr_info("; set %d uA", uc_pdata->min_uA);
+	pr_info("; enabling");
 	if (ret)
-		printf(" (ret: %d)", ret);
-	printf("\n");
+		pr_info(" (ret: %d)", ret);
+	pr_info("\n");
 }
 
 int regulator_autoset_by_name(const char *platname, struct udevice **devp)

drivers/power/regulator/spacemit_regulator.c

@@ -247,42 +247,50 @@ static int buck_set_value(struct udevice *dev, int uvolt)
 
 static int buck_set_suspend_value(struct udevice *dev, int uvolt)
 {
-	int sel, ret = -EINVAL;
-	int buck = dev->driver_data - 1;
-	const struct pm8xx_buck_desc *info = get_buck_reg(dev->parent, buck);
-
-	if (info == NULL)
-		return -ENOSYS;
-
-	sel = regulator_map_voltage_linear_range(info, uvolt, uvolt);
-	if (sel >=0) {
-		/* has get the selctor */
-		 sel <<= ffs(info->vsel_sleep_msk) - 1;
-		 ret = pmic_clrsetbits(dev->parent, info->vsel_sleep_reg, info->vsel_sleep_msk, sel);
-	}
-
-	return ret;
+	/* the hardware has already support the function */
+/**
+ *	int sel, ret = -EINVAL;
+ *	int buck = dev->driver_data - 1;
+ *	const struct pm8xx_buck_desc *info = get_buck_reg(dev->parent, buck);
+ *
+ *	if (info == NULL)
+ *		return -ENOSYS;
+ *
+ *	sel = regulator_map_voltage_linear_range(info, uvolt, uvolt);
+ *	if (sel >=0) {
+ *		 // has get the selctor
+ *		 sel <<= ffs(info->vsel_sleep_msk) - 1;
+ *		 ret = pmic_clrsetbits(dev->parent, info->vsel_sleep_reg, info->vsel_sleep_msk, sel);
+ *	}
+ *
+ *	return ret;
+ */
+	return 0;
 }
 
 static int buck_get_suspend_value(struct udevice *dev)
 {
-	int buck = dev->driver_data - 1;
-	const struct pm8xx_buck_desc *info = get_buck_reg(dev->parent, buck);
-	int mask = info->vsel_sleep_msk;
-	int ret;
-	unsigned int val;
-
-	if (info == NULL)
-		return -ENOSYS;
-
-	ret = pmic_reg_read(dev->parent, info->vsel_sleep_reg);
-	if (ret < 0)
-		return ret;
-	val = ret & mask;
-
-	val >>= ffs(mask) - 1;
-
-	return regulator_desc_list_voltage_linear_range(info, val);
+	/* the hardware has already support the function */
+/**
+ *	int buck = dev->driver_data - 1;
+ *	const struct pm8xx_buck_desc *info = get_buck_reg(dev->parent, buck);
+ *	int mask = info->vsel_sleep_msk;
+ *	int ret;
+ *	unsigned int val;
+ *
+ *	if (info == NULL)
+ *		return -ENOSYS;
+ *
+ *	ret = pmic_reg_read(dev->parent, info->vsel_sleep_reg);
+ *	if (ret < 0)
+ *		return ret;
+ *	val = ret & mask;
+ *
+ *	val >>= ffs(mask) - 1;
+ *
+ *	return regulator_desc_list_voltage_linear_range(info, val);
+ */
+	return 0;
 }
 
 static int buck_get_enable(struct udevice *dev)
@@ -429,42 +437,48 @@ static int ldo_set_value(struct udevice *dev, int uvolt)
 
 static int ldo_set_suspend_value(struct udevice *dev, int uvolt)
 {
-	int sel, ret = -EINVAL;
-	int buck = dev->driver_data - 1;
-	const struct pm8xx_buck_desc *info = get_ldo_reg(dev->parent, buck);
-
-	if (info == NULL)
-		return -ENOSYS;
-
-	sel = regulator_map_voltage_linear_range(info, uvolt, uvolt);
-	if (sel >=0) {
-		/* has get the selctor */
-		 sel <<= ffs(info->vsel_sleep_msk) - 1;
-		 ret = pmic_clrsetbits(dev->parent, info->vsel_sleep_reg, info->vsel_sleep_msk, sel);
-	}
-
-	return ret;
+/**
+ *	int sel, ret = -EINVAL;
+ *	int buck = dev->driver_data - 1;
+ *	const struct pm8xx_buck_desc *info = get_ldo_reg(dev->parent, buck);
+ *
+ *	if (info == NULL)
+ *		return -ENOSYS;
+ *
+ *	sel = regulator_map_voltage_linear_range(info, uvolt, uvolt);
+ *	if (sel >=0) {
+ *	
+ *		 sel <<= ffs(info->vsel_sleep_msk) - 1;
+ *		 ret = pmic_clrsetbits(dev->parent, info->vsel_sleep_reg, info->vsel_sleep_msk, sel);
+ *	}
+ *
+ *	return ret;
+ */
+	return 0;
 }
 
 static int ldo_get_suspend_value(struct udevice *dev)
 {
-	int buck = dev->driver_data - 1;
-	const struct pm8xx_buck_desc *info = get_ldo_reg(dev->parent, buck);
-	int mask = info->vsel_sleep_msk;
-	int ret;
-	unsigned int val;
-
-	if (info == NULL)
-		return -ENOSYS;
-
-	ret = pmic_reg_read(dev->parent, info->vsel_sleep_reg);
-	if (ret < 0)
-		return ret;
-	val = ret & mask;
-
-	val >>= ffs(mask) - 1;
-
-	return regulator_desc_list_voltage_linear_range(info, val);
+/**
+ *	int buck = dev->driver_data - 1;
+ *	const struct pm8xx_buck_desc *info = get_ldo_reg(dev->parent, buck);
+ *	int mask = info->vsel_sleep_msk;
+ *	int ret;
+ *	unsigned int val;
+ *
+ *	if (info == NULL)
+ *		return -ENOSYS;
+ *
+ *	ret = pmic_reg_read(dev->parent, info->vsel_sleep_reg);
+ *	if (ret < 0)
+ *		return ret;
+ *	val = ret & mask;
+ *
+ *	val >>= ffs(mask) - 1;
+ *
+ *	return regulator_desc_list_voltage_linear_range(info, val);
+ */
+	return 0;
 }
 
 static int ldo_get_enable(struct udevice *dev)

drivers/reset/reset-spacemit-k1x.c

@@ -153,6 +153,64 @@ struct spacemit_reset {
 	const struct spacemit_reset_signal *signals;
 };
 
+enum {
+	RESET_TWSI6_SPL = 0,
+	RESET_TWSI8_SPL,
+	RESET_SDH_AXI_SPL,
+	RESET_SDH0_SPL,
+	RESET_USB_AXI_SPL,
+	RESET_USBP1_AXI_SPL,
+	RESET_USB3_0_SPL,
+	RESET_QSPI_SPL,
+	RESET_QSPI_BUS_SPL,
+	RESET_AES_SPL,
+	RESET_SDH2_SPL,
+	RESET_NUMBER_SPL,
+};
+
+#ifdef CONFIG_SPL_BUILD
+static u32 transfer_to_spl_list[][2] = {
+	{RESET_TWSI6, RESET_TWSI6_SPL},
+	{RESET_TWSI8, RESET_TWSI8_SPL},
+	{RESET_SDH_AXI, RESET_SDH_AXI_SPL},
+	{RESET_SDH0, RESET_SDH0_SPL},
+	{RESET_USB_AXI, RESET_USB_AXI_SPL},
+	{RESET_USBP1_AXI, RESET_USBP1_AXI_SPL},
+	{RESET_USB3_0, RESET_USB3_0_SPL},
+	{RESET_QSPI, RESET_QSPI_SPL},
+	{RESET_QSPI_BUS, RESET_QSPI_BUS_SPL},
+	{RESET_SDH2, RESET_SDH2_SPL},
+	{RESET_AES, RESET_AES_SPL},
+};
+
+static const struct spacemit_reset_signal
+	k1x_reset_signals[RESET_NUMBER_SPL] = {
+	[RESET_TWSI6_SPL]   = { APBC_TWSI6_CLK_RST, BIT(2), 0, BIT(2), RST_BASE_TYPE_APBC },
+	[RESET_TWSI8_SPL]   = { APBC_TWSI8_CLK_RST, BIT(2), 0, BIT(2), RST_BASE_TYPE_APBC },
+	[RESET_SDH_AXI_SPL]     = { APMU_SDH0_CLK_RES_CTRL, BIT(0), BIT(0), 0, RST_BASE_TYPE_APMU },
+	[RESET_SDH0_SPL]      = { APMU_SDH0_CLK_RES_CTRL, BIT(1), BIT(1), 0, RST_BASE_TYPE_APMU },
+	[RESET_USB_AXI_SPL]   = { APMU_USB_CLK_RES_CTRL, BIT(0), BIT(0), 0, RST_BASE_TYPE_APMU },
+	[RESET_USBP1_AXI_SPL] = { APMU_USB_CLK_RES_CTRL, BIT(4), BIT(4), 0, RST_BASE_TYPE_APMU },
+	[RESET_USB3_0_SPL]    = { APMU_USB_CLK_RES_CTRL, BIT(9)|BIT(10)|BIT(11), BIT(9)|BIT(10)|BIT(11), 0, RST_BASE_TYPE_APMU },
+	[RESET_QSPI_SPL]  = { APMU_QSPI_CLK_RES_CTRL, BIT(1), BIT(1), 0, RST_BASE_TYPE_APMU },
+	[RESET_QSPI_BUS_SPL]  = { APMU_QSPI_CLK_RES_CTRL, BIT(0), BIT(0), 0, RST_BASE_TYPE_APMU },
+	[RESET_SDH2_SPL] = { APMU_SDH2_CLK_RES_CTRL, BIT(1), BIT(1), 0, RST_BASE_TYPE_APMU },
+	[RESET_AES_SPL]	 = { APMU_AES_CLK_RES_CTRL, BIT(4), BIT(4), 0, RST_BASE_TYPE_APMU },
+	};
+
+static u32 transfer_reset_id_to_spl(u32 id)
+{
+	u32 listsize = ARRAY_SIZE(transfer_to_spl_list);
+
+	for (int i = 0; i < listsize; i++){
+		if (id == transfer_to_spl_list[i][0]){
+			pr_info("id:%d, %d,\n", id, transfer_to_spl_list[i][1]);
+			return transfer_to_spl_list[i][1];
+		}
+	}
+	return id;
+}
+#else
 static const struct spacemit_reset_signal
 	k1x_reset_signals[RESET_NUMBER] = {
 	[RESET_UART1]   = { APBC_UART1_CLK_RST, BIT(2), 0, BIT(2), RST_BASE_TYPE_APBC },
@@ -257,46 +315,48 @@ static const struct spacemit_reset_signal
 	[RESET_SEC_TIMERS0] 	= { APBC2_TIMERS0_CLK_RST, BIT(2), 0, BIT(2), RST_BASE_TYPE_APBC2 },
 	[RESET_SEC_KPC] 	= { APBC2_KPC_CLK_RST, BIT(2), 0, BIT(2), RST_BASE_TYPE_APBC2 },
 	[RESET_SEC_GPIO] 	= { APBC2_GPIO_CLK_RST, BIT(2), 0, BIT(2), RST_BASE_TYPE_APBC2 },
-};
+	};
+#endif
+
 
 static u32 spacemit_reset_read(struct spacemit_reset *reset,
 	u32 id)
 {
 	void __iomem *base;
 	switch(reset->signals[id].type){
-		case RST_BASE_TYPE_MPMU:
-			base = reset->mpmu_base;
-			break;
-		case RST_BASE_TYPE_APMU:
-			base = reset->apmu_base;
-			break;
-		case RST_BASE_TYPE_APBC:
-			base = reset->apbc_base;
-			break;
-		case RST_BASE_TYPE_APBS:
-			base = reset->apbs_base;
-			break;
-		case RST_BASE_TYPE_CIU:
-			base = reset->ciu_base;
-			break;
-		case RST_BASE_TYPE_DCIU:
-			base = reset->dciu_base;
-			break;
-		case RST_BASE_TYPE_DDRC:
-			base = reset->ddrc_base;
-			break;
-		case RST_BASE_TYPE_AUDC:
-			base = reset->audio_ctrl_base;
-			break;
-		case RST_BASE_TYPE_APBC2:
-			base = reset->apbc2_base;
-			break;
-		default:
-			base = reset->apbc_base;
-			break;
-
+	case RST_BASE_TYPE_APMU:
+		base = reset->apmu_base;
+		break;
+	case RST_BASE_TYPE_APBC:
+		base = reset->apbc_base;
+		break;
+#ifndef CONFIG_SPL_BUILD
+	case RST_BASE_TYPE_MPMU:
+		base = reset->mpmu_base;
+		break;
+	case RST_BASE_TYPE_APBS:
+		base = reset->apbs_base;
+		break;
+	case RST_BASE_TYPE_CIU:
+		base = reset->ciu_base;
+		break;
+	case RST_BASE_TYPE_DCIU:
+		base = reset->dciu_base;
+		break;
+	case RST_BASE_TYPE_DDRC:
+		base = reset->ddrc_base;
+		break;
+	case RST_BASE_TYPE_AUDC:
+		base = reset->audio_ctrl_base;
+		break;
+	case RST_BASE_TYPE_APBC2:
+		base = reset->apbc2_base;
+		break;
+#endif
+	default:
+		base = reset->apbc_base;
+		break;
 	}
-
 	return readl(base + reset->signals[id].offset);
 }
 
@@ -304,39 +364,41 @@ static void spacemit_reset_write(struct spacemit_reset *reset, u32 value,
 	u32 id)
 {
 	void __iomem *base;
-	switch(reset->signals[id].type){
-		case RST_BASE_TYPE_MPMU:
-			base = reset->mpmu_base;
-			break;
-		case RST_BASE_TYPE_APMU:
-			base = reset->apmu_base;
-			break;
-		case RST_BASE_TYPE_APBC:
-			base = reset->apbc_base;
-			break;
-		case RST_BASE_TYPE_APBS:
-			base = reset->apbs_base;
-			break;
-		case RST_BASE_TYPE_CIU:
-			base = reset->ciu_base;
-			break;
-		case RST_BASE_TYPE_DCIU:
-			base = reset->dciu_base;
-			break;
-		case RST_BASE_TYPE_DDRC:
-			base = reset->ddrc_base;
-			break;
-		case RST_BASE_TYPE_AUDC:
-			base = reset->audio_ctrl_base;
-			break;
-		case RST_BASE_TYPE_APBC2:
-			base = reset->apbc2_base;
-			break;
-		default:
-			base = reset->apbc_base;
-			break;
-
+	switch (reset->signals[id].type) {
+	case RST_BASE_TYPE_APMU:
+		base = reset->apmu_base;
+		break;
+	case RST_BASE_TYPE_APBC:
+		base = reset->apbc_base;
+		break;
+#ifndef CONFIG_SPL_BUILD
+	case RST_BASE_TYPE_MPMU:
+		base = reset->mpmu_base;
+		break;
+	case RST_BASE_TYPE_APBS:
+		base = reset->apbs_base;
+		break;
+	case RST_BASE_TYPE_CIU:
+		base = reset->ciu_base;
+		break;
+	case RST_BASE_TYPE_DCIU:
+		base = reset->dciu_base;
+		break;
+	case RST_BASE_TYPE_DDRC:
+		base = reset->ddrc_base;
+		break;
+	case RST_BASE_TYPE_AUDC:
+		base = reset->audio_ctrl_base;
+		break;
+	case RST_BASE_TYPE_APBC2:
+		base = reset->apbc2_base;
+		break;
+#endif
+	default:
+		base = reset->apbc_base;
+		break;
 	}
+
 	writel(value, base + reset->signals[id].offset);
 }
 
@@ -351,26 +413,34 @@ static void spacemit_reset_set(struct reset_ctl *rst,
 	if(assert == true) {
 		value &= ~ reset->signals[id].mask;
 		value |=reset->signals[id].assert_val;
-
 	} else {
 		value &= ~reset->signals[id].mask;
 		value |= reset->signals[id].deassert_val;
 	}
+
 	spacemit_reset_write(reset, value, id);
 }
 
 static int spacemit_reset_update(struct reset_ctl *rst, bool assert)
 {
+#ifdef CONFIG_SPL_BUILD
+	rst->id = transfer_reset_id_to_spl(rst->id);
+	if(rst->id < RESET_TWSI6_SPL || rst->id >= RESET_NUMBER_SPL)
+		return 0;
+
+	/* can not write to twsi8*/
+	if (rst->id == RESET_TWSI8_SPL)
+		return 0;
+#else
 	if(rst->id < RESET_UART1 || rst->id >= RESET_NUMBER)
 		return 0;
+
+	/* can not write to twsi8*/
 	if (rst->id == RESET_TWSI8)
 		return 0;
-	if(assert == true){
-		spacemit_reset_set(rst, rst->id, assert);
-	}
-	else{
-		spacemit_reset_set(rst, rst->id, assert);
-	}
+#endif
+
+	spacemit_reset_set(rst, rst->id, assert);
 	return 0;
 }
 
@@ -461,4 +531,3 @@ U_BOOT_DRIVER(k1x_reset) = {
 	.probe		= spacemit_k1x_reset_probe,
 	.priv_auto	= sizeof(struct spacemit_reset),
 };
-

drivers/spi/k1x_qspi.c

@@ -271,14 +271,14 @@ static u32 qspi_readl(struct k1x_qspi *qspi, void __iomem *addr)
 
 static void qspi_set_func_clk(struct k1x_qspi *qspi)
 {
-    reset_assert_bulk(&qspi->resets);
-    clk_disable(&qspi->bus_clk);
-    clk_disable(&qspi->clk);
+	reset_assert_bulk(&qspi->resets);
+	clk_disable(&qspi->bus_clk);
+	clk_disable(&qspi->clk);
 
+	reset_deassert_bulk(&qspi->resets);
 	clk_enable(&qspi->bus_clk);
 	clk_set_rate(&qspi->clk, qspi->max_hz);
 	clk_enable(&qspi->clk);
-    reset_deassert_bulk(&qspi->resets);
 }
 
 static int qspi_reset(struct k1x_qspi *qspi)

drivers/usb/gadget/f_fastboot.c

@@ -451,6 +451,7 @@ static unsigned int rx_bytes_expected(struct usb_ep *ep)
 	return rx_remain;
 }
 
+#ifndef CONFIG_SPL_BUILD
 static unsigned int tx_bytes_expected(struct usb_ep *ep)
 {
 	int tx_remain = fastboot_data_remaining();
@@ -469,6 +470,47 @@ static unsigned int tx_bytes_expected(struct usb_ep *ep)
 	return tx_remain;
 }
 
+static void tx_handler_up_image(struct usb_ep *ep, struct usb_request *in_req)
+{
+	char response[FASTBOOT_RESPONSE_LEN] = {0};
+	unsigned int remain_size = fastboot_data_remaining();
+	const unsigned char *buffer = in_req->buf;
+
+	unsigned int transfer_size = tx_bytes_expected(ep);
+
+	if (in_req->status != 0) {
+		pr_err("Bad status: %d\n", in_req->status);
+		return;
+	}
+
+	if (!fastboot_data_remaining()) {
+		fastboot_data_complete(response);
+
+		/*
+		 * Reset global transfer variable
+		 */
+		in_req->complete = fastboot_complete;
+
+		fastboot_tx_write_str(response);
+		return ;
+	}
+
+	if (transfer_size > remain_size)
+		transfer_size = remain_size;
+
+
+	fastboot_data_upload(buffer, transfer_size, response);
+
+	if (response[0]) {
+		fastboot_tx_write_str(response);
+		return;
+	}
+
+	in_req->length = transfer_size;
+	usb_ep_queue(ep, in_req, 0);
+}
+#endif
+
 static void rx_handler_dl_image(struct usb_ep *ep, struct usb_request *req)
 {
 	char response[FASTBOOT_RESPONSE_LEN] = {0};
@@ -505,46 +547,6 @@ static void rx_handler_dl_image(struct usb_ep *ep, struct usb_request *req)
 	usb_ep_queue(ep, req, 0);
 }
 
-static void tx_handler_up_image(struct usb_ep *ep, struct usb_request *in_req)
-{
-	char response[FASTBOOT_RESPONSE_LEN] = {0};
-	unsigned int remain_size = fastboot_data_remaining();
-	const unsigned char *buffer = in_req->buf;
-
-	unsigned int transfer_size = tx_bytes_expected(ep);
-
-	if (in_req->status != 0) {
-		pr_debug("Bad status: %d\n", in_req->status);
-		return;
-	}
-
-	if (!fastboot_data_remaining()) {
-		fastboot_data_complete(response);
-
-		/*
-		 * Reset global transfer variable
-		 */
-		in_req->complete = fastboot_complete;
-
-		fastboot_tx_write_str(response);
-		return ;
-	}
-
-	if (transfer_size > remain_size)
-		transfer_size = remain_size;
-
-
-	fastboot_data_upload(buffer, transfer_size, response);
-
-	if (response[0]) {
-		fastboot_tx_write_str(response);
-		return;
-	}
-
-	in_req->length = transfer_size;
-	usb_ep_queue(ep, in_req, 0);
-}
-
 static void do_exit_on_complete(struct usb_ep *ep, struct usb_request *req)
 {
 	g_dnl_trigger_detach();
@@ -592,12 +594,14 @@ static void rx_handler_command(struct usb_ep *ep, struct usb_request *req)
 		req->length = rx_bytes_expected(ep);
 	}
 
+#ifndef CONFIG_SPL_BUILD
 	if (!strncmp("PUSH", response, 4)) {
 		fastboot_func->in_req->complete = tx_handler_up_image;
 
 		/* must replace 'PUSH' to 'DATA' */
 		strncpy(response, "DATA", 4);
 	}
+#endif
 
 	if (!strncmp("OKAY", response, 4)) {
 		switch (cmd) {

drivers/usb/gadget/k1x_usb2_ci.c

@@ -602,7 +602,7 @@ static void mv_udc_testmode(struct mv_udc *udc, u16 index)
 	if (index <= TEST_FORCE_EN){
 		mv_set_ptc(udc, index);
 	}else{
-		pr_debug("This test mode(%d) is not supported\n", index);
+		pr_info("This test mode(%d) is not supported\n", index);
 	}
 }
 
@@ -621,7 +621,7 @@ static void handle_ep_complete(struct mv_ep *ep)
 
 	len = (item->info >> 16) & 0x7fff;
 	if (item->info & 0xff)
-		pr_debug("EP%d/%s FAIL info=%x pg0=%x\n",
+		pr_err("EP%d/%s FAIL info=%x pg0=%x\n",
 		       num, in ? "in" : "out", item->info, item->page0);
 
 	mv_req = list_first_entry(&ep->queue, struct mv_req, queue);
@@ -659,7 +659,7 @@ static void handle_ep_complete(struct mv_ep *ep)
 		case WAIT_FOR_OUT_STATUS:
 			ep0_state = WAIT_FOR_SETUP;
 			if (testmode == USB_DEVICE_TEST_MODE) {
-				pr_debug("enter test mode too!!!\n");
+				pr_info("enter test mode too!!!\n");
 				mv_udc_testmode(udc, windex);
 				windex = 0x0;
 				testmode = 0x0;
@@ -692,7 +692,7 @@ static void handle_setup(void)
 	mv_invalidate_qh(0);
 	memcpy(&r, head->setup_data, sizeof(struct usb_ctrlrequest));
 	writel(EPT_RX(0), &udc->epsetupstat);
-	pr_debug("handle setup %s, 0x%x, 0x%x index 0x%x value 0x%x length 0x%x\n",
+	pr_info("handle setup %s, 0x%x, 0x%x index 0x%x value 0x%x length 0x%x\n",
 	    reqname(r.bRequest), r.bRequestType, r.bRequest, r.wIndex,
 	    r.wValue, r.wLength);
 
@@ -732,7 +732,7 @@ static void handle_setup(void)
 
 	case SETUP(USB_RECIP_DEVICE, USB_REQ_SET_FEATURE):
 		if (r.wValue == USB_DEVICE_TEST_MODE) {
-			pr_debug("enter test mode\n");
+			pr_info("enter test mode\n");
 			testmode = r.wValue;
 			windex = (r.wIndex >> 8);
 		}
@@ -744,7 +744,7 @@ static void handle_setup(void)
 
 	case SETUP(USB_RECIP_DEVICE, USB_REQ_CLEAR_FEATURE):
 		if (r.wValue == USB_DEVICE_TEST_MODE) {
-			pr_debug("leave test mode\n");
+			pr_info("leave test mode\n");
 			mv_udc_testmode(udc, TEST_DISABLE);
 		}
 		return;
@@ -858,7 +858,7 @@ void udc_irq(void)
 		return;
 
 	if (n & STS_SEI){
-		pr_debug("-- system error -- \n");
+		pr_err("-- system error -- \n");
 	}
 
 	if (n & STS_URI) {
@@ -866,7 +866,7 @@ void udc_irq(void)
 		stop_activity();
 	}
 	if (n & STS_SLI){
-		pr_debug("-- suspend --\n");
+		pr_info("-- suspend --\n");
 	}
 
 	if (n & STS_PCI) {
@@ -942,7 +942,7 @@ static int mv_pullup(struct usb_gadget *gadget, int is_on)
 	struct mv_udc *udc = (struct mv_udc *)controller.ctrl->hccr;
 	u32 value;
 
-	pr_debug("k1xci_udc: pullup %d \n", is_on);
+	pr_info("k1xci_udc: pullup %d \n", is_on);
 
 	if (is_on) {
 		/* RESET */
@@ -1058,7 +1058,7 @@ static int mvudc_probe(void)
 		return -ENOMEM;
 	}
 
-	pr_debug("k1xci_udc probe\n");
+	pr_info("k1xci_udc probe\n");
 
 	return 0;
 }
@@ -1067,7 +1067,7 @@ void usbphy_init(void)
 {
 	uint32_t loops, temp;
 
-	pr_debug("k1xci_udc: phy_init \n");
+	pr_info("k1xci_udc: phy_init \n");
 	reg32_modify(PMUA_USB_CLK_RES_CTRL, 0, PMUA_USB_CLK_RES_CTRL_USB_AXICLK_EN);
 	reg32_modify(PMUA_USB_CLK_RES_CTRL, PMUA_USB_CLK_RES_CTRL_USB_AXI_RST, 0);
 	reg32_modify(PMUA_USB_CLK_RES_CTRL, 0, PMUA_USB_CLK_RES_CTRL_USB_AXI_RST);
@@ -1083,7 +1083,7 @@ void usbphy_init(void)
 	} while(--loops);
 
 	if (loops == 0){
-		pr_debug("Wait PHY_REG01[PLLREADY] timeout \n");
+		pr_err("Wait PHY_REG01[PLLREADY] timeout \n");
 	}
 
 	reg32_write(USB2_PHY_REG01, 0x60ef);

drivers/usb/gadget/k1x_usb2_ci.h

@@ -6,7 +6,11 @@
 #ifndef __GADGET__MV_UDC_H__
 #define __GADGET__MV_UDC_H__
 
+#ifdef CONFIG_SPL_BUILD
+#define NUM_ENDPOINTS		2
+#else
 #define NUM_ENDPOINTS		6
+#endif
 
 struct mv_udc {
 	u32 pad0[16];

drivers/video/spacemit/spacemit_dpu.c

@@ -248,7 +248,7 @@ static int spacemit_display_init(struct udevice *dev, ulong fbbase, ofnode ep_no
 	while (ofnode_valid(remote)) {
 		remote = ofnode_get_parent(remote);
 		if (!ofnode_valid(remote)) {
-			pr_info("%s(%s): no UCLASS_DISPLAY for remote-endpoint\n",
+			pr_debug("%s(%s): no UCLASS_DISPLAY for remote-endpoint\n",
 			      __func__, dev_read_name(dev));
 			return -EINVAL;
 		}
@@ -411,7 +411,7 @@ static int spacemit_dpu_probe(struct udevice *dev)
 
 		ret = spacemit_display_init(dev, plat->base, node);
 		if (ret)
-			pr_info("Device failed: ret=%d\n", ret);
+			pr_debug("Device failed: ret=%d\n", ret);
 		if (!ret)
 			break;
 	}

env/common.c

@@ -143,7 +143,7 @@ char *from_env(const char *envvar)
 	ret = env_get(envvar);
 
 	if (!ret){
-		pr_debug("missing environment variable: %s\n", envvar);
+		pr_err("missing environment variable: %s\n", envvar);
 	}
 
 	return ret;
@@ -177,7 +177,7 @@ static int env_get_from_linear(const char *env, const char *name, char *buf,
 
 		if (len <= res) {
 			buf[len - 1] = '\0';
-			pr_debug("env_buf [%u bytes] too small for value of \"%s\"\n",
+			pr_err("env_buf [%u bytes] too small for value of \"%s\"\n",
 			       len, name);
 		}
 
@@ -258,7 +258,7 @@ void env_set_default(const char *s, int flags)
 {
 	if (s) {
 		if ((flags & H_INTERACTIVE) == 0) {
-			pr_debug("*** Warning - %s, "
+			pr_err("*** Warning - %s, "
 				"using default environment\n\n", s);
 		} else {
 			puts(s);
@@ -536,7 +536,7 @@ void env_import_fdt(void)
 
 	node = ofnode_path(path);
 	if (!ofnode_valid(node)) {
-		pr_debug("Warning: device tree node '%s' not found\n", path);
+		pr_err("Warning: device tree node '%s' not found\n", path);
 		return;
 	}
 

env/env.c

@@ -202,7 +202,7 @@ int env_load(void)
 		if (!env_has_inited(drv->location))
 			continue;
 
-		pr_debug("Loading Environment from %s... ", drv->name);
+		pr_info("Loading Environment from %s... ", drv->name);
 		/*
 		 * In error case, the error message must be printed during
 		 * drv->load() in some underlying API, and it must be exactly
@@ -210,7 +210,7 @@ int env_load(void)
 		 */
 		ret = drv->load();
 		if (!ret) {
-			pr_debug("OK\n");
+			pr_info("OK\n");
 			gd->env_load_prio = prio;
 
 #if !CONFIG_IS_ENABLED(ENV_APPEND)
@@ -252,18 +252,18 @@ int env_reload(void)
 	if (drv) {
 		int ret;
 
-		pr_debug("Loading Environment from %s... ", drv->name);
+		pr_info("Loading Environment from %s... ", drv->name);
 
 		if (!env_has_inited(drv->location)) {
-			pr_debug("not initialized\n");
+			pr_info("not initialized\n");
 			return -ENODEV;
 		}
 
 		ret = drv->load();
 		if (ret){
-			pr_debug("Failed (%d)\n", ret);
+			pr_err("Failed (%d)\n", ret);
 		}else{
-			pr_debug("OK\n");
+			pr_info("OK\n");
 		}
 
 		if (!ret)
@@ -281,22 +281,22 @@ int env_save(void)
 	if (drv) {
 		int ret;
 
-		pr_debug("Saving Environment to %s... ", drv->name);
+		pr_info("Saving Environment to %s... ", drv->name);
 		if (!drv->save) {
-			pr_debug("not possible\n");
+			pr_err("not possible\n");
 			return -ENODEV;
 		}
 
 		if (!env_has_inited(drv->location)) {
-			pr_debug("not initialized\n");
+			pr_err("not initialized\n");
 			return -ENODEV;
 		}
 
 		ret = drv->save();
 		if (ret){
-			pr_debug("Failed (%d)\n", ret);
+			pr_err("Failed (%d)\n", ret);
 		}else{
-			pr_debug("OK\n");
+			pr_info("OK\n");
 		}
 
 		if (!ret)
@@ -320,12 +320,12 @@ int env_erase(void)
 		if (!env_has_inited(drv->location))
 			return -ENODEV;
 
-		pr_debug("Erasing Environment on %s... ", drv->name);
+		pr_info("Erasing Environment on %s... ", drv->name);
 		ret = drv->erase();
 		if (ret){
-			pr_debug("Failed (%d)\n", ret);
+			pr_err("Failed (%d)\n", ret);
 		}else{
-			pr_debug("OK\n");
+			pr_info("OK\n");
 		}	
 
 		if (!ret)
@@ -375,7 +375,7 @@ int env_select(const char *name)
 	int prio;
 	bool found = false;
 
-	pr_debug("Select Environment on %s: ", name);
+	pr_info("Select Environment on %s: ", name);
 
 	/* search ENV driver by name */
 	drv = ll_entry_start(struct env_driver, env_driver);
@@ -387,7 +387,7 @@ int env_select(const char *name)
 	}
 
 	if (!found) {
-		pr_debug("driver not found\n");
+		pr_info("driver not found\n");
 		return -ENODEV;
 	}
 
@@ -400,11 +400,11 @@ int env_select(const char *name)
 				gd->env_valid = ENV_INVALID;
 				gd->flags &= ~GD_FLG_ENV_DEFAULT;
 			}
-			pr_debug("OK\n");
+			pr_info("OK\n");
 			return 0;
 		}
 	}
-	pr_debug("priority not found\n");
+	pr_info("priority not found\n");
 
 	return -ENODEV;
 }

env/flags.c

@@ -80,7 +80,7 @@ void env_flags_print_vartypes(void)
 	enum env_flags_vartype curtype = (enum env_flags_vartype)0;
 
 	while (curtype != env_flags_vartype_end) {
-		pr_debug("\t%c   -\t%s\n", env_flags_vartype_rep[curtype],
+		pr_info("\t%c   -\t%s\n", env_flags_vartype_rep[curtype],
 			env_flags_vartype_names[curtype]);
 		curtype++;
 	}
@@ -94,7 +94,7 @@ void env_flags_print_varaccess(void)
 	enum env_flags_varaccess curaccess = (enum env_flags_varaccess)0;
 
 	while (curaccess != env_flags_varaccess_end) {
-		pr_debug("\t%c   -\t%s\n", env_flags_varaccess_rep[curaccess],
+		pr_info("\t%c   -\t%s\n", env_flags_varaccess_rep[curaccess],
 			env_flags_varaccess_names[curaccess]);
 		curaccess++;
 	}
@@ -134,7 +134,7 @@ enum env_flags_vartype env_flags_parse_vartype(const char *flags)
 		return (enum env_flags_vartype)
 			(type - &env_flags_vartype_rep[0]);
 
-	pr_debug("## Warning: Unknown environment variable type '%c'\n",
+	pr_info("## Warning: Unknown environment variable type '%c'\n",
 		flags[ENV_FLAGS_VARTYPE_LOC]);
 	return env_flags_vartype_string;
 }
@@ -160,7 +160,7 @@ enum env_flags_varaccess env_flags_parse_varaccess(const char *flags)
 		return va;
 	}
 
-	pr_debug("## Warning: Unknown environment variable access method '%c'\n",
+	pr_info("## Warning: Unknown environment variable access method '%c'\n",
 		flags[ENV_FLAGS_VARACCESS_LOC]);
 	return va_default;
 }
@@ -181,7 +181,7 @@ enum env_flags_varaccess env_flags_parse_varaccess_from_binflags(int binflags)
 			return va;
 	}
 
-	pr_debug("Warning: Non-standard access flags. (0x%x)\n",
+	pr_info("Warning: Non-standard access flags. (0x%x)\n",
 		binflags & ENV_FLAGS_VARACCESS_BIN_MASK);
 
 	return va_default;
@@ -372,7 +372,7 @@ int env_flags_validate_type(const char *name, const char *value)
 		return 0;
 	type = env_flags_get_type(name);
 	if (_env_flags_validate_type(value, type) < 0) {
-		pr_debug("## Error: flags type check failure for "
+		pr_info("## Error: flags type check failure for "
 			"\"%s\" <= \"%s\" (type: %c)\n",
 			name, value, env_flags_vartype_rep[type]);
 		return -1;
@@ -408,7 +408,7 @@ int env_flags_validate_env_set_params(char *name, char * const val[], int count)
 		 * one argument
 		 */
 		if (type != env_flags_vartype_string && count > 1) {
-			pr_debug("## Error: too many parameters for setting \"%s\"\n",
+			pr_info("## Error: too many parameters for setting \"%s\"\n",
 			       name);
 			return -1;
 		}
@@ -542,7 +542,7 @@ int env_flags_validate(const struct env_entry *item, const char *newval,
 			(ENV_FLAGS_VARTYPE_BIN_MASK & item->flags);
 
 		if (_env_flags_validate_type(newval, type) < 0) {
-			pr_debug("## Error: flags type check failure for "
+			pr_info("## Error: flags type check failure for "
 				"\"%s\" <= \"%s\" (type: %c)\n",
 				name, newval, env_flags_vartype_rep[type]);
 			return -1;
@@ -565,7 +565,7 @@ int env_flags_validate(const struct env_entry *item, const char *newval,
 
 	if (flag & H_FORCE) {
 #ifdef CONFIG_ENV_ACCESS_IGNORE_FORCE
-		pr_debug("## Error: Can't force access to \"%s\"\n", name);
+		pr_info("## Error: Can't force access to \"%s\"\n", name);
 #else
 		return 0;
 #endif
@@ -579,7 +579,7 @@ int env_flags_validate(const struct env_entry *item, const char *newval,
 		break;
 	case env_op_overwrite:
 		if (item->flags & ENV_FLAGS_VARACCESS_PREVENT_OVERWR) {
-			pr_debug("## Error: Can't overwrite \"%s\"\n", name);
+			pr_info("## Error: Can't overwrite \"%s\"\n", name);
 			return 1;
 		} else if (item->flags &
 		    ENV_FLAGS_VARACCESS_PREVENT_NONDEF_OVERWR) {
@@ -587,7 +587,7 @@ int env_flags_validate(const struct env_entry *item, const char *newval,
 
 			if (defval == NULL)
 				defval = "";
-			pr_debug("oldval: %s  defval: %s\n", oldval, defval);
+			pr_info("oldval: %s  defval: %s\n", oldval, defval);
 			if (strcmp(oldval, defval) != 0) {
 				pr_err("## Error: Can't overwrite \"%s\"\n",
 					name);

env/mmc.c

@@ -209,7 +209,7 @@ static int env_mmc_save(void)
 
 	errmsg = init_mmc_for_env(mmc);
 	if (errmsg) {
-		pr_debug("%s\n", errmsg);
+		pr_info("%s\n", errmsg);
 		return 1;
 	}
 
@@ -234,7 +234,7 @@ static int env_mmc_save(void)
 		goto fini;
 	}
 
-	pr_debug("Writing to %sMMC(%d)... ", copy ? "redundant " : "", dev);
+	pr_info("Writing to %sMMC(%d)... ", copy ? "redundant " : "", dev);
 	if (write_env(mmc, CONFIG_ENV_SIZE, offset, (u_char *)env_new)) {
 		puts("failed\n");
 		ret = 1;
@@ -264,7 +264,7 @@ static inline int erase_env(struct mmc *mmc, unsigned long size,
 	blk_cnt = ALIGN(size, erase_size) / desc->blksz;
 
 	n = blk_derase(desc, blk_start, blk_cnt);
-	pr_debug("%d blocks erased at 0x%x: %s\n", n, blk_start,
+	pr_info("%d blocks erased at 0x%x: %s\n", n, blk_start,
 	       (n == blk_cnt) ? "OK" : "ERROR");
 
 	return (n == blk_cnt) ? 0 : 1;
@@ -280,7 +280,7 @@ static int env_mmc_erase(void)
 
 	errmsg = init_mmc_for_env(mmc);
 	if (errmsg) {
-		pr_debug("%s\n", errmsg);
+		pr_info("%s\n", errmsg);
 		return 1;
 	}
 
@@ -289,7 +289,7 @@ static int env_mmc_erase(void)
 		goto fini;
 	}
 
-	pr_debug("\n");
+	pr_info("\n");
 	ret = erase_env(mmc, CONFIG_ENV_SIZE, offset);
 
 #ifdef CONFIG_ENV_OFFSET_REDUND

fs/jffs2/jffs2_1pass.c

@@ -428,26 +428,25 @@ void put_fl_mem_nor(void *buf)
 	free(buf);
 }
 
-struct mtd_info *get_spi_nor_by_name(const char *name)
+struct mtd_info *get_spi_flash(void)
 {
 	struct udevice *dev = NULL;
 	int ret;
 
-	for (ret = uclass_first_device(UCLASS_SPI_FLASH, &dev);
-		 dev;
-		 ret = uclass_next_device(&dev)) {
-
-		if (strcmp(dev->name, name) == 0) {
-			struct spi_flash *flash = dev_get_uclass_priv(dev);
-			if (!flash) {
-				printf("Found device but failed to get SPI flash data structure\n");
-				return NULL;
-			}
-			return &flash->mtd;
-		}
+	ret = uclass_first_device(UCLASS_SPI_FLASH, &dev);
+	if (ret || !dev) {
+		pr_err("Failed to get the first SPI NOR device\n");
+		return NULL;
 	}
-	printf("SPI NOR device named '%s' not found\n", name);
-	return NULL;
+
+	struct spi_flash *flash = dev_get_uclass_priv(dev);
+	if (!flash) {
+		pr_err("Found device but failed to get SPI flash data structure\n");
+		return NULL;
+	}
+
+	pr_info("Using the first SPI NOR device: %s\n", dev->name);
+	return &flash->mtd;
 }
 
 static int nor_read(struct mtd_info *mtd, u32 offset, size_t len, void *buf)
@@ -458,12 +457,12 @@ static int nor_read(struct mtd_info *mtd, u32 offset, size_t len, void *buf)
 	ret = mtd_read(mtd, offset, len, &retlen, buf);
 
 	if (ret < 0) {
-		printf("Error: mtd_read returned %d\n", ret);
+		pr_err("Error: mtd_read returned %d\n", ret);
 		return ret;
 	}
 
 	if (retlen != len) {
-		printf("Warning: Requested length %zu but got %zu\n", len, retlen);
+		pr_err("Warning: Requested length %zu but got %zu\n", len, retlen);
 		return -EIO;
 	}
 
@@ -478,15 +477,15 @@ static inline void *get_fl_mem_nor(u32 off, u32 size, void *ext_buf)
 	if (!buf) {
 		buf = malloc(size);
 		if (!buf) {
-			printf("Failed to allocate memory\n");
+			pr_err("Failed to allocate memory\n");
 			return NULL;
 		}
 	}
 
 	if (!cached_mtd) {
-		cached_mtd = get_spi_nor_by_name(CONFIG_JFFS2_DEV);
+		cached_mtd = get_spi_flash();
 		if (!cached_mtd) {
-			printf("Failed to get SPI NOR device\n");
+			pr_err("Failed to get SPI NOR device\n");
 			if (!ext_buf) {
 				free(buf);
 			}
@@ -495,7 +494,7 @@ static inline void *get_fl_mem_nor(u32 off, u32 size, void *ext_buf)
 	}
 
 	if (nor_read(cached_mtd, off, size, buf)) {
-		printf("SPI NOR read failed\n");
+		pr_err("SPI NOR read failed\n");
 		if (!ext_buf) {
 			free(buf);
 		}
@@ -511,7 +510,7 @@ static inline void *get_node_mem_nor(u32 off, void *ext_buf)
 
 	pNode = get_fl_mem_nor(off, sizeof(*pNode), NULL);
 	if (!pNode) {
-		printf("Failed to read node at offset=%u\n", off);
+		pr_err("Failed to read node at offset=%u\n", off);
 		return NULL;
 	}
 
@@ -876,6 +875,10 @@ jffs2_1pass_read_inode(struct b_lists *pL, u32 inode, char *dest)
 				put_fl_mem(jNode, pL->readbuf);
 				jNode = (struct jffs2_raw_inode *)
 					get_node_mem(b->offset, pL->readbuf);
+				if (!jNode) {
+					pr_err("Error: Failed to get jNode at offset=%u\n", b->offset);
+					return -1;
+				}
 				src = ((uchar *)jNode) +
 					sizeof(struct jffs2_raw_inode);
 				/* ignore data behind latest known EOF */

include/configs/k1-x.h

@@ -17,15 +17,26 @@
 #define CONFIG_SYS_SDRAM_BASE	(SYS_DRAM_OFFS + SEC_IMG_SIZE)
 
 #define RISCV_MMODE_TIMERBASE	0xE4000000
-#define RISCV_MMODE_TIMER_FREQ	1000000
-#define RISCV_SMODE_TIMER_FREQ	1000000
+#define RISCV_MMODE_TIMER_FREQ	24000000
+#define RISCV_SMODE_TIMER_FREQ	24000000
 
 #define CONFIG_IPADDR		10.0.92.253
 #define CONFIG_SERVERIP		10.0.92.134
 #define CONFIG_GATEWAYIP	10.0.92.1
 #define CONFIG_NETMASK		255.255.255.0
 
+#define DEFAULT_PRODUCT_NAME	"k1_deb1"
+
 #define K1X_SPL_BOOT_LOAD_ADDR	(0x20200000)
+#define DDR_TRAINING_DATA_BASE	(0xc0829000)
+
+// sram buffer address that save the DDR software training result
+#define DDR_TRAINING_INFO_BUFF	(0xC0800000)
+#define DDR_TRAINING_INFO_SAVE_ADDR	(0)
+// magic string: "DDRT"
+#define DDR_TRAINING_INFO_MAGIC	(0x54524444)
+// ddr training software version: xx.xx.xxxx
+#define DDR_TRAINING_INFO_VER	(0x00010000)
 
 /*
  use (ram_base+4MB offset) as the address to loading image.
@@ -66,6 +77,8 @@
 #define TLV_CODE_EEPROM_PIN_GROUP	0x82
 
 #ifndef __ASSEMBLY__
+#include "linux/types.h"
+
 enum board_boot_mode {
 	BOOT_MODE_NONE = 0,
 	BOOT_MODE_USB = 0x55a,
@@ -75,6 +88,25 @@ enum board_boot_mode {
 	BOOT_MODE_SD,
 	BOOT_MODE_SHELL = 0x55f,
 };
+
+struct ddr_training_info_t {
+	uint32_t magic;
+	uint32_t crc32;
+	uint64_t chipid;
+	uint64_t mac_addr;
+	uint32_t version;
+	uint8_t reserved[36];
+	uint8_t para[1024];
+	uint8_t reserved2[448];
+};
+
+struct boot_storage_op
+{
+	uint32_t boot_storage;
+	uint32_t address;
+	ulong (*read)(ulong byte_addr, ulong byte_size, void *buff);
+	bool (*write)(ulong byte_addr, ulong byte_size, void *buff);
+};
 #endif
 
 #define MMC_DEV_EMMC	(2)
@@ -99,7 +131,7 @@ enum board_boot_mode {
 	"qemu "
 
 #define BOOTENV_DEVICE_CONFIG \
-	"product_name=k1_deb1\0" \
+	"product_name=" DEFAULT_PRODUCT_NAME "\0" \
 	"serial#=123456789ABC\0" \
 	"manufacturer=" CONFIG_SYS_VENDOR "\0" \
 	"manufacture_date=01/16/2023 11:02:20\0" \
@@ -109,16 +141,13 @@ enum board_boot_mode {
 	"eeprom_i2c_index=" __stringify(K1_DEFALT_EEPROM_I2C_INDEX) "\0" \
 	"eeprom_pin_group=" __stringify(K1_DEFALT_EEPROM_PIN_GROUP) "\0"
 
+/*if env not use for spl, please define to board/spacemit/k1-x/k1-x.env */
 #define CONFIG_EXTRA_ENV_SETTINGS \
-	"fdt_high=0xffffffffffffffff\0" \
-	"initrd_high=0xffffffffffffffff\0" \
-	"kernel_addr_r=0x24000000\0" \
-	"kernel_comp_addr_r=0x28000000\0" \
+	"stdout_flash=serial,vidconsole\0" \
+	"kernel_comp_addr_r=0x18000000\0" \
 	"kernel_comp_size=0x4000000\0" \
-	"fdt_addr_r=0x2c000000\0" \
 	"scriptaddr=0x2c100000\0" \
-	"pxefile_addr_r=0x2c200000\0" \
-	"ramdisk_addr_r=0x2c300000\0" \
+	"pxefile_addr_r=0x0c200000\0" \
 	"ipaddr=192.168.1.15\0" \
 	"netmask=255.255.255.0\0" \
 	"serverip=10.0.92.134\0" \
@@ -126,8 +155,8 @@ enum board_boot_mode {
 	"net_data_path=spacemit_flash_file/net_flash_file/\0" \
 	"splashimage=" __stringify(CONFIG_FASTBOOT_BUF_ADDR) "\0" \
 	"splashpos=m,m\0" \
-	"splashfile=k1-x.bmp\0" \
-	BOOTENV_DEVICE_CONFIG \
-	BOOTENV
+	"splashfile=bianbu.bmp\0" \
+	BOOTENV_DEVICE_CONFIG
+
 
 #endif /* __CONFIG_H */

include/dt-bindings/clock/spacemit-k1x-clock.h

@@ -3,193 +3,198 @@
 #ifndef _DT_BINDINGS_CLK_SPACEMIT_K1X_H_
 #define _DT_BINDINGS_CLK_SPACEMIT_K1X_H_
 
-#define CLK_PLL1_2457P6 0
-#define CLK_PLL2     1
-#define CLK_PLL3     2
-#define CLK_PLL1_D2  3
-#define CLK_PLL1_D3  4
-#define CLK_PLL1_D4  5
-#define CLK_PLL1_D5  6
-#define CLK_PLL1_D6  7
-#define CLK_PLL1_D7  8
-#define CLK_PLL1_D8  9
-#define CLK_PLL1_D11 10
-#define CLK_PLL1_D13 11
-#define CLK_PLL1_D23 12
-#define CLK_PLL1_D64 13
-#define CLK_PLL1_D10_AUD  14
-#define CLK_PLL1_D100_AUD 15
-#define CLK_PLL2_D1  16
-#define CLK_PLL2_D2  17
-#define CLK_PLL2_D3  18
-#define CLK_PLL2_D4  19
-#define CLK_PLL2_D5  20
-#define CLK_PLL2_D6  21
-#define CLK_PLL2_D7  22
-#define CLK_PLL2_D8  23
-#define CLK_PLL3_D1  24
-#define CLK_PLL3_D2  25
-#define CLK_PLL3_D3  26
-#define CLK_PLL3_D4  27
-#define CLK_PLL3_D5  28
-#define CLK_PLL3_D6  29
-#define CLK_PLL3_D7  30
-#define CLK_PLL3_D8  31
-#define CLK_PLL1_307P2 32
-#define CLK_PLL1_76P8  33
-#define CLK_PLL1_61P44 34
-#define CLK_PLL1_153P6 35
-#define CLK_PLL1_102P4 36
-#define CLK_PLL1_51P2  37
-#define CLK_PLL1_51P2_AP 38
-#define CLK_PLL1_57P6 39
-#define CLK_PLL1_25P6 40
-#define CLK_PLL1_12P8 41
-#define CLK_PLL1_12P8_WDT 42
-#define CLK_PLL1_6P4  43
-#define CLK_PLL1_3P2  44
-#define CLK_PLL1_1P6  45
-#define CLK_PLL1_0P8  46
-#define CLK_PLL1_351  47
-#define CLK_PLL1_409P6 48
-#define CLK_PLL1_204P8 49
-#define CLK_PLL1_491   50
-#define CLK_PLL1_245P76 51
-#define CLK_PLL1_614    52
-#define CLK_PLL1_47P26  53
-#define CLK_PLL1_31P5   54
-#define CLK_PLL1_819    55
-#define CLK_PLL1_1228   56
-#define CLK_SLOW_UART1  57
-#define CLK_SLOW_UART2  58
-#define CLK_UART1  59
-#define CLK_UART2  60
-#define CLK_UART3  61
-#define CLK_UART4  62
-#define CLK_UART5  63
-#define CLK_UART6  64
-#define CLK_UART7  65
-#define CLK_UART8  66
-#define CLK_UART9  67
-#define CLK_GPIO  68
-#define CLK_PWM0  69
-#define CLK_PWM1  70
-#define CLK_PWM2  71
-#define CLK_PWM3  72
-#define CLK_PWM4  73
-#define CLK_PWM5  74
-#define CLK_PWM6  75
-#define CLK_PWM7  76
-#define CLK_PWM8  77
-#define CLK_PWM9  78
-#define CLK_PWM10 79
-#define CLK_PWM11 80
-#define CLK_PWM12 81
-#define CLK_PWM13 82
-#define CLK_PWM14 83
-#define CLK_PWM15 84
-#define CLK_PWM16 85
-#define CLK_PWM17 86
-#define CLK_PWM18 87
-#define CLK_PWM19 88
-#define CLK_SSP3  89
-#define CLK_RTC   90
-#define CLK_TWSI0 91
-#define CLK_TWSI1 92
-#define CLK_TWSI2 93
-#define CLK_TWSI4 94
-#define CLK_TWSI5 95
-#define CLK_TWSI6 96
-#define CLK_TWSI7 97
-#define CLK_TWSI8 98
-#define CLK_TIMERS1 99
-#define CLK_TIMERS2 100
-#define CLK_AIB     101
-#define CLK_ONEWIRE 102
-#define CLK_SSPA0   103
-#define CLK_SSPA1   104
-#define CLK_DRO     105
-#define CLK_IR      106
-#define CLK_TSEN    107
-#define CLK_IPC_AP2AUD  108
-#define CLK_CAN0     109
-#define CLK_CAN0_BUS 110
-#define CLK_WDT      111
-#define CLK_RIPC     112
-#define CLK_JPG      113
-#define CLK_JPF_4KAFBC 114
-#define CLK_JPF_2KAFBC 115
-#define CLK_CCIC2PHY   116
-#define CLK_CCIC3PHY   117
-#define CLK_CSI      118
-#define CLK_CAMM0    119
-#define CLK_CAMM1    120
-#define CLK_CAMM2    121
-#define CLK_ISP_CPP  122
-#define CLK_ISP_BUS  123
-#define CLK_ISP      124
-#define CLK_DPU_MCLK 125
-#define CLK_DPU_ESC  126
-#define CLK_DPU_BIT  127
-#define CLK_DPU_PXCLK  128
-#define CLK_DPU_HCLK   129
-#define CLK_DPU_SPI    130
-#define CLK_DPU_SPI_HBUS  131
-#define CLK_DPU_SPIBUS    132
-#define CLK_SPU_SPI_ACLK  133
-#define CLK_V2D      134
-#define CLK_CCIC_4X  135
-#define CLK_CCIC1PHY 136
-#define CLK_SDH_AXI  137
-#define CLK_SDH0     138
-#define CLK_SDH1     139
-#define CLK_SDH2     140
-#define CLK_USB_P1   141
-#define CLK_USB_AXI  142
-#define CLK_USB30    143
-#define CLK_QSPI     144
-#define CLK_QSPI_BUS 145
-#define CLK_DMA      146
-#define CLK_AES      147
-#define CLK_VPU      148
-#define CLK_GPU      149
-#define CLK_EMMC     150
-#define CLK_EMMC_X   151
-#define CLK_AUDIO    152
-#define CLK_HDMI     153
-#define CLK_CCI550   154
-#define CLK_PMUA_ACLK  155
-#define CLK_CPU_C0_HI  156
-#define CLK_CPU_C0_CORE 157
-#define CLK_CPU_C0_ACE  158
-#define CLK_CPU_C0_TCM  159
-#define CLK_CPU_C1_HI   160
-#define CLK_CPU_C1_CORE 161
-#define CLK_CPU_C1_ACE  162
-#define CLK_PCIE0       163
-#define CLK_PCIE1       164
-#define CLK_PCIE2       165
-#define CLK_EMAC0_BUS   166
-#define CLK_EMAC0_PTP   167
-#define CLK_EMAC1_BUS   168
-#define CLK_EMAC1_PTP   169
+/*
+    !!! clk list must start with CLK_PLL1_2457P6 !!!
+    in order to differ from spl clk list, CLK_PLL1_2457P6 start with 40.
+*/
+#define CLK_PLL1_2457P6          40
+#define CLK_PLL2                 41
+#define CLK_PLL3                 42
+#define CLK_PLL1_D2              43
+#define CLK_PLL1_D3              44
+#define CLK_PLL1_D4              45
+#define CLK_PLL1_D5              46
+#define CLK_PLL1_D6              47
+#define CLK_PLL1_D7              48
+#define CLK_PLL1_D8              49
+#define CLK_PLL1_D11             50
+#define CLK_PLL1_D13             51
+#define CLK_PLL1_D23             52
+#define CLK_PLL1_D64             53
+#define CLK_PLL1_D10_AUD         54
+#define CLK_PLL1_D100_AUD        55
+#define CLK_PLL2_D1              56
+#define CLK_PLL2_D2              57
+#define CLK_PLL2_D3              58
+#define CLK_PLL2_D4              59
+#define CLK_PLL2_D5              60
+#define CLK_PLL2_D6              61
+#define CLK_PLL2_D7              62
+#define CLK_PLL2_D8              63
+#define CLK_PLL3_D1              64
+#define CLK_PLL3_D2              65
+#define CLK_PLL3_D3              66
+#define CLK_PLL3_D4              67
+#define CLK_PLL3_D5              68
+#define CLK_PLL3_D6              69
+#define CLK_PLL3_D7              70
+#define CLK_PLL3_D8              71
+#define CLK_PLL1_307P2           72
+#define CLK_PLL1_76P8            73
+#define CLK_PLL1_61P44           74
+#define CLK_PLL1_153P6           75
+#define CLK_PLL1_102P4           76
+#define CLK_PLL1_51P2            77
+#define CLK_PLL1_51P2_AP         78
+#define CLK_PLL1_57P6            79
+#define CLK_PLL1_25P6            80
+#define CLK_PLL1_12P8            81
+#define CLK_PLL1_12P8_WDT        82
+#define CLK_PLL1_6P4             83
+#define CLK_PLL1_3P2             84
+#define CLK_PLL1_1P6             85
+#define CLK_PLL1_0P8             86
+#define CLK_PLL1_351             87
+#define CLK_PLL1_409P6           88
+#define CLK_PLL1_204P8           89
+#define CLK_PLL1_491             90
+#define CLK_PLL1_245P76          91
+#define CLK_PLL1_614             92
+#define CLK_PLL1_47P26           93
+#define CLK_PLL1_31P5            94
+#define CLK_PLL1_819             95
+#define CLK_PLL1_1228            96
+#define CLK_SLOW_UART1           97
+#define CLK_SLOW_UART2           98
+#define CLK_UART1                99
+#define CLK_UART2                100
+#define CLK_UART3                101
+#define CLK_UART4                102
+#define CLK_UART5                103
+#define CLK_UART6                104
+#define CLK_UART7                105
+#define CLK_UART8                106
+#define CLK_UART9                107
+#define CLK_GPIO                 108
+#define CLK_PWM0                 109
+#define CLK_PWM1                 110
+#define CLK_PWM2                 111
+#define CLK_PWM3                 112
+#define CLK_PWM4                 113
+#define CLK_PWM5                 114
+#define CLK_PWM6                 115
+#define CLK_PWM7                 116
+#define CLK_PWM8                 117
+#define CLK_PWM9                 118
+#define CLK_PWM10                119
+#define CLK_PWM11                120
+#define CLK_PWM12                121
+#define CLK_PWM13                122
+#define CLK_PWM14                123
+#define CLK_PWM15                124
+#define CLK_PWM16                125
+#define CLK_PWM17                126
+#define CLK_PWM18                127
+#define CLK_PWM19                128
+#define CLK_SSP3                 129
+#define CLK_RTC                  130
+#define CLK_TWSI0                131
+#define CLK_TWSI1                132
+#define CLK_TWSI2                133
+#define CLK_TWSI4                134
+#define CLK_TWSI5                135
+#define CLK_TWSI6                136
+#define CLK_TWSI7                137
+#define CLK_TWSI8                138
+#define CLK_TIMERS1              139
+#define CLK_TIMERS2              140
+#define CLK_AIB                  141
+#define CLK_ONEWIRE              142
+#define CLK_SSPA0                143
+#define CLK_SSPA1                144
+#define CLK_DRO                  145
+#define CLK_IR                   146
+#define CLK_TSEN                 147
+#define CLK_IPC_AP2AUD           148
+#define CLK_CAN0                 149
+#define CLK_CAN0_BUS             150
+#define CLK_WDT                  151
+#define CLK_RIPC                 152
+#define CLK_JPG                  153
+#define CLK_JPF_4KAFBC           154
+#define CLK_JPF_2KAFBC           155
+#define CLK_CCIC2PHY             156
+#define CLK_CCIC3PHY             157
+#define CLK_CSI                  158
+#define CLK_CAMM0                159
+#define CLK_CAMM1                160
+#define CLK_CAMM2                161
+#define CLK_ISP_CPP              162
+#define CLK_ISP_BUS              163
+#define CLK_ISP                  164
+#define CLK_DPU_MCLK             165
+#define CLK_DPU_ESC              166
+#define CLK_DPU_BIT              167
+#define CLK_DPU_PXCLK            168
+#define CLK_DPU_HCLK             169
+#define CLK_DPU_SPI              170
+#define CLK_DPU_SPI_HBUS         171
+#define CLK_DPU_SPIBUS           172
+#define CLK_SPU_SPI_ACLK         173
+#define CLK_V2D                  174
+#define CLK_CCIC_4X              175
+#define CLK_CCIC1PHY             176
+#define CLK_SDH_AXI              177
+#define CLK_SDH0                 178
+#define CLK_SDH1                 179
+#define CLK_SDH2                 180
+#define CLK_USB_P1               181
+#define CLK_USB_AXI              182
+#define CLK_USB30                183
+#define CLK_QSPI                 184
+#define CLK_QSPI_BUS             185
+#define CLK_DMA                  186
+#define CLK_AES                  187
+#define CLK_VPU                  188
+#define CLK_GPU                  189
+#define CLK_EMMC                 190
+#define CLK_EMMC_X               191
+#define CLK_AUDIO                192
+#define CLK_HDMI                 193
+#define CLK_CCI550               194
+#define CLK_PMUA_ACLK            195
+#define CLK_CPU_C0_HI            196
+#define CLK_CPU_C0_CORE          197
+#define CLK_CPU_C0_ACE           198
+#define CLK_CPU_C0_TCM           199
+#define CLK_CPU_C1_HI            200
+#define CLK_CPU_C1_CORE          201
+#define CLK_CPU_C1_ACE           202
+#define CLK_PCIE0                203
+#define CLK_PCIE1                204
+#define CLK_PCIE2                205
+#define CLK_EMAC0_BUS            206
+#define CLK_EMAC0_PTP            207
+#define CLK_EMAC1_BUS            208
+#define CLK_EMAC1_PTP            209
+#define CLK_SEC_UART1            210
+#define CLK_SEC_SSP2             211
+#define CLK_SEC_TWSI3            212
+#define CLK_SEC_RTC              213
+#define CLK_SEC_TIMERS0          214
+#define CLK_SEC_KPC              215
+#define CLK_SEC_GPIO             216
 
-#define CLK_SEC_UART1   170
-#define CLK_SEC_SSP2    171
-#define CLK_SEC_TWSI3   172
-#define CLK_SEC_RTC     173
-#define CLK_SEC_TIMERS0 174
-#define CLK_SEC_KPC     175
-#define CLK_SEC_GPIO    176
+#define CLK_APB                  217
 
-#define CLK_APB         177
+#define CLK_VCTCXO_24            218
+#define CLK_VCTCXO_3             219
+#define CLK_VCTCXO_1             220
+#define CLK_PLL1                 221
+#define CLK_32K                  222
+#define CLK_DUMMY                223
+
+#define CLK_MAX_NO               224
 
-#define CLK_VCTCXO_24   178
-#define CLK_VCTCXO_3    179
-#define CLK_VCTCXO_1    180
-#define CLK_PLL1        181
-#define CLK_32K         182
-#define CLK_DUMMY       183
 
-#define CLK_MAX_NO      184
 #endif /* _DT_BINDINGS_CLK_SPACEMIT_K1X_H_ */

include/efi_api.h

@@ -599,9 +599,7 @@ struct efi_device_path_acpi_path {
 #  define DEVICE_PATH_SUB_TYPE_MSG_URI		0x18
 #  define DEVICE_PATH_SUB_TYPE_MSG_SD		0x1a
 #  define DEVICE_PATH_SUB_TYPE_MSG_MMC		0x1d
-#ifdef CONFIG_SPINOR_BLOCK_SUPPORT
-#  define DEVICE_PATH_SUB_TYPE_MSG_SPINOR	0x20
-#endif
+
 
 struct efi_device_path_atapi {
 	struct efi_device_path dp;
@@ -669,12 +667,6 @@ struct efi_device_path_uri {
 	u8 uri[];
 } __packed;
 
-#ifdef CONFIG_SPINOR_BLOCK_SUPPORT
-struct efi_device_path_spinor {
-    struct efi_device_path dp;
-    uint32_t device_number;
-};
-#endif
 
 #define DEVICE_PATH_TYPE_MEDIA_DEVICE		0x04
 #  define DEVICE_PATH_SUB_TYPE_HARD_DRIVE_PATH	0x01

include/env_default.h

@@ -114,10 +114,15 @@ const char default_environment[] = {
 #ifdef CONFIG_MTDPARTS_DEFAULT
 	"mtdparts="	CONFIG_MTDPARTS_DEFAULT		"\0"
 #endif
+
+/*spl would not include extra env settings*/
+#ifndef CONFIG_SPL_BUILD
 #ifdef CONFIG_EXTRA_ENV_TEXT
 	/* This is created in the Makefile */
 	CONFIG_EXTRA_ENV_TEXT
 #endif
+#endif
+
 #ifdef	CONFIG_EXTRA_ENV_SETTINGS
 	CONFIG_EXTRA_ENV_SETTINGS
 #endif

include/fb_spacemit.h

@@ -38,7 +38,8 @@
 #define BOOT_INFO_EMMC_TOTALSIZE (0x10000000)
 #define BOOT_INFO_EMMC_SPL0_OFFSET (0x200)
 #define BOOT_INFO_EMMC_SPL1_OFFSET (0x0)
-#define BOOT_INFO_EMMC_LIMIT (CONFIG_SPL_SIZE_LIMIT)
+// add 4KB header and 0x100 Byte signature
+#define BOOT_INFO_EMMC_LIMIT ((CONFIG_SPL_SIZE_LIMIT) + 0x1100)
 
 typedef enum {
 	DEVICE_MMC,
@@ -46,6 +47,11 @@ typedef enum {
 	DEVICE_NET,
 } DeviceType;
 
+struct flash_volume_image {
+	char *name;
+	char *file_name;
+};
+
 struct flash_parts_info {
 	char *part_name;
 	char *file_name;
@@ -55,6 +61,8 @@ struct flash_parts_info {
 	  for fsbl and the partition is not available.
 	*/
 	bool hidden;
+	struct flash_volume_image *volume_images;
+	int volume_images_count;
 };
 
 struct gpt_info {
@@ -64,15 +72,29 @@ struct gpt_info {
 	bool fastboot_flash_gpt;
 };
 
+enum mtd_size_type {
+	MTD_SIZE_G = 0,
+	MTD_SIZE_M,
+	MTD_SIZE_K,
+};
+struct _mtd_size_info {
+	/*save mtd size type such as G/M/K*/
+	u32 size_type;
+	u32 size;
+};
+
 struct flash_dev {
 	char *device_name;
-	char *dev_str;
+	u32 dev_index;
 	struct flash_parts_info parts_info[MAX_PARTITION_NUM];
 	struct gpt_info gptinfo;
 	struct disk_partition *d_info;
 	struct blk_desc *dev_desc;
 	char *mtd_table;
-	char mtd_partition_file[30];
+
+	/*mtdinfo would use to try to find suitable patition file*/
+	char partition_file_name[30];
+	struct _mtd_size_info mtdinfo;
 
 	/*mtd write func*/
 	int (*mtd_write)(struct mtd_info *mtd,
@@ -164,6 +186,12 @@ void fastboot_oem_flash_gpt(const char *cmd, void *download_buffer, u32 download
  */
 int fastboot_mmc_flash_offset(u32 start_offset, void *download_buffer, u32 download_bytes);
 
+/**
+ * @brief accumulation from the addr and size
+*/
+u64 checksum64(u64 *baseaddr, u64 size);
+
+
 /**
  * @brief check image crc at blk dev. if crc is same it would return RESULT_OK(0).
  *
@@ -174,8 +202,8 @@ int fastboot_mmc_flash_offset(u32 start_offset, void *download_buffer, u32 downl
  * @param image_size
  * @return int
  */
-int check_blk_image_crc(struct blk_desc *dev_desc, ulong crc_compare, lbaint_t part_start_cnt,
-						ulong blksz, int image_size);
+int compare_blk_image_val(struct blk_desc *dev_desc, u64 crc_compare, lbaint_t part_start_cnt,
+						ulong blksz, uint64_t image_size);
 
 /**
  * @brief check image crc at mtd dev. if crc is same it would return RESULT_OK(0).
@@ -185,7 +213,7 @@ int check_blk_image_crc(struct blk_desc *dev_desc, ulong crc_compare, lbaint_t p
  * @param image_size
  * @return int
 */
-int check_mtd_image_crc(struct mtd_info *mtd, ulong crc_compare, int image_size);
+int compare_mtd_image_val(struct mtd_info *mtd, u64 crc_compare, uint64_t image_size);
 
 /**
  * @brief transfer the string of size 'KiB' or 'MiB' to u32 type.
@@ -212,7 +240,7 @@ int _parse_flash_config(struct flash_dev *fdev, void *load_flash_addr);
  * @param fdev
  * @return int
  */
-int _update_partinfo_to_env(void *download_buffer, u32 download_bytes,
+int _clear_env_part(void *download_buffer, u32 download_bytes,
 							struct flash_dev *fdev);
 
 /**

include/log.h

@@ -168,7 +168,7 @@ int _log_buffer(enum log_category_t cat, enum log_level_t level,
 #define _LOG_MAX_LEVEL LOGL_INFO
 #endif
 
-#define log_emer(_fmt...)	log(LOG_CATEGORY, LOGL_EMERG, ##_fmt)
+#define log_emerg(_fmt...)	log(LOG_CATEGORY, LOGL_EMERG, ##_fmt)
 #define log_alert(_fmt...)	log(LOG_CATEGORY, LOGL_ALERT, ##_fmt)
 #define log_crit(_fmt...)	log(LOG_CATEGORY, LOGL_CRIT, ##_fmt)
 #define log_err(_fmt...)	log(LOG_CATEGORY, LOGL_ERR, ##_fmt)