Complete homework 1

homework1/hw1.md

@@ -7,10 +7,14 @@
 
 1. Pull down the `prop_delay.zip` folder and simulate it in Modelsim. Include a similar waveform screenshot in your report and explain why each and every signal transition happens between 2 and 3ns.
 
+![](./question1.png)
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 The transition from `2ns` to `+1` is the parsing of the first line of the `vhd` file (that is, `sig1 <= a or b;`). The transition from `+2` is the cascading change (that is, `c <= not sig1;`).
 
 2. Pull down the `concurrency.zip` folder and simulate it in Modelsim. Include a similar waveform screenshot in your report and explain:
 
+![](./question2.png)
+
 - Why is `sequential c` initially undefined, while `concurrent c` has a starting value of `0`?
 
 Sequential values can only be implied one transition down. Concurrent values can be constantly re-checked, and include mid-state transitions.
@@ -21,5 +25,7 @@ The final values are different between sequential and concurrent, partially due
 
 3. Pull down the `concurrency.zip` folder and simulate it in Modelsim. Run the program as is, and save a waveform screenshot. Then run the program with `b` added to the sensitivity list shown below, and save a screenshot of this waveform as well. Include both waveforms, and explain why they are different.
 
+![](./question3.png)
+
 Initially, the process does not include `b` in the sensitivity list. So, when `b` changes, and `s='0'`, no change in `c` happens despite the inclusion of the set statement in the process. This is due to the fact that simulations use sensitivity lists to determine when to recalculate. However, when `b` is added to the sensitivity list, the change successfully happens.