Complete homework4

homework4/homework4.md

@@ -6,12 +6,29 @@
 
 1. How many clocks does it take to get a result after `a` is updated?
 
+1 clock cycle.
+
 2. What is $f_{max}$?
 
+Using the `Slow 1100mV 85C Model`, $f_{max}$ is defined as $178.38MHz$.
+
+Using the `Slow 1100mV 0C Model`, $f_{max}$ is defined as $175.59MHz$.
+
 3. What does negative slack mean?
 
-4. How mmany clocks does it take to get the result after `a` is updated?
+Slack in general is the difference between the allowed travel time for a given signal, and the arrival time of said signal. Negative slack indicates that a given signal will not reach its required destination in time. 
+
+4. How many clocks does it take to get the result after `a` is updated?
+
+2 clock cycles.
 
 5. Record the new $f_{max}$.
 
+Using the `Slow 1100mV 85C Model`, $f_{max}$ is defined as $257.67MHz$.
+
+Using the `Slow 1100mV 0C Model`, $f_{max}$ is defined as $255.49MHz$.
+
+
 6. Discuss why the $f_{max}$ is different between designs. Draw the datapath for each design from `a` to `result`.
+
+In the un-pipelined model, while there is only one clock cycle to produce the expected output, the register-to-register time is significantly longer, as there is more combinatorial logic before the register. By contrast, in the pipelined model there is significantly less combinatorial logic between any one register, meaning that the register-to-register time is faster overall. This leads to a larger $f_{max}$, meaning a faster responsiveness of the system, despite requiring in this case an additional clock cycle to compute the end result.