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ath12k is a new mac80211 driver for Qualcomm Wi-Fi 7 devices, first supporting QCN9274 and WCN7850 PCI devices. QCN9274 supports both AP and station; WCN7850 supports only station mode. Monitor mode is not (yet) supported. Only PCI bus devices are supported. ath12k is forked from an earlier version of ath11k. It was simpler to have a "clean start" for the new generation and not try to share the code with ath11k. This makes maintenance easier and avoids major changes in ath11k, which would have significantly increased the risk of regressions in existing setups. ath12k uses le32 and cpu_to_le32() macros to handle endian conversions, instead of using the firmware byte swap feature utilized by ath11k. There is only one kernel module, named ath12k.ko. Currently ath12k only supports HE mode (IEEE 802.11ax) or older, but work is ongoing to add EHT mode (IEEE 802.11be) support. The size of the driver is ~41 kLOC and 45 files. To make the review easier, this initial version of ath12k does not support Device Tree, debugfs or any other extra features. Those will be added later, after ath12k is accepted to upstream. The driver is build tested by Intel's kernel test robot with both GCC and Clang. Sparse reports no warnings. The driver is mostly free of checkpatch warnings, albeit few of the warnings are omitted on purpose, list of them here: https://github.com/qca/qca-swiss-army-knife/blob/master/tools/scripts/ath12k/ath12k-check#L52 The driver has had multiple authors who are listed in alphabetical order below. Co-developed-by: Balamurugan Selvarajan <quic_bselvara@quicinc.com> Signed-off-by: Balamurugan Selvarajan <quic_bselvara@quicinc.com> Co-developed-by: Baochen Qiang <quic_bqiang@quicinc.com> Signed-off-by: Baochen Qiang <quic_bqiang@quicinc.com> Co-developed-by: Bhagavathi Perumal S <quic_bperumal@quicinc.com> Signed-off-by: Bhagavathi Perumal S <quic_bperumal@quicinc.com> Co-developed-by: Carl Huang <quic_cjhuang@quicinc.com> Signed-off-by: Carl Huang <quic_cjhuang@quicinc.com> Co-developed-by: Jeff Johnson <quic_jjohnson@quicinc.com> Signed-off-by: Jeff Johnson <quic_jjohnson@quicinc.com> Co-developed-by: Karthikeyan Periyasamy <quic_periyasa@quicinc.com> Signed-off-by: Karthikeyan Periyasamy <quic_periyasa@quicinc.com> Co-developed-by: P Praneesh <quic_ppranees@quicinc.com> Signed-off-by: P Praneesh <quic_ppranees@quicinc.com> Co-developed-by: Pradeep Kumar Chitrapu <quic_pradeepc@quicinc.com> Signed-off-by: Pradeep Kumar Chitrapu <quic_pradeepc@quicinc.com> Co-developed-by: Ramya Gnanasekar <quic_rgnanase@quicinc.com> Signed-off-by: Ramya Gnanasekar <quic_rgnanase@quicinc.com> Co-developed-by: Sriram R <quic_srirrama@quicinc.com> Signed-off-by: Sriram R <quic_srirrama@quicinc.com> Co-developed-by: Vasanthakumar Thiagarajan <quic_vthiagar@quicinc.com> Signed-off-by: Vasanthakumar Thiagarajan <quic_vthiagar@quicinc.com> Co-developed-by: Wen Gong <quic_wgong@quicinc.com> Signed-off-by: Wen Gong <quic_wgong@quicinc.com> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
95 lines
2.7 KiB
C
95 lines
2.7 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
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/*
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* Copyright (c) 2019-2021 The Linux Foundation. All rights reserved.
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* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#ifndef ATH12K_REG_H
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#define ATH12K_REG_H
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#include <linux/kernel.h>
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#include <net/regulatory.h>
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struct ath12k_base;
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struct ath12k;
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/* DFS regdomains supported by Firmware */
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enum ath12k_dfs_region {
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ATH12K_DFS_REG_UNSET,
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ATH12K_DFS_REG_FCC,
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ATH12K_DFS_REG_ETSI,
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ATH12K_DFS_REG_MKK,
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ATH12K_DFS_REG_CN,
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ATH12K_DFS_REG_KR,
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ATH12K_DFS_REG_MKK_N,
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ATH12K_DFS_REG_UNDEF,
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};
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enum ath12k_reg_cc_code {
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REG_SET_CC_STATUS_PASS = 0,
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REG_CURRENT_ALPHA2_NOT_FOUND = 1,
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REG_INIT_ALPHA2_NOT_FOUND = 2,
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REG_SET_CC_CHANGE_NOT_ALLOWED = 3,
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REG_SET_CC_STATUS_NO_MEMORY = 4,
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REG_SET_CC_STATUS_FAIL = 5,
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};
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struct ath12k_reg_rule {
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u16 start_freq;
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u16 end_freq;
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u16 max_bw;
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u8 reg_power;
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u8 ant_gain;
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u16 flags;
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bool psd_flag;
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u16 psd_eirp;
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};
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struct ath12k_reg_info {
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enum ath12k_reg_cc_code status_code;
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u8 num_phy;
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u8 phy_id;
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u16 reg_dmn_pair;
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u16 ctry_code;
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u8 alpha2[REG_ALPHA2_LEN + 1];
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u32 dfs_region;
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u32 phybitmap;
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bool is_ext_reg_event;
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u32 min_bw_2g;
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u32 max_bw_2g;
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u32 min_bw_5g;
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u32 max_bw_5g;
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u32 num_2g_reg_rules;
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u32 num_5g_reg_rules;
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struct ath12k_reg_rule *reg_rules_2g_ptr;
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struct ath12k_reg_rule *reg_rules_5g_ptr;
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enum wmi_reg_6g_client_type client_type;
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bool rnr_tpe_usable;
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bool unspecified_ap_usable;
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/* TODO: All 6G related info can be stored only for required
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* combination instead of all types, to optimize memory usage.
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*/
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u8 domain_code_6g_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
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u8 domain_code_6g_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
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u32 domain_code_6g_super_id;
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u32 min_bw_6g_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
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u32 max_bw_6g_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
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u32 min_bw_6g_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
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u32 max_bw_6g_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
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u32 num_6g_reg_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
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u32 num_6g_reg_rules_cl[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
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struct ath12k_reg_rule *reg_rules_6g_ap_ptr[WMI_REG_CURRENT_MAX_AP_TYPE];
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struct ath12k_reg_rule *reg_rules_6g_client_ptr
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[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
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};
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void ath12k_reg_init(struct ath12k *ar);
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void ath12k_reg_free(struct ath12k_base *ab);
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void ath12k_regd_update_work(struct work_struct *work);
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struct ieee80211_regdomain *ath12k_reg_build_regd(struct ath12k_base *ab,
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struct ath12k_reg_info *reg_info,
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bool intersect);
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int ath12k_regd_update(struct ath12k *ar, bool init);
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int ath12k_reg_update_chan_list(struct ath12k *ar);
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#endif
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