Coursework for HDL Lab
- Verilog 39.9%
- VHDL 34.7%
- Tcl 16.5%
- Stata 7.7%
- HTML 0.6%
- Other 0.6%
| lab1 | ||
| lab2 | ||
| lab3 | ||
| lab4 | ||
| lab5 | ||
| lab6 | ||
| lab7 | ||
| lab8 | ||
| tips/hdl | ||
| DE0-CV-pintable.pdf | ||
| DE0_CV_User_Manual.pdf | ||
| DE1-SoC_User_manual.pdf | ||
| LICENSE | ||
| README.md | ||
cpet-343-01l2-coursework
Coursework for HDL Lab