Add timing analysis to makefiles
This commit is contained in:
parent
5cabda242d
commit
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GPG key ID:
61C1E13067E0018E
10 changed files with 1646 additions and 14 deletions
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@ -1,7 +1,18 @@
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build:
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yosys -m ghdl -p 'ghdl -fsynopsys leds.vhd ledmux.vhd matrixToSevenSeg.vhd -e leds; write_verilog leds.v; synth_ice40 -top leds -json leds.json'
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nextpnr-ice40 --hx8k --package cb132 --json leds.json --pcf leds.pcf --asc leds.asc
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icepack leds.asc leds.bin
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PROJ = toplevel
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PCF = ../pinout.pcf
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FILES = $(wildcard *.vhd)
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.PHONY: burn clean
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build: $(FILES)
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([ -d build ] || mkdir build)
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yosys -m ghdl -p 'ghdl -fsynopsys $(FILES) -e $(PROJ); write_verilog build/$(PROJ).v; synth_ice40 -top $(PROJ) -json build/$(PROJ).json'
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nextpnr-ice40 --hx8k --package cb132 --json build/$(PROJ).json --pcf $(PCF) --asc build/$(PROJ).asc
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icepack build/$(PROJ).asc $(PROJ).bin
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icetime -d hx8k -c 12 -r timingReport.txt -j timingReport.json build/$(PROJ).asc
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burn:
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iceFUNprog leds.bin
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iceFUNprog $(PROJ).bin
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clean:
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rm -rf *.bin build timingReport.*
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1479
exampleOutput.txt
Normal file
1479
exampleOutput.txt
Normal file
File diff suppressed because it is too large
Load diff
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@ -1,17 +1,18 @@
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PROJ = toplevel
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PCF = ../pinout
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PCF = ../pinout.pcf
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FILES = $(wildcard *.vhd)
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#.PHONY: burn clean
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.PHONY: burn clean
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build: $(FILES)
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([ -d build ] || mkdir build)
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yosys -m ghdl -p 'ghdl -fsynopsys $(FILES) -e toplevel; write_verilog build/toplevel.v; synth_ice40 -top $(PROJ) -json build/$(PROJ).json'
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nextpnr-ice40 --hx8k --package cb132 --json build/$(PROJ).json --pcf $(PCF).pcf --asc build/$(PROJ).asc
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yosys -m ghdl -p 'ghdl -fsynopsys $(FILES) -e $(PROJ); write_verilog build/$(PROJ).v; synth_ice40 -top $(PROJ) -json build/$(PROJ).json'
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nextpnr-ice40 --hx8k --package cb132 --json build/$(PROJ).json --pcf $(PCF) --asc build/$(PROJ).asc
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icepack build/$(PROJ).asc $(PROJ).bin
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icetime -d hx8k -c 12 -r timingReport.txt -j timingReport.json build/$(PROJ).asc
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burn:
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iceFUNprog $(PROJ).bin
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clean:
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rm -rf *.bin build
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rm -rf *.bin build timingReport.*
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19
piezoBuzzer/timingReport.json
Normal file
19
piezoBuzzer/timingReport.json
Normal file
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@ -0,0 +1,19 @@
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[
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[
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{ "net": "buttons[1]$SB_IO_IN", "hwnet": "net_104591", "cell": "pre_io_26_33_0", "cell_type": "PRE_IO", "cell_in_port": "[clk]", "cell_out_port": "DIN0", "delay_ns": 0.240 },
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{ "hwnet": "net_104547", "cell": "odrv_26_33_104591_104547", "cell_type": "Odrv4", "cell_in_port": "I", "cell_out_port": "O", "delay_ns": 0.612 },
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{ "hwnet": "seg_22_30_sp4_h_r_5_92836", "cell": "t65", "cell_type": "Span4Mux_h4", "cell_in_port": "I", "cell_out_port": "O", "delay_ns": 0.928 },
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{ "hwnet": "seg_18_30_sp4_h_r_1_76522", "cell": "t64", "cell_type": "Span4Mux_h4", "cell_in_port": "I", "cell_out_port": "O", "delay_ns": 1.243 },
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{ "hwnet": "seg_17_30_sp4_r_v_b_6_72095", "cell": "t63", "cell_type": "Span4Mux_v1", "cell_in_port": "I", "cell_out_port": "O", "delay_ns": 1.447 },
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{ "hwnet": "seg_17_30_local_g1_6_72365", "cell": "t62", "cell_type": "LocalMux", "cell_in_port": "I", "cell_out_port": "O", "delay_ns": 1.776 },
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{ "hwnet": "net_72387", "cell": "inmux_17_30_72365_72387", "cell_type": "InMux", "cell_in_port": "I", "cell_out_port": "O", "delay_ns": 2.036 },
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{ "net": "speakerPos_SB_DFFESR_Q_E", "hwnet": "net_68233", "cell": "lc40_17_30_0", "cell_type": "LogicCell40", "cell_in_port": "in3", "cell_out_port": "lcout", "delay_ns": 2.351 },
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{ "hwnet": "net_70968", "cell": "odrv_17_30_68233_70968", "cell_type": "Odrv12", "cell_in_port": "I", "cell_out_port": "O", "delay_ns": 2.891 },
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{ "hwnet": "seg_17_19_local_g2_7_71021", "cell": "t61", "cell_type": "LocalMux", "cell_in_port": "I", "cell_out_port": "O", "delay_ns": 3.221 },
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{ "hwnet": "net_71046", "cell": "inmux_17_19_71021_71046", "cell_type": "InMux", "cell_in_port": "I", "cell_out_port": "O", "delay_ns": 3.480 },
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{ "net": "speakerPos_SB_DFFESR_Q_E", "hwnet": "net_66882", "cell": "lc40_17_19_2", "cell_type": "LogicCell40", "cell_in_port": "in3", "cell_out_port": "lcout", "delay_ns": 3.796 },
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{ "hwnet": "seg_16_19_local_g2_2_66939", "cell": "t54", "cell_type": "LocalMux", "cell_in_port": "I", "cell_out_port": "O", "delay_ns": 4.126 },
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{ "net": "speakerPos_SB_DFFESR_Q_E", "hwnet": "net_67000", "cell": "inmux_16_19_66939_67000", "cell_type": "CEMux", "cell_in_port": "I", "cell_out_port": "O", "delay_ns": 4.729 },
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{ "net": "buzzer_inst.counter[7]", "hwnet": "net_62811", "cell": "lc40_16_19_7", "cell_type": "LogicCell40", "cell_in_port": "ce", "cell_out_port": "[setup]", "delay_ns": 4.729 }
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]
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]
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33
piezoBuzzer/timingReport.txt
Normal file
33
piezoBuzzer/timingReport.txt
Normal file
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Report for critical path:
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-------------------------
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pre_io_26_33_0 (PRE_IO) [clk] -> DIN0: 0.240 ns
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0.240 ns net_104591 (buttons[1]$SB_IO_IN)
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odrv_26_33_104591_104547 (Odrv4) I -> O: 0.372 ns
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t65 (Span4Mux_h4) I -> O: 0.316 ns
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t64 (Span4Mux_h4) I -> O: 0.316 ns
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t63 (Span4Mux_v1) I -> O: 0.203 ns
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t62 (LocalMux) I -> O: 0.330 ns
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inmux_17_30_72365_72387 (InMux) I -> O: 0.260 ns
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lc40_17_30_0 (LogicCell40) in3 -> lcout: 0.316 ns
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2.351 ns net_68233 (speakerPos_SB_DFFESR_Q_E)
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odrv_17_30_68233_70968 (Odrv12) I -> O: 0.540 ns
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t61 (LocalMux) I -> O: 0.330 ns
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inmux_17_19_71021_71046 (InMux) I -> O: 0.260 ns
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lc40_17_19_2 (LogicCell40) in3 -> lcout: 0.316 ns
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3.796 ns net_66882 (speakerPos_SB_DFFESR_Q_E)
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t54 (LocalMux) I -> O: 0.330 ns
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inmux_16_19_66939_67000 (CEMux) I -> O: 0.603 ns
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4.729 ns net_67000 (speakerPos_SB_DFFESR_Q_E)
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lc40_16_19_7 (LogicCell40) ce [setup]: 0.000 ns
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4.729 ns net_62811 (buzzer_inst.counter[7])
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Resolvable net names on path:
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0.240 ns .. 2.036 ns buttons[1]$SB_IO_IN
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2.351 ns .. 4.729 ns speakerPos_SB_DFFESR_Q_E
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carryout -> buzzer_inst.counter_SB_DFFESR_Q_4_D_SB_LUT4_O_I3
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lcout -> buzzer_inst.counter[7]
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Total number of logic levels: 3
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Total path delay: 4.73 ns (211.47 MHz)
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@ -9,9 +9,9 @@ build: $(FILES)
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yosys -m ghdl -p 'ghdl -fsynopsys $(FILES) -e $(PROJ); write_verilog build/$(PROJ).v; synth_ice40 -top $(PROJ) -json build/$(PROJ).json'
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nextpnr-ice40 --hx8k --package cb132 --json build/$(PROJ).json --pcf $(PCF) --asc build/$(PROJ).asc
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icepack build/$(PROJ).asc $(PROJ).bin
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icetime -d hx8k -c 12 -r timingReport.txt -j timingReport.json build/$(PROJ).asc
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burn:
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iceFUNprog $(PROJ).bin
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clean:
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rm -rf *.bin build
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rm -rf *.bin build timingReport.*
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33
simpleCounter/timingReport.json
Normal file
33
simpleCounter/timingReport.json
Normal file
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[
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[
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{ "net": "counter[24]", "hwnet": "net_48095", "cell": "lc40_12_32_0", "cell_type": "LogicCell40", "cell_in_port": "[clk]", "cell_out_port": "lcout", "delay_ns": 0.640 },
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{ "hwnet": "net_51950", "cell": "odrv_12_32_48095_51950", "cell_type": "Odrv4", "cell_in_port": "I", "cell_out_port": "O", "delay_ns": 1.012 },
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{ "hwnet": "seg_13_30_local_g3_1_56069", "cell": "t148", "cell_type": "LocalMux", "cell_in_port": "I", "cell_out_port": "O", "delay_ns": 1.341 },
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{ "hwnet": "net_56113", "cell": "inmux_13_30_56069_56113", "cell_type": "InMux", "cell_in_port": "I", "cell_out_port": "O", "delay_ns": 1.601 },
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{ "net": "ledRow_SB_LUT4_O_2_I2_SB_LUT4_O_I3[2]", "hwnet": "net_51932", "cell": "lc40_13_30_6", "cell_type": "LogicCell40", "cell_in_port": "in0", "cell_out_port": "lcout", "delay_ns": 2.050 },
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{ "hwnet": "seg_14_30_local_g0_6_60127", "cell": "t156", "cell_type": "LocalMux", "cell_in_port": "I", "cell_out_port": "O", "delay_ns": 2.379 },
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{ "hwnet": "net_60178", "cell": "inmux_14_30_60127_60178", "cell_type": "InMux", "cell_in_port": "I", "cell_out_port": "O", "delay_ns": 2.639 },
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{ "net": "ledRow_SB_LUT4_O_2_I2_SB_LUT4_O_I3_SB_LUT4_I3_O[1]", "hwnet": "net_56007", "cell": "lc40_14_30_4", "cell_type": "LogicCell40", "cell_in_port": "in0", "cell_out_port": "lcout", "delay_ns": 3.088 },
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{ "hwnet": "seg_14_30_local_g0_4_60125", "cell": "t191", "cell_type": "LocalMux", "cell_in_port": "I", "cell_out_port": "O", "delay_ns": 3.417 },
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{ "hwnet": "net_60199", "cell": "inmux_14_30_60125_60199", "cell_type": "InMux", "cell_in_port": "I", "cell_out_port": "O", "delay_ns": 3.677 },
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{ "net": "ledRow_SB_LUT4_O_1_I3_SB_LUT4_O_I0[3]", "hwnet": "net_56010", "cell": "lc40_14_30_7", "cell_type": "LogicCell40", "cell_in_port": "in3", "cell_out_port": "lcout", "delay_ns": 3.992 },
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{ "hwnet": "net_56034", "cell": "odrv_14_30_56010_56034", "cell_type": "Odrv4", "cell_in_port": "I", "cell_out_port": "O", "delay_ns": 4.364 },
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{ "hwnet": "seg_13_32_local_g1_6_56304", "cell": "t197", "cell_type": "LocalMux", "cell_in_port": "I", "cell_out_port": "O", "delay_ns": 4.694 },
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{ "hwnet": "net_56360", "cell": "inmux_13_32_56304_56360", "cell_type": "InMux", "cell_in_port": "I", "cell_out_port": "O", "delay_ns": 4.953 },
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{ "net": "ledRow_SB_LUT4_O_6_I3_SB_LUT4_O_I0[3]", "hwnet": "net_52178", "cell": "lc40_13_32_6", "cell_type": "LogicCell40", "cell_in_port": "in1", "cell_out_port": "lcout", "delay_ns": 5.353 },
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{ "hwnet": "seg_12_32_local_g2_6_52235", "cell": "t179", "cell_type": "LocalMux", "cell_in_port": "I", "cell_out_port": "O", "delay_ns": 5.683 },
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{ "hwnet": "net_52284", "cell": "inmux_12_32_52235_52284", "cell_type": "InMux", "cell_in_port": "I", "cell_out_port": "O", "delay_ns": 5.942 },
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{ "hwnet": "net_52284_cascademuxed", "cell": "t24", "cell_type": "CascadeMux", "cell_in_port": "I", "cell_out_port": "O", "delay_ns": 5.942 },
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{ "net": "ledRow_SB_LUT4_O_6_I3[1]", "hwnet": "net_48101", "cell": "lc40_12_32_6", "cell_type": "LogicCell40", "cell_in_port": "in2", "cell_out_port": "lcout", "delay_ns": 6.321 },
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{ "hwnet": "seg_11_32_local_g2_6_48158", "cell": "t141", "cell_type": "LocalMux", "cell_in_port": "I", "cell_out_port": "O", "delay_ns": 6.651 },
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{ "hwnet": "net_48207", "cell": "inmux_11_32_48158_48207", "cell_type": "InMux", "cell_in_port": "I", "cell_out_port": "O", "delay_ns": 6.910 },
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{ "hwnet": "net_48207_cascademuxed", "cell": "t8", "cell_type": "CascadeMux", "cell_in_port": "I", "cell_out_port": "O", "delay_ns": 6.910 },
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{ "net": "ledRow[7]$SB_IO_OUT", "hwnet": "net_44024", "cell": "lc40_11_32_6", "cell_type": "LogicCell40", "cell_in_port": "in2", "cell_out_port": "lcout", "delay_ns": 7.289 },
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{ "hwnet": "net_36006", "cell": "odrv_11_32_44024_36006", "cell_type": "Odrv4", "cell_in_port": "I", "cell_out_port": "O", "delay_ns": 7.661 },
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{ "hwnet": "seg_4_32_sp4_h_r_5_20367", "cell": "t80", "cell_type": "Span4Mux_h4", "cell_in_port": "I", "cell_out_port": "O", "delay_ns": 7.976 },
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{ "hwnet": "seg_4_33_span4_vert_46_20394", "cell": "t79", "cell_type": "Span4Mux_v1", "cell_in_port": "I", "cell_out_port": "O", "delay_ns": 8.180 },
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{ "hwnet": "seg_4_33_local_g0_6_20412", "cell": "t78", "cell_type": "LocalMux", "cell_in_port": "I", "cell_out_port": "O", "delay_ns": 8.509 },
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{ "net": "ledRow[7]$SB_IO_OUT", "hwnet": "net_20397", "cell": "inmux_4_33_20412_20397", "cell_type": "IoInMux", "cell_in_port": "I", "cell_out_port": "O", "delay_ns": 8.769 },
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{ "hwnet": "io_pad_4_33_0_din", "cell": "pre_io_4_33_0", "cell_type": "PRE_IO", "cell_in_port": "DOUT0", "cell_out_port": "[setup]", "delay_ns": 8.839 }
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]
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]
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54
simpleCounter/timingReport.txt
Normal file
54
simpleCounter/timingReport.txt
Normal file
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Report for critical path:
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-------------------------
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lc40_12_32_0 (LogicCell40) [clk] -> lcout: 0.640 ns
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0.640 ns net_48095 (counter[24])
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odrv_12_32_48095_51950 (Odrv4) I -> O: 0.372 ns
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t148 (LocalMux) I -> O: 0.330 ns
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inmux_13_30_56069_56113 (InMux) I -> O: 0.260 ns
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lc40_13_30_6 (LogicCell40) in0 -> lcout: 0.449 ns
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2.050 ns net_51932 (ledRow_SB_LUT4_O_2_I2_SB_LUT4_O_I3[2])
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t156 (LocalMux) I -> O: 0.330 ns
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inmux_14_30_60127_60178 (InMux) I -> O: 0.260 ns
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lc40_14_30_4 (LogicCell40) in0 -> lcout: 0.449 ns
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3.088 ns net_56007 (ledRow_SB_LUT4_O_2_I2_SB_LUT4_O_I3_SB_LUT4_I3_O[1])
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t191 (LocalMux) I -> O: 0.330 ns
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inmux_14_30_60125_60199 (InMux) I -> O: 0.260 ns
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lc40_14_30_7 (LogicCell40) in3 -> lcout: 0.316 ns
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3.992 ns net_56010 (ledRow_SB_LUT4_O_1_I3_SB_LUT4_O_I0[3])
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odrv_14_30_56010_56034 (Odrv4) I -> O: 0.372 ns
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t197 (LocalMux) I -> O: 0.330 ns
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inmux_13_32_56304_56360 (InMux) I -> O: 0.260 ns
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lc40_13_32_6 (LogicCell40) in1 -> lcout: 0.400 ns
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5.353 ns net_52178 (ledRow_SB_LUT4_O_6_I3_SB_LUT4_O_I0[3])
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t179 (LocalMux) I -> O: 0.330 ns
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inmux_12_32_52235_52284 (InMux) I -> O: 0.260 ns
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t24 (CascadeMux) I -> O: 0.000 ns
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lc40_12_32_6 (LogicCell40) in2 -> lcout: 0.379 ns
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6.321 ns net_48101 (ledRow_SB_LUT4_O_6_I3[1])
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t141 (LocalMux) I -> O: 0.330 ns
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inmux_11_32_48158_48207 (InMux) I -> O: 0.260 ns
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t8 (CascadeMux) I -> O: 0.000 ns
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lc40_11_32_6 (LogicCell40) in2 -> lcout: 0.379 ns
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7.289 ns net_44024 (ledRow[7]$SB_IO_OUT)
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odrv_11_32_44024_36006 (Odrv4) I -> O: 0.372 ns
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t80 (Span4Mux_h4) I -> O: 0.316 ns
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t79 (Span4Mux_v1) I -> O: 0.203 ns
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t78 (LocalMux) I -> O: 0.330 ns
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inmux_4_33_20412_20397 (IoInMux) I -> O: 0.260 ns
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8.769 ns net_20397 (ledRow[7]$SB_IO_OUT)
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pre_io_4_33_0 (PRE_IO) DOUT0 [setup]: 0.070 ns
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8.839 ns io_pad_4_33_0_din
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Resolvable net names on path:
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0.640 ns .. 1.601 ns counter[24]
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2.050 ns .. 2.639 ns ledRow_SB_LUT4_O_2_I2_SB_LUT4_O_I3[2]
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3.088 ns .. 3.677 ns ledRow_SB_LUT4_O_2_I2_SB_LUT4_O_I3_SB_LUT4_I3_O[1]
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3.992 ns .. 4.953 ns ledRow_SB_LUT4_O_1_I3_SB_LUT4_O_I0[3]
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5.353 ns .. 5.942 ns ledRow_SB_LUT4_O_6_I3_SB_LUT4_O_I0[3]
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6.321 ns .. 6.910 ns ledRow_SB_LUT4_O_6_I3[1]
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7.289 ns .. 8.769 ns ledRow[7]$SB_IO_OUT
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Total number of logic levels: 7
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Total path delay: 8.84 ns (113.14 MHz)
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@ -9,10 +9,11 @@ build: $(FILES)
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yosys -m ghdl -p 'ghdl -fsynopsys $(FILES) -e $(PROJ); write_verilog build/$(PROJ).v; synth_ice40 -top $(PROJ) -json build/$(PROJ).json'
|
||||
nextpnr-ice40 --hx8k --package cb132 --json build/$(PROJ).json --pcf $(PCF) --asc build/$(PROJ).asc
|
||||
icepack build/$(PROJ).asc $(PROJ).bin
|
||||
icetime -d hx8k -c 12 -r timingReport.txt -j timingReport.json build/$(PROJ).asc
|
||||
|
||||
burn:
|
||||
+$(MAKE) build
|
||||
iceFUNprog $(PROJ).bin
|
||||
|
||||
clean:
|
||||
rm -rf *.bin build
|
||||
rm -rf *.bin build timingReport.*
|
||||
|
|
|
|||
|
|
@ -9,9 +9,10 @@ build: $(FILES)
|
|||
yosys -m ghdl -p 'ghdl -fsynopsys $(FILES) -e $(PROJ); write_verilog build/$(PROJ).v; synth_ice40 -top $(PROJ) -json build/$(PROJ).json'
|
||||
nextpnr-ice40 --hx8k --package cb132 --json build/$(PROJ).json --pcf $(PCF) --asc build/$(PROJ).asc
|
||||
icepack build/$(PROJ).asc $(PROJ).bin
|
||||
icetime -d hx8k -c 12 -r timingReport.txt -j timingReport.json build/$(PROJ).asc
|
||||
|
||||
burn:
|
||||
iceFUNprog $(PROJ).bin
|
||||
|
||||
clean:
|
||||
rm -rf *.bin build
|
||||
rm -rf *.bin build timingReport.*
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue