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New gcc target

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lcbcfoo 2018-07-19 16:35:34 -03:00
parent e065bc7e29
commit 86c1a85625
1 changed files with 1 additions and 1 deletions
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riscv/Makefile
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@ -10,7 +10,7 @@
# Update the following variables to your environment and board used
# Cross compiler (Must be RV32I only)
CROSS=../../rv32i-gcc/bin/riscv32-unknown-elf-
CROSS=../../riscv-gcc/bin/riscv32-unknown-elf-
# Design you are targeting
DESIGN=leon3-digilent-nexys4ddr