mirror of
https://github.com/lcbcFoo/ReonV.git
synced 2025-04-22 12:37:06 -04:00
193 lines
2.5 KiB
ArmAsm
193 lines
2.5 KiB
ArmAsm
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/* Template boot-code for LEON3 test benches */
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#include "prom.h"
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#ifndef STACKSIZE
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#define STACKSIZE 0x00020000
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#endif
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.seg "text"
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.proc 0
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.align 4
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.global start
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start:
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flush
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set 0x10e0, %g1 ! init IU
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mov %g1, %psr
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mov %g0, %wim
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mov %g0, %tbr
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mov %g0, %y
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mov %g0, %asr16
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nop
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set 0x81000f, %g1
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sta %g1, [%g0] 2
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mov %g0, %g2
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nop
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nop
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nop
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nop
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nop
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or %g2, %g2, %g0
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nop
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nop
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nop
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nop
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nop
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#ifdef DSUADDR
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set DSUADDR, %g2
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st %g0, [%g2]
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st %g0, [%g2+0x08]
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st %g0, [%g2+0x20]
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st %g0, [%g2+0x24]
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st %g0, [%g2+0x40]
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st %g0, [%g2+0x44]
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st %g0, [%g2+0x50]
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st %g0, [%g2+0x54]
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st %g0, [%g2+0x58]
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st %g0, [%g2+0x5C]
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st %g0, [%g2+0x54]
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#endif
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2:
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mov %asr17, %g3
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and %g3, 0x1f, %g3
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mov %g0, %g4
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mov %g0, %g5
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mov %g0, %g6
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mov %g0, %g7
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1:
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mov %g0, %l0
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mov %g0, %l1
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mov %g0, %l2
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mov %g0, %l3
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mov %g0, %l4
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mov %g0, %l5
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mov %g0, %l6
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mov %g0, %l7
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mov %g0, %o0
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mov %g0, %o1
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mov %g0, %o2
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mov %g0, %o3
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mov %g0, %o4
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mov %g0, %o5
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mov %g0, %o6
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mov %g0, %o7
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subcc %g3, 1, %g3
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bge 1b
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save
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mov 2, %g1
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mov %g1, %wim
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set 0x10e0, %g1 ! enable traps
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mov %g1, %psr
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nop; nop; nop;
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mov %psr, %g1
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srl %g1, 12, %g1
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andcc %g1, 1, %g0
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be 1f
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nop
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set _fsrxx, %g3
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ld [%g3], %fsr
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ldd [%g3], %f0
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ldd [%g3], %f2
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ldd [%g3], %f4
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ldd [%g3], %f6
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ldd [%g3], %f8
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ldd [%g3], %f10
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ldd [%g3], %f12
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ldd [%g3], %f14
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ldd [%g3], %f16
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ldd [%g3], %f18
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ldd [%g3], %f20
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ldd [%g3], %f22
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ldd [%g3], %f24
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ldd [%g3], %f26
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ldd [%g3], %f28
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ldd [%g3], %f30
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nop
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nop
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nop
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nop
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nop
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faddd %f0, %f2, %f4
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nop
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nop
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nop
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nop
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ba 1f
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nop
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.align 8
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_fsrxx:
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.word 0
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.word 0
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1:
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mov %asr17, %g3
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srl %g3, 28, %g3
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andcc %g3, 0x0f, %g3
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bne 1f
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set L2MCTRLIO, %g1
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set MCFG1, %g2
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st %g2, [%g1]
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set MCFG2, %g2
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st %g2, [%g1+4]
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set MCFG3, %g2
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st %g2, [%g1+8]
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! set IRQCTRL, %g1
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! set 0x0ffff, %g2
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! st %g2, [%g1+0x10]
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#ifdef DDR2CTRLIO
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set DDR2CTRLIO, %g1
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set DDR2CFG4, %g2
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st %g2, [%g1+12]
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#endif
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#ifdef ASDCFG
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#ifndef SDCTRLPNP
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#define SDCTRLPNP 0xFFFFF860
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#endif
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set SDCTRLPNP, %g1
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ld [%g1], %g2
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srl %g2, 12, %g2
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set 0x01009, %g1
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subcc %g1, %g2, %g0
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bne 1f
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set ASDCFG, %g1
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set DSDCFG, %g2
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st %g2, [%g1]
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#endif
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! %g3 = cpu index
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1: set STACKSIZE, %g2
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mov %g0, %g1
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2: subcc %g3, 0, %g0
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be 3f
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nop
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add %g1, %g2, %g1
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ba 2b
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sub %g3, 1, %g3
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3: set RAMSTART+ RAMSIZE-32, %fp
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sub %fp, %g1, %fp
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sub %fp, 96, %sp
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set RAMSTART, %g1
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! set 0x88100000, %g2 ! restore data that was zapped by calibration
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! set 0x0910006d, %g3
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! std %g2, [%g1]
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jmp %g1
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nop
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.align 32
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