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ReonV is a modified version of the Leon3, a synthesisable VHDL model of a 32-bit processor originally compliant with the SPARC V8 architecture, now changed to RISC-V ISA.
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lcbcFoo 39dd8da4f8 First Commit: Cloned grlib-gpl-2017.2-b4194
2017-09-04 11:11:45 -03:00
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